CHAPTER 5 FIELD EFFECT TRANSISTORS (FET) edit.ppt

FIELD EFFECT TRANSISTORS

(FET)

Objectives

Illustrate the physical structure and schematic symbol of JFET and MOSFET

Explain biasing circuit: CS, CD & CG Amplifier

Explain I-V characteristics and operating region.

Explain FET as a switch

Introduction

Junction Field Effect Transistors JFET control current by voltage applied to the gate.

The FET’s major advantage over the BJT is high input resistance.

JFET are more temperature stable than bipolar.

Overall, the purpose of the FET is the same as that of the BJT.

I-V characteristics

MOSFET

The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a transistor used for amplifying or switching electronic signals.

In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting channel between the two other contacts called source and drain. The channel can be of n-type or p-type (see article on semiconductor devices), and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common.

N-MOS & P-MOS

N-MOS

n-channel MOSFETs are smaller than p-channel MOSFETs and producing only one type of MOSFET on a silicon substrate is cheaper and technically simpler.

These were the driving principles in the design of NMOS logic which uses n-channel MOSFETs exclusively.

However, unlike CMOS logic, NMOS logic consumes power even when no switching is taking place.

Cont’d

P-MOS

P-type metal-oxide-semiconductor logic uses p-type metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits.

PMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active) and velocity saturation.

Cont’d PMOS logic is easy to design and manufacture (a MOSFET can be

made to operate as a resistor, so the whole circuit can be made with PMOS FETs).

PMOS circuits are slow to transition from high to low.

When transitioning from low to high, the transistors provide low resistance, and the capacitive charge at the output drains away very quickly.

Schematic diagram

N-MOS P-MOS

D-MOSFET (Depletion mode)

D-MOSFETs can operate in the depletion and enhancement modes.

Zero bias:The gate is shorted to the source, so drain current (by definition)

equals the IDSS rating of the component. (Remember: IDSS is the shorted

gate-drain current.)

Depletion mode:The negative gate-source voltage forces free electrons away

from the gate, forming a depletion layer that cuts into the channel. As a result,

ID < IDSS

Enhancement mode:The positive gate-source voltage attracts free electrons in

the substrate toward the channel while driving valence-band holes (in thesubstrate) away from the channel. As a result, the material to the right of thechannelef f ect i vel y becomesn-type material. This results in a wider channel,and ID > IDSS

E-MOSFETs E-MOSFETs are restricted to enhancement-mode operation.

When an E-MOSFET is zero biased, there is no channel between the source and drain materials, and ID =0A. When VGS exceeds the threshold voltage rating for the component VTH, a channel is formed.

This allows a current to pass through the component. The operation of the E-MOSFET is represented by the transconductance curve. Note that the IDSS rating for the component is, by definition, the value of drain current when VGS =VTH. Since the channel is just beginning to form when VGS= VTH , IDSS≈0A

NMOS I-V CHARACTERISTICS

• Since the transistor is a 3-terminal device, there is no single I-V characteristic.• Note that because of the gate insulator, IG = 0 A.• We typically define the MOS I-V characteristic as

ID vs. VDS for a fixed VGS • 3 modes of operation

N-MOS I-V CURVE

Cutoff Mode

• Occurs when VGS ≤ VTH(N)

ID= 0

Triode Mode

• Occurs when VGS > VTH(N) and VDS < VGS-VTH(N)

Saturation Mode

• Occurs when VGS > VTH(N) and VDS ≥ VGS -VTH(N)

PMOS IV CHARACTERISTICS

• ID, VGS, VDS, and VTH(P) are all negative for PMOS. These values are positive for NMOS.• Channel formed when VGS < VTH(P) .Opposite for NMOS .• Saturation occurs when VDS ≤ VGS – VTH(P) . Opposite for NMOS

P-MOS I-V CURVE

Cutoff Mode

• Occurs when VGS ≥ VTH(P)

ID= 0

Triode Mode

• Occurs when VGS < VTH(P) and VDS > VGS -VTH(P)

Saturation Mode

• Occurs when VGS < VTH(P) and VDS ≤ VGS- VTH(P)

MOSFET I-V CHARACTERISTICS

Triode mode or linear region

(also known as the ohmic mode)

When VGS > Vth and VDS < ( VGS – Vth )

The transistor is turned on, and a channel has been created which allows current to flow between the drain and the source.

The MOSFET operates like a resistor, controlled by the gate voltage relative to both the source and drain voltages.

Saturation or active mode

When VGS > Vth and VDS > ( VGS – Vth )

The switch is turned on, and a channel has been created, which allows current to flow between the drain and source.

Since the drain voltage is higher than the gate voltage, the electrons spread out, and conduction is not through a narrow channel but through a broader, two- or three-dimensional current distribution extending away from the interface and deeper in the substrate.

The onset of this region is also known as pinch-off to indicate the lack of channel region near the drain. The drain current is now weakly dependent upon drain voltage and controlled primarily by the gate–source voltage.

JFET AMPLIFIER FET amplifier application:

Amplifying low-level signals in receiver

Power Amplifier

Switching

Standard Amplifier configuration:

Common-Sources

Common Drain

Common Gate

Common Source Amplifier

AC input signal is applied to the gate and AC output signal is taken from the drain.

A common source amplifier either has no source resistor or has a bypassed source resistor. The source is connected to the ground.

Common Drain Amplifier

Input signal is applied to the gate and output is taking from the source.

There is no drain resistor.

The input signal is applied to the gate through a coupling capacitor, C1 and the output signal is coupled to the load resistor through C2.

Common Gate Amplifier

The gate is connected directly to ground

The input signal is applied at the source C1. The output is coupled through C2 from the drain terminal.

Data Sheet

MOSFET AS SWITCHES

MOSFET switches use the MOSFET channel as a low–on-resistance switch to pass analog signals when on, and as a high impedance when off. Signals flow in both directions across a MOSFET switch.

In this application the drain and source of a MOSFET exchange places depending on the voltages of each electrode compared to that of the gate.

Cont’d

For a simple MOSFET without an integrated diode, the source is the more negative side for an N-MOS or the more positive side for a P-MOS.

All of these switches are limited on what signals they can pass or stop by their gate-source, gate-drain and source-drain voltages, and source-to-drain currents; exceeding the voltage limits will potentially damage the switch.

MOSFET CHARACTERISTIC CURVE

1. Cut-off Region

Here the operating conditions of the transistor are zero input gate voltage ( VIN ), zero drain current IDand output voltage VDS = VDD Therefore the MOSFET is switched "Fully-OFF".

Saturation Region

Here the transistor will be biased so that the maximum amount of gate voltage is applied to the device which results in the channel resistance RDS(on) being as small as possible with maximum drain current flowing through the MOSFET switch. Therefore the MOSFET is switched "Fully-ON".

•The input and Gate are grounded (0v)•Gate-source voltage less than threshold voltage VGS < VTH

•MOSFET is "fully-OFF" (Cut-off region)•No Drain current flows ( ID = 0 )•VOUT = VDS = VDD = "1"•MOSFET operates as an "open switch"

Then we can define the "cut-off region" or "OFF mode" of a MOSFET switch as being, gate voltage,VGS < VTH and ID = 0. For a P-channel MOSFET, the gate potential must be negative.

N-MOS as switch

•The input and Gate are connected to VDD

•Gate-source voltage is much greater than threshold voltage VGS > VTH

•MOSFET is "fully-ON" (saturation region)•Max Drain current flows ( ID = VDD / RL )•VDS = 0V (ideal saturation)•Min channel resistance RDS(on) < 0.1Ω•VOUT = VDS = 0.2V (RDS.ID)•MOSFET operates as a "closed switch"

Then we can define the "saturation region" or "ON mode" of a MOSFET switch as gate-source voltage,VGS > VTH and ID = Maximum. For a P-channel MOSFET, the gate potential must be positive.

P-channel MOSFET Switch

APPLICATION MOSFET AS SWITCH

In this circuit arrangement an Enhancement-mode N-channel MOSFET is being used to switch a simple lamp "ON" and "OFF" (could also be an LED). The gate input voltage VGS is taken to an appropriate positive voltage level to turn the device and therefore the lamp either fully "ON", ( VGS = +ve ) or at a zero voltage level that turns the device fully "OFF", ( VGS = 0).

If the resistive load of the lamp was to be replaced by an inductive load such as a coil, solenoid or relay a "flywheel diode" would be required in parallel with the load to protect the MOSFET from any self generated back-emf.

In a P-channel device the conventional flow of drain current is in the negative direction so a negative gate-source voltage is applied to switch the transistor "ON". This is achieved because the P-channel MOSFET is "upside down" with its source terminal tied to the positive supply +VDD. Then when the switch goes LOW, the MOSFET turns "ON" and when the switch goes HIGH the MOSFET turns "OFF".

This upside down connection of a P-channel enhancement mode MOSFET switch allows us to connect it in series with a N-channel enhancement mode MOSFET to produce a complementary or CMOS switching device as shown across a dual supply.