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1Copyright © 2013 Elsevier Inc. All rights reserved.
Chapter 1
Embedded Computing
2Copyright © 2013 Elsevier Inc. All rights reserved.
Figure 1.1 Major levels of abstraction in the design process.
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Figure 1.2 Sample requirements form.
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Figure 1.3 Block diagram for the moving map.
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Figure 1.4 Hardware and software architectures for the moving map.
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Figure 1.5 An object in UML notation.
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Figure 1.6 A class in UML notation.
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Figure 1.7 Derived classes as a form of generalization in UML.
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Figure 1.8 Multiple inheritance in UML.
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Figure 1.9 Links and associations.
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Figure 1.10 A state and transition in UML.
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Figure 1.11 Signal, call, and time-out events in UML.
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Figure 1.12 A state machine specification in UML.
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Figure 1.13 A sequence diagram in UML.
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Figure 1.14 A model train control system.
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Figure 1.15 Bit encoding in DCC.
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Figure 1.16 Class diagram for the train controller commands.
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Figure 1.17 UML collaboration diagram for major subsystems of the train controller system.
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Figure 1.18 A UML class diagram for the train controller showing the composition of the subsystems.
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Figure 1.19 Classes describing analog physical objects in the train control system.
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Figure 1.20 Controlling motor speed by pulse-width modulation.
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Figure 1.21 Class diagram for the panel and motor interface.
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Figure 1.22 Class diagram for the Transmitter and Receiver.
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Figure 1.23 Class diagram for the Formatter class.
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Figure 1.24 Sequence diagram for transmitting a control input.
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Figure 1.25 State diagram for the formatter operate behavior.
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Figure 1.26 State diagram for the panel-activate behavior.
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Figure 1.27 Class diagram for the Controller class.
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Figure 1.28 State diagram for the Controller operate behavior.
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Figure 1.29 Sequence diagram for a set-speed command received by the train.
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Figure 1.30 Refined class diagram for the train controller commands.
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UN Figure1.1
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UN Figure1.2
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