SOC (SYSTEM-ON-CHIP) AND PROGRAMMABLE RETINA

By:

Vanya Vabrina Valindria

Vega Valentine

Eng Wei Yong

-VIBOT-

Outline

1. Human Retina2. What is SoC and Programmable Retina?3. SoC and Programmable Retina

Architecture4. SoC and Programmable Retina System5. Applications6. Conclusion

Human Retina

Photoreceptors: 126 millions Task: Convert light electrical impulse optic nerve brain

Retina Disease

What happened when some photoreceptors degraded in the retina?

Unable to perceive the light completely

Retina Prosthesis

Other application:Industrial – robotics, vehicle, etc.

How to implement this excellent

functions of human retina in a single

chip?

SoC and Programmable Retina

Other Challenges:

1-Chip

SensorProcessin

g

Task: Image acquisition and low-to-medium-level image processing

Real time highly parallel processing Programmable functional flexibilityFast, low cost and lower power

Main Challenge:

Integrate Sensor and Processing different from conventional approach(separated CCD + Processing Units)

Image Processing inside the SoC Retina

Gray-scale Morphology

Binary Morphology

Target Tracking

Retina Chip- Basic Architecture

1 PE (Processing Element) + 1 photo-detector= 1 pixel

Mimic Human Retina?Photo detector ~ Photo-receptor (in human retina)• Doorway to SoC chip • Large dynamic range

CMOS technology ~ Synapses (in human retina)• High connectivity• Ease integration with PE on the same chip PE

Photo-

detector

Block diagram of the retina chip

How does it work?

SoC & Programmable Retina System

The circuit: combining image acquisition and processing function, consists of: CMOS sensor Cellular SIMD (Single Instruction

Multiple Data) machine Digital processor

(very small)

SoC & Programmable Retina System

• Four components of Retina Circuit:– Phototransduction

obtain analog value of the image

– Analog Processingspatio-temporal filtering

– A/D Coding• NISP (Near Image Sensor Processing)• Digitize the analog value through

multiple thresholding

– Digital Processing• The SIMD machine, made of digital

processor meshes• Process Boolean planes (binary image)

data

Comparison

SoC & Programmable Retina (specification)

Specification

1000 FPS Vision Chip

PVLSAR 2.2 SCAMP-3

Technology 0.18 μm 1P6M CMOS Std

0.8μm digital CMOS

0.35 μm CMOS

Chip Size 3.5 mm x 1.5 mm 76 mm2 50 mm2

Array Size 64x64 pixels 128x128 pixels 128x128 pixels

Pixel Size 9.5 μm × 9.5 μm 60 μm x 60 μm 50 μm x 50 μm

Clock frequency

40 MHz 150 KHz 1.25 MHz

Power Supply, Consumption

1.8 V & 3.3V82.5mW (@, 1,000 fps)

3.3 V & 2.2V1 W

240mW

Application

Retinal prosthesis Intelligent security and surveillance

systems (high speed target tracking) Image recognition Motion detection Industrial machine vision (rapid

inspection)

Application

Retinal prosthesis http://www.io.mei.titech.ac.jp/research/retina/index.html

Application

An embedded system for autonomous collision avoidance & objects tracking

Application

Interactive Game

Conclusion

Power Consumption, Size, Cost, Real-time efficiency are main issues in this field

SOC programmable retina integrate parallel processing with sensing reduce size and cost Low power dissipation Autonomous decision making from real-time

analysis Promising application in various areas

References

Paillet, D.Mercier, T.M.Bernard and E. Senn, "Low power issues in a Programmable Artificial Retina", Proc. IEEE Workshop on Low. Power Design, pp.153-161, 1999.

Lin Q, Miau.W,, et al. A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors. 2009. ISSN 1424-8220

Elouardi A, Bouaziz S, Dupret A, Klein J O and Reynaud R. 2004. On chip vision system architecture using a CMOS retina Proceeding.

A. Manzanera. Morpholigical Segmentation on the Programmable Retina: Towards Mixed Synchronous/Asynchrounous Algorithms. in ACM ISMM Conference.

K Kyuma, Y.Nitta, Artifical Retina Chips for Image Processing. 1997. Artif Life Robotis 1: 79 – 87.