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As the demand for computing power is quickly increasing in the automotive domain, car manufactur-ers and tier-one suppliers are gradually introducing mul-ticore ECUs in their electronic architectures. Additionally, these multicore ECUs offer new features such as higher levels of parallelism which eases the respect of the safety requirements introduced by the ISO 26262 and can be taken advantage of in various other automotive use-cases. These new features involve also more complexity in the design, development and verification of the software applications. Hence, OEMs and suppliers will require new tools and methodologies for deployment and validation. In this paper, we present the main use cases for multicore ECUs and then focus on one of them. Pre- cisely, we address the problem of scheduling numerous elementary software components (called runnables) on a limited set of identical cores. In the context of an au- tomotive design, we assume the use of the static task partitioning scheme which provides simplicity and bet- ter predictability for the ECU designers by comparison with a global scheduling approach. We show how the global scheduling problem can be addressed as two sub- problems: partitioning the set of runnables and building the schedule on each core. At that point, we prove that each of the sub-problems cannot be solved optimally due to their algorithmic complexity. We then present low com- plexity heuristics to partition and build a schedule of the runnable set on each core before discussing schedula- bility verification methods. Finally, we assess the perfor- mance of our approach on realistic case-studies.
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Multicore scheduling in automotive ECUs
Aurélien Monot - PSA Peugeot Citroën, LORIANicolas Navet - INRIA, RealTime-at-WorkFrançoise Simonot - LORIABernard Bavoux - PSA Peugeot Citroën
Talk at ERTS2 2010Toulouse, May 21st 2010
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Outlook
Context:New tools and methodologies are needed as multicore ECUsare being introduced in the automotive EE architecture.
Problem:How to address the scheduling of numerous runnables on a multicore ECUs in the context of the automotive domain?
Method: Deployment of load balancing algorithms in ECU configuration tools.
The number of ECUs has more than doubled in 10 years
The case of a generic car manufacturer3
Typical number of ECUs in a car in 2000 : 20
Typical number of ECUs in a car in 2010 : over 40
Other examples
Between 60 and 80 ECUs in the Audi A8
Over 100 ECUs in some Lexus !
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Moving towards multicore architecture
Task
ECU 1 ECU 2
Task
Task
Task
Decreasing the complexity of in-vehicle architecture: reduces EE design and verification effortsdecreases number of network interfacesdecreases traffic on CAN networkreduces costs
Task
ECU 1 ECU 2
Task
Task
Task
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Moving towards multicore architecture
Other use cases for the automotive domainDealing with resource demanding applications‣ engine control, image processing...
Improving the safety‣ segragation of multi-source software, ISO26262...
Dedicated use of core‣ monitoring, event-triggered tasks
General benefits of multi-corereduced power consumptionreduced heatreduced EMC
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AutoSAR requirements
• Static partitioning• Static cyclic scheduling using schedule tables• BSW are all allocated on the same core
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ProblemGoal: schedule numerous runnables on a multicore ECU
Two sub-problemsPartitioning‣ 600 runnables on 2 cores : 2600 possible allocations
Build schedule table‣ 300 runnables in 200 slots (expiry points) : 200300 schedules
Sub-objectives and criteriaAvoid load peaks‣ Max
Balance load over time‣ Standard Deviation
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Model
0 5 10 15 20 25 30 35 40
R1 R4R2 R3 R1 R1 R1R
2R2
R2R3 R4
R1
R4
R2
R3
Runnables•Period•WCET•Initial Offset•Core allocation constraint•Colocation constraint
Sequencer task
Ttic Slots Tcycle
P1=10C1=2O1=0
P2=10C2=1O2=5
P3=20C3=3O3=5
P4=20C4=2O4=15
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Solution
Partitioning is dealt with as a bin packing problemWorst fit decreasing algorithm with fixed number of bins
Load Balancing is done with the Least Loaded algorithm (LL) inspired from CAN domain [Grenier and Navet ERTSS2008]
Extended to handle non harmonic runnable sets (G-LL)Improved so as to reduce further load peaks (G-LLσ)
Implemented in a toolFreely available soon at http://www.realtimeatwork.com
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Experiments with RTaW-ECU
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Harmonic task sets
LLMax: 4.79Min: 4.52StdDvt: 0.038
G-LLσMax: 4.75Min: 4.65StdDvt: 0.018
Generated load: 94%, Ttic=5ms, Tcycle = 1s
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Non harmonic task sets
Generated CPU load
95% 97% 95% 97%
Schedulabilitybound in the harmonic case
94%Max WCET = 300μs
82%Max WCET = 900μs
Success % of LL
64% 18% 12% 1%
Success % of G-LL
94% 94% 30% 5%
Success % of G-LL1σ
100% 100% 97% 76%
Max WCET (μs) 150 300 900
Schedulabilitybound in the harmonic case
97% 94% 82%
Success % of LL 96% 96% 92%
Success % of G-LL 100% 100% 100%
1−Cmax
TticSchedulability bound in the harmonic case
Statistics collected over 1000 generated runnable sets
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Multiple synchronized sequencer tasks per core
Incremental scheduling of three synchronized sequencer tasks with respective load of 45%, 35% and 15% resulting in 95% of the core capacity.
Tcycle=1000ms and Ttic=5ms
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Multiple non synchronized sequencer tasks per core
Case arises for sequencer tasks using different tic countersEngine control applications (standard time vs RPM)
Any offset between the sequencer tasks and all clock rates are possible during runtime
each sequencer task needs to be balanced independantly
Verification is possible considering maximum clock ratesMulti-frame scheduling results can be used
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ConclusionAdoption of multicore ECU raises new challenges
Evolution of software architecture designScheduling of software components
We propose runnable scheduling heuristics for ECUsFast and performantEasily adaptable for more advanced applicationsCompatible with AutoSAR R4.0 and its multicoreextensions
Future workPrecedence constraintsLockstep synchronizationDistributed timing chains
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Thank you for your attention
