Upload
rick-tewell
View
636
Download
2
Embed Size (px)
Citation preview
FD-SOI – Harnessing the Power +A Little Spelunking Into PPA
Rick TewellVice President of Systems
CTO Office
DAC, 2016
But first…
a short, sweet - yet obligatory
VeriSilicon Overview
VeriSilicon Global Operations▲Founded in 2001, currently ~700 employees; six R&D centers; nine sales offices▲70% dedicated to R&D; 70% based in Shanghai, China▲70% of the revenue comes from outside of China
Company Proprietary and Confidential
From Fabless to Design-lite
Company Proprietary and Confidential
VeriSilicon – A SiPaaS Company
We call it Silicon Platform as a Service, or SiPaaS
▲ IP-centric
▲ Platform-based
▲ End-to-end turnkey service
What we do What we don’t do▲ No fab
▲ No branded product► No NRE investment► Limited inventory risk
Company Proprietary and Confidential
End-to-end Turnkey Service
▲Tape out one chip a week; 50 chips a year ▲Foundry neutral ▲98% first silicon success
CustomerSiliconShippingTestingPackagin
gNetlist to
GDSIIRTL to Netlist
Spec to RTL Manufacturing
TSMC 28nm LP GF 28 nm SLPTSMC 28nm HPM GF 28nm HPM SEC 28nm LPP UMC 28nm LP SMIC 28nm HPM
Company Proprietary and Confidential
FD SO What?
VLSIresearch – G. Dan Hutcheson
VLSIresearch – G. Dan Hutcheson
VLSIresearch – G. Dan Hutcheson
VLSIresearch – G. Dan Hutcheson
Harnessing The Power
▲Body-biasing Enables Power/Performance Trade-off
FD-SOI Body Biasing
FD-SOI Body Biasing▲Body-biasing allows for optimum power/performance trade-off
How To Dynamically Manage Body Biasing?
IoT SoC Block Diagram
DVFSBB Control
Low Speed I/O Power Domain
How To Dynamically Manage Body Biasing?
IoT SoC Block Diagram
DVFSBB Control
Low Speed I/O Power Domain
New VeriSilicon IP
How To Dynamically Manage Body Biasing?
IoT SoC Block Diagram
DVFSBB Control
Low Speed I/O Power Domain
New VeriSilicon IP
Strive to create an “industry standard” programming model in HW and SW for
DVFS and Body Bias Control
How To Dynamically Manage Body Biasing?
ACPI (Advanced Configuration and Power Interface)► Standard interface specification► OS can perform power management using this API► Hardware and software drivers support this API► Mapping from CPU mechanisms to ACPI is provided by BIOS and
software drivers
OS Power Management
Hardware: CPU, BIOS etc.
Software driversACPI
Applications
Direct Software Control
How To Dynamically Manage Body Biasing?
ACPI State Hierarchy
Global system states (g-state)▲G0 : Working▲G1 : Sleeping (e.g., suspend, hibernate)▲G2 : Soft off (e.g., powered down but can be restarted by
interrupts from input devices)▲G3 : Mechanical off
Lower number means higher power
Direct Software Control
How To Dynamically Manage Body Biasing?
▲ Global system states (g-state)▲ G0 : Working
► Domain power states (C-state)► C0 : normal execution► C1 : idle► C2 : lower power but longer resume latency than C1 ► C3 : lower power but longer resume latency than C2
▲ G1 : Sleeping (e.g., suspend, hibernate)► Sleep State (S-state)► S0► S1► S2► S3: suspend► S4: hibernate
▲ G2 : Soft off (S5)▲ G3 : Mechanical off
ACPI State Hierarchy
Direct Software Control
How To Dynamically Manage Body Biasing?
ACPI State Hierarchy
▲G0 : Working►Domain power states (C-state)►C0 : normal execution
Performance state (P-State) P0: highest performance, highest power P1 Pn
►C1, C2, C3▲G1 : Sleeping (e.g., suspend, hibernate)
►Sleep State (S-state): S0, S1, S2, S3, S4▲G2 : Soft off (S5)▲G3 : Mechanical off
▲ Enhanced BB Control== dynamic frequency and voltage scaling
▲ An operation point (frequency, voltage) == P-state
▲ Note that the power domain remains in normal operation
Direct Software Control
RO Comparison Between Samsung 28nm FD-SOI and Samsung 28nm LPP/LPH
9 Stages RO Simulation @ TT/ 25cVdd (v) Samsung 28nm LPP
(ps)28nm FD-SOI
(ps)28nm FD-SOI w/ LVT (ps) Samsung 28nm LPH (ps)
0.6 62.22 31.7 16.06 22.5
0.7 29.72 15.39 9.78 13
0.8 18.2 9.83 6.94 8.94
0.9 13 7.22 5.39 6.83
1.0 10.16 5.83 4.47 5.67
• 9 stages of inv (P/N: 0.3um/0.2um) chains• The delay number is based on average one gate number
28nm FD-SOI has speed advantage on low Vdd supply
RO Dynamic Power Comparison
▲Dynamic Power comparison
1. @ Same Vdd, the dynamic power is lower in 28nm FD-SOI than Samsung 28nm LPH.2. @ Same speed, the dynamic power saving in 28nm FD-SOI is more significant than Samsung 28nm LPP.
1v
1v
1v1v
0.9v
0.9v
0.8v 0.9v 0.9v
0.9v0.8v
0.8v
0.8v0.7v
0.7v
0.7v 0.7v
RO Leakage Comparison
▲Leakage comparison
Samsung 28nm LPH and 28nm FD-SOI (LVT) consume more leakage power than Samsung 28nm LPP and 28nm FD-SOI (RVT), @same VDD
TT, 25C TT, Vdd=1v
Memory Comparison Between Samsung 28nm FD-SOI and Samsung 28nm LPP/LPH
Memory Benchmarks on Access Time▲Memory (1Kx8) Access Time Comparison
►Access time and comparison @ different VDD (TT, 25C)
►The highlighted in RED are the conditions for the memory to run @ the same speed
VDD Samsung 28nm LPP 28nm FD-SOI Samsung 28nm LPH
(v) (ns) (%) (ns) (%) (ns) (%)
1.0 0.560 100 0.388 144.3 0.372 150.5
0.9 0.739 75.8 0.483 115.9 0.472 118.6
0.85 0.879 63.7 0.552 101.4 0.539 103.9
0.8 1.070 52.3 0.647 86.6 0.642 87.2
Memory Benchmarks on Active Power
▲Memory (1Kx8) Active Power Comparison►Active power and comparison @ different VDD (TT, 25C)
►The highlighted in RED are the conditions for the memory to run @ the same speed
VDD Samsung 28nm LPP 28nm FD-SOI Samsung 28nm LPH
(v) (uW@1MHz) (%) (uW@1MHz) (%) (uW@1MHz) (%)
1.0 2.568 100 2.076 80.9 2.9 112.9
0.9 2.039 79.4 1.674 65.2 2.335 90.9
0.85 1.812 70.6 1.490 58.0 2.013 78.4
0.8 1.566 61.0 1.318 51.3 1.805 70.3
Memory Benchmarks on Leakage Power
▲Memory (1Kx8) Leakage Power Comparison►Leakage power and comparison @ different VDD (TT, 25C)
►The highlighted in RED are the conditions for the memory to run @ the same speed
VDD Samsung 28nm LPP 28nm FD-SOI Samsung 28nm LPH
(v) uW (%) uW (%) uW (%)
1.0 0.745 100 0.857 115.1 1.148 154.1
0.9 0.457 61.4 0.537 72.1 0.733 98.3
0.85 0.369 49.5 0.426 57.2 0.588 79.0
0.8 0.302 40.5 0.338 45.4 0.474 63.6
Speed Active power Leakage power Total power0%
20%
40%
60%
80%
100%
120%
28LPP@vdd=1v
28FD-SOI(RVT)@vdd=0.85v
28LPH@vdd=0.85v
Memory Benchmarks on Total Power▲Memory Total Power Comparison
1. @Same Vdd=1v, the total power on 28nm FD-SOI is the lowest compared with Samsung 28nm LPP and LPH2. @Same speed, the total power on 28nm FD-SOI is the lowest compared with Samsung 28nm LPP and LPH.
Memory speed @ 1GHz
Speed Active powr Leakage power Total power0%
20%
40%
60%
80%
100%
120%
140%
160%
Samsung 28nm LPP
28nm FD-SOI
Samsung 28nm LPH
Cortex A7 Benchmark Between Samsung 28nm FD-SOI and Samsung 28nm LPP/LPH
Cortex A7 Benchmark – CPU ConfigurationRepresentative Configuration Across Many Applications
Configurable Feature Selected Value
L1 Instruction Cache 32KB
L1 Data Cache 32KB
NEON™ Included
FPU(Floating Point Unit) Included
GIC (Generic Interrupt Controller) Included
ETM(Embedded Trace Macro Cell) Included
Cortex-A7 Floorplan
Cortex A7 Benchmark – 800MHz (1)
Tech Node 28nm FD-SOI Samsung 28nm LPPTarget Performance 800 MHz 800 MHz
Sign-off Corner ss_0.80v_m40c* * ss_0.9v_m40c* * Post-Shrink Area(mm²) w/o utilization 0.449 0.536
Leakage(mW) @ tt25c 0.88 1.6Dynamic(mW/MHz) @ tt25c * 0.119 0.176
Total Power (mW) @ tt25c 96.2 139.9
* Note: Dynamic power is based on 10% toggle rate on all data path.* * Note: To achieve 800MHz, Samsung 28nm LPP needs 0.9V supply voltage, while 28nm FD-SOI only needs 0.8V supply voltage. Lower supply voltage enables 28FD-SOI to consume lower dynamic power.
• FD-SOI saves 16.2% area• FD-SOI dramatically reduces the die size and costArea
• FD-SOI consumes 32.4% less dynamic power• FD-SOI consumes 45.0% less leakage power
Leakage and Dynamic Power
• FD-SOI consumes 31.2% less total powerTotal Power
PPA at 800MHz, 28nm FD-SOI (no FBB) vs. Samsung 28nm LPP
Cortex A7 Benchmark – 800MHz (2)
PPA at 800MHz – 28nm FD-SOI (0.6v-FBB) vs. Samsung 28nm LPP
* Note: Dynamic power is based on 10% toggle rate on all data path.* * Note: To achieve 800MHz, Samsung 28nm LPP needs 0.9V supply voltage, while 28nm FD-SOI only needs 0.8V supply voltage. Lower supply voltage enables 28nm FD-SOI to consume lower dynamic power.
• FD-SOI saves 8.2% area• FD-SOI dramatically reduces the die size and costArea
• FD-SOI consumes 42.0% less dynamic power• FD-SOI consumes 21.3% more leakage power
Leakage and Dynamic Power
• FD-SOI consumes 40.2% less total powerTotal Power
Tech Node 28nm FD-SOI (with 0.6v FBB) Samsung 28nm LPPTarget Performance 800 MHz 800 MHz
Sign-off Corner ss_0.70v_m40c* * ss_0.9v_m40c* * Post-Shrink Area(mm²) w/o utilization 0.492 0.536
Leakage(mW) @ tt25c 1.94 1.6
Dynamic(mW/MHz) @ tt25c * 0.102 0.176
Total Power (mW) @ tt25c 83.64 139.9
Cortex A7 Benchmark – 1.2GHz
PPA at 1.2GHz – 28nm FD-SOI vs. Samsung 28nm LPH
* Note: Dynamic power is based on 10% toggle rate on all data path.
• FD-SOI saves 23.8% area• FD-SOI dramatically reduces the die size and costArea
• FD-SOI consumes 6.2% more dynamic power• FD-SOI consumes 74.0% less leakage power
Leakage and Dynamic Power
• FD-SOI consumes 4.8% more total powerTotal Power
Tech Node 28nm FD-SOI (no BB) Samsung 28nm LPHTarget Performance 1200 MHz 1200 MHz
Sign-off Corner ss_0.90v_m40c ss_0.81v_m40cPost-Shrink Area(mm²) w/o utilization 0.403 0.529
Leakage(mW) @ tt25c 1.462 5.633Dynamic(mW/MHz) @ tt25c * 0.172 0.162
Total Power (mW) @ tt25c 208.2 198.6
Samsung 28nm LPH has less dynamic power, but more leakage consumption.
THANKS!