POLITECNICO DI MILANO

Marco D. Santambrogiomarco.santabrogio@polimi.it

Dynamic Reconfigurability inEmbedded Systems

Design- 3D-DRESD Second Edition - 22/07 - 24/07, 200722/07 - 24/07, 2007

Hotel Villa GinaHotel Villa GinaGoglioGoglio

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Schedule 22/07/2007Schedule 22/07/2007Marco D. Santambrogio: DRESD in a nutshell, a short overviewAlberto Gallini, Lorenzo Pavesi: Spatial Computation and Compiler techniques for configurable ArchitecturesVincenzo Rana: CITiES - project presentation: vision and goalsAlessandro Meroni: ROMe - a CITiES's project exampleMarco Novati, Massimo Morandi: Polaris, cores placement and runtime bitstream relocation - project presentation: vision and goals

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Schedule 23/07/2007Schedule 23/07/2007Morning

Luca Rocchini, Giovanni Saba: A partial reconfigurable architecture based on FPSLICAntonio Miele: R4R - project presentation: vision and goalsVincenzo Rana: Fault tolerance for FPGA-based systems Matteo Murgida, Alessandro Panella: DReAMS, multi-FPGAs scenario - project presentation: vision and goals) )Mauro Pisoni, Marco D. Santambrogio: Decimal multipliers

Afternoon: We will work on the realization of a PPT and PDF documents presenting some of the DRESD groups (projects).

CITiES: Vincenzo Rana, Alessandro MeroniDReAMS: Matteo Murgida, Alessandro PanellaPolaris: Marco Novati, Massimo MorandiR4R: Antonio Miele, Marco D. SantambrogioRDL: Fabio Cancarè, Davide Cucci, Marco D. Santambrogio

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Schedule 24/07/2007Schedule 24/07/2007Morning

Fabio Arlati, Francesco Caponio: A multi microphone application using the ATMEL D740 architecture.Michele Santoro: Adaptive ComputingPaolo R. Grassi, Cuoccio Andrea: DRC - DRESD Reconfiguration ControllerDiego Mereghetti, Marin Alessandro: INCA design flow

AfternoonDRESD: What we are going to do next year? Projects and Goals