The Design of Electronic License Plate Recognition Terminal System based on

nRF24LE12012 Fifth International Symposium on Computational Intelligence and Design

Wei Chen, Jianding Yu, Xiangjun Liu

Emp, CHEN

stu9458@gmail.com

Ajenda

• Introduction

• System structure

• Hardware design– Reader module

– Electronic tag

• Software design– Reader module

– Electronic tag

• Conclusion

Introduction

Introduction

• The limited Land resources and economy is a big challenge for the urban road construction.

• ITS(Intelligent Transportation Systems)

• The RFID technology has advantage in long-range identification, carrying more information, reading data rapidly and wide application

System structure

System structure

• The system consists of reader, electronic license plate(E-Plate) and host computer management system.

• When the vehicle, which has been installed electronic license plate, enters the range of the reader.

Analysis and StoreCommunication

Hardware design

Hardware design

• Reader module–ARM chip, RF(Radio frequency), Control

circuit.

• E-plate module–Wireless RF application circuit.

–Base on nRF24LE1

– Some peripheral

Hardware design

• Reader Module

–LM3S8962

• Cortex M3、50MHz、36 Interrupts、Cheap(?)

• Main

–Process、Memory、Power conversion

• Extended

–RF(Communication by I2C)、JTAG、LCD+Touch、LED…

Hardware design

• RF circuit - receive the information from E-plate and send to the processor through the mode of I2C.

• Processor deals with the received information and sends to the PC

• LCD&TS - human-computer interaction

Hardware design

Program

Date

To PC To E-plate

Hardware design

• E-Plate (nRF24LE1)– 8051F + nRF24l01P

– The stability and reliability of the RF system is increased and the cost is reduced

– ISM Frequency band from 2.4GHz to 2.5GHz

– Maximum transmission rate 2Mbit/s

– Distance 100m (Without sleep)

Software design

Software design

• Reader

– The real-time operating system FreeRTOS is used for the reader control

– The TCP / IP protocol stack has been portedto the FreeRTOS

Software designStep1: Initial the nRF24LE1. Configure to TX mode. Step2: Button is pressed, the nRF24LE1 sending corresponding commands.Step3: If successfully received, displayed on the LCD. Else if fails, Timeout will be determined.

Software design

• E-plate–Use button batteries

– E-plate not work until an interrupts

– The E-plate will process the received information in a short time, and then work on low power consumption module as soon possible.

Software design

Software design

• Communication protocol

– SGN(signture)

– CMD(Command)

– TID(Tag identifier)

– UID(User identifier)

– STA(Status)

Software design

• Encryption

–DES• F-function

• 56bits key.

• 64bits block

Conclusion

• The hardware circuit main chip is RF chip nRF24LE1 and LM3S8962, which is based on the kernel of CORTEX-M3.

• The software includes tag data, receiving data and sending data, and also encryptionalgorithm.