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A Term Paper on Achievements & Challenges of MOSFET’s with High-K Gate Dielectrics Course instructor : Dr.Dipanjan Basu Presented by :Anubhav Srivastava Bandarupalli Jayadeepthi Noor Mohamed EV

High k dielectric

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Page 1: High k dielectric

A

Term Paper

on

Achievements & Challenges of

MOSFET’s with High-K Gate

Dielectrics

Course instructor : Dr.Dipanjan Basu

Presented by :Anubhav Srivastava

Bandarupalli Jayadeepthi

Noor Mohamed EV

Page 2: High k dielectric

Why this is required…….? Scaling of transistor to drive Moore’s Law

SiO₂ is running out of atoms for further scaling

but still scaling continues.Thickness of SiO₂ layer required in 45nm technology is

about 1.2nm (4 atomic layers deep!!)

Quantum Mechanical phenomenon of electron

tunneling results in Gate Leakage Current….!

Page 3: High k dielectric

Gate Leakage Current

Quantum mechanical tunneling

Tunneling current increases exponentially

with decrease in oxide thickness

Page 4: High k dielectric

Choice of High-K oxide

High-K oxide should satisfy the following properties:

1. High Dielectric constant and Barrier Height

2. Thermodynamic stability

3. Interface Quality

Volume expansion

caused by cubic to

tetragonal to monoclinic

transformation induces

large stress in ZrO2

Page 5: High k dielectric

The Challenges for High-K

Dielectric Development

Page 6: High k dielectric

High-K and Poly-Si Incompatibility due

to Fermi Level PinningDefect formation at the polySi and

high-K interface is most likely the

cause of the Fermi level pinning in the

upper part of the band gap which

causes high threshold voltages in

MOSFET (M=Zr or Hf)

Results in:

1. High threshold voltage

2. Low drive current

So the need to replace poly-Si

gate by a suitable metal

Page 7: High k dielectric

Mobility Degradation

Coulombic scattering :

Dominant at low field

Caused due to high interface trapped charge

Higher trap density near conduction band

More severe for nMOSFET

Page 8: High k dielectric

Surface phonon scattering

Page 9: High k dielectric

The Metal Gate Solution

Page 10: High k dielectric

Use of Metal Gates

As a conductor metal can pack in hundred of times more

electrons than poly-Si

Metal gate electrodes (Co,Ni,Mo,W) are able to decrease

scattering and reduce the mobility degradation problem

Page 11: High k dielectric

Types of Metal Gates

Requires metal gate electrodes with “CORRECT” work functions on High-K for both nMOS and pMOS transistors for high performance.

Page 12: High k dielectric

Metal Gate/High-K Transistor

When SiO2 is replaced with High-K material it was found

that poly-Si and High –K material were not compatible.

So poly-Si is being replaced by a metal to make it

compatible with High-k material.

Page 13: High k dielectric

Mobility Improvement by using TiN

High-K/Metal-gate reduces leakage

Page 14: High k dielectric

Yeah…Nobody knows for sure……….!!!

Intel achieved 20 percent improvement in transistor

switching speed by using metal Gate /high-K transistor

with HfO2 as dielectric.

Intel 45nm Transistor – performance compared to 65nm

2x improvement in transistor density

30% reduction in switching power

20% improvement in switching speed

10x reduction in gate oxide leakage power

Page 15: High k dielectric

Reference

Achievements and Challenges for the Electrical Performance Of MOSFET’s

with High-k Gate Dielectrics by G. Groeseneken , L. Pantisano and M. Heyns

0-7803-8454-7/04/$20.00 2004 IEEE.