14827 mosfet

MOSFET

• Insulated Gate Field Effect Transistor

(IGFET)

or

• Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

Er. Vikram Kumar Kamboj

Types of MOSFET

• 1. Depletion MOSFET (D-MOSFET)

• 2. Enhancement MOSFET(E-MOSFET)

• 3. Depletion-Enhancement MOSFET

(DE-MOSFET)


Types (According to Channel)

• P-Channel MOSFET

• N-Channel MOSFET


MOSFET Structure

p-Si

n+ L

Source Gate Drain

Field Oxide

Gate Oxide

Bulk (Substrate)


Symbols

G

D

S

B G

D

S

B

p Channel MOSFET n Channel MOSFET


MOSFET Symbols

A circle is sometimesused on the gate terminalto show active low input

drain

gate body

source

drain

gatebody

source

drain

gatebody

source

drain

gate body

source

or or

A) n-channel MOSFET B) p-channel MOSFET


DE-MOSFET symbol


Comparison of Symbols


Metal Oxide Semiconductor Field Effect Transistor

Simplified Schematic of a MOSFET

The MOSFET shown in the adjacent figure is an n-channel MOSFET, in which electrons flow from source to drain in the channel induced under the gate oxide. Both n-channel and p-channel MOSFETs are extensively used. In fact, CMOS IC technology relies on the ability to use both devices on the same chip. The table below shows the dopant types used in each region of the two structures.

n-channel MOSFET p-channel MOSFET Substrate (Channel) p N Gate Electrode n+ p+ Source and Drain n+ p+


Physical Structure of MOS FETS

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

NMOS

PMOS


Device Operation Schematic

Figure shows an n-channel MOSFET with voltages applied to its four terminals. Typically, VS = VB and VD >

VS. For simplicity, we assume that the

body and the source terminals are tied to the ground, ie. VSB=0. This yields

VGS = VGB − VSB = VGB = VG

VDS = VDB − VSB = VDB = VD


Source Drain

SiO2 Insulator (Glass)

Gate

holes

electrons

5 volts

electrons to be transmitted

MOSFET Operation

Step 1: Apply Gate Voltage

Step 2: Excess electrons surface in channel, holes are repelled.

Step 3: Channel becomes saturated with electrons. Electrons in source are able to flow across channel to

Drain.

P

N N


Regions of MOSFET Operation


Off-State Region

• With a small positive voltage on the drain and no bias on the gate• i.e. VDS > 0 and VGS = 0, the drain is a reverse

biased pn junction• Conduction band electrons in the source region

encounter a potential barrier determined by the built-in potential of the source junction

• As a result electrons cannot enter the channel region and hence, no current flows from the source to the drain

• This is referred to as the “off” state Er. Vikram Kumar Kamboj

Linear Region•With a small positive bias on the gate, electrons can enter the channel and a current flow from source to drain is established•In the low drain bias regime, the drain current increases almost linearly with drain bias•Indeed, here the channel resembles an ideal resistor obeying Ohm’s law•The channel resistance is determined by the electron concentration in the channel, which is a function of the gate bias•Therefore, the channel acts like a voltage controlled resistor whose resistance is determined by the applied gate bias•As the gate bias is increased, the slope of the I-V characteristic gradually increases due to the increasing conductivity of the channel•We obtain different slopes for different gate biases•This region where the channel behaves like a resistor is referred to as the linear region of operation•The drain current in the linear regime is given by

( )

−−′= 2

, 2

1DSDSTGSoxlinD VVVVC

L

WI µ


For larger drain biases, the drain current saturates and becomes independent of the drain biasNaturally, this region is referred to as the saturation regionThe drain current in saturation is derived from the linear region current, which is a parabola with a maximum occurring at VD,sat given by

To obtain the drain current in saturation, this VD,sat value can be substituted

in the linear region expression, which gives

Saturation Region

VD,sat =VGS − VT

α

( )2

2

,TGS

oxsatD

VVC

L

WI

−′= µ


FET output characteristics


Current-Voltage Characteristic

A

B C DIDS

VDS


Transfer characteristics

– similar shape for all forms of FET – but with a different offset

– not a linear response, but over a small region might be considered to approximate a linear response


Normal operating ranges for FETs


• When operating about its operating point we can describe the transfer characteristic by the change in output that is caused by a certain change in the input– this corresponds to the slope of the earlier

curves– this quantity has units of current/voltage, which

is the reciprocal of resistance (this is conductance)

– since this quantity described the transfer characteristics it is called the transconductance, gm

GS

Dm V

I

∆∆=g

GS

Dm V

I≠g


• Small-signal equivalent circuit of a FET– models the behaviour of the device for small

variations of the input about the operating point


Summary of FET Characteristics

• FETS have three terminals: drain, source and gate

• The gate is the control input

• Two polarities of device: n-channel and p-channel

• Two main forms of FET: MOSFET and JFET

• In each case the drain current is controlled by the voltage applied to the gate with respect to the source

• Behaviour is characterised by the transconductance

• The operating point differs between devices

20.6


Applications


FET Amplifiers

• A simple DE MOSFET amplifier– RG is used to ‘bias’ the

gate at its correct operatingpoint (which for a DE MOSFET is 0 V)

– C is a coupling capacitorand is used to couple theAC signal while preventingexternals circuits fromaffecting the bias

– this is an AC-coupled amplifier

20.7


• AC-coupled amplifier– input resistance – equal to RG

– output resistance – approximately equal to RD

– gain – approximately –gmRD (the minus sign shows that this is an inverting amplifier)

– C produced a low-frequency cut-off at a frequency fc given by

where R is the input resistance of the amplifier (which in this case is equal to RG)

CRc π21=f


• Negative feedback amplifier– reduces problems of variability

of active components

– voltage across Rs is proportional to drain current,which is directly proportionalto the output voltage

– this voltage is subtractedfrom input voltage to gate

– hence negative feedbackEr. Vikram Kumar Kamboj

• Source follower– similar to earlier circuit,

but output is now takenfrom the source

– feedback causes thesource to follow the inputvoltage

– produces a unity-gainamplifier

– also called a source followerEr. Vikram Kumar Kamboj

Other FET Applications

• A voltage controlled attenuator– for small drain-to-source

voltages FETs resemblevoltage-controlled resistors

– the gate voltage VG is used

to control this resistance andhence the gain of the potentialdivider

– used, for example, in automaticgain control in radio receivers

20.8


• A FET as an analogue switch


• A FET as a logical switch


Key Points• FETs are widely used in both analogue and digital circuits• They have high input resistance and small physical size• There are two basic forms of FET: MOSFETs and JFETs• MOSFETs may be divided into DE and Enhancement types• In each case the gate voltage controls the current from the drain

to the source• The characteristics of the various forms of FET are similar except

that they require different bias voltages• The use of coupling capacitors prevents the amplification of DC

and produced AC amplifiers• FETs can be used to produce various forms of amplifier and a

range of other circuit applicationsEr. Vikram Kumar Kamboj

• Importance for LSI/VLSI– Low fabrication cost

– Small size

– Low power consumption

• Applications– Microprocessors

– Memories

– Power Devices

• Basic Properties– Unipolar device

– Very high input impedance

– Capable of power gain

– 3/4 terminal device, G, S, D, B

– Two possible device types: enhancement mode; depletion mode

– Two possible channel types: n-channel; p-channel


Analysis: Low VDS

(A)I

QDS

n

TR

= −τ

Q

L

v

v

n

TR

d

d

==

=

=

Channel Charge

Channel Transit Time

Drift Velocity

τ τµTRn DS

L

V=

2

Q CV

C V V WLn

O GS T

== − −( )

IC V V WL

LVDS

n O GS TDS=

−µ ( )2

IW

LC V V VDS n O GS T DS= −µ ( )


Analysis: Intermediate VDS

Q C VV

V WLn O GDS

T= − − −( )2

IW

LC V V

VV

W

LC V V V

V

DS n O G TDS

DS

n O G T DSDS

=

− −

=

− −

µ

µ

2

2

2

( )

First Order ApproximationGate to Channel Voltage = VGS-VDS/2

Extra term!


Large VDS: Saturation (C)

Source DrainChannel

VG

VT

VDSVG-channel

Pinch-off


Analysis: Saturation (C)Pinch-off

V sat V VDS G T( ) = −

Substitute for VDS(sat) in equation for IDS to get IDS(sat)

IW

LC V V V

VDS n O GS T DS

DS=

− −

µ ( )

2

2

( )

I satW

LC V V

V V

W

LC V V

DS n O GS TGS DS

nO GS T

( ) ( )( )

=

− −

−

=

−

=

µ

µ

22

2

2

2

constantEr. Vikram Kumar Kamboj

Avalanche and Punch-Through(D)

• For very large VDS, IDS increases rapidly due to drain junction avalanche.

• Can give rise to parasitic bipolar action.• In short channel transistors, the drain depletion region may

reach the source depletion region giving rise to ‘Punch Through’.


Engineering

14827 mosfet