1. K vi xl thu tMicroprocessorsGi vin: Ph Ng Nam ngm c

2. DHBK 2005 2/Chapter1 Your instructorBmn kthu n ttin h t i c Office: C9-401 Email: pnnam-fet@mail.hut.edu.vnResearch: FPGA, PSoC, hnhng Tr tunhn toEducation: K37 n t HBK H n (1997)i -i Master vtr tunhn t 1999, i h K.U. Leuven,o c v ng qu B c ti: Nh d chvi taynng t Ti skthu chuyn ngnh n tn t i -tin h 9/ 2004, ic, h K.U. Leuven, V ng Qu B c c ti: qu l ch l ng d vtrong cc d n t ch ng ng aph ng ti tin ti nn 3. DHBK 20053/Chapter1 N dung mn h i c1. Gi thi chung vhvi xliu2. Bvi xl Intel 8088/80863. L trnh h ngcho 8086 pp4. Tch vo ra dli cu5. Ng v xl ng tt6. Truy c bnhtr ti DMAp c p7. Cc bvi xl trn th tc 4. DHBK 2005 4/Chapter1Ti li tham kh uo Slides V ThMinh, Kthu vi xl, Nh xu b gio ntt nd 1997.c, Barry B. Brey, The Intel Microprocessors:8086/8088, 80186/80188, 80286, 80386, 80486,Pentium and Pentium Pro Processor: Architecture,Programming, and Interfacing, Fourth Edition,Prentice Hall, 1997. Quch Tu Ng v c s Ngn ngl trnh n c ng ,p Assembly v my vi tnh IBM-PC, 2 t Nh xu p,t b gio d 1995. n c, C gio sRudy Lauwereins cho php sm n d slides c ng nga 5. DHBK 2005 5/Chapter1M ch c mn hc ac N c trc, nguyn l ho ng c bvim cut axl v hvi xl C khn l trnh b h ngcho vi xl ng p ng p C khn l ch vi xl thch h cho cc ng a n p d cth ng ng N cc bvi xl trn th tm c c 6. DHBK 2005 6/Chapter1Bi t l v thip n Bi t l thi km d trn vi u khip n:tt ng ngi n:20% t s m ng i Lm theo nhm 2-6 sinh vin N danh sch cc nhm vo 3/1p Cc nhm trnh by t ng 17/1 Ki tra: 10% m 3 bi ki tra khng bo tr c m dt nh 2 bi v k quc 2 bi > 5: 1 mt t ai thi 2 bi trln: khng thi l 1u c n Thi h kc: 1 cu l thuy 2 cu bi t (l trnh v thi kt, p p t) 70% t s m ngi 7. Ch ng 1 DHBK 2005 7/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 8. Ch ng 1 DHBK 20058/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 9. Ch ng 1 DHBK 20059/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 10. Thh-1: The early days (-1642) DHBK 2005 10/Chapter1 Bn tnh, abacus, sd cng tnh ton.Khi ni vgi trmtheo v xdtr cng 11. Thh-1: The early days (-1642) DHBK 2005 11/Chapter1 Thk12: Muhammad ibnMusa AlKhowarizmi a ra khi ni vgim i thu algorithm t 12. Thh-1: The early days (-1642) DHBK 2005 12/Chapter1 Codex Madrid - Leonardo Da Vinci (1500) Vm ci my tnh ckh t 13. Ch ng 1 DHBK 200513/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 14. DHBK 2005 14/Chapter1Thh0: Mechanical (1642-1945) Blaise Pascal, con trai c m ng i thu thu at , cht m my c c nhvo n 1642otng m 15. DHBK 2005 15/Chapter1Thh0: Mechanical (1642-1945) N 1801, Joseph-Marie Jacquard pht minh ra mmy d t ng sd ba c l i khi hot ng u nti d trn v tt i Ba c ll trch ng trnh: my n u u ang tin 16. DHBK 2005 16/Chapter1Thh0: Mechanical (1642-1945) 1822, Charles Babbage nh ra r cc b n ng ng tnh dng trong hng h c qu nhi l di u in t vi r nhiu tu bic t m tcht ng xin chnh ph Anh htr nghin c vmy tnh u 17. DHBK 200517/Chapter1Thh0: Mechanical (1642-1945) 18. DHBK 2005 18/Chapter1Thh0: Mechanical (1642-1945) Babbage thi km ci my vi phn Difference Engine ttthay thton bb tnh: my th hi m d cthngc n t ng ng u tin (application specific hard-coded machine) 19. DHBK 200519/Chapter1Thh0: Mechanical (1642-1945) Ada Augusta King, trthnh l trnh vin uptin vo n 1842 khi mc vi ch ng trnh chotAnalytical Engine, thitb th2 c Babbagea 20. DHBK 200520/Chapter1Thh0: Mechanical (1642-1945) Herman Hollerith, ng i M thi km my tnh ,ttxl dli vdn sM1890 u ng thnh l cng ty, Hollerith TabulatingpCompany, sau y l Calculating-Tabulating- Recording (C-T-R) company vo n 1914 v saumny i tn l IBM (International Business c Machine) vo n 1924.m 21. DHBK 200521/Chapter1Thh0: Mechanical (1642-1945) Konrad Zuse, Berlin, c, pht tri vo n 1935 mynmtnh Z-1 sd rle v snhng phn Chu klnh: 6 giy (0.17 Hz) 22. DHBK 200522/Chapter1Thh0: Mechanical (1642-1945) My tnh c n t ng l ni n a ng u tin l my Harvard Mark I ( IBM Automatic Sequence ControlCalculator ), pht minh b Howard Aiken vo cu 1930i i ASCC khng ph l my tnh c ch ng trnh l tri u s m cc l ghi vo cc b gi n nh c ngy. 23. DHBK 2005 23/Chapter1Thh0: Mechanical (1642-1945) Grace Murray Hopper found the first computer bug beaten todeath in the jaws of a relay. She glued it into the logbook ofthe computer and thereafter when the machine stops(frequently) she told Howard Aiken that they are "debugging"the computer. Numbered pages for USA patentsLab book!! 24. Ch ng 1 DHBK 200524/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 25. DHBK 2005 25/Chapter1Thh1: Vacuum tubes (1945-1955) N 1943, Johnm Mauchly v J. Presper Eckert b u nghin t c vENIAC u 26. DHBK 200526/Chapter1Thh1: Vacuum tubes (1945-1955) 18000 vacuum tubes, 1500 rle, 30 t 140 kW, 20 thanh ghin,10 chsth phn, 100 nghn php tnh/ giyp Trong t ng lai my tnh sn t l 1.5 t (Popular ng i a nMechanics, 1949) 27. DHBK 2005 27/Chapter1Thh1: Vacuum tubes (1945-1955) L trnh thng qua 6000 cng t nhi n v hng t d ypcucn 28. DHBK 2005 28/Chapter1Thh1: Vacuum tubes (1945-1955) N 1946, John von Neumann pht minh ra my mtnh c ch ng trnh l trong bnh u My tnh c ng g c m n v i khi m am t un, tALU, m bnhch ng trnh v dli v sd t ungsnh phn thay v sth phn. p My tnh ngy nay u c c trc von Neumann u ng t n mng cho hi t ng von Neumann nn bottleneck, skhng t ng thch gi t a c c abnhv n v i xl 29. DHBK 200529/Chapter1Thh1: Vacuum tubes (1945-1955) N 1948, my tnh c ch ng trnh l trtrong bnh u m u tin v hnh t tr ng i h Manchester:c n i cManchester Mark I 30. DHBK 2005 30/Chapter1Thh1: Vacuum tubes (1945-1955) N 1951, my tnh Whirlwind l u tin sdm n ngbnhli t(magnetic core memories). G n ynguyn l ny sd l cng i cht MRAM od tch h ngp. 31. DHBK 2005 31/Chapter1Thh1: Vacuum tubes (1945-1955) M magnetic core l tr256 bitstu 32. DHBK 2005 32/Chapter1Thh1: Vacuum tubes (1945-1955) John von Neumann n 1952 v chi my tnh m c ng m ic ia 33. DHBK 200533/Chapter1Thh1: Vacuum tubes (1945-1955) N 1954, John Backus, IBM pht minh ramFORTRAN 34. Ch ng 1 DHBK 200534/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 35. 35/Chapter1Th h2: Discrete transistors (1955-1965) DHBK 2005 N 1947, William Shockley, John Bardeen, andmWalter Brattain pht minh ra transistor 36. 36/Chapter1Th h2: Discrete transistors (1955-1965) DHBK 2005 N 1955, IBM cng bIBM704, my tnh mmainframe sd tranzistorng l my tnh v php ton d ph ng uyi u y tin (5 kFlops, clock: 300 kHz) 37. Ch ng 1 DHBK 200537/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 38. 38/Chapter1Thh3: Integrated circuits (1965-1980) DHBK 2005 N 1958, Jack St. Clair Kilby of Texas mInstruments (Nobel prize physics, 2000) a ra v ch minh t ng tch h 1 transistor v ccng pi n trv t n trn m chip bn d v kch i i tn ith c 1 n ci k gi chnh l IC. apy. y 39. 39/Chapter1Thh3: Integrated circuits (1965-1980) DHBK 2005 7/4/1964 IBM a ra System/360, hmy tnh t ng thch u tin c IBM a 40. 40/Chapter1Thh3: Integrated circuits (1965-1980) DHBK 2005 N 1965, DigitalmEquipment Corporation, ara chi my tnh mini c u tin DP-8 41. DHBK 200541/Chapter1Thh3: Integrated circuits (1965-1980) N 1971, Ted Hoff cht Intel 4004 theo n t hng c m m o a tcng ty Nh b t n t chip s xu calculator. l vi xl uon ty tin v 2400 transistor (microprocessor, processor-on-a-chip). i 4 bt dli 12 bit a ch u, 42. DHBK 2005 42/Chapter1Thh3: Integrated circuits (1965-1980) 1973-1974, Edward Roberts, William Yates and Jim Bybeecht MITS Altair 8800, my tnh c nhn u tino Gi $375, 256 bytes of memory, khng keyboard, khngmn hnh v khng bnhngoi Sau , Bill Gate v Paul Allen vi ch ng trnh d t chBASIC cho Altair 43. Ch ng 1 DHBK 200543/Chapter1 Gi thi chung vhvi xliu L spht tri c cc bvi xl v my tnh ch na Thh-1: The early days (-1642) Thh0: Mechanical (1642-1945) Thh1: Vacuum tubes (1945-1955) Thh2: Discrete transistors (1955-1965) Thh3: Integrated circuits (1965-1980) Thh4: VLSI (1980-?) Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 44. DHBK 200544/Chapter1 Thh4: VLSI (1980-?) N 1981, IBM b u v IBM "PC" smt id h u hnh DOS.ngi 45. DHBK 200545/Chapter1 Thh4: VLSI (1980-?) N 1984, Xerox PARC (Palo Alto Research Center) a ram my tnh bn Alto v giao di ng i v my hon tonin m windows, bi t ng, mousei:u Con chu u tint 46. DHBK 2005 46/Chapter1Thh4: VLSI (1980-?) N 1986, siu my tnh Cray-XMP v 4 bxl t m i t c tnh ton l 840 MFlops. N lm mt b n cc ng 47. DHBK 2005 47/Chapter1 Thh4: VLSI (1980-?) T c tnh ton ny t v my tnh c c inhn 1 vi xl, Pentium III, vo qu 1 n 2000 m 48. Ch ng 1 DHBK 2005 48/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl 49. DHBK 200549/Chapter1Phn lo vi xli 50. DHBK 200550/Chapter1 Phn lo vi xl i BMW > 100 processors Trung bnh 1 cng dn M~ 75 processors *Intelligent Transportation *Cabin AirSystem (ITS) Quality *Lighting *Safety Systems*EnginePerformance andEmission Control (Traction Control) *Suspension *Digital*Steering Controls Entertainment Carand*Gear Box* Radio Braking Control 51. DHBK 2005 51/Chapter1 Phn lo vi xl iPhn lo theo gi thnh:iTypeGi (USD) Example applicationDisposable system 1 Greeting cardsEmbedded system10 Watches, cars,appliances Game computer 100 Home video gamesPersonal computer1KDesktop computerServer 10KNetwork server Collection of100K Departmental workstations supercomputerMainframe1M Batch processing in bank Supercomputer10M Weather forecasting 52. DHBK 200552/Chapter1 Phn lo vi xl i Phn lo theo ch nicng: Vi xl n (General Purpose Microprocessor)ang DSP (Digital Signal Processor) Vi u khi (Microcontroller) i n ASIP (Application Specific Integrated Processor) Phn lo theo t li p nh: CISC (complex Instruction Set computer): my tnh c t l ph tp nh c p nhi lu nh c trc ph tu c p m l i nh: c di khc nhau v th hi trong 1 n ch chu kcn cxung nhp RISC (reduced instruction Set computer): my tnh c t l rtp nh gn t lnh m l c i nhdi cnh v th hi trong 1 n 2 chu k xung nh c np c trc vi xl n gi c nhi thanh ghi u n,u t c xung nh l v tiu thn l ng thp n ng p 53. Ch ng 1 DHBK 200553/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Th phn, Nh pphn, H8, H16 Cng, tr nhn, chia , Cc sm Snguyn, sth BCD, ASCII c, Gi thi sl c vc trc v ho ng c hvi iuu t axl 54. Ch ng 1 DHBK 200554/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Th phn, Nh pphn, H8, H16 Cng, tr nhn, chia , Cc sm Snguyn, sth BCD, ASCII c, Gi thi sl c vc trc v ho ng c hvi iuu t axl 55. DHBK 200555/Chapter1 Hth phnp 1234,56710= 11000+2100+310+41+50.1+60.01+70.001 1103+2102+3101+4100+510-1+610-2+710-3 r = cs(r = 10), d=digit (0 d 9), m = schstr c d phu y, n = schssau d ph u ym1D i d ri i n 56. DHBK 200556/Chapter1Hnhphn 1011,0112= 18+04+12+11+00.5+10.25+10.125 123+022+121+120+02-1+12-2+12-3 r = cs(r = 2), d=digit (0 d 1), m = schstr c d ph n u y, = schssau d phuy m1 B i d 2 ii n 57. DHBK 200557/Chapter1H8 (Octal) 7654,328= 7512+664+58+41+30.125+20.015625 783+682+581+480+38-1+28-2 r = cs(r = 8), d=digit (0 d 7), m = schstr c d ph n u y, = schssau d phuy m1O i d 8 i i n 58. DHBK 200558/Chapter1 H16 (Hexadecimal) FEDC,7616= 154096+14256+1316+121+71/16+61/256 15163+14162+13161+12160+716-1+616-2 r = cs(r = 16), d=digit (0 d F), m = schstr c d phu y, n = schssau d ph u ym 1H i d 16ii n 59. DHBK 2005 59/Chapter1Chuy i gi cc h m n a Chuy thth phn sang nh n p phn Quy t l sc i chia cho 2 v ghi nhph d l c: yn n , yth ng chia ti cho 2 v ghi nhph d L l khi p n.p ith ng b 0. o ng c thtdy cc sds ch ng csc hnh a phn c tmn V d i 34 sang hnh : phn: 100010 Chy thnhn phn sang h16 v ng c l i 1011 0111B = B7H 60. Ch ng 1 DHBK 200560/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Th phn, Nh pphn, H8, H16 Cng, tr nhn, chia , Cc sm Snguyn, sth BCD, ASCII c, Gi thi sl c vc trc v ho ng c hvi iuu t axl 61. DHBK 200561/Chapter1C nhngphn C th phnngpNh 0 1 0x8273 y562Tng 8835 C nhngphnNh 0 0 1 1 1 1 1x10011011 y1010111Tng 11110010 62. DHBK 200562/Chapter1Trnhphn x 11101 y1111M n1110Hiu 01110 63. DHBK 200563/Chapter1Nhn nhphn Nguyn t c v d c: ng ch111011011110 00001110 111010110110 64. DHBK 200564/Chapter1Chia nhphn101110101110 11101101 10010101110 10010 0000 100101110100 Nguyn t trv d c:ch 65. Ch ng 1 DHBK 200565/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Th phn, Nh pphn, H8, H16 Cng, tr nhn, chia , Cc sm Snguyn, sth BCD, ASCII c, Gi thi sl c vc trc v ho ng c hvi iuu t axl 66. Bi di b d v l u n ng u n DHBK 2005 66/Chapter1 (Sign-Magnitude) M sc d bao g 2 ph d v t um n: uln V dh10: +12310 (thng th ng 123) v -12310 Hnhphn: bt d l bt MSB; 0 = d ng, 1 = m u V d 011002 = +1210 v 111002 = -1210 : Cc sc d 8 bt sc gi trut-127 n +127 vi2 s0: 1000 0000 (-0) v 0000 0000 (+0) 67. DHBK 2005 67/Chapter1 Sb 2 Sb 1 (b l gic): o bit 1001 => 0110 0100 => 1011 Sb 2 (b sh sb 1 +1 c): V d Tm sb 2 c 13 : a 13 = 0000 1101Sb 1 c 13 =1111 0010 aC thm 1:ng1Sb 2 c 13= 1111 0011 (t l -13) a c 68. DHBK 200568/Chapter1Sb 2 V d Tm sb 2 c 0 : a 0 =0000 0000Sb 1 c 0 =1111 1111 aC thm 1:ng1Sb 2 c 0= 0000 0000 (t l -0) ac Nhv v sb 2, s0 bi di 1 cch duyy icunnht Sc d 8 bt sc gi tru t-128 n 127 69. DHBK 2005 69/Chapter1 Sb 2Decimal Sb 2 Sign-magnitude-81000 --71001 1111-61010 1110-51011 1101-41100 1100-31101 1011-21110 1010-11111 1001 000001000 & 0000 10001 0001 20010 0010 30011 0011 40100 0100 50101 0101 60110 0110 70111 0111 70. Ch ng 1 DHBK 200570/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Th phn, Nh pphn, H8, H16 Cng, tr nhn, chia , Cc sm Snguyn, sth BCD, ASCII c, Gi thi sl c vc trc v ho ng c hvi iuu t axl 71. DHBK 200571/Chapter1Snguyn (integer) 8 bit unsigned: 0 n 255 signed : -128 n 127 ( b hai) 16 bit unsigned: 0 n 65535 (216-1) signed : -32768 (215) n 32767 (215 -1) 32 bit unsigned: 0 n 232 -1 signed : -231 n 231-1 72. DHBK 200572/Chapter1 Little endian v big endian S1234 H l trthno trong bnh8 bit?c uFFFFH FFFFH..........0101H 12H 0101H 34H0100H 34H 0100H 12H..........0000H 0000Hlittle endian big endianIntel microprocessorsMotorola microprocessors 73. Sth c DHBK 2005 73/Chapter1(real number, floating point number) V d 1,234=1,234*100=0,1234*10 1=... : 11,01 B= 1,101*21=0,1101*22=... mantissaexponent Real number: (m, e) , e.g. (0.1101, 2) Single precision: 32 bit Double precision: 64 bit 74. Sth c DHBK 200574/Chapter1(real number, floating point number) IEEE-754 format cho single-precision31 30 23 22 0Sbiased exponent e fraction f of normalized mantissa 1 sign bit: 0 d ng, 1 m 8 bit biased exponent= exponent + 127 24 bit mantissa chu ho = 1 bit + 23 bit fraction n nMantissa chu ho: c gi tr a 1 v 2 : 1.f n giV d bi di 0.1011 d i d IEEE-754 : u n ngSign bit s=0chu ho mantissa: 0.1011=1.011*2-1 nBiased exponent: -1 + 127=126=01111110IEEE format: 0 01111110 0110000000000000000000 75. Sth c DHBK 200575/Chapter1(real number, floating point number) IEEE-754 format cho double-precision63 6252 51 0S biased exponent e fraction f of normalized mantissa 1 sign bit: 0 d ng, 1 m 11 bit biased exponent= exponent + 1023 53 bit mantissa chu ho = 1 bit + 52 bit fraction n nsingle precision:(-1)s x 2e-127 x (1.f)2double precision: (-1)s x 2e-1023 x (1.f)2 76. Sth c DHBK 200576/Chapter1(real number, floating point number) Single Precision Double PrecisionMachine epsilon 2-23 or 1.192 x 10-72 -52 or 2.220 x 10-16Smallest positive 2 -126 or 1.175 x 10 -38 2 -1022 or 2.225 x 10 -308Largest positive(2- 2 -23) 2127 or 3.403 x 10 38 (2- 2 -52) 21023 or 1.798 x 10308Decimal Precision6 significant digits 15 significant digits 77. DHBK 2005 77/Chapter1BCD Binary Coded Decimal number BCD chu (BCD gi, packed BCD):n1 byte bi di 2 sBCD u nDecimalBCDV d 25: 0010 0101:digit 0 0000 1 0001 BCD khng gi (unpacked BCD) : 2 00101 byte bi di 1 sBCD u n 3 0011v d 25: 00000010 00000101:4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 78. ASCII DHBK 200578/Chapter1 American Standard Code for InformationInterchange (7-bit code)b3b2b1b0 000 001 010 011 100 101 110 111 0000NUL DLE SP 0@ P p 0001SOH DC1! 1A Q aq 0010STX DC2 2B R br 0011ETX DC3# 3C S cs 0100EOT DC4$ 4D T dt 0101ENQ NAK %5E U eu 0110ACK SYN &6F V fV 0111BEL ETB 7G W gw 1000 BS CAN( 8H X hx 1001 HT EM ) 9I Y iy 1010 LF SUB* :J Z jz 1011 VT ESC+ ;K [ k{ 1100 FFFS, N ^ n~ 1111 SIUS/ ?O _ o DEL 79. Ch ng 1 DHBK 2005 79/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl Hvi xl 80. Ch ng 1 DHBK 2005 80/Chapter1 Gi thi chung vhvi xl iu L spht tri c cc bvi xl v my tnh chna Phn lo vi xli Cc h m dng trong my tnh ( nh lc i) Gi thi sl c vc trc v ho ng c hvi iu ut axl Hvi xl 81. DHBK 2005 81/Chapter1 Hvi xl Bus dliu Bus u khii n Ph ghp i Ph ghp iBnhBnh Vi xlVi xl Thi bt vo/ra vo/raMemoryMemory CPUCPU vo/ra(I/O)(I/O)Mn hnhBus a ch My inBn phmDRAMIntel 80X86ISACon chu tSRAMMotorola 680XEISA cngROM PowerPCPCI mmEEPROM...VESA CD-ROMFlashSCSI DVD USB... ... 82. DHBK 2005 82/Chapter1Hvi xl CPU n vsh v logicc c m l nh(Arithmetic Logical Unit)Th hi cc php ton shc nc Cng, tr nhn chia ,Gi m l i nhTh hi cc php ton logicc n And, or, compare.. n v i khi (Control Unit) u n Th hi l c n nh Cc thanh ghi (Registers)L trdli v tr thi c qu trnh th hi l uunga c n nh 83. DHBK 2005 83/Chapter1Hvi xl Memory ROM: khng b t dli ch dli u khi hth mu, a u i n nglc kh ng i RAM: m dli khi m ngu ch ch ng trnh v dtutn, ali trong qu trnh ho ng c hth u t ang Bus dliu 8, 16, 32, 64 bit ty thu vo vi xlc Bus a ch : 16, 20, 24, 32, 36 bit s nhc thnh a ch2N : V d 8088/8086 c 20 a ch qu l : ng =>nc220 bytes=1Mbytes 84. DHBK 2005 84/Chapter1 Hvi xlNh s xun t Tn vi xlBusBus Khn a ng dliu a chch Intel 8088820 1M 808616 20 1M8018616 20 1M8028616 2416 M 80386SX 16 2416 M 80386DX 32 32 4G 80486DX 32 32 4G Pentium 64 324G Pentium Pro 64 3664 GPentium I, II, III, IV 64 3664 GMotorola 68000 16 2416 M 68010 16 2416 M 68020 32 32 4G 68030 32 32 4G6804032 32 4G6806064 32 4G PowerPC 64 32 4G 85. DHBK 20051/Chapter2 N dung mn h i c1. Gi thi chung vhvi xliu2. Bvi xl Intel 8088/80863. L trnh h ngcho 8086 pp4. Tch vo ra dli cu5. Ng v xl ng tt6. Truy c bnhtr ti DMAp c p7. Cc bvi xl trn th tc 86. DHBK 20052/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 87. DHBK 20053/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi n ang Cc thanh ghi n o Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 88. DHBK 20054/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi n ang Cc thanh ghi n o Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 89. DHBK 2005 5/Chapter2S kh 8088/8086 i EUbus a chBIUCc thanh AX20 bitBXghi n a ngCXDXBus trong c CPU a Cc thanh ghi CSSP16 bit dliuCc thanh ghi n v con tro DSBP20 bit a ch SScon tr SI lnh ESv chsDI IPBus dliu LogicALU 16 bit u khi i nCc thanh ghi t th mibusBus ngoiKh u i ikhi nALUc EU aHng i l nh Thanh ghi c 90. DHBK 20056/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi n ang Cc thanh ghi n o Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 91. DHBK 20057/Chapter2Cc thanh ghi n c 8088/8086 ang a8 bit cao 8 bit thp 8088/8086 n 80286 : 16 bits AXAHAL 80386 trln: 32 bits EAX,BXBHBL EBX, ECX, EDXCXCHCLDXDHDL Thanh ghi ch AX (accumulator): ch k quc cc php tnh.aataK qu8 bit ch trong AL t ca Thanh ghi csBX (base): ch a cha cs v dc b dng ,a ngtrong l XLAT (Translate)nh Thanh ghi m CX (count): dng ch sl l trong cc l l a n pnh p(Loop). CL dng cch sl d ho quay trong cc la n chcnhd v quay thanh ghich Thanh ghi dli DX (data): cng AX ch dli trong cc phpu autnh nhn chia s16 bit. DX cn dng c ch a ch ng a ctrong cc l vo ra dli tr ti (IN/OUT)nh u c p 92. DHBK 20058/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi nang Cc thanh ghi no Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 93. DHBK 2005 9/Chapter2Cc thanh ghi o n Tch c bnh1 Mbytes ca n bnh(segment) FFFFFH o216 bytes =64 KB n 1: a ch 00000 Ho u n 2: a ch 00010 Ho u n cu cng:oiFFFF0 H nhtrong n:o a ch ch: offset l 1: offset: 0000 cu cng: offset: FFFFi a ch t l: v1FFFFHSegment : offsetOffset=F0001F000H10000H 1000a ch t l=Segment*16 + offset v Thanh ghi no Chth (real mode) c00000H 94. DHBK 2005 10/Chapter2 Cc thanh ghi o n V d a ch t l 12345H : v a ch o nich chl 1000 H 2345H 1200 H 0345H 1004 H ? 0300 H ? V d Cho a ch c n: 49000 H, xc nh a ch i : u a o cu 95. DHBK 200511/Chapter2Cc thanh ghi o n Cc thanh ghi n: ch a ch o o a n FFFFF ............. 58FFF n dli ph ou extra segment 49000 4900 ES 43FFF n ng xo n pStack segment 34000 3400 SS 30000 2FFFF n mo Code segment 20000CS 2000 1FFFF n dlio u Data segment 10000 1000 DS 00000 96. DHBK 2005 12/Chapter2 Cc thanh ghi o n Cc n ch nhau ongFFFFF s t ad ca k0A480t 0A47Fa c Stacko 0A280d 0A28 SS0A27Fe Data0A0F0DS0A0F0A0EFCode090F0 090F CS00000 97. DHBK 200513/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi nang Cc thanh ghi no Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 98. DHBK 2005 14/Chapter2 Cc thanh ghi con trv ch s Ch a ch ch (offset) a l Con trl IP (instruction pointer): ch a ch nh tinha l ptheo trong n m l CS.o nhCS:IP Con trcsBP (Base Pointer): ch a ch a dli a cutrong n ng x SS ho cc n khc onp c oSS:BP Con trng x SP (Stack Pointer): ch a ch n th np a hi ic nh ng xa npSS:SP Ch sngu SI (Source Index): ch a chna dli ngu untrong n dli DS trong cc l chu ounhiDS:SI Ch sch (Destination Index): ch a cha dli u chtrong n dli DS trong cc l chu o u nhiDS:DI SI v DI c th sd nhthanh ghi ncng a ng 80386 trln 32 bit: EIP, EBP, ESP, EDI, ESI 99. DHBK 2005 15/Chapter2Cc thanh ghi con trv ch s Thanh ghi n v thanh ghi l ng nh ochm Segment Offset Ch thchCS IPa ch nhlSS SP ho BP c a chng xnpDS BX, DI, SI, s8 bit a chdliu ho s16 bitcES DIa chchui ch 100. DHBK 200516/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi nang Cc thanh ghi no Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 101. DHBK 200517/Chapter2Thanh ghi c(Flag Register)15 14 21 0O D I T S Z AP C 9 bit sd c ng, 6 ctr thi: ng C ho CF (carry flag)): CF=1 khi c nhho m n tMSB c c P ho PF (parity flag): PF=1 (0) khi t sbt 1 trong k c ng tqul ch (l n ) A ho AF (auxilary carry flag): cnhph AF=1 khi c c ,nhho m n tm sBCD th sang BCD cao c t p Z ho ZF (zero flag): ZF=1 khi k qub 0 ct ng S ho SF (Sign flag): SF=1 khi k qum ct O ho OF (Overflow flag): ctrn OF=1 khi k qul m c ttsv t ra ngoi gi h bi di c n trong khi th i n una chi php ton c trsc d n ngu 102. DHBK 2005 18/Chapter2Thanh ghi c(Flag Register)15 14 2 1 0O D I T S Z A P C 3 c u khi i n T ho TF (trap flag)): cb TF=1 khi CPU lm vi chc y, c ch t l y ng nh I ho IF (Interrupt enable flag): ccho php ng IF=1 th ct,CPU scho php cc yu c ng (ng che utt c) ctc ng (Cc l nh: STI, CLI) D ho DF (direction flag): ch ng, DF=1 khi CPU lmcvi v chu k ttheo thttph sang tri (l STD, cii i nhCLD) 103. DHBK 2005 19/Chapter2 Thanh ghi c(Flag Register) V d: 80h + 80h 100h SF=0 v msb trong k qu=0 t PF=1 v c 0 bt c t b 1 a ngng ZF=1 v k q thu l 0t ac CF=1 v c nhtbt msb trong php cng OF=1 v c trn trong php c 2 sm ng 104. DHBK 200520/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S kh i Cc thanh ghi nang Cc thanh ghi no Cc thanh ghi con trv chs Thanh ghi c Hng i l nh S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086ac Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 105. DHBK 200521/Chapter2 H ng i l nh 4 bytes i v 8088 v 6 bytes i v 8086 i i Xl pipelineKhng cpipeliningF1 D1 E1 F2 D2 E2 F3 D3 E3F1 D1 E1C pipeliningF2 D2 E2F3 D3 E3 106. DHBK 200522/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 107. DHBK 200523/Chapter2Intel 8088 16-bit processor introduced in 1979 3 5 to 8 MHz, 29m, KTOR, 0.33 to 0.66 MIPS 108. DHBK 2005 24/Chapter2Intel 8088 ChMin v chMax: MN/MX = 1 chMin= 0 ch Max v busi controller 8288 109. DHBK 200525/Chapter2Intel 8086 110. DHBK 200526/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 111. DHBK 200527/Chapter2B bnhc my tnh IBM PCn aVng nhmrngFFFFF Vng nhh ng thA0000 484 Kbytes1 Mbytes9FFFF bnhth cVng nh ch ng trnh640 Kbytes00000 112. DHBK 200528/Chapter2B vng nhch ng trnhn 9FFFF MSDOS9FFF0Vng dnh cho ccch ng trnh d ngng08E30COMMAND.COM08490Device drivers (mouse.sys)02530 MSDOS01160IO.SYS00700Vng DOS00500Vng BIOS0040000000Cc vector ngt 113. DHBK 200529/Chapter2 B vng nhhth n ngFFFFFROM BIOSF0000ROM BASICE0000Vng dnhC8000 Video BIOS ROMC0000Video RAM (text)B0000 Video RAM (ho)A0000 114. DHBK 200530/Chapter2 Cc c vo ra ng a ch0000H FFFFH, M/IO =0 :FFFF Vng mrng COM103F8 u khi a mi n m03F0 CGA adapter03D0 LPT10378 u khi ci n ng0320 COM202F8 82550060 nh th (8253) i0040 u khi ngi n t00200000 u khi DMAi n 115. DHBK 2005 31/Chapter2Trnh tkh ng i Khi b ngu ho nh Resettn c n CS=FFFFh v IP=0000 => a ch FFFF0 ch ch chuyathn u khi n m kh u c cc ch ng trnh BIOS i n ii a Cc ch ng trnh BIOS ki tra hth v bnh m ng Cc ch ng trnh BIOS kh t b vector ng v vng i o ngtdli BIOS u BIOS n ch ng trnh kh ng (boot program) ta vo p i bnh Ch ng trnh kh ng n h u hnh ta vo bnhi p i H u hnh n cc ch ng trnh di p ng ng 116. DHBK 2005 32/Chapter2Vng nhd nh ring c 8088/8086aFFFFFReset BootstrapFFFF0 program jump003FF Cc vector ngt00000 117. DHBK 200533/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Ch ch a thanh ghi Ch ch c th a t Ch ch c ti a trp Ch ch a gin ti qua thanh ghi p Ch ch i cs a t ng Ch ch i ch a t ng s Ch ch i ch a t ng scs Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 118. Ch a chthanh ghi DHBK 2005 34/Chapter2 (Register Addressing Mode) Dng cc thanh ghi nhl cc ton hng T c th hi l cao c n nh V d: MOV BX, DX ; Copy n dung DX vo BXi MOV AL, BL ; Copy n dung BL vo ALi MOV AL, BX ; khng h lv cc thanh ghi c kch th cp khc nhau MOV ES, DS ; khng h l (segment to segment)p MOV CS, AX ; khng h lv CS khng dng lmp cthanh ghi ch ADD AL, DL ; C n dung AL v DL r a vo AL ng ii 119. Ch a ch tht c DHBK 2005 35/Chapter2 (Immediate Addressing Mode) Ton h ng ch l thanh ghi ho nh c Ton h ngu l h sng nng Dng n h svo thanh thi (trthanh ghi png n v thanh c ho vo nhtrong n dli o) couDS V d: MOV BL, 44 ; Copy sth phn 44 vo thanh ghi BL p MOV AX, 44H ; Copy 0044H vo thanh ghi AX MOV AL, A ; Copy m ASCII c A vo thanh ghi ALa MOV DS, 0FF0H ; khng h l p MOV AX, 0FF0H ; MOV DS, AX ; MOV [BX], 10 ; copy sth phn 10 vo nhDS:BX p 120. Ch a ch titr cp DHBK 2005 36/Chapter2 (Direct Addressing Mode) M ton h l a ch nhch dlit ng au Ton h kia ch thl thanh ghi ngc V d: MOV AL, [1234H] ; Copy ndung nh ch ic DS:1234 vo AL a MOV [ 4320H ], CX ; Copy ndung c CX vo 2 nh ti DS: ialin p4320 v DS: 4321 121. Ch a ch n ti qua thanh ghigi p DHBK 2005 37/Chapter2 (Register indirect Addressing Mode) M ton h l thanh ghi ch a ch a 1 nht ng a cdliu Ton h kia ch thl thanh ghi ngc V d: MOV AL, [BX] ; Copy ndung nh ch ic DS:BX vo AL a MOV [ SI ], CL ; Copy ndung c CL vo nh ch ia c DS:SI a MOV [ DI ], AX ; copy n dung c AX vo 2 nh ialin ti DS: DI v DS:p(DI +1) 122. Ch a ch i cst ng DHBK 200538/Chapter2 (Based relative Addressing Mode) M ton h l thanh ghi csBX, BP v cct ngh sbi di gi tr ch chuyngund n Ton h kia ch thl thanh ghi ngc V d: MOV CX, [BX]+10 ; Copy ndung 2 nhilin ti c chp DS:BX+10av DS:BX+11 vo CX MOV CX, [BX+10] ; Cch vikhc c l trnta nh MOV AL, [BP]+5 ; copy ndung c nhia SS:BP+5 vo thanh ghi AL 123. Ch a ch i ch t ng s DHBK 2005 39/Chapter2 (Indexed relative Addressing Mode) M ton h l thanh ghi cht ngsSI, DI v cc hngsbi di gi tr ch chuy u n d n Ton h kia ch thl thanh ghi ng c V d: MOV AX, [SI]+10 ; Copy n dung 2 nh ti c chi lin p DS:SI+10 vaDS:SI+11 vo AX MOV AX, [SI+10] ; Cch vikhc c l trnta nh MOV AL, [DI]+5 ; copy ndung c nhiaDS:DI+5 vo thanh ghi AL 124. 40/Chapter2Ch a ch i ch cs t ng s DHBK 2005 ( Based Indexed relative Addressing Mode) V d: MOV AX, [BX] [SI]+8 ; Copy ndung 2 nh ti c ch i lin p aDS:BX+SI+8 v DS:BX+SI+9 vo AX MOV AX, [BX+SI+8] ; Cch vikhc c l trn ta nh MOV CL, [BP+DI+5] ; copy n dung c nh i a SS:BP+DI+5 vo thanhghi CL 125. DHBK 2005 41/Chapter2 Tm t cc ch a ch t Ch ch aTon hngThanh ghi n ng nh om Thanh ghiThanh ghiT thcDli uTr ti c p [offset] DSGin ti qua thanh ghi p [BX] DS [SI] DS [DI] DST ng i cs [BX] + d chuy chnDS [BP] + d chuy chnSST ng i ch s[DI] + d chuy ch n DS [SI] + d chuy chnDST ng i ch cs s[BX] + [DI]+ d chuy chnDS [BX] + [SI]+ d chuy ch n DS [BP] + [DI]+ d chuychn SS [BP] + [SI]+ d chuy chnSS 126. Bch ng nh thanh ghi m o n DHBK 2005 42/Chapter2 (Segment override) V d: MOV AL, [BX]; Copy n dung nh chi c DS:BX vo ALa MOV AL, ES:[BX] ; Copy n dung nh ch ic ES:BX vo AL a 127. DHBK 200543/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 128. DHBK 2005 44/Chapter2Cch m ho l c 8086nh aOpcodeMOD-REG-R/M D chuych n T thc1-2 byte0-1 byte0-2 byte 0-2 byte M l c t nhdi t1 n 6 byteD W W=0 dli 1 byteu Opcode W=1 dli 2 byteu D=1 dli n thanh ghi cho b 3 bit REGu i i D=0 dli tthanh ghi cho b 3 bit REGu ii 129. DHBK 2005 45/Chapter2Cch m ho l c 8086nh aMOD REG R/M MOD 1100 khng c d chuy ch n Thanh ghiMMCh ch a01 d chuy 8 bit ch n10 d chuy 16 bitch nW=1 W=0000 DS:[BX+SI]11 R/M l thanh ghi AXAL 000 001 DS:[BX+DI]BXBL 011 010 SS:[BP+SI]CXCL 001 011 SS:[BP+DI]DXDL 010 100 DS:[SI]SPAH 100 101 DS:[DI]DIBH 111 110 SS:[BP]BPCH 101 111 DS:[BX]SIDH 110 130. DHBK 2005 46/Chapter2Cch m ho l c 8086nh a V d chuy l MOV CL, [BX] sang m my : n nh opcode MOV: 100010 Dli l 1 byte: W=0u Chuy t thanh ghi: D=1n i Khng c d chuy MOD=00 chn: [BX] nn R/M=111 CL nn REG=0011 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1MOV MOD CL[BX]D WV d2: chuy l MOV [SI+F3H], CL sang m my n nh 131. DHBK 200547/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cc l di chuy dli nh n u Cc l sh v logic nhc Cc l u khi ch ng trnh nh in Cch nh a ch chb vcc my tnh to80286 132. DHBK 200548/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cc l di chuy dli nh n u Cc l sh v logic nhc Cc l u khi ch ng trnh nh in Cch nh a ch chb vcc my tnh to80286 133. DHBK 2005 49/Chapter2C c l di chuy dli nh n u MOV, XCHG, POP, PUSH, POPF, PUSHF, IN, OUT Cc l di chuy chu MOVS, MOVSB, MOVSWnh ni MOV Dng chuy gi cc thanh ghi, gi 1 thanh ghi v 1 na anhho chuy 1 svo thanh ghi ho nh cn c C php: MOV ch, ngun L ny khng tc ng n c nh V d:MOV AX, BXMOV AH, AMOV AL, [1234H] 134. DHBK 2005 50/Chapter2 C c l di chuy dlinh n u Khn k h ton h c l MOV ng tp ng a nhch Thanh ghi Thanh ghi nh H s ng nang noNgun Thanh ghi YES YES YES NO nang Thanh ghi YES NOYES NO no nh YES YES NONO H s ngYES NOYES NO 135. DHBK 200551/Chapter2 C c l di chuy dlinh n u L XCHGnh Dng hon chuy n dung gi hai thanh ghi, gi 1 thanh ghi n iaa v 1 nh C php: XCHG ch, ngun Gi h ton h khng l thanh ghi n i n:ngco L ny khng tc ng n cnh V d : XCHG AX, BX XCHG AX, [BX] 136. DHBK 2005 52/Chapter2 C c l di chuy dlinh n u L PUSHnh Dng c 1 tt thanh ghi ho nhvo nh ng x tc np C php: PUSH Ngu n M t SP=SP-2, Ngu => {SP}:n Gi h thanh ghi 16 bit ho l 1 tnh in:c L ny khng tc ng n c nh V d : PUSH BX PUSH PTR[BX] L PUSHFnh C n dung c thanh ghi cvo ng x ti a np 137. DHBK 2005 53/Chapter2 C c l di chuy dlinh n u V dvl PUSH nh PUSH AXPUSH BX SP1300A 1300A1300A13009 13009 12 13009 1213008 13008 SP 1300834 3413007 1300713007 7813006 1300613006SP 5613005 130051300513004 130041300413003 130031300313002 130021300213001 130011300113000 13000 13000SS1300SS1300SS 1300SP000ASP0008SP 0006 AX 1234AX1234BX 7856 138. DHBK 200554/Chapter2 C c l di chuy dlinh n u L POPnh Dng y l 1 tvo thanh ghi ho nhtnh ng xl icnp C php: POP ch M t {SP} => : ch, SP=SP+2 Gi h thanh ghi 16 bit (trCS) ho l 1 tnh in:c L ny khng tc ng n c nh V d : POP BX POP PTR[BX] L POPFnh L 1 ttnh ng x r a vo thanh ghi c y np i 139. DHBK 200555/Chapter2 C c l di chuy dlinh n u V dl POP nh POP DX 1300A1300A 13009 12 1300912 13008 34 1300834SP 13007 78 1300778 13006SP13006 5656 1300513005 1300413004 1300313003 1300213002 1300113001 1300013000 SS1300 SS1300 SP0006 SP0008 DX3254 DX7856 140. DHBK 2005 56/Chapter2 C c l di chuy dlinh n u L INnh Dng 1 byte ho 2 byte dli tc vo thanh ghi AL cc ung ho AX c C php: IN Acc, Port L ny khng tc ng n c nh V d : IN AX, 00H IN AL, F0H IN AX, DX L OUTnh Dng 1 byte ho 2 byte dli tthanh ghi AL ho AX ra a c uc cng C php: OUT Port, Acc L ny khng tc ng n c nh V d: OUT 00H, AX OUT F0H, AL OUT DX, AX 141. DHBK 2005 57/Chapter2 C c l di chuy dlinh n u Cc l di chuy chu MOVS, MOVSB, MOVSWnh ni Dng chuy m ph tc chu ny sang m chun tnai tikhc C php: MOVS chu i ch, chu nguinMOVSBMOVSW Th hi c n:DS:SI l a ch a ph ttrong chu ngu cn inES:DI l a ch a ph ttrong chu cn i chSau m l chuy SI=SI +/- 1, DI=DI +/- 1 ho SI=SI +/- 2,i nnc DI=DI +/- 2 tuthu vo ch ng DF l 0/1c L ny khng tc ng n c nh V d:MOVS byte1, byte2 142. DHBK 200558/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cc l di chuy dli nh n u Cc l sh v logic nhc Cc l u khi ch ng trnh nh in Cch nh a ch chb vcc my tnh to80286 143. DHBK 2005 59/Chapter2Cc l sh v logicnh c ADD, ADC, SUB, MUL, IMUL, DIV, IDIV, INC, DEC AND, OR, NOT, NEG, XOR L quay v d RCL, RCR, SAL, SAR, SHL, SHRnhch: L so snh: CMP, CMPSnh L ADDnh L c hai ton hnh ngng C php: ADD ch, ngu n Th hi cn: ch=ch + ngun Gi h ton h khng l 2 nhv thanh ghii n: ng c n o L ny thay i c AF, CF, OF, PF, SF, ZFnh: V d :ADD AX, BXADD AX, 40H 144. DHBK 200560/Chapter2Cc l sh v logicnh c L ADCnh L c c nhhai ton h nh ngng C php: ADC ch, ngun Th hi cn: ch=ch + ngun+CF Gi h ton h khng l 2 nhv thanh ghi n i n: ngco L ny thay i c AF, CF, OF, PF, SF, ZF nh: V d : ADC AL, 30H L SUBnh L tr nh C php: SUB ch, ngun Th hi cn: ch=ch - ngun Gi h ton h khng l 2 nhv thanh ghi n i n: ng c o L ny thay i c AF, CF, OF, PF, SF, ZF nh: V d : SUB AL, 30H 145. DHBK 2005 61/Chapter2 Cc l sh v logic nh c L MULnh L nhn skhng dnh u C php: MUL ngun Th hi cn: AX=AL* ngun8bitDXAX=AX*ngu n16bit L ny thay i c CF, OFnh : V d:MUL BL L IMULnh nhn sc du 146. DHBK 2005 62/Chapter2Cc l sh v logicnh c L DIVnh L chia 2 skhng dnhu C php: DIV ngun Th hi cn:AL = th ng (AX / ngu n8bit) ; AH=d(AX / ngun8bit)AX = th ng (DXAX / ngu n16bit) ; DX=d(DXAX / ngun16bit) L ny khng thay i cnh V d:DIV BL L IDIVnh chia 2 sc du 147. DHBK 200563/Chapter2Cc l sh v logicnh c L INCnh L c 1 vo ton h l thanh ghi ho nhnh ngng c C php: INC ch Th hi c n: ch= ch + 1 L ny thay i c AF, OF, PF, SF, ZFnh : V d:INC AX L DECnh L tr1 tn dung m thanh ghi ho nhnhitc C php: DEC ch Th hi c n: ch= ch - 1 L ny thay i c AF, OF, PF, SF, ZFnh: V d:DEC [BX] 148. DHBK 200564/Chapter2 Cc l sh v logic nh c L ANDnh L AND logic 2 ton hnh ng C php: AND ch, ngun Th hi cn: ch=ch And ngu n Gi h ton h khng l 2 nhho thanh ghii n: ng cc n o L ny thay i c PF, SF, ZF v xo cCF, OFnh: V d :AND BL, 0FH L XOR, OR: t ng tnhl ANDnhnh L NOT: o t bit c ton hnh ng a ng L NEG: xc nh sb 2 c ton hnh a ng 149. DHBK 2005 65/Chapter2 Cc l sh v logic nh c L CMPnh L so snh 2 byte ho 2 t nhc C php: CMP ch, ngun Th hicn:ch = ngu : CF=0n ZF=1ch> ngu : CF=0 nZF=0ch < ngu : CF=1n ZF=0 Gi h ton h ph cng in:ngidi v khng l 2 nh c L CMPSnh Dng so snh t ph tc 2 chu c cc ph tcngngna i n loi C php: CMPS chu i ch, chu nguin CMPSB CMPSW Th hic n: DS:SI l a ch a ph ttrong chu ngu cn in ES:DI l a ch a ph ttrong chu cn i ch Sau m l so snh SI=SI +/- 1, DI=DI +/- 1 ho SI=SI +/- 2, DI=DI +/- 2i n ctuthu vo ch ng DF l 0/1 c C nh cAF, CF, OF, PF, SF, ZF p t 150. DHBK 200566/Chapter2 Cc l sh v logic nh c L RCLnh L quay tri thng qua cnhnh C php: RCL ch, CL (v sl quay l h 1)innn RCL ch, 1 RCL ch, Sl quay (80286 trln)n Th hi quay tri c n: ch CL ln ch l thanh ghi (trthanh ghi n) ho nh oc L ny thay i c CF, OFnh :CFMSBLSB L RCRnh L quay ph thng qua cnhnh i 151. DHBK 200567/Chapter2 Cc l sh v logic nh c L ROLnh L quay trinh C php: ROL ch, CL (v sl quay l h 1) inn n ROL ch, 1 ROL ch, Sl quay (80286 trln) n Th hi quay tri c n:ch CL ln ch l thanh ghi (trthanh ghi n) ho nhoc L ny thay i c CF, OFnh:CF MSB LSB L RORnh L quay phnh i 152. DHBK 200568/Chapter2 Cc l sh v logic nh c L SALnh L d tri shnh ch c C php: SAL ch, CL (v sl d l h 1) in ch n n SAL ch, 1 SAL ch, sl d (80286 trln)n ch Th hi d tri cn: ch ch CL bit t ng v ng ich=ch*2CL L ny thay i cSF, ZF, PFnhCFMSBLSB 0 L SHLnh L d tri logic t ng tnhSALnh ch 153. DHBK 2005 69/Chapter2Cc l sh v logicnh c L SARnh L d ph shnh chic C php: SAR ch, CL (v sl d l h 1) in ch nn SAR ch, 1 ho SAR cch, sl d (80286 trln) n ch Th hi d ph cn: chi ch CL bit L ny thay i cSF, ZF, PF, CF mang gi tr a MSBnh cMSB LSBCF 154. DHBK 200570/Chapter2 Cc l sh v logic nh c L SHRnh L d ph logicnh ch i C php: SHR ch, CL (v sl d l h 1) in ch n n SHR ch, 1ho SHR c ch, sl d (80286 trln)n ch Th hi d ph c n: ch i ch CL bit L ny thay i cSF, ZF, PF, CF mang gi tr a LSBnh cMSB LSB CF 0Ch :Trong cc l d v quay, ton h khng l thanh ghi nnh ch ngc o 155. DHBK 200571/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cc l di chuy dli nh n u Cc l sh v logic nhc Cc l u khi ch ng trnh nh in L nh khng u ki JMPnhyin: L nh c u ki JE, JG, JGE, JL, JLE...nhy in L l LOOPnh p L g ch ng trnh con CALLnhi L g ch ng trnh con ph vng INT v IRETnhi c t Cch nh a ch chb vcc my tnh t80286o 156. DHBK 200572/Chapter2L nh khng ki JMPnhy i un Dng nh t m a chy i t trong bnh 3 lo nh ng g v xa i: y n,n L nh ng (short jump)nhy ndi l 2 bytes: nhE B lchPh vi nh -128 n 127 bytes so v l ti theo lmy: i nh p nh JMPTh hi IP=IP + chc n:lV d: XOR BX, BXNhan: MOV AX, 1 ADD AX, BX JMP SHORT Nhan 157. DHBK 2005 73/Chapter2L nh khng ki JMPnhy i un L nh g (near jump)nhynPh vi nh 32 Kbytes so v l ti theo l JMP m y:i nh p nhV d:XOR BX, BX XOR CX, CXXOR CX, CXNhan: MOV AX, 1MOV AX, 1 MOV AX, 1ADD AX, BX ADD AX, BXADD AX, BXJMP NEAR NhanJMP NEAR PTR BX JMP WORD PTR [BX]Th hi IP=IP+ ch c n: l IP=BXIP=[BX+1] [BX] E 9 l chLo l chHi Nh gin tiyp 158. DHBK 2005 74/Chapter2 L nh khng ki JMP nhy i un L nh xa (far jump)nhydi l 5 bytes i v nh t nhn: nh iy i E A IP Lo IP Hi CS Lo CS HiPh vi nh nh trong 1 n m ho nh sang n m m y:y o c yo khcV d:EXTRNNhan: FAR XOR CX, CX Next: MOV AX, 1 MOV AX, 1ADD AX, BX ADD AX, BXJMP FAR PTR Next JMP DWORD PTR [BX]........JMP FAR Nhan IP = [BX+1][BX]Th hi IP=IP c nhn c n:a CS= [BX+3][BX+2]CS=CS c nhna 159. DHBK 2005 75/Chapter2 Tm t l JMP t nh FFFFFH n m 2 o Nh xay +127 n m 1 oNh ng y n JMP Nh gyn -128 00000H 160. DHBK 2005 76/Chapter2L nh c kinhyi un JE or JZ, JNE or JNZ, JG, JGE, JL, JLE (dng chosc d v JA, JB, JAE, JBE (dng cho skhngu)d ...u) Nh th hi phthu vo cc cy cc n c L cc l nh ng nhyn V d: Nhan1: XOR BX, BX Nhan2: MOV AX, 1CMP AL, 10H Th hi IP=IP + chc n:dJNE Nhan1JE Nhan2 161. DHBK 2005 77/Chapter2L l LOOPnh p LOOP, LOOPE/LOOPZ, LOOPNE/LOOPNZ L l ph h gi DEC CX v JNZ nhip aXOR AL, ALXOR AL, AL XOR AL, ALMOV CX, 16MOV CX, 16 MOV CX, 16 Lap: INC AL Lap: INC ALLap: INC ALLOOP Lap CMP AL, 10 CMP AL, 10 LOOPE LapLOOPNE Lap L n kh CX=0 p L n kh CX=0p L n kh CX=0 p ho AL10 c ho AL=10c 162. DHBK 200578/Chapter2 L CALL nh Dng g ch ng trnh con i C 2 lo CALL g v CALL xai:n CALL g (near call): t ng tnhnh g n y n G ch ng trnh con trong cng m n mit o Tong PROC NEAR Tong PROC NEAR CALL WORD PTR [BX] ADD AX, BXADD AX, BX ADD AX, CXADD AX, CX RET Tong ENDPRET... Tong ENDP MOV BX, OFFSET TongCALL BX...CALL Tong C IP vo ng x tn p C IP vo ng xtn pC IP vo ng xtn p IP=IP + d chuych nIP= BXIP= [BX+1] [BX] RET: l IP tng xyn pRET: l IP tng x yn p RET: l IP tng x yn p 163. DHBK 200579/Chapter2L CALLnh CALL xa (far call): t ng tnhnh xa y G ch ng trnh con ngoi n mioTong PROC FAR CALL DWORD PTR [BX] ADD AX, BX ADD AX, CX RETTong ENDP...CALL TongC CS vo ng x t n p C CS vo ng xtn pC IP vo ng x t n p C IP vo ng xt n pIP=IP c TongaIP = [BX+1][BX]CS =CS c TongaCS= [BX+3][BX+2]RET: l IP tng x yn pRET: l IP tng x y n pl CS tng xy n pl CS tng x y n p 164. DHBK 200580/Chapter2 L ng INT v IRET nht INT g ch ng trnh con ph vng (CTCPVN)i c t B vector ng 1 Kbytes 00000H n 003FF Hngt: 256 vector ng t 1 vector 4 bytes, ch IP v CS c CTCPVN aa 32 vector u dnh ring cho Intel 224 vector sau dnh cho ng i dng C php: INT Number V d INT 21H g CTCPVN c DOS :i a 165. DHBK 200581/Chapter2L ng INT v IRETnht Th hi INT: c n C thanh ghi cvo ng xt n p IF=0 (c cc ng khc tc ng), TF=0 (ch sumt y t) C CS vo ng xtn p C IP vo ng xt np IP=[N*4], CS=[N*4+2] G IRET:p L IP tng xyn p L CS tng xy n p L thanh ghi ctng xy np 166. DHBK 200582/Chapter2Ch ng 2: Bvi xl Intel 8088/8086 C trc bn trongu S chn B n bnhc my tnh IBM-PC a Cc ch ch a 8086 a c Cch m ho l c 8086nh a M tt l c 8086 p nha Cch nh a ch chb vcc my tnh t o80286 167. DHBK 200583/Chapter2nh a ch nhch b vb o Cho php truy c dli v ch ng trnh vngp unhtrn 1M Thanh ghi l ch a ch chcha l Thanh ghi n ch tch n (segment o a n oselector) tch n ch 1 ph ttrong 1 trong 2 b m t n o n n ng n (descriptor table), m b c kch th c 64 KB o ingB m t n ton c (Global DT): ch thng tin vcc ng o c a n c bnhm t ccc ch ng trnh c thtruy nho a t pB m t n c b(Local DT): ch thng tin vcc n ng o ca o c 1 ch ng trnh a M t n ch thng tin va ch t u c noa b a o 168. DHBK 200584/Chapter2nh a ch nhch b vb o 15 2 1 0Index TIRPLRPL: m tin yu c 00 cao nh 11 th nh c uu,t, p tTI=0, sd b ton c TI=1 sd b c b ng ng c,ng ng cIndex: 13 bit ch ch 1 trong 8K m t o trong b m t o s n n ng n Limit7 7GDOA 00000000000000006Base(B31-B24) V (L19-L16)65Access rights Base(B23-B16) 45 Access rights Base(B23-B16) 43 Base(B15-B0) 23Base(B15-B0) 21 Limit(L15-L0)01Limit(L15-L0)0 m t n c 80286 o a m t n t80386oBase: xc nh a ch t u c n b a oLimit: gi h kch th c t c nini aa o 169. DHBK 2005 85/Chapter2nh a ch nhch b vb o80286 Base 24 bit: 000000H n FFFFFFH (16 MB) Limit 16 bit: kch th c n: t1 n 64 KB o a ch t l= Base + ch v l 1 ch ng trnh c thsd t 2*8K*64 K= 1GB b ng i a: nh=> bnh (virtual memory)o80386/486/Pentium Base 32 bit: 00000000H n FFFFFFFFH (4 GB) Limit 20 bit: G=0: kch th c n: t1 n 1MB o G=1: kch th c n t4K n 4 GB o a ch t l= Base + chvl 1 ch ng trnh c thsd t 2*8K*4 GB= 64 ng i a: Terabytes bnh 170. DHBK 20051/Chapter3 N dung mn h i c1. Gi thi chung vhvi xliu2. Bvi xl Intel 8088/80863. L trnh h ngcho 8086 pp4. Tch vo ra dli cu5. Ng v xl ng tt6. Truy c bnhtr ti DMAp c p7. Cc bvi xl trn th tc 171. DHBK 2005 2/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiu a pCch t v ch m ch ng trnh h ngtrno yt p my IBM PCCc c trc l trnh cb th hi b h u p nc nngp ngM sch ng trnh cth t 172. DHBK 20053/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiua p C php c ch ng trnh h ng ap Dli cho ch ng trnhu Bi v hn ng Khung c m ch ng trnh h ng a tpCch t v ch m ch ng trnh h ngtrno y t p my IBM PCCc c trc l trnh cb th hi b h u pn c nngp ngM sch ng trnh cth t 173. DHBK 20054/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiua p C php c ch ng trnh h ng ap Dli cho ch ng trnhu Bi v hn ng Khung c m ch ng trnh h ng a tpCch t v ch m ch ng trnh h ngtrno y t p my IBM PCCc c trc l trnh cb th hi b h u pn c nngp ngM sch ng trnh cth t 174. DHBK 20055/Chapter3C php c ch ng trnh h nga p1..Model Small khai bo ki kch th c bunh2..Stack 100 khai bo n ng x o n p3..Data4.5. Tbao DB Chuoi da sap xep:, 10, 13 MGB DB a, Y, G, T, y, Z, U, B, D, E,khai bo n dli o u6.DB $7..Code8.MAIN Proc khai bo n m l o nh9. MOV AX, @Data;khoi dau DS10.11. MOV DS, AX MOV BX, 10 ;BX: so phan tu cua mangb u ch ng trnh chnht 12.LEA DX, MGB;DX chi vao dau mang byte13.DEC BX ;so vong so sanh phai lam14. LAP: MOV SI, DX ; SI chi vao dau mang15.MOV CX, BX ; CX so lan so cua vong so16.MOV DI, SI ;gia su ptu dau la maxch thch b ut 17.MOV AL, [DI] ;AL chua phan tu max18. TIMMAX:19.INC SI ;chi vao phan tu ben canh20.CMP [SI], AL ; phan tu moi > max?b d ;ng u21.JNG TIEP ;khong, tim max22.MOV DI, SI ; dung, DI chi vao max23.MOV AL, [DI] ;AL chua phan tu max24. TIEP: LOOP TIMMAX ;tim max cua mot vong so25.CALL DOICHO;doi cho max voi so moi26.DEC BX ;so vong so con lai27.JNZ LAP;lam tiep vong so moi28.MOV AH, 9; hien thi chuoi da sap xep29.MOV DX, Tbao30.INT 21H31.MOV AH, 4CH;ve DOS32.INT 21H33. MAINEndp34.35.DOICHO Proc PUSH AX k thc ch ng trnh chnh t36.MOV AL, [SI]37.XCHGAL, [DI]38.39. MOV POP [SI], AL AX b u ch ng trnh cont 40.RET41.42.DOICHO EndpEND MAINk thc n m t o 175. DHBK 20056/Chapter3C php c ch ng trnh h nga p Tn M l nhCc ton hng ; ch gii Ch ng trnh d khng phn bi chhoa, chch tth ng Tr ng tn: ch cc nhn, tn bi tn thta n,c di: 1 n 31 k t tn khng c d cch, khng b u b sc ut ng dng cc k t c bi ? . @ _ $ % c t: d . ph t v u tin n sdui c tr u ng Nhn k thc b d :tng uTWO_WORD?1two-word.@?1wordLets_go 176. DHBK 20057/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiua p C php c ch ng trnh h ng ap Dli cho ch ng trnhu Bi v hn ng Khung c m ch ng trnh h ng a tpCch t v ch m ch ng trnh h ngtrno y t p my IBM PCCc c trc l trnh cb th hi b h u pn c nngp ngM sch ng trnh cth t 177. DHBK 2005 8/Chapter3 Dli cho ch ng trnhu Dliu: cc shs2: 0011B hs10: 1234 hs16: 1EF1H, 0ABBAH K t chu k t A, abcd ,i : 178. DHBK 20059/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiua p C php c ch ng trnh h ng ap Dli cho ch ng trnhu Bi v hn ng Khung c m ch ng trnh h ng a tpCch t v ch m ch ng trnh h ngtrno y t p my IBM PCCc c trc l trnh cb th hi b h u pn c nngp ngM sch ng trnh cth t 179. DHBK 200510/Chapter3 Bi v hn ng DB (define byte): nh ngh bi ki byte a nu DW (define word): nh ngh bi ki ta nu DD (define double word): nh ngh bi ki tkpanu Bi byte: n TnDB gia_tr _kh u i V d:MOV AL, B1B1 DB 4B1 DB ?LEA BX, B1C1 DB $MOV AL, [BX]C1 DB 34 180. DHBK 200511/Chapter3 Bi v hn ng Bi t n : TnDW gia_tr _kh u i 1300A 13009 V d: 13008 9W1 DW 4 13007 8W2 DW ? 13006 7 Bi m nng:13005 6 13004 5 M1 DB4, 5, 6, 7, 8, 9 13003 4M1 13002 M2 DB100 DUP(0)13001 M3 DB100 DUP(?)13000 M4 DB4, 3, 2, 2 DUP (1, 2 DUP(5), 6) M4 DB4, 3, 2, 1, 5, 5, 6, 1, 5, 5, 6 181. DHBK 200512/Chapter3Bi v h n ng Bi m 2 chi nng u:1300A1 6 3130094 2 5 13008 513007 213006 413005 3 M1 DB 1, 6, 3 13004 6 DB 4, 2, 5 13003 1 M1130021300113000 M2 DB 1, 4 DB 6, 2MOV AL, M1 ; copy 1 vao ALMOV AH, M1[2] DB 3, 5MOV BX, 1MOV SI, 1MOV CL, M1[BX+SI]MOV AX, Word Ptr M1[BX+SI+2]MOV DL, M1[BX][SI] 182. DHBK 2005 13/Chapter3 Bi v hn ng Bi ki xu k t n u STR1 DBstring STR2 DB73h, 74h, 72h, 69h, 6Eh, 67h STR3 DB73h, 74h, r, i, 6Eh, 67h H c tnng C thkhai bo h trong ch ng trnh ng Th ng khai bo n dli cou V d:CR EQU0Dh ;CR l carriage returnLFEQU 0Ah ; LF l line feedCHAOEQUHelloMSG DBCHAO, $ 183. DHBK 200514/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiua p C php c ch ng trnh h ng ap Dli cho ch ng trnhu Bi v hn ng Khung c m ch ng trnh h ng a tpCch t v ch m ch ng trnh h ngtrno y t p my IBM PCCc c trc l trnh cb th hi b h u pn c nngp ngM sch ng trnh cth t 184. DHBK 2005 15/Chapter3Khung c ch ng trnh h nga p Khai bo quy m sd bnhng .MODEL Ki kch thu bnhuc V d .Model Small:KiuM tTiny (h p)m l v dli gi g trong m n nh u nt oSmall (nh)m l n trong 1 n, dli 1 n nh mouoMedium (tB)m l n trong nhi n, dli 1 n nh mu o uoCompact (gn)m l n trong 1 n, dli trong nhi n nh mouu oLarge (ln)m l n trong nhi n, dli trong nhi n, khng nh mu o uu o c m no l h 64 Kng n n )Huge ( s m l n trong nhi n, dli trong nhi n, cc nh mu o uu o m c th n h 64 K ng l n 185. DHBK 2005 16/Chapter3Khung c ch ng trnh h nga p Khai bo n ng xonp .Stackkch thu (bytes)c V d: .Stack 100 ; khai bo stack c kch th c 100 bytes Gi tr m nh 1KBng Khai bo n dliou: .Data Khai bo cc bi v h n ng Khai bo n mo .Code 186. DHBK 200517/Chapter3 Khung c ch ng trnh h ng a p Stack SS ch ng trnh ch ng trnh CS DS100h ES100h PSP PSP.COM . EXE 187. DHBK 200518/Chapter3Khung c ch ng trnh h nga p Khung c ch ng trnh h ng ch ra file .EXEa pd.Model Small.Stack 100.Data ;cc nh nghcho bi v h anng.CodeMAINProc;kh u cho DS i MOV AX, @dataMOV DS, AX ;cc l c ch ng trnhnh a;tr DOS dng hm 4CH c INT 21H v aMOV AH, 4CHINT 21HMAIN Endp;cc ch ng trnh con n c uEND MAIN 188. DHBK 200519/Chapter3 Khung c ch ng trnh h ng a p Ch ng trnh Hello.EXE .Model Small.Stack 100.Data CRLFDB13,10,$ MSG DBHello! $.CodeMAIN Proc ;kh u cho DS i MOVAX, @data MOVDS, AX ;v dng m dng hm 9 c INT 21H u ia MOVAH,9 LEADX, CRLF INT21H ;Hi th i cho dng hm 9 c INT 21H n la MOVAH,9 LEADX, MSG INT21H ;v dng m dng hm 9 c INT 21H u ia MOVAH,9 LEADX, CRLF INT21H ;trvDOS dng hm 4CH c INT 21H a MOVAH, 4CH INT21HMAIN Endp END MAIN 189. DHBK 2005 20/Chapter3Khung c ch ng trnh h nga p Khung c ch ng trnh h ng ch ra file .COMa pd.Model Tiny.Code ORG 100hSTART: JMP CONTINUE ;cc nh nghcho bi v h a n ngCONTINUE:MAIN Proc ;cc l c ch ng trnh nh a INT 20H ;tr DOSvMAIN Endp ;cc ch ng trnh con n c uEND START 190. DHBK 2005 21/Chapter3Khung c ch ng trnh h nga pFFFFH SPChi ti c ng x u n a n pChi ti c m v dli u n auCONTINUE: Dli u0100H JMP CONTINUE IP n u ch ng trnh o 0000H Program segment prefix 191. DHBK 200522/Chapter3Khung c ch ng trnh h nga p Ch ng trnh Hello.COM .Model Tiny.Code ORG 100HSTART: JMP CONTINUE CRLFDB 13,10,$ MSG DB Hello! $CONTINUE:MAIN Proc ;v dng m dng hm 9 c INT 21H ui a MOV AH,9 LEA DX, CRLF INT 21H ;Hi th i cho dng hm 9 c INT 21H nl a MOV AH,9 LEA DX, MSG INT 21H ;v dng m dng hm 9 c INT 21H ui a MOV AH,9 LEA DX, CRLF INT 21H ;trvDOS INT 20HMAIN Endp END START 192. DHBK 2005 23/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiu a pCch t v ch m ch ng trnh h ngtrno yt p my IBM PCCc c trc l trnh cb th hi b h u p nc nngp ngM sch ng trnh cth t 193. DHBK 200524/Chapter3Cch t m ch ng trnh h ng ot p op n n a T ra t v b c ch ng trnh *.asmDng MASM d ra m my ch*.objDng LINK n t . obj thnh i p *.exe khng D ra .com?ch cDng exe2bin d *.exe thnh ch*.com ch ch ng trnh y 194. DHBK 2005 25/Chapter3Ch ng 3 L trnh h ngv 8086 p p iGi thi khung c ch ng trnh h ngiu a pCch t v ch m ch ng trnh h ngtrno yt p my IBM PCCc c trc l trnh cb th hi b h u p nc nngp ng C trc l ch u a n C trc l u pM sch ng trnh cth t 195. DHBK 200526/Chapter3C trc l ch If-thenu a n If u_ki then cng_viinc V d Gn cho BX gi tr: tuy i c AXt a; If AX vi x l vo trng thi i1: has no effect INTR: interrupt requestIF=1 v INTR=1=> cho php ngt TESTnu =0, CPU trng thi i v thc hin lnh NOP=1, lnh WAIT i n khi TEST=0 211. DHBK 2005 7/Chapter4 Cc chn tn hiu ca 8086 NMI (Non-maskable interrupt)NMI=1 => thc hin INT 2 RESET1: khi ng li h thng v thc hin lnh ti nh FFFF0H MN/MX1: ch min0: ch max BHE/S7:0: cho php truy cp byte cao d liuTrng thi S7 lun bng 1 RD0: CPU c d liu t b nh hoc thit b ngoi vi Cc chn ch minM/IO1: truy cp b nh0: truy cp thit b ngoi vi I/OWR0: d liu hp l ti bus d liu a ra b nh hoc thit b ngoi vi 212. DHBK 20058/Chapter4Cc chn tn hiu ca 8086 Cc chn ch minINTA: interrupt acknowledge0: khi INTR=1 v IF=1ALE: address latch enableDT/R: data transmit/receive1: bus d liu ang truyn d liu i0: bus d liu ang nhn d liuDEN: Data enable0: kch hot m d liu ngoiHOLD1: CPU tm dng hot ng nhng quyn iu khin cho DMA, ccbus c t trng thi tr khng caoHLDA (Hold Acknowledge)khi HOLD=1, HLDA=1 213. DHBK 20059/Chapter4Cc chn tn hiu ca 8086 Cc chn ch MaxS2, S1, S0ghp ni vi iu khin bus 8288 S2S1S0chu k iu khin ca bus 00 0chp nhn yu cu ngt 00 1c thit b ngoi vi 01 0Ghi thit b ngoi vi 01 1Dng 10 0c m lnh 10 1c b nh 11 0ghi b nh 11 1bus ri 214. DHBK 2005 10/Chapter4Cc chn tn hiu ca 8086 Cc chn ch MaxRQ/GT0 v RQ/GT1: Request/GrantTn hiu yu cu dng bus ca cc b vi x l khc/chp nhn treo busca CPUGT0 c mc u tin cao hn GT1LOCK0: cm cc b vi x l khc dng busQS0 v QS1:trng thi ca hng i lnhQS1 QS0 Trng thi hng i lnh0 0 khng hot ng0 1 c byte m lnh u tin1 0 hng i rng1 1 c byte tip theo 215. DHBK 2005 11/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288Cc tn hiu ca 8086Phn knh v vic m cho cc busMch to xung nhp 8284 v mch iu khin bus 8288Biu thi gian ca cc lnh ghi/c Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 216. DHBK 200512/Chapter4 Phn knh v m cho cc bus V sao phi phn knh v khuych i m:Cc bus a ch v d liu dng chung chnNng cao kh nng ti ca bus Cc vi mch phn knh v m:74LS373: phn knh74LS245: m d liu 2 chiu74LS244: m 3 trng thi theo 1 chiu 217. DHBK 2005 13/Chapter4Phn knh v m cho cc bus M/IOM/I RD 244 RD WRWR BHE/S7BH A19/S6 74LS373A19 A16/S3 GA16 A15A8A78086A0ALE G G74LS373 74LS373AD15D15245AD8 G DIR D8AD7 D7245 AD0G DIR D0 DEN DT/R 218. DHBK 2005 14/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288Cc tn hiu ca 8086Phn knh v vic m cho cc busMch to xung nhp 8284 v mch iu khin bus 8288Biu thi gian ca cc lnh ghi/c Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 219. Mch to xung nhp 8284 v mch DHBK 200515/Chapter4iu khin bus 8288 220. DHBK 2005 16/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288Cc tn hiu ca 8086Phn knh v vic m cho cc busMch to xung nhp 8284 v mch iu khin bus 8288Biu thi gian ca cc lnh ghi/c Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 221. DHBK 2005 17/Chapter4Biu thi gian 222. DHBK 2005 18/Chapter4Biu thi gian Cc k hiu trong biu thi gian:Min max UnitsCS1CS hold time 60ns12 CS to data30ns Data valid3 Data hold time 510ns2 3 223. DHBK 2005 19/Chapter4Biu thi gian Mt chu k ghi/c ca CPU (chu k bus): 4 chu kxung nhp T5 MHz: 4*200 ns=800 nsT1:CPU a ra a ch ca b nh hoc I/O, DT/R, M/IO, ALET2:CPU a ra RD hoc WR, DEN v d liu trn D0-D15 nu llnh ghiCPU c tn hiu READY ti cui chu k ca T2 x l trongchu k tip theo khi n lm vic vi b nh hay I/O chmT3:Nu READY=0 => T3 tr thnh chu k i: Tw=n*TTi cui T3, CPU s c d liu nu l lnh c d liuT4:Cc tn hiu trn bus c gii phngWR chuyn t 0 ln 1 kch hot qu trnh ghi ca b nh 224. DHBK 2005 20/Chapter4Biu thi gian 225. DHBK 2005 21/Chapter4Biu thi gian 226. DHBK 200522/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nhCc loi b nh bn dnGii m a ch cho b nhGhp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 227. DHBK 200523/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nhCc loi b nh bn dnGii m a ch cho b nhGhp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 228. DHBK 2005 24/Chapter4 Cc loi b nh bn dn B nh khng b mt d liu (non-volatile)ROM (Read Only Memory)PROM (Programmable ROM)EPROM (Electrically programmable ROM)FlashEEPROM (Electrically Erasable Programmable ROM)FeRAM (Ferroelectric Random Access Memory)MRAM (Magnetoelectronic Random Access Memory) B nh b mt d liu (volatile)SRAM (Static RAM)SBSRAM (Synchronous Burst RAM)DRAM (Dynamic RAM)FPDRAM (Fast Page mode Dynamic RAM)EDO DRAM (Extended Data Out Dynamic RAM)SDRAM (Synchronous Dynamic RAM)DDR-SDRAM (Double Data Rate SDRAM)RDRAM (Rambus Dynamic RAM) 229. DHBK 2005 25/Chapter4 Cc loi b nh bn dnA0 D0Tn hiuA1 D1 D liua ch A2 D2Am DnWRWECSOEWR: writeWE: Write enablechn chip RDOE: Output enableCS: Chip SelectRD: read 230. DHBK 2005 26/Chapter4 EPROMIsolator Floating GateGate Source Drainn+ n+ p 231. DHBK 200527/Chapter4EPROMNo charges on floating gateInfinite number of free electrons Vss Vss Vss Many freeMany free electronselectrons n+ n+pD=Vss Hardly anyG=Vssfree electrons: no conducting pathbetween Sourceand DrainS=Vss 232. DHBK 2005 28/Chapter4 EPROMNo charges on floating gateVccVssVssn+n+ pD=Vss Many free electrons attracted by positiveG=Vccgate voltage: conducting channel between SourceS=Vssand Drain 233. DHBK 200529/Chapter4 EPROMMany electrons trapped on floating gateVccVss Vssn+ n+ pD=VssNo free electrons:positive gate voltage is shielded byG=Vccnegative floatinggate: no conductingchannel betweenS=Vss Source and Drain 234. DHBK 2005 30/Chapter4EPROM: readingVcc VccVccVccAddress2-to-4 Decoder 2MSB4 2LSB2-to-4 Mux Data 235. DHBK 2005 31/Chapter4Read(0x6) EPROM: reading Vcc VccVcc Vcc0110 2-to-4 Decoder014 10 2-to-4 Mux0 236. DHBK 2005 32/Chapter4Read(0x8) EPROM: reading Vcc VccVcc Vcc1000 2-to-4 Decoder104 00 2-to-4 Mux1 237. DHBK 2005 33/Chapter4EPROM: erasingUV lightVcc VccVccVccAddress2-to-4 Decoder2-to-4 Decoder 2MSB4 2LSB2-to-4 Mux Data 238. DHBK 200534/Chapter4Write 1 at 0x2 EPROM: writing12V Vcc VccVccVccAddress 0010 2-to-4 Decoder 2-to-4 Decoder 2-to-4 Decoder200 MSB4210 LSB 2-to-4 MuxData 239. DHBK 200535/Chapter4EPROM Ghi vo EPROMDng mch np vi in p 12 V1 ms mt bit Xo EPROM20 pht di tia t ngoiS ln ghi 3 ln c EPROM100 ns EPROM h 27xxx2708 (1K*8), 2716 (2K*8), 2732 (4K*8), 2764 (8K*8)27128 (16K*8), 27256 (32K*8), 27512 (64K*8) 240. DHBK 2005 36/Chapter4 EPROM V d: 2716 EPROM U2 8 A0 O0 9Address 7 10 6 A1 O1 11 5 A2 O2 13 4 A3 O3 14 3 A4 O4 15CE 2 A5 O5 16 1 A6 O6 1723 A7 O722 A8 A919 A10Output2018 OE 120 100 CE21 VPP450 2716 241. DHBK 200537/Chapter4 So snh cc loi ROMLoi ROMThi gian ghi Thi gian c s ln ghi Kch thcROM NA35 ns 0MbitsPROM1s/bit 35 ns 1128 KbitsEPROM 1ms/bit 45 ns 316 MbitsFlash 1s/2 KB35 ns 1 triuGBitsEEPROM10 ms/page200 ns10000MbitFeRAM 60 ns 50 ns 1000 t32 MbitsMRAM5ns 5ns 1015 4 Mbits 242. DHBK 2005 38/Chapter4SRAMOne row of cells is read out at onceMUX selects one out of these cells01101bit 1bit 1bit 1bit 2-to-4 Decoder 2-to-4 Decoder cell cell cell cell011bit 1bit 1bit 1bitcell cell cell cell1bit 1bit 1bit 1bit4 cell cell cell cell1bit 1bit 1bit 1bitcell cell cell cell 10 2-to-4 Mux 243. DHBK 2005 39/Chapter4SRAM bit cell Bit line Bit line inverseWordVccActs as a resistor 244. DHBK 200540/Chapter4 StorageSRAM bit cell Bit lineBit line inverse Word Vcc R5V 0V CurrentAssumptionStable situation; stores a 1Dissipates continuously 245. DHBK 2005 41/Chapter4StorageSRAM bit cellBit lineBit line inverse WordVccR0V5V Current Assumption Stable situation; stores a 0 Dissipates continuously 246. DHBK 2005 42/Chapter4Reading of a 1 SRAM bit cellBit lineBit line inverse WordVccR 5V 0VCurrent10 247. DHBK 200543/Chapter4Reading of a 0 SRAM bit cellBit line Bit line inverse Word Vcc R0V 5VCurrent0 1 248. DHBK 2005 44/Chapter4Writing of a 1 SRAM bit cell VccVccWordWordVccBit lineBit line RBit lineinverse 5V 0V 0V5VCurrent CurrentCurrent W.DW.D 249. DHBK 200545/Chapter4SRAM c im:6 transistors 1 bit: t!B mt d liu khi mt ngunnhanh: thi gian c v ghi 5 nsLin tc tiu th nng lngKch thc: 16 Mbit ng dng:B nh nh v nhanh (cache)Khng dng cho cc thit b chy pin V d: 4016 (2K*8), 250 nsA0-A10 D0-D7OE WECS 250. DHBK 200546/Chapter4Bit DRAM Word linelineAddress 1bit1bit1bit 1bit2-to-4 Decoder cellcellcell cell 2MSB 1bit1bit1bit 1bit cellcellcell cell 1bit1bit1bit 1bit4cellcellcell cell 1bit1bit1bit 1bit cellcellcell cell 2LSB 2-to-4 Mux Data 251. 47/Chapter4 DRAM DHBK 2005One row of cells is read out at onceMUX selects one out of these cells01101bit 1bit 1bit 1bit 2-to-4 Decoder 2-to-4 Decoder cell cell cell cell011bit 1bit 1bit 1bitcell cell cell cell1bit 1bit 1bit 1bit4 cell cell cell cell1bit 1bit 1bit 1bitcell cell cell cell 10 2-to-4 MuxData 252. DRAM bit cell DHBK 200548/Chapter4 Vcc/21 bitPre-cell chargeWordlineVcc/2 Vcc/2 Vcc/2 Bit lineRefresh SenseamplifierMUX 253. DRAM bit cell49/Chapter4 DHBK 2005Storage Vcc/2Pre- chargeWordline5V0V5V0V5V5VVcc/2 Vcc/2 Vcc/230 fF inRefresh .2 mStores.5 M e-MUX 254. DRAM bit cell 50/Chapter4 DHBK 2005Read Vcc/2Pre- chargeWordline 2.55V5V2.45V 0V 2.55V 5V2.55V2.5V 5V0V 5V5VVcc/2 Vcc/2 Vcc/2RefreshRefreshRefreshRefreshRefreshRefreshRefreshRefreshRefreshRefreshRefreshMUX 255. DHBK 200551/Chapter4 DRAM bit cell Chu k c1. Precharge2. RAS (Row Address Select): c tt c cc bit trong hngc chn. Vic c ny lm gi tr in p trn t in bthay i3. Khuch i tn hiu trn cc ct tng ng4.a CAS (Column Address Select): chn 1 ct v a d liura ngoi4.b Refresh: khi phc li d liu ban u ca hng cchn bc 2. 256. DRAM bit cell52/Chapter4 DHBK 2005Write Vcc/2Pre- chargeWordline 2.55V5V 2.45V5V0V 2.55V5V0V5V5V Vcc/2 Vcc/2 Vcc/2RefreshRefreshRefreshRefreshRefreshRefresh MUX 257. DHBK 200553/Chapter4 DRAM bit cell Chu k ghi1. Precharge2. RAS (Row Address Select): c tt c cc bit trong hngc chn. Vic c ny lm gi tr in p trn t in bthay i3. Khuch i tn hiu trn cc ct tng ng4.a CAS (Column Address Select): chn 1 ct v a gi trcn ghi vo ct 4.b Refresh: khi phc li d liu ban u ca hng cchn bc 2 tr bit va mi c ghi vo. 258. DRAM bit cell 54/Chapter4 DHBK 2005Refresh Vcc/2Pre- chargeWordline2.51V 3V 5V 2.49V 2V 0V 2.51V 3V 5V 2.49V2V0V2.51V 5V 3V 2.51V 5V 3VVcc/2 Vcc/2 Vcc/2RefreshRefreshRefreshRefreshRefreshRefreshRefreshRefreshMUX 259. DHBK 2005 55/Chapter4 DRAM bit cell Chu k lm ti1. Precharge2. RAS (Row Address Select): c tt c cc bit trong hngc chn. Vic c ny lm gi tr in p trn t in bthay i3. Khuch i tn hiu trn cc ct tng ng4. Refresh: khi phc li d liu ban u ca hng cchn bc 2. 260. DHBK 2005 56/Chapter4DRAM c im:1 transistor 1 bit: r, tuy nhin vic iu khin qu trnhlm ti lm tng gi thnh ca DRAMCh tiu th nng lng trong qu trnh lm ti v truynhpTng i nhanh: thi gian c v ghi 50 nsMi mt hng phi c lm ti sau 4 msNu c 1024 hng, chu k lm ti s l 4 sKch thc: 4 Gbits c dng lm b nh chnh trong cc h vi x l V d: TMS 4464 (64K*4)A0-A7D0-D3 CAS: cho php cht a ch ct OEWERAS: cho php cht a ch hng CAS RAS 261. DHBK 2005 57/Chapter4DRAM c im:1 transistor 1 bit: r, tuy nhin vic iu khin qu trnhlm ti lm tng gi thnh ca DRAMCh tiu th nng lng trong qu trnh lm ti v truynhpTng i nhanh: thi gian c v ghi 50 nsMi mt hng phi c lm ti sau 4 msNu c 1024 hng, chu k lm ti s l 4 sKch thc: 4 Gbits c dng lm b nh chnh trong cc h vi x l V d: TMS 4464 (64K*4)A0-A7D0-D3 CAS: cho php cht a ch ct OEWERAS: cho php cht a ch hng CAS RAS 262. DHBK 2005 58/Chapter4 DRAM Examples of DRAM:SIMM (Single Inline Memory Module): 72 pinsDIMM (Dual Inline Memory Module): 168 pins72-Pin SIMM 263. DHBK 2005 59/Chapter4SRAM - DRAM CostSRAMDRAMRefreshcontrollerSize 264. DHBK 2005 60/Chapter4 Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nhCc loi b nh bn dnGii m a ch cho b nhDng cng NANDDng b gii m 74LS138, 74LS139Dng PROMDng PAL (Programmable Array Logic)Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 265. Gii m a ch b nh DHBK 2005 61/Chapter4 dng cng NAND V d: Ghp EPROM 2716 (2K * 8) vi 8088 Phn tch:2716: 11 ng a ch A10-A08088: 20 ng a ch A20-A0Chn vng nh 2K trong 1M?EPROM: 00000H-003FFH: khng c phpchn: FF800H-FFFFFH: cha on khi ng FFFF0H-FFFFFHA19A18A17A16 A15A14A13A12 A11A10A9A8 A7 A6 A5 A4 A3 A2 A1 A0 FF800: 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 FFFFF: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 266. Gii m a ch b nh DHBK 200562/Chapter4 dng cng NANDA19A18A17A16 A15A14A13A12 A11A10A9A8A7 A6 A5 A4 A3 A2 A1 A0 FF800: 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 FFFFF: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A19 A18 8088 A A17 A0-A10 8088 D Bus A16D0-D7 Bus A15 A14 CSOE A13 A12 A11 RD IO/M 267. Gii m a ch b nh DHBK 2005 63/Chapter4dng b gii m V d: Dng EPROM 2764 (8K*8) ghp thnh b nh 64 K cho 8088bt u t a ch F0000H Phn tch: a ch bt u F0000H => a ch kt thc: FFFFFH Cn ghp 8 EPROM 2764 v 64=8*8KA19A18A17A16 A15A14A13A12 A11A10A9A8 A7 A6 A5 A4 A3 A2 A1 A0 F0000: 1 1 1 10000 0000 0000 0000IC 1 F1FFF: 1 1 1 10001 1111 1111 1111 F2000: 1 1 1 10010 0000 0000 0000 IC 2 F3FFF: 1 1 1 10011 1111 1111 1111 F4000: 1 1 1 10100 0000 0000 0000IC 3 F5FFF: 1 1 1 10101 1111 1111 1111 ... ... FE000: 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 FFFFF: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 IC 8 268. Gii m a ch b nh DHBK 200564/Chapter4dng b gii m Dng b gii m 3-8 74LS138 U1 115 CB A G2B G2A G1 y0 y1 y2 y3 y4 y5 y6 y7 A Y0 214 xx x 1 x x11111111 3 B Y1 13 C Y2xx x x 1 x1111111112 6 Y3 11 xx x x x 011111111 4 G1Y4 10 00 0 0 0 101111111 5 G2A Y5 9 G2B Y600 1 0 0 1101111117 Y701 0 0 0 111011111 01 1 0 0 111101111 74LS138 10 0 0 0 111110111 10 1 0 0 111111011 11 0 0 0 111111101 11 1 0 0 111111110 269. Gii m a ch b nh DHBK 2005 65/Chapter4 dng b gii m Dng b gii m 3-8 74LS138 A0-A12 A0-A12 A0-A10 D0-D7D0-D7 A0-A10 2764 D0-D7A0-A10 U1RD 2764OE D0-D72764A0-A10 OE D0-D7A13115 2764 A0-A10CS OE D0-D7 2 A Y0 14 A0-A10A14B Y12764 CS OE D0-D7A0-A10 3132764 CS OE D0-D7A15C Y2 122764CS OE D0-D7 Y3A16 6 G1Y411CS OE 2764 410 CS OEIO/M 5 G2A Y5 9CS G2B Y6 7A17 CS Y7A18A1974LS138 270. Gii m a ch b nh DHBK 200566/Chapter4 dng b gii m Dng b gii m kp 2-4 74LS139 1A 1Y0 1B 1Y11Y2 1G 1Y3 2A 2Y0 2B 2Y12Y2 2G 2Y3 V d: Dng EPROM 27128 (16K*8) ghp thnh bnh 64 K cho 8088 bt u t a ch F0000H 271. Gii m a ch b nh DHBK 2005 67/Chapter4dng PROM Dng PROM TPB28L42 (512*8) A0-A12 A0-A12 A0-A10 D0-D7D0-D7 A0-A10 2764 D0-D7A0-A10 RD 2764OE D0-D72764A0-A10 OE D0-D7A13 A0O0 2764 A0-A10CS OE D0-D7A14 A1O1 A0-A10 2764 CS OE D0-D7A15 A2O2A0-A102764 CS OE D0-D7A16 A3O32764CS OE D0-D7A17 A4 TPB28L42O4CS OE 2764A18 A5O5 CS OEA19 A6O6 CSA7CSA8O7GIO/M 272. Gii m a ch b nh DHBK 200568/Chapter4dng PAL 273. DHBK 2005 69/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nhCc loi b nh bn dnGii m a ch cho b nhGhp ni 8088 vi b nhGhp ni 8088 vi ROMGhp ni 8088 vi SRAMGhp ni 8088 vi DRAM Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 274. DHBK 2005 70/Chapter4Ghp ni 8088 vi b nh Nguyn tc:Ghp trc tip:Thi gian truy cp b nh ca CPU > thi gian truy cp ca bnh + thi gian gii m a chGhp c chn thm thi gian i ca CPUThi gian truy cp b nh ca CPU < thi gian truy cp ca bnh + thi gian gii m a ch 8088 hot ng 5 MHz c thi gian truy cp b nh 420 ns 275. DHBK 200571/Chapter4 Ghp ni 8088 vi ROM V d: ghp ni 8088 vi EPROM 2732-450 nsA0-A11 A0-A11A0-A10D0-D7D0-D7A0-A102732D0-D7 A0-A10 U1RD2764 OE D0-D7 2764 A0-A10OE D0-D7A12115 F8000-F8FFF2764A0-A10 CS OE D0-D7 2 A Y0 14A0-A10A13B Y1 F9000-F9FFF2764CS OE D0-D7 A0-A10 313 2764CS OE D0-D7A14C Y2 12 2764 CS OE D0-D7 Y3A15 6 G1Y411 CS OE 2764 410CS OEIO/M 5 G2A Y5 9 CSA16G2B Y6 7FF000-FFFFF CS Y7A17A18B to Tw 74LS138A19Ti chn RDY1 ca 8284 276. DHBK 2005 72/Chapter4 Ghp ni 8088 vi SRAM V d: ghp ni 8088 vi SRAM 62256 (32K*8) c b nh 256 KB, bt u t a ch 00000HA0-A14A0-A14 A0-A10D0-D7 D0-D7 A0-A1062256 D0-D7A0-A10 U1RD 2764OE D0-D7 WROE 2764A0-A10WE D0-D7A15115 00000-07FFF 2764 A0-A10CS OE D0-D7 2 A Y0 14 A0-A10A16B Y1 08000-0FFFF 2764 CS OE D0-D7A0-A10 313 10000-17FFF2764 CS OE D0-D7A17C Y2 122764CS OE D0-D7 Y3A186 G1Y411CS OE 2764 410 CS OEIO/M 5 G2A Y5 9CS G2B Y6 738000-3FFFFCS Y7A19 74LS138 277. DHBK 200573/Chapter4 Ghp ni 8088 vi DRAM Cn c DRAM controller:Dn knh 2 loi tn hiu a ch cho mi mch nh v cungcp xung cho php cht a ch RAS v CASCung cp tn hiu vic ghi c b nhLm ti b nh trong thi gian thch hpm bo khng c xung t trong hot ng ghi c vicng vic lm ti 278. DHBK 200574/Chapter4Ghp ni 8088 vi DRAM V d: ghp 8088 vi TMS 4464 (64K*4) DRAM c b nh 128 KB, bt u ti a ch 00000HA0-A7RA0-RA7 MA0-MA7A0-A7A8-A15CA0-CA7 2x4464 RAS0RASALE ALE CAS CASA16 REN1RDACR TMS 4500AWRACWA0-A7RDY RDYRAS1 2x4464CLK CLK RASA17A18 CASA19 CSIO/M 279. DHBK 200575/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi vi 280. DHBK 2005 76/Chapter4Ghp ni 8086 vi b nh FFFFFFFFFE FFFFD 80888086FFFFC FFFFBFFFFA 8 bit 16 bit IO/MM/IO BHE 00005 00004 00003 00002 BHE A0 Chc nng 00001 00000Bank cao Bank thp(bank l)(Bank chn) 00chn c 2 bank 01chn bank cao 10chn bank thp 11khng chn bank no 281. DHBK 2005 77/Chapter4 Ghp ni 8086 vi b nh V d: Ghp EPROM 2716 (2K * 8) vi 8086 cvng b nh FF000H-FFFFFHCn 2 IC v 4KB=2*2KBA19A18A17A16 A15A14A13A12 A11A10A9A8 A7 A6 A5 A4 A3 A2 A1 A0 FF000: 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 Bank thp FFFFE: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 FF001: 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 Bank cao FFFFF: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 282. DHBK 200578/Chapter4 Ghp ni 8086 vi b nhA19A18A17A1-A11 A0-A10 D0-D7 D0-D7A16A152716A14 CSOEA13A12 M/IORDA0A19A18A17 A1-A11A0-A10 D0-D7 D8-D15A16A152716A14CS OEA13A12M/IO RDBHE 283. DHBK 200579/Chapter4 Ghp ni 8086 vi b nhBHEHRDRDA1-A11A0-A10 D0-D7D0-D7A0LRD2716CS OE LRDA19A18A17A1-A11A0-A10D0-D7D8-D15A16A15 2716A14 CS OEA13A12M/IOHRD 284. DHBK 200580/Chapter4Ghp ni 8086 vi b nh V d: ghp ni 8086 vi SRAM 62256 (32K*8) c b nh 256 KB, bt u t a ch 00000HBHEHWRWRA0LWR 285. DHBK 2005 81/Chapter4 Ghp ni 8086 vi b nh V d: thit k h thng nh cho 8086 vi 64 KBEPROM v 128 KB SRAM s dng SRAM 62256(32K*8) v EPROM 27128 (16K*8) 286. DHBK 200582/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu giao tip gia vi x l v thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 287. DHBK 200583/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu giao tip gia vi x l v thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 288. Cc kiu giao tip gia vi x l v DHBK 2005 84/Chapter4 thit b ngoi viMemory bus CPU Memory Bus Adapter I/O Bus I/OI/O I/OController ControllerController I/OI/O I/O Device Device Device 289. Cc kiu giao tip gia vi x l v DHBK 2005 85/Chapter4 thit b ngoi viGiao tip kiu thm d, mc ni (handshaking) 1. CPU kim tra trng thi ca thit b ngoi vi 2. Nu thit b ngoi vi sn sng trao i d liu vic trao i s cthc hin bi tn hiu mc ni 3. Nu thit b ngoi vi cha sn sng, CPU s thc hin cng vickhc v quay li bc 1Giao tip bng ngt (Interrupt) 1. Thit b ngoi vi mun trao i d liu vi CPU, n s gi tn hiuyu cu ngt ti chn INTR ca CPU 2. CPU chp nhn yu cu ngt bng cch gi tn hiu INTA ti thitb ngoi vi 3. CPU thc hin chng trnh con phc v ngtGiao tip bng truy cp b nh trc tip (DMA) 1. Thit b ngoi vi mun truy cp trc tip b nh khng thng quaCPU, n a tn hiu yu cu ti chn HOLD ca CPU thng quakhi iu khin DMA 2. CPU chp nhn v gi tn hiu HLDA ti khi iu khin DMA vtreo cc bus 3. Khi iu khin DMA s iu khin vic trao i d liu gia thitb ngoi vi v b nh 290. DHBK 200586/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 291. DHBK 2005 87/Chapter4 Cc kiu ghp ni vo ra Thit b vo ra c khng gian a ch cch bit:FFFFa ch: 0000H-FFFFHM/IO=0Vng m rng03FF Vo ra d liu bng lnh IN, OUTCOM103F803F0iu khin a mm V d:CGA adapterIN AX, 00H03D0LPT1 IN AL, F0H0378iu khin cngIN AX, DX0320COM202F88255 OUT 00H, AX0060nh thi (8253) OUT F0H, AL0040 OUT DX, AXiu khin ngt00200000iu khin DMA 292. DHBK 200588/Chapter4 Cc kiu ghp ni vo ra Thit b vo ra c khng gian a ch cch bit: 293. DHBK 2005 89/Chapter4Cc kiu ghp ni vo ra Thit b vo/ra c cng khng gian a ch vi b nhFFFFF M/IO=1Vo ra d liu bng bt k lnhdi chuyn d liu no giaI/O CPU v b nhV d: MOV AX, [0FF3H]00000Memory + I/O 294. DHBK 200590/Chapter4 Cc kiu ghp ni vo ra V d cng vo n gin:VCC8765432110K101112131415169 U1 2 18 4 A1 Y1 16 6 A2 Y2 14 8 A3 A4Y3Y4 12 Ti bus d liu11 913 A5 A6Y5Y6 7ca CPU15 517 A7 Y7 3 A8 Y8 119 1OE 2OE 74ALS244SELT gii m a ch cng 295. DHBK 2005 91/Chapter4Cc kiu ghp ni vo ra V d cng ra n gin:VCC330 U2324D0 Q0 57D1 Q1 6 T bus d liu 8D2 D3Q2Q3 9 1312 ca CPU 14D4 Q4 15 17D5 Q5 16 18D6 Q6 19 D7 Q7 11 CLK 1 OE SEL 74ALS374T gii m a ch cng 296. DHBK 200592/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 297. DHBK 2005 93/Chapter4Gii m a ch cho cc thit b vo/ra 8 bit a ch hay 16 bit?Tng s thit b < 256: 8 bit A0-A7: 00H-FFHTng s thit b >256: 16 bit A0-A15: 0000H-FFFFH 8 bit d liu hay 16 bit?Nu cng l 8 bit: chn 1 trong 2 bankNu cng l 16 bit: chn c 2 bankBHE A0 FFFFFFFE FFFDFFFC FFFBFFFAD8-D15 D0-D7000500040003000200010000 Bank caoBank thp (bank l) (Bank chn) 298. DHBK 2005 94/Chapter4Gii m a ch cho cc thit b vo/ra V d: Gii m a ch cho thit b ra 8 bit vi a ch07H07H= 0000 0111A0A0A1D0-D7 D8-D15A1A2D0-D7 A2 D0-D7A3A3A4A4CS WECSWEA5A5A6A6A7A7 WRWRIO/MM/IOBHE8088 8086 299. DHBK 2005 95/Chapter4 Gii m a ch cho cc thit b vo/ra V d: Gii m a ch cho thit b ra 16 bit vi a chcng 64H v 65H64H= 0110 010065H= 0110 0101 D8-D15 D8-D15CSWEA1A2A3 WRA4A5A6D7-D0 D0-D7A7M/IOCSWE 300. DHBK 200596/Chapter4Gii m a ch cho cc thit b vo/ra V d: Gii m a ch cho cc cng vo ra 8 bit bank thp vi cc a ch 10H, 12H, 14H, 16H, 18H,1AH, 1CH, 1EH10H=0001 000012H=0001 0010....1EH=0001 1110U1A1 115 10H 2 A Y0 14A2 3 B Y1 13 12H 14HA3 C Y2 12 16H 6 Y3 11 A0 18H 4 G1Y4 10 1AHM/IO 5 G2A Y5 91CHA4 G2B Y6 71EHA5 Y7A6A7 74LS138 301. DHBK 2005 97/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255ACu trc ca 8255ACc ch lm vic ca 8255ALp trnh cho 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 302. DHBK 2005 98/Chapter4Cu trc ca 8255A Giao tip cc thit b tng thch TTL vi vi x l Thng c dng giao tip bn phm v my introng cc may tnh PC (di dng l mt khi trongchp tch hp) Cn chn trng thi i khi lm vic vi vi x l >8Mhz C 24 ng vo ra v c 3 ch lm vic Trong cc my PC, a ch cng ca 8255 l 60H-63H 303. DHBK 200599/Chapter4Cu trc ca 8255A 304. DHBK 2005100/Chapter4Cu trc ca 8255A 305. DHBK 2005101/Chapter4Cu trc ca 8255A RD WR 306. DHBK 2005 102/Chapter4Cc ch lm vic ca 8255A 307. DHBK 2005103/Chapter4Cc ch lm vic ca 8255A Ch 0: Ch vo ra n gin: cc cng c thlm vic nh l cng vo c m hoc cng ra ccht m. Ch 1: Ch ny cho php cng A v B lm vicnh cc thit b vo hoc ra c tn hiu mc ni(handshaking) do cc bit tng ng ca cng Ctrong cng nhm m nhim Ch 2: ch ny cho php cng A lm vic 2chiu vi cc tn hiu mc ni do cng PCH mnhim. Cng B c th lm vic ch 1 hoc 0 308. DHBK 2005104/Chapter4Ch 0 RD WR 309. DHBK 2005 ; Lp trnh cho 8255105/Chapter4 Ch 0MOV AL, 10000000B ; Port A, Port B mode 0, outputMOV DX, 703HOUT DX, AL; Th tc hin th LED t d liu cha trong b nh Gi thit aPUSHF ca cc cng caghi vo ngn xp l 0700H- ch; ct cc thanh 8255DISPPROC NEAR0703H PUSH AX PUSH BX PUSH DX PUSHSI; Thit lp cc thanh ghi hin th MOV BX, 8;s LED MOV AH, 7FH;chn LED u tin 0111 1111 MOV SI, OFFSET MEM-1; a ch cha d liu MOV DX,701H; a ch cng B;Hin th 8 sDISP1: MOV AL, AH ;chn 1 s OUT DX, AL DEC DX ; a ch cng A MOV AL, [BX+SI]; d liu ca 7 on led OUT DX, AL CALLDelay; tr 1 ms ROR AH, 1;s tip theo INC DX ; a ch cng B DEC BX ;gim ch s JNZ DISP1; lp li 8 ln;khi phc li cc thanh ghi POP SI POP DX POP BX POP AX POPF RETDISP ENDP 310. DHBK 2005106/Chapter4Ch 0 311. DHBK 2005107/Chapter4Ch 0 312. ROWS DHBK 2005EQU4 ; 4 hng108/Chapter4 Ch 0COLS EQU4 ; 4 ctPORTAEQU50HPORTBEQU51HKEY PROC NEAR USESCXCALL SCAN ;test all keys SCANPROC NEAR USES BXJNZKEY; if key closedMOVCL, ROWS ;form row maskCALL DELAY; i 10 msMOVBH, OFFHCALL SCANSHLBH, CLJNZKEY MOVCX, COLS ;load column countKEY1:MOVBL, OFEH ;get selection modeCALL SCANSCAN1:JZ KEY1 ; if no key closed MOVAL, BL ;select columnCALL DELAY OUTPORTB, ALCALL SCANROLBL, 1JZ KEY1IN AL, PORTA; read rowsPUSH AX ;ct m hng OR AL,BHMOVAL, COLS ;cal starting row keyCMPAL, 0FFH ;test for a keySUBAL, CLJNZSCAN2MOVCH, ROWSLOOP SCAN1MULCHMOVCL, ALSCAN2:DECCLRETPOPAXSCANENDPKEY2:RORAL,1 ;find row position DELAY PROC NEAR USESCXINCCLMOVCX, 5000 ;10ms (8MHZ)JC KEY2DELAY1:MOVAL,CL;move code to AL LOOP DELAY1RETRETKEY ENDP DELAY ENDP 313. DHBK 2005109/Chapter4 Ch 1 Port A v B lm vic ch cng vo c cht:d liu s c gi ti cng A, B cho n khi CPU sn sngcng C lm cng iu khin v cp tn hiu mc ni 314. DHBK 2005110/Chapter4Ch 1 315. DHBK 2005111/Chapter4Ch 1 PA0-PA7 ASCII D0-D7 STBPC4DAV 82C55KeyboardBit5EQU20HPortC EQU22HPortA EQU20HReadPROC NEARINAL, PortC; read PortCTest AL, Bit5; test IBFJZREAD ; if IBF=0INAL, PortA; read dataRETRead Endp 316. DHBK 2005112/Chapter4Ch 1 Port A v B lm vic ch cng ra c cht:tng t nh cng ra ch 0cng C lm cng iu khin v cp tn hiu mc ni 1 317. DHBK 2005113/Chapter4Ch 1 318. DHBK 2005 114/Chapter4 Ch 1 PB0-PB7 ASCII D0-D7 ACKPC2ACKPC4DS82C55 PrinterDS: data strobe 319. DHBK 2005115/Chapter4Ch 1BIT1EQU2PORTC EQU62HPORTB EQU61HCMD EQU63HPRINT PROC NEAR;check printer readyIN AL,PORTC ;get OBFTEST AL, BIT1 ;test OBFJZ PRINT;if OBF=0;send character to printerMOV AL, AH ;get dataOUT PORTB, AL;print data;send data strobe to printerMOVAL, 8 ;clear DSOUTCMD,ALMOVAL, 9 ;set DSOUTCMD, ALRETPRINT ENDP 320. DHBK 2005116/Chapter4Ch 2 Ch cho php i vi cng A Cng A l cng 2 chiu, dng giao tip gia 2my tnh hoc dng trong chun giao tip IEEE-488GPIB... 321. DHBK 2005117/Chapter4Ch 2 322. DHBK 2005118/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 323. DHBK 2005 119/Chapter4 Mch iu khin 8279 iu khin bn phm v mn hin th 8279:qut v m ho cho bn phm ti 64 phmb m FIFO c th cha 8 k tiu khin mn hin th ti 16 s16*8 RAM cha thng tin v 16 s hin th Cc tn hiu chnh: A0: chn gia ch d liu hoc iu khin BD: xo trng mn hin th CLK: tn hiu xung nhp vo CN/ST (control/Strobe): cng vo ni vi phm iu khin ca bn phm CS : chip select DB7-DB0: bus d liu 2 chiu IRQ: =1 khi c phm bm OUTA3-OUTA0: d liu ti mn hin th (bit cao) OUTB3-OUTB0: d liu ti mn hin th (bit thp) RD: cho php c d liu t thanh ghi iu khin hoc trng thi RL7-RL0: xc nh phm c nhn SHIFT: ni vi phm shift ca bn phm SL3-SL0: tn hiu qut mn hnh v mn hin th WR: vit d liu vo thanh ghi iu khin hoc thanh ghi d liu 324. DHBK 2005120/Chapter4Ghp ni 8279 vi 8088 325. DHBK 2005121/Chapter4Ghp ni 8279 vi bn phm 326. DHBK 2005122/Chapter4Ghp ni 8279 vi mn hin th 327. DHBK 2005123/Chapter4Lp trnh cho 8279 T iu khin: D7D6D5D4D3D2D1D0 328. DHBK 2005124/Chapter4Lp trnh cho 8279 329. DHBK 2005125/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 330. DHBK 2005126/Chapter4B nh thi lp trnh c 8254 331. DHBK 2005127/Chapter4B nh thi lp trnh c 8254 332. DHBK 2005128/Chapter4B nh thi lp trnh c 8254 333. DHBK 2005129/Chapter4B nh thi lp trnh c 8254 334. DHBK 2005130/Chapter4B nh thi lp trnh c 8254 335. DHBK 2005131/Chapter4B nh thi lp trnh c 8254 336. DHBK 2005132/Chapter4B nh thi lp trnh c 8254 337. DHBK 2005133/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 338. Giao tip truyn thng lp trnh c DHBK 2005134/Chapter4 16550 339. Giao tip truyn thng lp trnh c DHBK 2005135/Chapter4 16550 340. Giao tip truyn thng lp trnh c DHBK 2005136/Chapter4 16550 341. Giao tip truyn thng lp trnh c DHBK 2005137/Chapter4 16550 342. Giao tip truyn thng lp trnh c DHBK 2005138/Chapter4 16550 343. Giao tip truyn thng lp trnh c DHBK 2005139/Chapter4 16550 344. Giao tip truyn thng lp trnh c DHBK 2005140/Chapter4 16550 345. Giao tip truyn thng lp trnh c DHBK 2005141/Chapter4 16550 346. Giao tip truyn thng lp trnh c DHBK 2005142/Chapter4 16550 347. Giao tip truyn thng lp trnh c DHBK 2005143/Chapter4 16550 348. Giao tip truyn thng lp trnh c DHBK 2005144/Chapter4 16550 349. Giao tip truyn thng lp trnh c DHBK 2005145/Chapter4 16550 350. Giao tip truyn thng lp trnh c DHBK 2005146/Chapter4 16550 351. Giao tip truyn thng lp trnh c DHBK 2005147/Chapter4 16550 352. Giao tip truyn thng lp trnh c DHBK 2005148/Chapter4 16550 353. Giao tip truyn thng lp trnh c DHBK 2005149/Chapter4 16550 354. DHBK 2005150/Chapter4Chng 4: T chc vo ra d liu Cc tn hiu ca 8086 v cc mch ph tr 8284,8288 Ghp ni 8088 vi b nh Ghp ni 8086 vi b nh Ghp ni vi thit b ngoi viCc kiu ghp ni vo/raGii m a ch cho cc thit b vo/raMch ghp ni vo ra song song lp trnh c 8255AMch iu khin bn phm/mn hnh lp trnh c 8279B nh thi lp trnh c 8254Giao tip truyn thng lp trnh c 16550B bin i s tng t DAC0830 v b bin i tng t sADC0804 355. DHBK 2005 151/Chapter4B bin i s tng t DAC 356. DHBK 2005 152/Chapter4B bin i s tng t DAC 357. DHBK 2005 153/Chapter4B bin i tng t s ADC 358. DHBK 2005 154/Chapter4B bin i tng t s ADC 359. DHBK 2005 155/Chapter4B bin i tng t s ADC 360. DHBK 20051/Chapter5 N dung mn h i c1. Gi thi chung vhvi xliu2. Bvi xl Intel 8088/80863. L trnh h ngcho 8086 pp4. Tch vo ra dli cu5. Ng v xl ng tt6. Truy c bnhtr ti DMAp c p7. Cc bvi xl trn th tc 361. DHBK 20052/Chapter5Ch ng 5: Ng v xl ng t t Gi thi vng iu t c CPU khi c yu c ng p ng au t Cc tht ng c ng i sdc t a ng Xl tin ngu t M u khi ng tin 8259Ach in t u Ng trong my tnh IBM PCt 362. DHBK 2005 3/Chapter5 Gi thi vngiu t 2 loai ngt: Ng c tng: tn hi yu c ng t uu t NMI (ng khng che t c) L ch lv cc l hth nghim tr khc (v d m ngui n i ng ng:tn)v INTR (ng che t c) Ng m CPU th hi cc l ng INT N, 0=< N 100 MHz ExternalSuper scalar (4 Instr./cycle), super pipelined (12 stages)Support for symmetrical multiprocessing ( CPU)4MCM: 256-1024 Kbyte L2 4-way set associative cache16 432. DHBK 2005Intel Pentium II 16 Kbyte L1 32 bit integer64+ECCprogram cachepipelined CPUdata16 Kbyte L132 bit integer36data cache pipelined CPUaddressDynamic branch 64 bit prediction unit pipelined FPU 64 bitECC MMU pipelined FPUto L2 cacheInstruction Address dispatch unit generation unitIntroduced: 1997, 0.25 2.0 V, 9 MTOR, 43 W, 242 pinm,Clock frequency: 200 - 550 MHz Internal, 100 - 225 MHz L2 cache, 66 - 100 MHz ExternalSuper scalar (4 Instr./cycle), super pipelined (12 stages)Support for symmetrical multiprocessing ( CPU)8Single Edge Contact Cartridge with Thermal Sensor: 256-1024 Kbyte L2 4-way set associative cache17 433. Intel Pentium III DHBK 2005 16 Kbyte L1program cache16 Kbyte L132 bit integer 64+ECCdata cache pipelined CPU data 256 Kbyte L2 unified32 bit integer 36 cache pipelined CPU address Dynamic branch64 bitprediction unitpipelined FPU 64 bitMMU pipelined FPUInstructionAddress dispatch unitgeneration unitIntroduced: 1999, 0.18 , 6LM, 1.8 V, 28 MTOR, 370 pinmClock frequency: 450 - 1130 MHz Internal, 100-133 MHz ExternalSuper scalar (4 Instr./cycle), super pipelined (12 stages)Support for symmetrical multiprocessing ( CPU)218 434. Intel Pentium IV DHBK 2005 16 Kbyte L1program cache16 Kbyte L132 bit integer64+ECCdata cache pipelined CPUdata 32 bit integer256/512/1024 Kbyte L2 36 pipelined CPUaddressDynamic branch 64 bit prediction unit pipelined FPU 64 bit MMU pipelined FPUInstruction Address dispatch unit generation unitIntroduced: 2002, 0.13 or 90nm , 1.8 V, 55 MTORmClock frequency: 1,4 to 3.8 GHz Internal, 400 to 800 MHz ExternalSuper scalar (4 Instr./cycle), super pipelined (12 stages)Newer versions: Hyper threading, 3.8 MHz19 435. Intel Pentium IV DHBK 2005 Available at 3.80F GHz, 3.60F GHz, 3.40F GHz and 3.20F GHz Supports Hyper-Threading Technology1 (HT Technology) for all frequencies with 800 MHz front side bus (FSB) Supports Intel Extended Memory 64Technology2 (Intel EM64T) Supports Execute Disable Bit capability Binary compatible with applications running on previous members of the Intel microprocessor line Intel NetBurst microarchitecture FSB frequency at 800 MHz Hyper-Pipelined Technology Advance Dynamic Execution Very deep out-of-order execution Enhanced branch prediction 775-land Package20 436. Intel Pentium IV DHBK 2005 16-KB Level 1 data cache 1-MB Advanced Transfer Cache (on-die, fullspeed Level 2 (L2) cache) with 8-way associativity and Error Correcting Code (ECC) 144 Streaming SIMD Extensions 2 (SSE2) instructions 13 Streaming SIMD Extensions 3 (SSE3) instructions Enhanced floating point and multimedia unit for enhanced video, audio, encryption, and 3D performance Power Management capabilities System Management mode Multiple low-power states 8-way cache associativity provides improved cache hit rate on load/store operations21 437. DHBK 2005IA-64 (Itanium) Design started in 1994; first samples on the marketin 2001 64-bit address