Error control, parity check, check sum, vrc

4.2•Error Control

4.2.1 Importance of Accurate Reception

• Each member of a code is assigned a unique identity.

• It is extremely important that it be sent and received without errors.


• For instance– The EBCDIC code for c is 10000011– An error in bit#1 produces 10000010which is

the code for b.– An error in bit#2 produces 10000001which is

the code for a– An error in bit#8 produces 00000011which is

the code for ETX (ETX=end of text).


• Clearly, it is important to know whether the message has been corrupted in transmission or not.

4.2.2 Error Detection

• Error detection is a cooperative activity between the sender and the receiver.

• In which the sender adds information to the character or frame to assist the receiver is determining whether an error has occurred in transmission or reception.

• Before sending, the sender and receiver must agree on the information that will be added, and how it will be used.

(1) Parity Checking:

– Simple or Two Dimensional– In parity check, a parity bit is added to

every data unit so that the total number of 1s is even or odd.



• Suppose the sender wants to send the word world. In ASCII the five characters are coded as

• 1110111 1101111 1110010 1101100 1100100

• The following shows the actual bits sent

• 11101110 11011110 11100100 11011000 11001001


• Two-dimensional parity• In two-dimensional parity check, a block of

bits is divided into rows and a redundant row of bits is added to the whole block.

(2) Checksum

– The sender follows these steps:The sender follows these steps:• The unit is divided into k sections, each of n bits.The unit is divided into k sections, each of n bits.• All sections are added using one’s complement to get All sections are added using one’s complement to get

the sum.the sum.• The sum is complemented and becomes the The sum is complemented and becomes the

checksum.checksum.• The checksum is sent with the data.The checksum is sent with the data.

– The receiver follows these steps:The receiver follows these steps:• The unit is divided into k sections, each of n bits.The unit is divided into k sections, each of n bits.• All sections are added using one’s complement to get All sections are added using one’s complement to get

the sum.the sum.• The sum is complemented.The sum is complemented.• If the result is zero, the data are accepted: otherwise, If the result is zero, the data are accepted: otherwise,

rejected.rejected.

Example Part 1• Suppose the following block of 16 bits is to be sent using a

checksum of 8 bits.

• 10101001 00111001

• The numbers are added using one’s complement

• 10101001

• 00111001 ------------Sum 11100010

• Checksum 00011101

• The pattern sent is 10101001 00111001 00011101

Example part 2• Now suppose the receiver receives the pattern sent in Example 7 and

there is no error.

• 10101001 00111001 00011101

• When the receiver adds the three sections, it will get all 1s, which, after complementing, is all 0s and shows that there is no error.

• 10101001

• 00111001

• 00011101

• Sum 11111111

• Complement 00000000 means that the pattern is OK.

(3) VRC Checking:

– Vertical Redundancy Check– VRC adds a parity bit to each character.– Most Often, it is used with ASCII.– The parity bit occupies bit position number eight.– VRC can detect all single-bit errors. It can detect

multiple-bit or burst errors only the total number of errors is odd.

(3) VRC Checking:

– ASCII for a is 1000011– ASCII for a with even parity is 10000111p, the

parity bit (1p) is a 1 so as to make a total of four 1s (an even number of 1s).

– ASCII for a with odd parity is 10000110p; the parity bit (0p) is a 0 so as to leave a total of three 1s (an odd number of 1s)

(3) VRC Checking:

• When operating asynchronously, the start (0s) and stop (1s) bit frame the entire eight bits:– ASCII for a sent asynchronously is 0s10000111s

– ASCII for a with even parity sent asynchronously is 0s10000111p1s

– ASCII for a with odd parity sent asynchronously is 0s10000110p1s

(3) VRC Checking:

• The Start and stop bits have no role in the VRC process; they simply frame the data for the convenience for the receiver.

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Error control, parity check, check sum, vrc