R/C Simulation and Hardware Proof of Concept Development
Dr. Philip A. Dafesh,Dr. R. T. Bow, Mr. G. Fan and Mr. M. Partridge
Communication Systems SubdivisionThe Aerospace Corporation
2
Outline
• Background
• Simulation Overview and Results
• Hardware Overview and Results
• Summary and Conclusions
3
Background• As part of the R/C code Development, Constellation
Simulations and Hardware Proof of Concept (POC) Demonstrations Were Completed Signal Processing Worksystem (SPW) Simulation of L5 and
Newly Proposed TDMA Code HW POC was Developed as a Modification to The Aerospace
Corporation's "FlexGPS" FPGA-Based Prototyping System IIRM Modulator Implementation of C/A, P and M-code on L2 Single Channel Receiver Hardware (Code Corr. and Tracking Loops) Implemented R/C Transmitter and Receiver as Modification to
C/A Hardware in 2 Weeks from Receipt of the R/C Specification
• Simulated and Measured Correlation Response and DLL Tracking Loop Response for R/C Codes Alternatives
4
+/- 25.6 Chips
Receiver Code Delay (s)
-30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30
Nor
mal
ized
Cor
rela
tion
Vol
tage
0.0
0.2
0.4
0.6
0.8
1.0
RC_TDMA 2CM CA Code
TDMA Code Scaled by 2
Sample Correlation Data Taken with R/C Code POC Hardware
Measured Correlationis In AgreementWith Theoretical Reduction in Non-Prompt Correlation for a Single Satellite
5
Simulation• Implements Multiple R/C Code Satellites Using the
Signal Processing WorkSystem (SPW) Simulates the Effect of Random Code Phases and Carrier
Doppler for Each Satellite 10 Satellites in View at Varying Power Levels
• Signal Parameters are Adjusted to Mimic the IIRM Implementation Interplex Modulation of C/A or TDMA, P(Y)
and M-Code Relative Power Adjusted to IIRM Levels
6
Caveats
• M-Code Implemented as a 20 TAP M-Sequence Actual Code is Nonrepeating
• Used Actual P-Code• Used Actual C/A and TDMA Codes• Simulation Sample Rate = 4.092x107
40 Samples/TDMA Chip (80 Samples/Bit)
M0L0M1L1M2L2M3L3M4L4
1Chip~ 1 s
1 Bit ~ 2 s
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Normalized Correlation of SV1 with Constellation (with P and M)
Crosscorrelation of CA/TDMA/2CM/2CL with a Multiple-Satellite SignalDATA=1, With P_code & M_code
-0.1000
0.0000
0.1000
0.2000
0.3000
0.4000
0.5000
0.6000
0.7000
0.8000
0.9000
1.0000
0 511.5 1023 1534.5 2046 2557.5 3069 3580.5 4092
TDMA CA 2CM 2CL
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Crosscorrelation of CA/TDMA/2CM/2CL with Multiple-satellites SignalDATA=1, With P_code & M_code
-0.0800
-0.0600
-0.0400
-0.0200
0.0000
0.0200
0.0400
0.0600
0.0800
0 200 400 600 800 1000 1200 1400 1600 1800 2000
TDMA CA 2CM 2CL
Zoom in to TDMA/CA Results
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Summary of Observations
• R/C Code Correlation Results in Fewer and Smaller Size Non-Prompt Code-Cross Correlations with other Satellites than Does C/A Code
• Results Indicate that R/C Code Should Result in Smaller CDMA Noise Contributions During Tracking and Fewer False Alarms During Acquisition Even when Constellation of Satellites is Considered Including
Effects of Doppler, Amplitude and Phase Distribution
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Hardware Proof of Concept Description
• Implementation of a Single IIRM Satellite with Switches to Select Different R/C Code Options on the L2 Carrier C/A, L5, TDMA
• Receiver Can Select Between Correlation of Entire TDMA or Individual 2CM and 2CL Codes Selectable DLL Early-Late Code Tracking at Spacing
from +/- 0.05 chips to +/- 0.5 chips SVi to SVi Autocorrelation and SVi to SVk Cross-Correlation
• New TDMA Code was Implemented in FlexGPS Transmitter and Receiver Correlator within 2 Weeks Relatively Straightforward Modification to C/A Receiver
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Hardware Description (Cont.)• All Tests Conducted at L2 Frequency• Correlation Sweep and DLL Tracking at Selectable
Early-Late Spacing, Loop Parameters• No Navigation Processing• I and Q Sample Rate = 40.92 MHz • Receiver Bandwidth = 24 MHz• Data Measurement and Diagnostic Capability
Time-Domain, Frequency-Domain & Logic-Level Oscilloscope, Spectrum Analyzer, Logic Analyzer
PR Residual and Code Correlation Data Software GUI Control and Data Acquisition Interface
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Aerospace’s FlexGPS Prototyping System
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Rapid-Prototype BoardClose-Up of Modulator and Receiver
Tx
Rx
40.92 MHz I/Q ADCs
I/Q DACs
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Tx/Rx Signal Probe and Control
Logic Analyzer Probes GUI Interface Control and I/O
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What's Different from Prior C/A-Code Prototype
• What was Implemented SV Selectable C/A, L5 or TDMA Code at Transmitter Selectable 2CM, 2CL, L5-I or C/A Codes in Receiver 511.5 kHz Square-Wave Gated Integrate and Dump Clock
("0" of square-wave corresponds to 2CM Accumulator Clock and "1" Corresponds to 2CL Accumulator Clock) Square-wave Gated Correlator With Standard Bi-Phase (+1,- 1)
Reference Used Instead of Three-Level (+1,0,-1) Reference Code No Significant Changes to C/A Code DLL Tracking Channel
Additional Details to be Published at ION GPS 2001
• What was Not Implemented (Planned) Independent 2CM and 2CL Tracking Channels Viterbi decoding
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R/C TDMA Specific Additions • Difference Between C/A and TDMA Receiver Hardware
Requires 2 Code Generators Same Hardware Initialized Differently and Short Cycled
at Different Points to Generate 2CM and 2CL Codes Requires Different Correlation Method
Implemented as Time Gating or 3-Level Reference Requires Min of 1 and Max of Two New Tracking
Channels for L2 Reception• Additional Changes Include Standard Viterbi Decoding
and Carrier PLL Carrier Tracking as would be Implemented for the L5 Signal Associated Data Demodulation at 25 Hz Rate (50 Hz Coded)
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Measured PSD of TDMA Signal
Frequency (MHz)
-15 -10 -5 0 5 10 15
Pow
er S
pect
ral D
ensi
ty (d
Bm
)
-100
-90
-80
-70
-60
-50
-40
TDMA PSD
Hardware Measured Power Spectral Density
TDMA Signal PSDFollows Same Sinc2
Response as C/AWithout Observable Spectral Lines
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Measured Spectral LinesPower Spectral Density Comparison
Frequency (Hz)-1500 -1000 -500 0 500 1000 1500
Pow
er S
pect
ral D
ensi
ty (d
Bm
)
-105
-100
-95
-90
-85
-80
-75CA SV1, = 4 dbmL5 SV1, = 5 dbmTDMA SV1, = 2 dbm
1 KHz
100 Hz
C/A
L5
Line Structure of TDMA R/C Code is Within Resolution of Spectrum Analyzer< 1 Hz Line Spacing
TDMA R/C Code Has P-Code Like Line Structure:
Better Interference Rejection Properties
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Measured DLL Pseudorange Residual for Ti=20 ms
Time (sec)
0 2 4 6 8 10 12 14 16 18
PR
Res
idua
l (C
/A C
hips
)
0.40
0.45
0.50
0.55
0.60
CA_Pseudorange2CM Pseudorange2CL Pseudorange
Measured R/C vs C/A Correlation and Pseudorange
Measured C/A and R/C Code Correlation
Received Code Delay (ns)
-4000 -3000 -2000 -1000 0 1000 2000 3000 4000
Nor
mal
aize
d C
orre
latio
n A
mpl
itude
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2CM Correlation2CL CorrelationC/A Correlation
Measured C/A and Scaled R/C Code Correlation
Received Code Delay (ns)
-4000 -3000 -2000 -1000 0 1000 2000 3000 4000
Nor
mal
aize
d C
orre
latio
n A
mpl
itude
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2CM Correlation x2 2CL Correlation x2C/A Correlation
Measured Mean PR Residual of 803PR I&D Samples (in Chips):
2CL
2CM
2C/A
0.48680.48670.4866
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Summary of Hardware Measurement Observations
• TDMA Code Has an Undetectable Spectral Line Structure More P-Code Like and Potentially Better Immunity to
Co-Channel Interference than C/A or L5• TDMA Correlation Response
Comparable to C/A Code but 1/2 the Magnitude for Correlation Over Fixed Integration Period In agreement with Theoretically Expected Multiplexing Ratio
Significantly Smaller Amplitude Non-Prompt Peaks Better Acquisition Performance, Smaller CDMA Noise
• TDMA Code Pseudorange Response Does Not Exhibit any Biases Relative to C/A Code Agreement to 0.0001 C/A Chip (within Experimental Error)
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Planed Hardware Additions• Implementation of Code and Carrier Tracking
for Various Combinations Code and Carrier Tracking 2CM Code with Data
Early-Late Code Tracking, AFC and PLL Carrier Tracking with Data removal
Code and Carrier Tracking 2CL Code without Data Early-Late Code Tracking, AFC and PLL Carrier Tracking without
Data removal Acquisition Performance of C/A vs 2CM vs 2CL
• Industry Inputs Welcome To Address Specific Concerns with TDMA Receivers
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Summary and Conclusions• C/A, L5 (1.023 MCPS) and TDMA Code R/C Options
were Compared Using a Constellation Simulation and a FPGA Hardware Proof of Concept New L2 TDMA R/C Code Exhibited Superior Characteristics
• A Proof of Concept was Developed for Both Transmitter and Receiver Implementations of the L2 R/C Code Small Change to Aerospace's FlexGPS Receiver Implemented
by Time Gated Correlator with 511.5 kHz Square-wave• Simulation and Hardware Measurements are Constant
with Theoretical Expectations for TDMA R/C Codes Detailed Results to be Published at ION GPS 2001
Backup
Current Prototype Development Approach
SPW/C Floating Point Simulation
HDS (Fixed Pt. SPW ) Model Development
Integrated SPW w/ Hardware Development System (HDS) Simulation: Cycle Correct Fixed Point (Integer) Simulation
HDS Subsystem Optimization (Digital Design)
HDS: Optimized Prototype Design
APTIX Software: Place and Route FPGA Components, Interconnect Routing, Test Points Selection
VHDL Code Generation
APTIX Programmable BrassboardFPGA
HP Logic Analyzer
Synthesize VHDL to EDIF/XNFCompile FPGA File
Sun Workstation
LAN
Concept
to
Hardware