PaxComm Co. Ltd.
라우터 / 스위치 Chipset
㈜ 팍스콤
백 영식 2
PaxComm Co. Ltd.
목차
1. Layer 2, Layer 3 switching
2. Switching Chip architectures
3. Galileo-I architecture
4. Galileo-II architecture
5. MMCnet architecture
백 영식 3
PaxComm Co. Ltd.Layer 2, Layer 3 Switching (1)
User 의 요구 Dedicated high speed port 를 필요 다양한 application 의 사용 (Video, Audio 등의 multimedia application)
Network 의 요구 사항 고속 WAN link speed Adapting to evolving traffic patterns Support multiple service levels Broadcast 의 처리 Security and firewall
백 영식 4
PaxComm Co. Ltd.Layer 2, Layer 3 Switching (2)
Layer 2 Switching Efficient and high-speed multi-port learning bridge Easy implementation and installation Large Flat Network Broadcast, Security problem Can be solved by VLAN Intercommunication problem between VLANs
Forwarding Model cut-through store-and-forward adaptive cut-through
백 영식 5
PaxComm Co. Ltd.Layer 2, Layer 3 Switching (3)
Layer 3 Switching High speed(Wire speed) Quality of Service Multicast
Layer 3 switch 구현 Traditional software-based routing -> hardware Route once, switch many Cut-through
백 영식 6
PaxComm Co. Ltd.Switching Chip Architecture (1)
I-Cube : Pure Crossbar (16 Port and 16 Port plus 1 Gigabit I-Cube Design, simplified)
FourEthernet
Ports
CrossBar
FourEthernet
Ports
FourEthernet
Ports
FourEthernet
Ports
FourEthernet
Ports
CrossBar
FourEthernet
Ports
FourEthernet
Ports
FourEthernet
Ports
SingleGigabit
Port
백 영식 7
PaxComm Co. Ltd.Switching Chip Architecture (2)
PMC-Sierra and Texas Instrument : Ring
Device A eight FastEthernet
Ports
Device D eight FastEthernet
Ports
Device C eight FastEthernet
Ports
Device B eight FastEthernet
Ports
백 영식 8
PaxComm Co. Ltd.
Switching Bus
Ports
Switch EngineMemory
Ports
Switch EngineMemory
Ports
Switch EngineMemory
Ports
Switch EngineMemory
Switching Chip Architecture (3)
Galileo - I : Distributed Switching Architecture
백 영식 9
PaxComm Co. Ltd.Switching Chip Architecture (4)
Galileo-II : Hybrid Cell Crossbar
Cell Crossbar
8 Fast EthernetPorts
8 Fast EthernetPorts
8 Fast EthernetPorts
8 Fast EthernetPorts
Ethernet Packet Traffic
Cell Traffic
백 영식 10
PaxComm Co. Ltd.
Switch Engine
Shared Memory Port
Ports PortsPortsPorts
Switching Chip Architecture (5)
MMC networks : Share Memory Architecture
백 영식 11
PaxComm Co. Ltd.Galileo-I Architecture (1)
Direct support for packet buffering High-performance Distributed switching engine VLAN support Quality-of-Service Queuing Address Resolution
Distributed Address Table management
5 종 17 개의 GalNet Protocol message 를 이용한 Packet forwarding NEW_ADDRESS BUFFER_REQUEST START_OF_PACKET PACKET_TRANSFER END_OF_PACKET
백 영식 12
PaxComm Co. Ltd.Galileo-I Architecture (2)
PROCESSORMEMORY
PCIBRIDGE
Galileo 10/00 device
DRAMGalileo
10/00 deviceDRAM
OTHER WAN INTERFACE
PCI BUS
Implementation example
백 영식 13
PaxComm Co. Ltd.Galileo-II Architecture (1)
Switch ControllerGT-48310
8 ports Fast Ethernet
Switch ControllerGT-48310
8 ports Fast Ethernet
Switch ControllerGT-48320
1 ports GigabitEthernet
Switch Controller(Future)
WAN
4 Port G.Link CrossbarGT-48300(12Gbps)
PCI used for CPU interface and for connection to other switching devices
(66M PCI)
G.Link Interconnects (2.4 Gbps each)
Galileo-II Switch Using G.Link Crossbar
백 영식 14
PaxComm Co. Ltd.Galileo-II Architecture (2)
Switch Controller Switch Controller Switch Controller
4 Port G.Link Crossbar
Switch Controller Switch Controller Switch Controller
4 Port G.Link Crossbar
Peer-to-peer Galileo-II Configuration
백 영식 15
PaxComm Co. Ltd.Galileo-II Architecture (3)
Switch Controller
Switch Controller
Switch Controller
4 Port G.Link Crossbar
Switch Controller
Switch Controller
Switch Controller
4 Port G.Link Crossbar
Switch Controller
Switch Controller
Switch Controller
4 Port G.Link Crossbar
Switch Controller
Switch Controller
Switch Controller
4 Port G.Link Crossbar
4 Port G.Link Crossbar
Hierarchical G.Link Configuration
백 영식 16
PaxComm Co. Ltd.
Current Approaches to Networking Equipment Design
FlexibilityTime to Market
Performance
Cost
Low
Low
High
Slow
High
Low
HighFast
General PurposeProcessor
Network Processor
Custom ASICs
MMCnet Architecture (1)
백 영식 17
PaxComm Co. Ltd.
Basic Switch Architecture
MMCnet Architecture (2)
nP5400BitStreamProcessor
BitStreamProcessor
Link Memory
DataMemory
Packets PacketsHeaders
Cells
Headers
Cells
ViX Interconnect
백 영식 18
PaxComm Co. Ltd.MMCnet Architecture (3)
Switch Component Requirements
AF5400 switch Configuration(5.5Gbps)
Switch Capacity nP5400 Modules EPIFs XPIFs5.5 Gbps 1 4 211.0 Gbps 2 8 422.0 Gbps 4 16 8
nP5400 packet Switching Module
CPUData
MemoryLink
Memory
ViX Interconnect
EPIF EPIF EPIF EPIF
Fast Ethernet Fast Ethernet Fast Ethernet Fast Ethernet
백 영식 19
PaxComm Co. Ltd.MMCnet Architecture (4)
nP5400 packet Switching Module
CPUData
MemoryLink
Memory
ViX Interconnect
EPIF EPIF EPIF EPIF
Fast Ethernet Fast Ethernet Fast Ethernet Fast Ethernet
EPIF EPIF EPIF EPIF
Fast Ethernet Fast Ethernet Fast Ethernet Fast Ethernet
nP5400 packet Switching Module
CPUData
MemoryLink
Memory
11.0-Gbps switch Configuration
백 영식 20
PaxComm Co. Ltd.MMCnet Architecture (5)
nP5400 packet Switching Module
CPUData
MemoryLink
Memory
EPIF EPIF EPIF EPIF
Fast Ethernet
Fast Ethernet
Fast Ethernet
Fast Ethernet
22.0-Gbps switch Configuration
nP5400 packet Switching Module
CPU
EPIF EPIF EPIF EPIF
Fast Ethernet
Fast Ethernet
Fast Ethernet
Fast Ethernet
nP5400 packet Switching Module
CPU
EPIF EPIF EPIF EPIF
Fast Ethernet
Fast Ethernet
Fast Ethernet
Fast Ethernet
nP5400 packet Switching Module
CPU
EPIF EPIF EPIF EPIF
Fast Ethernet
Fast Ethernet
Fast Ethernet
Fast Ethernet
ViX Interconnect
DataMemory
Link Memory
DataMemory
Link Memory
DataMemory
Link Memory
백 영식 21
PaxComm Co. Ltd.MMCnet Architecture (6)
5400 Architecture
Ingress Processing
Switching
Queuing
Scheduling
Egress Processing
Bit Stream Processor
5400 Switch Fabric
Bit Stream Processor
백 영식 22
PaxComm Co. Ltd.MMCnet Architecture (7)
Search Machine
MicroController
Statistics
Routing Table
Memory
Slicer
MAC
CH
AN
NE
L
CH
AN
NE
L
CH
AN
NE
L
CH
AN
NE
L
0 1 2 3
Up to 64K entriesper channel
Wire speed searchusing any key
Packet to CellConversion ViX Switch Interface
Wire speed parsingand manipulation
of ingress andegress packets
RMON Group 1, 2, 3, and 4 10/100 Ethernet MACs
MII Interface
EPIF Architecture
백 영식 23
PaxComm Co. Ltd.MMCnet Architecture (8)
System Architecture
Bit Stream Processor Switching Fabric
System CPU
Driver
Microcode(L2 learning and Aging, IP, IPX Routing
RTOS
nP Independent API
Routing software