MIK2435B
4-Channel Video Decoders and Mixer
and Audio Codecs Specification
Preliminary Data Sheet from Miktam Technologies, Inc.
Copyright Reserved.
MIK2435B
Miktam Technologies, Inc. 2 2012/02/09 www.miktamusa.com revision 1.3
Table of Contents
INTRODUCTION .....................................................................................................................3
FEATURES .................................................................................................................................. 4
APPLICATIONS ............................................................................................................................ 5
TERMINAL ASSIGNMENT ........................................................................................................6
TERMINAL FUNCTIONS ................................................................................................................. 7
BLOCK DIAGRAM ................................................................................................................. 18
APPLICATION SCHEMATICS................................................................................................... 19
PACKAGING ......................................................................................................................... 20
MIK2435B
Miktam Technologies, Inc. 3 2012/02/09 www.miktamusa.com revision 1.3
Introduction
The MIK2435B is a 4-channel video decoder which converts 4 channels of 6.5 MHz analog CVBS signals to 4 channels of digital 27 MHz CCIR656 signals. The MIK2435B integrates two internal PLLs, and decodes 720H videos using the same (27MHz) external clock source. The MIK2435B also features a patented fast switch function. With the fast switch function, the MIK2435B can decode up to 8 analog CVBS with little frame rate loss.
The MIK2435B includes two SD mixers and one HD mixer. Each SD/HD mixer can multiplex up to 4 video sources. In addition to two SD CCIR656 outputs or one HD SMPTE 274M output, the MIK2435B mixer can output four D1 videos through one TDM4 interface. The mixers support image mirror and H partition functions. Both interlaced and progressive digital video outputs are supported.
The MIK2435B also includes five audio ADCs and one audio DAC.
MIK2435B
Miktam Technologies, Inc. 4 2012/02/09 www.miktamusa.com revision 1.3
Features
Video Decoder
� Accepts NTSC (M), PAL (B, D, G, H, I, M, Nc)
� Hardware Fast Switch function
� Fast Switch also controllable by software or external pin
� Software channel ID in active region
� Four 10-bits video ADCs with built in 6.5 MHz analog low pass filter
� Automatic gain control for Luminance and Chrominance
� Programmable brightness, contrast, saturation, hue, and sharpness
� 5-H comb filter for YC separation
� Chrominance line filter for PAL phase error
� DLL for video synchronization, supports 27MHz crystal within +/-1000 ppm variance
� Advanced video synchronization for weak and noisy CVBS. Supports video signal transmitted by 500-meter long cable
� Up to 2 CCIR656 output interfaces which could be configured as 2 sets of CCIR656 (27MHz) or 2 sets of TDM2 (54MHz) or 1 set of TDM4 (108MHz)
� Support line lock camera
Audio Codecs
� Five audio ADCs and one audio DAC are integrated
� Master I2S/DSP playback, record and audio-mixing
� Supports extended I2S/DSP format transmitting up to 16 audio channels using one data pin
� 16-bit or 8-bit 48/24/16/8 KHz PCM format
MIK2435B
Miktam Technologies, Inc. 5 2012/02/09 www.miktamusa.com revision 1.3
Video Mixer
� Two SD mixers and one HD mixer. Each mixer supports up to 4 channels
� Two SD CCIR656 outputs (27MHz) or one HD SMPTE 274M output (74.25MHz)
� One TDM4 (108MHz) output
� One optional TDM4 input as mixer video sources.
� Various mixing combinations. Special H partition supported
� Video mirror supported
� Support both interlaced and progressive mixer output
� 16-bit SDRAM interface
Miscellaneous
� Use a single external 27MHz crystal to support 720H video
� Two programmable PLLs integrated
� Slave I2C bus
� Ultra low power consumption. Under 500mW for normal operation. Under 50mW for suspend mode.
� 128-pin LQFP package (14mmx14mm)
� 1.8V core power, 3.3V analog power and 1.8V analog power
Applications Suggested applications include
� DVR
� Car DVR
� Video capture card
MIK2435B
Miktam Technologies, Inc. 6 2012/02/09 www.miktamusa.com revision 1.3
Terminal Assignment
MIK2435B
Miktam Technologies, Inc. 7 2012/02/09 www.miktamusa.com revision 1.3
Terminal Functions
Analog Video/Audio Interface Pins
Pin Name Pin Number Type Description
INA0 13 A CVBS input A of channel 0 or S-VIDEO Y of channel 0
INB0 14 A CVBS input B of channel 0 or S-VIDEO Y of channel 0
INA1 17 A CVBS input A of channel 1 or S-VIDEO C of channel 0
INB1 18 A CVBS input B of channel 1 or S-VIDEO C of channel 0
INA2 21 A CVBS input A of channel 2 or S-VIDEO Y of channel 1
INB2 22 A CVBS input B of channel 2 or S-VIDEO Y of channel 1
INA3 25 A CVBS input A of channel 3 or S-VIDEO C of channel 1
INB3 26 A CVBS input B of channel 3 or S-VIDEO C of channel 1
AIN1 6 A Audio input of channel 1
AIN2 7 A Audio input of channel 2
AIN3 8 A Audio input of channel 3
AIN4 9 A Audio input of channel 4
AIN5 10 A Audio input of channel 5
AINN 5 A Audio input negative control
AOUT 2 A Audio output
MIK2435B
Miktam Technologies, Inc. 8 2012/02/09 www.miktamusa.com revision 1.3
Digital Video/Audio Interface Pins
Pin Name Pin Number Type Description
oCCIRD_0[7:0] 98,99,100,
101,103,104,105,106
O Video data output of channel 0 or SMPTE 274M Y bus output or TDM2/TDM4 Output Data Bus
oCCIRD_1[7:0] 85,86,87, 88,90,91,
92,93 IO
Video data output of channel 1 or SMPTE 274M C bus output or TDM2/TDM4 Output Data Bus
A[11:0]
76,58,75, 74,72,71 70,69,64 63,62,59
IO SDRAM ADDRESS Bus
DQ[15:2]
122,119,109, 108,96,95, 80,79,49, 48,47,46,
45,40
IO SDRAM DATA Bus
DQ0/SADD[1] 38 IO SDRAM DATA Bus DQ[0], MSB of I2C Device ID strapping
DQ1/SADD[0] 39 IO SDRAM DATA Bus DQ[1], LSB of I2C Device ID strapping
SDR_CLK 77 IO SDRAM CLOCK
BA[1:0] 57,56 IO SDRAM BANK Select
WE 50 O SDRAM Control: WE
CAS 51 O SDRAM Control: CAS
RAS 52 O SDRAM Control: RAS
ACLKR 111 O Audio serial clock output of record.
ASYNR 112 O Audio serial sync output of record.
ADATR 113 O Audio serial data output of record.
ADATM 114 O Audio serial data output of mixing
ACLKP 116 O Audio serial clock output of playback
ASYNP 117 O Audio serial sync output of playback
ADATP 118 I Audio serial data input of playback
MIK2435B
Miktam Technologies, Inc. 9 2012/02/09 www.miktamusa.com revision 1.3
GPIO
Pin Name Pin Number Type Description
MPP4 124 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 4
MPP3 125 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 3
MPP2 126 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 2
MPP1 127 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 1
System Control Pins
Pin Name Pin Number Type Description
HRSTZ 121 I System reset.
XI 82 I Crystal 27 MHz connection or Oscillator clock input.
XO 83 O For crystal 27 MHz connection.
oPIXCLK 67 O 36/72/144MHz or SMPTE 274M 74.25MHz clock output.
TEST_EN 37 I Test enable, please connect it to ground
SI2CD 42 IO Slave I2C data
SI2CLK 43 I Slave I2C clock
iPIXCLK 54 I CCIR656 27MHz or TMD 108 MHz clock input.
MI2CLK 66 IO Master i2c clock (open drain)
MIK2435B
Miktam Technologies, Inc. 10 2012/02/09 www.miktamusa.com revision 1.3
Power, Ground and NC Pins
Pin Name Pin Number Type Description
VDDA 1,11 P 1.8V Power for analog audio DAC
VSSA 3,4 G Ground for analog audio DAC
VDDV 12,19,20,27 P 1.8V Power for video ADC
VSSV 15,16,24 G Ground for video ADC
AGND 23 G Analog ground (used as signal input reference, CH_AGND)
AVDD_1 31 P 1.8V Power for analog clock PLL1
AVSS_1 32 G Ground for analog clock PLL1
AVDD_2 34 P 1.8V Power for analog clock PLL2
AVSS_2 35 G Ground for analog clock PLL2
VDDI 41,60,78,94,
110,128 P 1.8V Power for internal logic.
VDDO 53,68,84, 102,120
P 3.3V Power for output driver
VSS 36,44,55,65, 73,81,89,97, 107,115,123
G Ground for internal logic and output driver
NC 28,29,30,33
61 Not Connected
MIK2435B
Miktam Technologies, Inc. 11 2012/02/09 www.miktamusa.com revision 1.3
Pin Usage of ITDM Video Input
ITDM
Video
In
Settings CCIRINPINOPT=0
Clock iPIXCLK (pin 54)
Data Bus
[7:0] oCCIRD_1[7:0]
Pin Usage of Video Output
Video Out
1 oCCIRD_0[7:0] SD: CCIR656/TDM2/TDM4 HD: Y component
2 oCCIRD_1[7:0] (Only when ITDM is disabled) SD: CCIR656/TDM2/TDM4 HD: C component
MIK2435B
Miktam Technologies, Inc. 12 2012/02/09 www.miktamusa.com revision 1.3
� Alternative assignment
(PINCFG = 2’h3 @ REG 6A)
MIK2435B
Miktam Technologies, Inc. 13 2012/02/09 www.miktamusa.com revision 1.3
� Terminal functions of alternative assignment
(PINCFG = 2’h3 @ REG 6A)
Analog Video/Audio Interface Pins
Pin Name Pin number Type Description
INA0 13 A CVBS input A of channel 0 or S-VIDEO Y of channel 0
INB0 14 A CVBS input B of channel 0 or S-VIDEO Y of channel 0
INA1 17 A CVBS input A of channel 1 or S-VIDEO C of channel 0
INB1 18 A CVBS input B of channel 1 or S-VIDEO C of channel 0
INA2 21 A CVBS input A of channel 2 or S-VIDEO Y of channel 1
INB2 22 A CVBS input B of channel 2 or S-VIDEO Y of channel 1
INA3 25 A CVBS input A of channel 3 or S-VIDEO C of channel 1
INB3 26 A CVBS input B of channel 3 or S-VIDEO C of channel 1
AIN1 6 A Audio input of channel 1 AIN2 7 A Audio input of channel 2 AIN3 8 A Audio input of channel 3 AIN4 9 A Audio input of channel 4 AIN5 10 A Audio input of channel 5 AINN 5 A Audio input negative control AOUT 2 A Audio output
MIK2435B
Miktam Technologies, Inc. 14 2012/02/09 www.miktamusa.com revision 1.3
Digital Video/Audio Interface Pins
Pin Name Pin number Type Description
oCCIRD_0[7:0] 98,99,100,
101,103,104 105,106
O Video data output of channel 0 or SMPTE 274M Y bus output or TDM2/TDM4 Output Data Bus
oCCIRD_1[7:0] 85,86,87, 88,90,91,
92,93 O
Video data output of channel 1 or SMPTE 274M C bus output or TDM2/TDM4 Output Data Bus
A[11:0] 76,54,75,74, 72,71,70,69, 80,79,67,66
IO SDRAM ADDRESS Bus
DQ[15:2]
64,63,62,61, 59,58,57,56, 49,48,47,46,
45,40,
IO SDRAM DATA Bus
DQ0/SADD[1] 38 I SDRAM DATA Bus DQ[0], MSB of I2C Device ID strapping
DQ1/SADD[0] 39 I SDRAM DATA Bus DQ[1], LSB of I2C Device ID strapping
SDR_CLK 77 O SDRAM CLOCK BA[1:0] 96,109 IO SDRAM BANK Select
WE 50 O SDRAM Control : WE CAS 51 O SDRAM Control : CAS RAS 52 O SDRAM Control : RAS
ACLKR 111 O Audio serial clock output of record ASYNR 112 O Audio serial sync output of record. ADATR 113 O Audio serial data output of record ADATM 114 O Audio serial data output of mixing
ACLKP 116 IO Audio serial clock output of playback or TDM2/TDM4 Input/output Data Bus[7]
ASYNP 117 IO Audio serial sync output of playback or TDM2/TDM4 Input/output Data Bus[6]
ADATP 118 IO Audio serial data input of playback or TDM2/TDM4 Input/output Data Bus[5]
ALINKI 119 IO Interrupt request output, Audio Multi-chip serial input or TDM2/TDM4 Input/output Data Bus[4]
ALINKO 122 IO Audio Multi-chip serial output or TDM2/TDM4 Input/output Data Bus[3]
MIK2435B
Miktam Technologies, Inc. 15 2012/02/09 www.miktamusa.com revision 1.3
GPIO
Pin Name Pin number Type Description
MPP4 124 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 4 or TDM2/TDM4 Input/output Data Bus[2]
MPP3 125 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 3 or TDM2/TDM4 Input/output Data Bus[1]
MPP2/iPIXCLK 126 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 2 or TDM2/TDM4 Input/output Clock
MPP1 127 IO FLD/ACTIVE/NOVID/FASTSW_SEL of channel 1 or TDM2/TDM4 Input/output Data Bus[0]
System Control Pins
Pin Name Pin number Type Description
HRSTZ 121 I System reset
XI 82 I Crystal 27MHz connection or Oscillator clock input.
XO 83 O Crystal 27MHz connection
oPIXCLK 108 O 36/72/144MHz or SMPTE 274M 74.25MHz clock output.
TEST_EN 37 I Test enable, please connect it to ground SI2CD 42 IO Slave I2C data SI2CLK 43 I Slave I2C clock
MIK2435B
Miktam Technologies, Inc. 16 2012/02/09 www.miktamusa.com revision 1.3
Power, Ground and NC Pins
Pin Name Pin number Type Description
VDDA 1,11 P 1.8V Power for analog audio DAC VSSA 3,4 G Ground for analog audio DAC VDDV 12,19,20,27 P 1.8V Power for video ADC VSSV 15,16,24 G Ground for video ADC
AGND 23 G Analog ground (used as signal input reference, CH_AGND)
AVDD_1 31 P 1.8V Power for analog clock PLL1 AVSS_1 32 G Ground for analog clock PLL1 AVDD_2 34 P 1.8V Power for analog clock PLL2 AVSS_2 35 G Ground for analog clock PLL2
VDDI 41,60,78,94,
110,128 P 1.8V Power for internal logic
VDDO 53,68,84, 102,120
P 3.3V Power for output driver
VSS 36,44,55,65, 73,81,89,97, 107,115,123
G Ground for internal logic and output driver
NC 28,29,30,33,
95 Not Connected
MIK2435B
Miktam Technologies, Inc. 17 2012/02/09 www.miktamusa.com revision 1.3
Pin Usage of ITDM Video Input
ITDM
Video
In
Settings CCIRINPINOPT=1
Clock MPP2/iPIXCLK (pin 126)
Data Bus
[7:0]
Pin no. {116, 117, 118, 119, 122, 124, 125, 127}
Pin Usage of Video Output
Video Out
1 oCCIRD_0[7:0] SD: CCIR656/TDM2/TDM4 HD: Y component
2 oCCIRD_1[7:0] SD: CCIR656/TDM2/TDM4 HD: C component
3 (a) Only when ITDM is disabled (b) set CCIROPINOPT=1 (c) supporting SD: CCIR656/TDM2/TDM4 Data Bus[7:0]: Pin no. {116, 117, 118, 119,122, 124, 125, 127}
MIK2435B
Miktam Technologies, Inc. 18 2012/02/09 www.miktamusa.com revision 1.3
Block Diagram
MIK2435B
Miktam Technologies, Inc. 19 2012/02/09 www.miktamusa.com revision 1.3
Application Schematics
R18
4.7K
ASYNR
SDRAM_DQ9
SDRAM_DQ1
VDC_6
C18
0.1uF
3V3
SDRAM_DQ15
1V8
AGND
AGND
R4
39
J8
S-VIDEO
34
2 1
5
R21
1.2K
C29
0.1uF
R1
39
R23
4.7K
C4
0.1uF
SDRAM_DQ0
R12
39
SDRAM_A[1]
SDRAM_A[9]
C2
0.1uF
SDRAM_DQ13
R11
39
R16
39
C40 2.2uF
C3
0.1uF
Put the SDRAM as tight as possible toMIK2435B
VDD_1V8A
RESET
SDRAM_DQ9
R22
4.7K
VDY_3
AGND
SDRAM_BA[1]
SDRAM_A[3]
SDRAM_DQ3
+C26
47uF/16V
VDC_4
J10RCA JACK_0
2
1
3
4
VDY_1
C34
0.1uF
AGND
AGNDJ3RCA JACK_0
2
1
3
4
C38 2.2uF
X127MHZ
13
C41 2.2uF
VDD_1V8VD
AGND
SDRAM_DQ5SDRAM_A[5]
SDRAM_DQ8
R7
39
+C16
47uF/16V
AGND
ACLKR
SDRAM_CAS
VDC_7
C42 2.2uF
R13
39
VDY_6
AGND
45
6
7
8
9
10
11121920
21
22
2324
25
26
27 31
3233
34
35 36
37
38
43
444546474849
50
54
55
56575859
60
6162
69707172
73
74757677
81
82
83
84
85868788
93
94
9596
3
53 78 1
2
16
17
2930
40
415152
66
67
7980
9091
97
9899100
13
18
63
68
28
14
15
39
42
64
65 89
92
101
102
103104105106
107
108109
110
111112113114
115
116117118
119
120
121
122
123
124125126127
128
VS
SA
AINN
AIN1
AIN2
AIN3
AIN4
AIN5
VD
DA
VD
DV
VD
DV
VD
DV
INA2
INB2
VS
SV
AG
ND
INA3
INB3
VD
DV
AV
DD
_1
AV
SS
_1
NC
AV
DD
_2
AV
SS
_2
VS
S TEST_EN
DQ0
SI2CLK
VS
SDQ3DQ4DQ5DQ6DQ7
WE
iPIXCLK
VS
S
oCCIRD_3[7]oCCIRD_3[6]oCCIRD_3[5]oCCIRD_3[4]
VD
DI
oCCIRD_3[3]oCCIRD_3[2]
oCCIRD_2[7]oCCIRD_2[6]oCCIRD_2[5]oCCIRD_2[4]
VS
S
oCCIRD_2[3]oCCIRD_2[2]oCCIRD_2[1]oCCIRD_2[0]
VS
S
X1
XO
VD
DO
oCCIRD_1[7]oCCIRD_1[6]oCCIRD_1[5]oCCIRD_1[4]
oCCIRD_1[0]
VD
DI
DQ10DQ11
VS
SA
VD
DO
VD
DI
VD
DA
AOUT
VS
SV
INA1
NC
NC
DQ2
VD
DI
CASRAS
MI2CLK
oPIXCLK
DQ8DQ9
oCCIRD_1[3]oCCIRD_1[2]
VS
S
oCCIRD_0[7]oCCIRD_0[6]oCCIRD_0[5]
INA0
INB1
oCCIRD_3[1]
VD
DO
NC
INB0
VS
SV
DQ1
SI2CD
oCCIRD_3[0]
VS
S
VS
S
oCCIRD_1[1]
oCCIRD_0[4]
VD
DO
oCCIRD_0[3]oCCIRD_0[2]oCCIRD_0[1]oCCIRD_0[0]
VS
S
DQ12DQ13
VD
DI
ACLKRASYNRADATRADATM
VS
S
ACLKPASYNPADATP
DQ14
VD
DO
HRSTZ
DQ15
VS
S
MI2CD3MI2CD2MI2CD1MI2CD0
VD
DI
L4
BEAD
SDRAM_DQ4SDRAM_A[4]
SDRAM_A[6]
SDRAM_DQ0
+C10
47uF/16V
AGND
SDRAM_WE
C9
0.1uF
AGND
+C20
47uF/16V
L3
BEAD
AGND
SDRAM_A[4]
VDY[7:0]
SDRAM_DQ6
VDY_5
R36 22R
C32
0.1uF
C12
0.1uF
L5
BEAD
J12RCA JACK_0
2
1
3
4
AGND
SDRAM_DQ6
SDRAM_A[2]
J6RCA JACK_0
2
1
3
4
AGND
AGND
J14
PHONEJACK
123
C19
0.1uF
VDD_1V8
VDD_3V3
VDC[7:0]
SDRAM_A[12]
SDRAM_A[8]
L1
BEAD
SDRAM_A[10]
SDRAM_DQ1
C8
0.1uF
R20
1.2K
C17
0.1uF
C6
0.1uF
VDD_1V8VD
VDD_1V8
SDRAM_BA[1]
SDRAM_DQ2
SDRAM_DQ14
C54
10pF
SDRAM_BA[0]
J5
S-VIDEO
34
2 1
5
SDRAM_DQ12
SDRAM_DQ8
C14
0.1uF
AGND
AGND
ACLKP
SDRAM_DQ15
R19
4.7K
AGND
SDRAM_RAS
VDD_3V3
RP3
22R
123
6
45
87
910111213141516
SDRAM_A[2]
VDY_0
VDY_4
R5
39
L2
BEAD
SDRAM_WE
VDY_7
AGND
AGND
SDRAM_A[11]
C25 10pF
AGND
AGND
VDCLK
SDRAM_DQ10
SDRAM_A[6]
J15
PHONEJACK
123
R14
1M
C7
0.1uF
J11
S-VIDEO
34
2 1
5
R31
4.7KC48
100uF
VDD_1V8PLL SDRAM_A[7]
J13
PHONEJACK
123
C31
0.1uF
VDC_0
ADATR
VDC_3
AGND
AGND
SDRAM_A[11]
SDRAM_DQ5
C23
0.1uF
8M x 16bitSDRAM INTERFACE
C21
0.1uF
SDRAM_DQ2
SDRAM_DQ7SDARM_A[7]
AGND
VDC_1
SDRAM_DQ10
RP2
22R
123
6
45
87
910111213141516
3V3
SDRAM_CLK
AGND
C13
0.1uF
J4RCA JACK_0
2
1
3
4
C30
0.1uF
R10
39
C24
0.1uF
AGND
SDRAM_A[8]
SDRAM_DQ4
C27
0.1uF
SDRAM_DQ11
VDD_1V8PLL
J2
S-VIDEO
34
2 1
5
C5
0.1uF
RP4
22R
123
6
45
87
910111213141516
SDA
ADATM
SDRAM_DQ14
R15
39
J1RCA JACK_0
2
1
3
4
SDRAM_A[10]
SDRAM_DQ12
VDD_3V3
SCL
+C1
47uF/16V
C39 2.2uF
VDY_2
SDARM_CLK
AGND
AGND
C33 10pF
SDRAM_RAS
R2
39
J16
PHONEJACK
123
C28
0.1uF
R17
39
R37 22R
R59 4.7K1 2
J7RCA JACK_0
2
1
3
4
AGND
AGND
ASYNP
SDRAM_A[9]
SDRAM_A[1]
U1
EM639165(8M x 16 bit)
U123242526293031323334
1718
15
16
19
37
38
39
245781011134244454748505153
20
1
27
2841
22
40
394349
6124652
35
21
54
14
A0A1A2A3A4A5A6A7A8A9
CASRAS
LDQM
WE
CS
CKE
CLK
UDQM
D0D1D2D3D4D5D6D7D8D9
D10D11D12D13D14D15
BA0
VDD
VDD
VSSVSS
A10/AP
NC/RFU
VDDqVDDqVDDqVDDq
VSSqVSSqVSSqVSSq
A11
BA1
VSS
VDD
SDRAM_A[0]
C15
0.1uF
AGND
AGND
SDRAM_DQ13
SDRAM_A[5]
SDRAM_DQ3
VDC_5
SDRAM_CAS
MIK2435B
VDC_2
SDRAM_DQ11
R8
39
R3
39
J9RCA JACK_0
2
1
3
4
AGND
C36 2.2uF
ADATP
SDRAM_A[0]
R9
39
AGND
J17
PHONEJACK
123
VDD_1V8A
SDRAM_A[3]
SDRAM_BA[0]
SDRAM_DQ7
RP1
22R
123
6
45
87
910111213141516
AGND
J13
2
1
3
4
R6
39
C11
0.1uF
AGND
C22
0.1uF
MIK2435B
Miktam Technologies, Inc. 20 2012/02/09 www.miktamusa.com revision 1.3
Packaging
MIK2435B
Miktam Technologies, Inc. 21 2012/02/09 www.miktamusa.com revision 1.3