Efficient SAT Solving for Non-clausal Formulas using DPLL, Graphs, and Watched-cuts
Himanshu JainEdmund M. Clarke
AgendaMotivation
Existing SAT solvers
Our approachNegation Normal Form (NNF)Graphs to represent NNFBoolean Constraint Propagation (BCP)Experimental Results
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3
Applications in verificationEquivalence checkingModel checkingTheorem provingTest generationStatic analysis
Circuits in practiceThousands of inputsMillions of gates Structure sharing
Boolean Satisfiability
Boolean Circuit
a b a b a b
output
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Current SAT solvers Davis-Putnam-Logemann-Loveland (DPLL) algorithm
Conversion of circuit to Conjunctive Normal Form (CNF)
Number of variables proportional to number of gates Can be 103-104 times more than the number of inputs in a
circuit Slowdown due to large number of new variables (and clauses)
Modern CNF solvers use pre-processing techniques To reduce #variables and #clauses in CNF But pre-processing has large memory requirements
5Our SAT solving frameworkBoolean Circuit
hpgraph vpgraph
Negation Normal FormFewer variablesthan CNF and more structure
DPLL algorithm
6Negation Normal Form (NNF)
An NNF formula contains arbitrary nesting of AND () and OR () gates - Negations can appear at leaf level - No sharing of sub formulas
a b
a b
a b
y y
y
a b y
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How to obtain NNF from Boolean Circuits
a b
a b
a b
y y
y
a b y
a b a b a b
Circuit from converted to NNF byintroducing one new variable y to
remove sharing
Boolean Circuit
NNF
out
out
out’
10Our SAT solving frameworkBoolean Circuit
hpgraph vpgraph
Negation Normal Form
Peter Andrew’sHorizontal/Vertical Path Forms (1981)
DPLL algorithm
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Inductively creating hpgraph() from NNF formula
is a literal m mCreate new node
= 1 2
hpgraph(1)R1L1
hpgraph(2)R2L2
Take graph union
= 1 2 hpgraph(1)R1L1 hpgraph(2)R2
L2
Add hyperedge from L1 to R2
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p q
r sr
p
ExampleFormula F: (((p q) r q) (p (r s) q))
q q
hpgraph(F)
R
R
R
L
L
L
R denotes a root node and L denotes a leaf node
p q pp q r sp q qr pr r sr qq pq r sq qCNF(F)
horizontal path
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ExampleFormula F: (((p q) r q) (p (r s) q))
p q
r
q q
p
r s
vpgraph(F)
R R R
L L
R denotes a root node and L denotes a leaf node
p r qq r qp r qp s q
DNF(F)
vertical path
14Our SAT solving frameworkBoolean Circuit
hpgraph
CNF-like
vpgraph
DNF-like
Negation Normal Form
DPLL algorithm
Directed Acyclic Graphs (DAGs)Linear in size of original circuit
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DPLL on hpgraph
hpgraphBoolean Constraint Propagation (BCP) engine
DecisionsTop-levelDPLLAlgorithm
Conflicts,Implied Literals
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p
r
Meaning of BCP on hpgraph
p q
r s
q q
Conflict clause: r p
R
L
Assignment 1 :={r=1,p=1}
horizontal path = clause
q
p q
r sr
p
q
Unit clause: q r sImplied literal: r
R
L
Assignment 2 :={q=1,s=1}
A horizontal path
17Can we generalize the CNF watched literal scheme?
- Watch two literals (nodes) on each clause (path)- But exponential number of clauses (paths)!
p q
r sr
p
q q
R
R
R
L
L
L
Hpgraph
Horizontal path =
clause
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Two Watched Cut SchemeHpgraph
p q
r sr
p
q q
R
R
R
L
L
L
1. A node cut disconnects all horizontal paths2. Watch two node cuts (allows observing two literals on each clause)3. Minimal cuts (covered later)
cut 1 cut 2
watch a node
cutp q r s
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Actual picture….An hpgraph
hpgraphcomponents
1. Two cuts for each hpgraph component
2. Can be updated locally during BCP
3. Non-chronological backtracking is cheap
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Acceptable cut
p q
r sr
p
q q
R
R
R
L
L
L
cut 1 cut 2
A cut is acceptable if no literal appearing in it is false
Cut 2 is:
not acceptable for:= {p=1}
Cut 1 is:
acceptable for:= {p=1}
Now let us see the use of cuts during BCP
22BCP Case 1: Both cuts are acceptable and disjoint
Hpgraph component
p q
r sr
p
q q
R
R
R
L
L
L
cut 1 cut 2
No need to examine the hpgraph component
:= {s=1}
Intuitively, there will be no conflicts or implied literals
23BCP Case 2 (conflict): No acceptable cut
Hpgraph component
p q
r sr
p
q q
R
R
R
L
L
L
cut 1 cut 2
:= {p=1,q=1}
An hpgraph has no acceptable cut if and only if currentassignment falsifies the formula
Conflict clause: q p
24BCP Case 3 (Implications): Acceptable cuts but not disjoint
Hpgraph component
p q
r sr
p
q q
cut 1
cut 2
For := {p=1} we can find two acceptable cuts.
We cannot findtwo completely node-disjoint cuts
Intuitively nodes common to both cuts contain implied literals
In our example r and q are implied literals.
25Finding and Maintaining Minimal Cuts
p q
r sr
p
q q
R
R
R
L
L
L
minimal cut in hpgraph component = a path in vpgraph component
1 2 3
4 5 6
7 8
hpgraph component
p q
r
q q
p
r s
R R R
L L
1 2 3
4 5 6
7 8
vpgraph component
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Experimental Results These techniques implemented in:
NFLSAT (Non-clausal FormuLas SATisfiability checker)
~2500 Boolean circuits (industrial category) Bounded model checking, k-induction, SW/HW verification CNF obtained by adding new variables (one per AND gate in
AIG) Timeout of 600sec per problem
Comparing with state-of-the-art solvers SAT 2009 competition winners: Precosat, Glucose SAT-Race 2008 AIG track winners: MiniSAT++, Picoaigersat Top three winners of SAT 2007 comp: RSAT, MiniSAT,
PicoSAT
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NFLSAT vs. PrecosatNFLSAT solves 29 more problems
x>y on 2018 points
y>x on 306 points
Total time: NFLSAT( 136000 sec), Precosat (193400 sec)
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NFLSAT vs. GlucoseNFLSAT solves 58 more problems
y>x on 895 points
x>y on 1382 points
Total time: NFLSAT( 136000 sec), Glucose (185000 sec)
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NFLSAT vs. MiniSAT++ (AIG)
Total time: NFLSAT( 105785 sec), MiniSAT++ (103257 sec)
Minisat++ solves 14 more problems
30SummaryBoolean Circuit
Negation Normal Form
vpgraph hpgraph
Clause Database
BCP engine Conflicts,
Implied Literals
DecisionsTop-levelDPLLAlgorithm
1. Other features of modern SAT solvers
2. No pre-processing so far (circuit rewriting applicable)
Linear time conversion