Contents of Presentationo Background and literature review
o Different applications of CMOS OpAmp
o Choice of complex electronic system
o proposed circuit (cmos opamp) to be implemented in the system -> In the Book
o analysis of proposed circuit
o Improved, and more complex circuit
o Analysis
o System Analysis
o Conclusion
BackGround Complementary Metal-Oxide-Semiconductor (CMOS) technology is circuit implementation using both pMOS and nMOS transistors on the same silicon chip.
CMOS designs typically offer high gain and speed at low power consumption.
CMOS scales well to smaller devices without drastic changes in performance.
This device is commonly used to amplify small signals, to add/subtract voltages, and in active filtering.
It must have high gain, low current draw, and should function over a variety of frequencies.
Why CMOS over TTL?
MOSFETS consume less power in the driver circuit. MOSFETS have greater bandwidth.
MOSFETS are thermally more stable.
MOSFETS are considerably ‘faster’ than BJT’s.
CMOS ICs use much less power than TTL
Analysis of a Complex Electronic System
The input consists of differential electrode inputs and the outputs are from: an amplifier, a peak detector, a trough detector, and a level detector.
A trough is a noticeable decline in the signal strength
Implication of CMOS (OTA) amplifier in neural amplifier
There is a great demand for technologies that enable neuroscientists and clinicians to observe the simultaneous activity of large numbers of neurons in the brain.
While there are microelectronic devices being developed for small-scale amplification of the weak bioelectrical signals, existing circuits typically have unacceptable noise levels or consume too much power to be fully implanted in large quantities.
In our electronic system, the bioamplifier must dissipate little power so that surrounding tissues are not damaged by heating. A heat flux of only 80 mW/cm2 can cause necrosis in muscle tissue.
Necrosis: accidental death of cells and living tissue.
In small chronic impants, the power dissipation should not exceed a few hundred miliwatts.
Design and testing of a fully integrated amplifier suitable for recording biological signals from the millihertz range to 7 kHz.
Design such that the amplifier offers the best power – noise tradeoff.
Main Objective
Operational Transconductance Amplifier (OTA)
The input voltage controls an output current by means of the device transconductance, labeled gm.
What is important and useful about the OTA’s transconductance parameter is that it is controlled by an external current, the amplifier bias current, IABC , so that one obtains
From this externally controlled transconductance, the output current as a function of the applied voltage difference between the two input pins, labeled v+ and v-, is given by
Analysis of OTA Circuit
Power dissipation in the circuit is acceptable, but it is still not close to 1 mW, which is ideal for biosignal amplifiers.
Possible Solutions:
I) Either, try to improve this circuitII) Come up with another circuit that can supply high enough open loop gain, with low power dissipation.
AC Analysis of the amplifier
DC
Gain
of th
is c ircuit is a
bou
t 145
dB
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2
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2
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IIL
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L
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gggg
gg
vi
vo
OUT
+
-
V+V-
VSS
Vo
VDDVOS
Vin
CL2pPower Dissipation of the
amplifier
The circuit dissipates only about 180 uW of power, which is quiet low compared to the circuit analyzed before
(ID1 + ID2 + ID3)*(VDD-VSS)
Transient Response of the Circuit
Time domain response of the circuit when it is excited with a sinusoidal signal.
OUT
+
-
V+
V-
RF2
1M
Vout
Vin
VSS
CL2p
VDD
RF110M
Closed Loop Circuit with Rf & Rs in inverting configuration
Q1
JFET_P_VIRTUAL
Q2
JFET_P_VIRTUAL
Q3
JFET_P_VIRTUAL
Q4
JFET_P_VIRTUAL
Q5
JFET_N_VIRTUAL
Q6
JFET_N_VIRTUAL
VDD5V
Q7
JFET_N_VIRTUAL
Q8
JFET_N_VIRTUAL
Ibias100uA
VSS-5V
Q9
JFET_P_VIRTUAL
Q10
JFET_P_VIRTUAL
Q11
JFET_N_VIRTUAL
Q12
JFET_N_VIRTUAL
Q13
JFET_P_VIRTUAL
Q14
JFET_P_VIRTUAL
Q15
JFET_N_VIRTUAL
Q16
JFET_N_VIRTUAL
Q17
JFET_P_VIRTUAL
Q18
JFET_P_VIRTUAL
Q19
JFET_N_VIRTUAL
C1
15pF
Q20
JFET_N_VIRTUAL
Q21
JFET_P_VIRTUAL
Q22
JFET_N_VIRTUAL
Q23
JFET_P_VIRTUAL
C2
15pF
V1
1 V 1kHz 0Deg
Many other design possibilities
Conclusion
The design process that was followed resulted in a CMOS operational amplifier design that at least met and, in a few cases, exceeded the design objectives by a large margin. The notable performance areas were the DC open loop gain of 145 dB, and the power consumption of 180 uW. Also, the settling time was quite low as can be seen by the transient response of the circuit, which means the circuit is relatively ‘fast’.
A great deal was learned in the design process, including how to approach a design project, the tradeoffs involved in a CMOS op-amp design, patience, and how to stay up late.
There could still be a lot improved in this circuit, but requires knowledge that is beyond the scope of this course, mainly in the field of VLSI.
References
R. R. Harrison and C. Charles, "A low-power low-noise CMOS amplifier for neural recording applications," IEEE J. Solid-State Circuits, vol. 38, pp. 958-965, 2003.
Yiqin Chen, Mark E. Schlarmann and Randall L. Geiger, "An Improved design Formulation for design and Optimization of Operational Amplifiers," MWSCAS’99 The 43rd Midwest Symposium on Circuits and Systems, New Mexico, USA, 8-11 August, 1999.
Electrophysiology, From: [http://en.wikipedia.org/wiki/Electrophysiology]. Retrieved on November 10th, 2006.