7/24/2019 1. Memory and Device Management.ppt
1/27
Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Memory Management
7/24/2019 1. Memory and Device Management.ppt
2/27
8.2 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Multistep Processing of a User Program
7/24/2019 1. Memory and Device Management.ppt
3/27
8.3 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Swapping
A process can be swapped temporarily out of memory to a backingstore, and then brought back into memory for continued execution
Backing store fast disk large enough to accommodate copies of allmemory images for all users;
Roll out, roll in swapping variant used for priority-based schedulingalgorithms; lower-priority process is swapped out so higher-priorityprocess can be loaded and executed
7/24/2019 1. Memory and Device Management.ppt
4/27
8.4 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Contiguous Allocation (Cont.)
Multiple-partition allocation Hole block of available memory; holes of various size arescattered throughout memory
When a process arrives, it is allocated memory from a hole largeenough to accommodate it
Operating system maintains information about:a) allocated partitions b) free partitions (hole)
OS
process 5
process 8
process 2
OS
process 5
process 2
OS
process 5
process 2
OS
process 5
process 9
process 2
process 9
process 10
7/24/2019 1. Memory and Device Management.ppt
5/27
8.5 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Dynamic Storage-Allocation Problem
First-fit: Allocate thefirsthole that is big enough
Best-fit: Allocate thesmallesthole that is big enough; must search entire list, unlessordered by size
Produces the smallest leftover hole
Worst-fit: Allocate thelargesthole; must also search entire list
Produces the largest leftover hole
How to satisfy a request of sizenfrom a list of free holes
First-fit and best-fit better than worst-fit in terms of speed and storageutilization
7/24/2019 1. Memory and Device Management.ppt
6/27
8.6 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Given five memory partitions of 100 KB, 500 KB, 200 KB, 300 KB, and 600
KB (in order), how would each of the first-fit, best-fit, and worst-fit algorithms
place processes of 212 KB, 417 KB, 112 KB, and 426 KB (in order)?Which
algorithm makes the most efficient use of memory?
7/24/2019 1. Memory and Device Management.ppt
7/278.7 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
7/24/2019 1. Memory and Device Management.ppt
8/278.8 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Fragmentation ssues
External Fragmentation total memory space exists to satisfy arequest, but it is not contiguous
Internal Fragmentation allocated memory may be slightly larger thanrequested memory; this size difference is memory internal to a partition,but not being used
Reduce external fragmentation bycompaction
Shuffle memory contents to place all free memory together in onelarge block
Compaction is possibleonlyif relocation is dynamic, and is done at
execution time I/O problem
Latch job in memory while it is involved in I/O
Do I/O only into OS buffers
7/24/2019 1. Memory and Device Management.ppt
9/278.9 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Paging
Divide physical memory into fixed-sized blocks calledframes. Keep
track of all free frames
Divide logical memory into blocks of same size calledpages
To run a program of sizenpages, need to findnfree frames.
Set up a page table to translate logical to physical addresses
Remove/reduce external fragmentation. Internal fragmentation exists
7/24/2019 1. Memory and Device Management.ppt
10/278.10 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
A!!ress translation
7/24/2019 1. Memory and Device Management.ppt
11/278.11 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Free Frames
Before allocation After allocation
7/24/2019 1. Memory and Device Management.ppt
12/278.12 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
mplementation of Page "able
Page table is kept in main memory
Page-table base register (PTBR)points to the page table
Page-table length register (PRLR)indicates size of the page table
In this scheme every data/instruction access requires two memoryaccesses. One for the page table and one for the data/instruction.
The two memory access problem can be solved by the use of a specialfast-lookup hardware cache calledassociative memoryortranslationlook-aside buffers (TLBs)
7/24/2019 1. Memory and Device Management.ppt
13/278.13 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Paging #ar!ware $it% "&'
7/24/2019 1. Memory and Device Management.ppt
14/278.14 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Performance C%aracteristics of "&'
Typical TLB Size: 8 - 4,096 entries
Hit time: 0.5 - 1 clock cycle
Miss penalty: 10 - 100 clock cycles
Miss rate: 0.01 - 10%
If a TLB hit takes 1 clock cycle, a miss takes 30 clock cycles, and themiss rate is 1%, the effective memory cycle rate for page mapping
1*0.99 + (1+30)X0.01=1.30
1.30 clock cycles per memory access
7/24/2019 1. Memory and Device Management.ppt
15/278.15 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
ffectie Access "ime
Associative Lookup =time unit
Assume memory cycle time is 1 unit of time (e.g. 80-250ns)
Hit ratio percentage of times that a page number is found in the
associative registers; ratio related to number of associative registers
Hit ratio =
Effective Access Time(EAT)
EAT = (1 +)+ (2 +)(1 )= 2 +
7/24/2019 1. Memory and Device Management.ppt
16/278.16 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
S%are! Pages
Shared code One copy of read-only (reentrant) code shared among processes(i.e., text editors, compilers, window systems).
Shared code must appear in same location in the logical address
space of all processes
Private code and data
Each process keeps a separate copy of the code and data
The pages for the private code and data can appear anywhere inthe logical address space
7/24/2019 1. Memory and Device Management.ppt
17/278.17 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
S%are! Pages *ample
7/24/2019 1. Memory and Device Management.ppt
18/278.18 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
#ierarc%ical Page "ables
Motivating example: 32 -bit address space with 4KB per page.
Page table would contain 232/ 212= 1 million entries.
Need a 4MB page table with contiguous space.
4 bytes per entry
Can we divide this page table into smaller pieces?
Break up the logical address space into multiple page tables
A simple technique is a two-level page table
7/24/2019 1. Memory and Device Management.ppt
19/278.19 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
"wo-&eel Page-"able Sc%eme
7/24/2019 1. Memory and Device Management.ppt
20/278.20 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
"wo-&eel Paging *ample
A logical address (on 32-bit machine with 2K page size) is divided into: a page number consisting of 20 bits
a page offset consisting of 12 bits
Since the page table is paged, the page number is further divided into:
a 10-bit page number
a 10-bit page offset
Thus, a logical address is as follows:
wherepiis an index into the outer page table, andp2is the displacement within thepage of the outer page table
page number page offset
pi p2 d
10 10 12
7/24/2019 1. Memory and Device Management.ppt
21/278.21 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
A!!ress-"ranslation Sc%eme
7/24/2019 1. Memory and Device Management.ppt
22/278.22 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Segmentation
Memory-management scheme that supports user view of memory
A program is a collection of segments
A segment is a logical unit such as:
main program
procedure
function
method
object
local variables, global variables
common blockstack
symbol table
arrays
7/24/2019 1. Memory and Device Management.ppt
23/278.23 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
User+s ,iew of a Program
7/24/2019 1. Memory and Device Management.ppt
24/27
8.24 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
&ogical ,iew of Segmentation
1
3
2
4
1
4
2
3
user space physical memory space
7/24/2019 1. Memory and Device Management.ppt
25/27
8.25 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Segmentation Arc%itecture
Logical address consists of a two tuple:
,
Segment table maps two-dimensional physical addresses; eachtable entry has:
base contains the starting physical address where the segments
reside in memory
limit specifies the length of the segment
7/24/2019 1. Memory and Device Management.ppt
26/27
8.26 Silberschatz, Galvin and Gagne 2009Operating System Concepts 8thEdition
Segmentation #ar!ware
7/24/2019 1. Memory and Device Management.ppt
27/27
*ample of Segmentation