Wireless Dimmer Control Using Power Line

Communication

By

Group 001

Dustin Morscheck

Bernard Grégoire

George Wong

Project proposal submitted in partial satisfaction of the requirements for the degree of

Bachelor of Science

in

Electrical and Computer Engineering

in the

Faculty of Engineering

of the

University of Manitoba

Faculty and/or Industry Supervisors:

Dr. Behzad Kordi, P. Eng

Fall 2012

© Copyright Dustin Morscheck, Bernard Grégoire, George Wong, 2012

1

1 Introduction

With increasing amounts of electrical appliances in residential homes, power usage is

becoming a larger concern. Home owners require a more convenient system to monitor power

usage so they can make decisions to use power more efficiently. Since there is already a wired

network in most homes, the power line mains, it is unnecessary to add additional wiring for a

power monitoring system. Therefore, the mains should be used for such a power monitoring and

control system, increasing the convenience for the home owner.

A Power Line Communication System (PLC) superimposes a signal on the mains. Each

PLC unit can send or receive commands and data using this communication channel. The power

usage of a load is monitored by a PLC unit, and the resulting data is sent back to the home owner

over the power lines. The user can then reduce the power going into the load with a dimmer

circuit on the PLC unit.

The PLC system will be designed and simulated using Multisim and MATLAB software.

Hardware testing will be done on breadboards, before the final printed circuit boards (PCBs) are

designed. Three units will be produced in hardware on a PCB with case. Our objective is to

monitor power usage and control the power used in the load remotely from a home owner’s PC.

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2 Specifications and Goals

The following specifications are listed in Table 1. Most residential homes in North

America run on 120VAC RMS, so this will be the assumed source for the PLC system. The

current output will be limited to 5A since this is more than enough to drive several 100W light

bulbs, while still reducing costs and sizes of components. Therefore, the power monitor circuitry

will only need to monitor 600W of power. We conjecture that a one second period between

power monitor output readings and 95% accuracy will be enough for a home owner to identify

overuse of power. The maximum size of the unit is selected to be 15cm x 7cm x 10cm to match

the size of an electrical outlet without being too large. Total harmonic distortion must be below

5% as per the IEEE 519-1992 standard.

Table 1: Power Line Communication System Specifications

Name Description Value

Power Monitor Output

Power usage by household item plugged into the device

0-600W and 1s/frame

Nodes Number of nodes (devices), scalable ≥3Dimmer Voltage Range

Off, 0-120V AC (RMS)

Input Power Run on ordinary household power socket 120V AC (RMS)60Hz15A

Power accuracy Accuracy of load power dissipation measurement

95%

Total Harmonic Distortion

Total harmonic voltage distortion at the device output [1]

≤5%

Current Output Maximum current at the device output 5ASize Maximum size of individual unit 15cm x 7cm x 10cm

3 Design Details

A unit consists of an MPU for control, a PLC modem for inter-nodal reception and

transmission of data through the power line, a dimmer circuit to reduce or increase the power to

the load, a power monitor circuit to monitor how much power is being dissipated in the load, and

a power supply to supply each unit with the correct source voltage. A master unit will have a Wi-

Fi card to connect to the network with a control application, and act as a server to the other units.

3

Figure 1: High Level Architecture

A power supply is needed to supply each unit with the correct supply voltage. A

transformer will step down the voltage which will then be rectified through a bridge rectifier. The

output will be filtered to get an approximately DC source. This source will be regulated to

remove any ripples. Further voltage sources will be obtained through PWM and further filtering

and regulation.

The power through the load will be reduced by a dimmer circuit. The dimmer will use a

PWM in phase and in frequency with the mains to cut out power to the load for a variable period

controlled by the MPU. The pulse will be synchronized with the mains by using a zero crossing

detector, which will trigger a mono-stable 555 timer. The timer will then switch a MOSFET

which is connected to the load through a diode bridge. Due to the low harmonic interference of

the system at high frequencies, a harmonic filter is not required.

The voltage is measured using a bridge rectifier to measure the AC voltage across the

load. A current transformer output is converted to a voltage centered around the voltage input for

current measurement. Multiplication of the voltage and current is done either on the MPU or a

power monitor chip. Depending on what the MPU ADC requires as an input, we might have to

send the power monitor output to a BJT or Op-Amp buffer.

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4 Tasks and Milestones

Table 2 lists the milestones, tasks, and division of labor for the project.

Table 2: Tasks and Milestones

Task Start Date End Date Responsible

Literature Review 6/11/2012 9/6/2012

Filter Design 6/11/2012 9/6/2012 All

Power Supply Design 6/11/2012 9/6/2012 George Wong

USB Protocol 6/11/2012 9/5/2012 Dustin Morscheck

Power Monitor Review 6/11/2012 9/5/2012 Bernard Grégoire

Hardware Design 6/21/2012 11/2/2012

High Level Design 6/21/2012 8/22/2012 All

Power Supply Design 8/23/2012 11/2/2012 George Wong

Power Monitor Design 8/23/2012 10/12/2012 Bernard Grégoire

Dimmer Design 8/23/2012 10/12/2012 Dustin Morscheck

MPU Circuitry 10/12/2012 11/2/2012 Dustin Morscheck

PLC Modem Circuitry 10/12/2012 11/2/2012 Bernard Grégoire

Software Design 11/5/2012 11/23/2012

GUI 11/5/2012 11/23/2012 Bernard Grégoire

Unit to GUI Protocol 11/5/2012 11/23/2012 Dustin Morscheck

Unit Control Code 11/5/2012 11/23/2012 Dustin Morscheck

Software Programming 11/26/2012 12/27/2012

GUI 11/26/2012 12/27/2012 Bernard Grégoire

MPU code 11/26/2012 12/27/2012 Dustin Morscheck

Breadboard Testing 11/5/2012 1/11/2013

Individual Subunits 11/5/2012 12/26/2012 All

All Subunits Together 12/28/2012 1/11/2013 All

PCB Design 1/14/2013 1/31/2013 George Wong

Build and Test 1/14/2013 2/28/2013

Order Parts 1/14/2013 1/31/2013 N/A

Manufacture PCB 1/31/2013 2/7/2013 N/A

Manufacture Case 2/1/2013 2/7/2013 N/A

Assemble Units 2/8/2013 2/13/2013 All

Testing 2/15/2013 2/28/2013 All

5 GANTT Chart

Figure 3 shows the GANTT chart as of September 28, 2012 outlining the schedule for the

project. Tasks are grouped under their respective milestones.

Figure 2: GANTT Chart

5

Budget – Group 001

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6 Budget

The project budget is listed in Table 3. The Programmer is provided by the University of

Manitoba. The Time/Each column states the amount of machine shop time required for various

components. The total budget available for the project is $300.00, so $112.46 is left in case of

design changes.

Table 3: Budget

Component Part Number Quantity Time / Each

Price/Unit Total Cost$ CAD

Microcontroller MicrochipPIC18(L)F46K22

3 4.26 12.78

Power Line Modem

ON SemiAMIS-49587

3 9.64 28.92

Power Line Modem Amplifier

ON Semi NCS5650 3 2.71 8.13

Wifi Card MicrochipMRF24WB0MA

1 31.44 31.44

Power Transformer

Triad Magnetics F348XP

3 7.63 22.89

Programmer Microchip ICD3 1 Available in ECE Tech Shop

-

Timer IC LM555 6 1.19 7.14Bridge Rectifier Rectron DB101 12 0.41 4.92Power MOSFET ST

Microelectronics STF20NF20

6 1.80 10.80

Passive Components

Various - - -

Voltage Regulator

Texas Instruments TLV1117

9 1.22 10.98

Current Transformer

Murata 54050C 3 1.65 4.95

Op Amp LM741 6 0.75 4.50PCB Manufacture CAD drawings will

be completed in advance

3 0.5

Case Manufacture

CAD drawings will be completed in advance

3 1

Shipping and Handling

20.00

Taxes 20.09

Total 4.5 187.54

Approved By______________________________________ Date______________________

7

7 References

[1] IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power

Systems, IEEE Standard 519, 1992.