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VLSIVLSIVLSIVLSIProf. Vojin G. OklobdzijaProf. Vojin G. Oklobdzija
References References (used for creation of the presentation (used for creation of the presentation material):material):
[1] Mead, Conway, “[1] Mead, Conway, “Introduction to VLSI SystemsIntroduction to VLSI Systems”, Addison ”, Addison Wesley Publishing.Wesley Publishing.
[2] Glasser, Dobberpuhl, “[2] Glasser, Dobberpuhl, “The Design and Analysis of VLSI The Design and Analysis of VLSI CircuitsCircuits”, Addison Wesley Publishing.”, Addison Wesley Publishing.
[3] Weste, Eshraghian, “[3] Weste, Eshraghian, “Principles of CMOS VLSI DesignPrinciples of CMOS VLSI Design”, Addison ”, Addison Wesley Publishing.Wesley Publishing.
[4] Shoji, “[4] Shoji, “CMOS Digital Circuits Technology”CMOS Digital Circuits Technology”, Prentice Hall., Prentice Hall.
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Historical OverviewHistorical Overview• nMOS era: 1970-85• Pass-transistor design• CMOS existed early but took off 1985 on• Domino CMOS, 1982
– NORA– DCVSL
• CPL, DPL– DCVS-PG– SRPL– LEAP
• SOI-CMOS
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
3
n-MOS Design Era 1970-85n-MOS Design Era 1970-85
LSI started with nMOS:• pass-transistor design experience:
- Flourished at the beginning of the nMOS era(popularized by Mead-Conway book)- Allows high density layout and compact
design style- Fast: outperforming gate based design- Low in power
• Drawbacks:– Not compatible with existing design tools– Exhibiting testability and reliability
problems
Review of CMOSReview of CMOSReview of CMOSReview of CMOS
Prof. Vojin G. OklobdzijaProf. Vojin G. Oklobdzija
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
5
CMOS BasicsCMOS Basics
A B
Vdd
0
1B
A
10
1 1
1 0
)( A B+
( )BA
Function F and its Dual
Karnaugh Mapof Function F
FF
Vss
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
7
CMOS BasicsCMOS Basics
B A
C
D
A
B C D
1
1 0 0 0
0000
1001
100
( )BA +C+Dcovering zeroes :
( )+D A CB
covering ones :
A
B
D
C
F
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS BasicsCMOS BasicsA complex path example:
VDD
A B
C DE
A
B
C
DE
Output
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS BasicsCMOS BasicsMore complex blocks are realizable in CMOSPrimitive gates:
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Deficiencies:CMOS Deficiencies: Muli-Input NOR Muli-Input NOR function function in CMOS is slowin CMOS is slowVarious remedies:
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Deficiencies and CMOS Deficiencies and RemediesRemedies
A
B
B
A B + BA
A
BA B + BA
XOR Faster, one-levelrealizations of XOR
function
(a) (b)
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Deficiencies and CMOS Deficiencies and RemediesRemedies
AB + BA
A
B
XNOR
AB + BA
Faster, one-levelrealizations of XOR
function
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
13
CMOS BasicCMOS Basic
Inverter Transfer Inverter Transfer function:function:
Logic voltage levels are Logic voltage levels are VVOHOH and V and VOLOL
and Vand VILIL and V and VIHIH
The inverter transfer The inverter transfer function liefunction lie
within the shaded regionwithin the shaded region
VDD
VOH
VIH
Vout
VIL
VOL
0VOL VIL
Vin
VIH VOH VDD
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Inverter CMOS Basic: Inverter CharacteristicCharacteristicp “ON”
n “OFF’’p ”OFF”n ”ON”
VDD
VDD
0.5VDD
0
0 0.5VDD VDD + VtpVtn
AB
C
DE
BOTH p & n “ON”
LeakageLeakageCurrentsCurrents
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Inverter CMOS Basic: Inverter CharacteristicCharacteristic
+ VDD
t
t
0
+ VDD
0.9 VDD
0.1 VDD
VDD
Vin(t) 1T
2TV0(t)
LC
VDD
t
dt
ft rt
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Inverter CMOS Basic: Inverter CharacteristicCharacteristic
Transistors during the Transistors during the transitiontransition
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Inverter CMOS Basic: Inverter SwitchingSwitching
CL
t = 0
VDDp-DEVICE
n-DEVICE
SATURATION :
VO
Ic
CL
VDDp-DEVICE
n-DEVICE
LINEAR :
VO
Ic
CL
t = 0
VDDp-DEVICE
n-DEVICE
SATURATION
VO
Ic
p-DEVICE
n-DEVICE
LINEAR
Rc
CL
VDD
VO
Ic
Rc
inDDO VVV inDDO VVV 0
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Power CMOS Basic: Power • During the static During the static
state there is no state there is no currentcurrent
• Current is only Current is only present during present during transistion:transistion:
- Short circuit current Short circuit current (crow-bar current)(crow-bar current)
- Charging and Charging and discharging of the discharging of the output capacitoroutput capacitor
- Leakage CurrentLeakage Current
t
t
t
VDD
VDD
VDD
0
0
0
V
V
I
tp
tftr
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
19
CMOS Basic: Power CMOS Basic: Power
This is an E=mc2 of low-power designThere are three ways to control power:
- Reducing Power-Supply Voltage (most effective !!)
- Reducing the switching activity k (various ways)
- Reducing CL (technology scaling etc.)
- Reducing the required frequency of operation (?)
PCMOS=kCLV2DDfo
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: Delay CMOS Basic: Delay • Which one of the three designs is the fastest ?• How can we find this out without simulation ?
CL
Case 1
0a
7a
(a)
CL
Case 27a
4a
3a
0a
(b)
CL
Case 3
0a1a
3a2a
5a6a
4a
7a
(c)
Learn about Logical Effort !
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: DelayCMOS Basic: Delay
Cin1 Cin2Cout
DischargeId
Charge:Ic
DischargeId
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: DelayCMOS Basic: Delay
Delay can be approximated with:
RND7Cin1+RNORCin2+RND2Cout
CoutCin1 Cin2
Id Id
Ic
RND7
RNOR
RND2
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: DelayCMOS Basic: DelayDelay of a signal path in CMOS logic is
dependent on:• Fan-in of a gate
– Represented as a resistance of the pull-up/down transistor path of the gate
• Fan-out of a gate– Represented as a capacitive load at the
output
• Number of CMOS blocks in the path.• Wire delay connecting various blocks.
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: DelayCMOS Basic: DelayDelay of a signal path in CMOS logic can be
reduced by:• Making the transistors larger in order to
minimize resistance of a pull-up/down path in the gate
• Making the transistors smaller in order to minimize the capacitive load of each gate
• Reducing the number of CMOS blocks in the path.
• Bringing the blocks closer and/or choosing the less wire intensive topology.– Note that these requirements are often contradictory
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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CMOS Basic: DelayCMOS Basic: Delay• How to estimate delay and critical
timing in CMOS circuits ?• How to determine the proper transistor
sizing in order to make a compromise with contradicting requirements ?
• How to choose the right circuit topology ?
The Answer:“Logical Effort”
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Pass-Transistor DesignPass-Transistor Design
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Pass-Transistor DesignPass-Transistor DesignAnother way of looking at Karnaugh Map: AND function
0 10
1
0 1
B
A
1 0
A
A
B
B
F
F
B B
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Pass-Transistor DesignPass-Transistor Design
Two-variable function
A
A
X
Y
F
X Y F0 0 00 1 A1 01 1 10 B AB01 B1B 0B 1B 0 A+BB 1BB BBB B B
B
B
B
B
B
A
BA
BABA
BABA
BA
BA
BA
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Pass-Transistor DesignPass-Transistor Design“Threshold Voltage Drop” problem:
A
B=Vdd
B
Fmax = Vdd-Vth
A=Vdd
Vth+
-
Cout
Vdd
Vdd
Fmax = Vdd-Vth
Cout
Vth+
-Vth
+
-
Vdd
(a) (b)
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
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Pass-Transistor DesignPass-Transistor Design
Solving the “Threshold Voltage Drop” problem in CMOS:
A=0V
In=VddFmax= Vdd
A=Vdd
Vth+
-
Cout
Vdd
Vdd
Cin
Vth+
-
(a) (b)
+
-Vdd
ON
+Vdd
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
31
Pass-Transistor DesignPass-Transistor Design
Function Generator
A A B B
P0
P1
P2
P3
F(A,B)
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
32
Pass-Transistor DesignPass-Transistor DesignFull 1-bit
AdderA
A
A
S
A
A
S
OC
OC
B B C C
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
33
Pass-Transistor DesignPass-Transistor Design
Compact ALU
Example (IBM PC/RT)Circ. 1984
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
34
Control Lines OutputControl
A - inputs B - inputs
Odd Even Odd Even
Operation K1 K2 Qn A A B B Odd Even
Arithmetic
A+B Add 0 0 0 0 1 1 0 0 1 1 0 0 1
A+B+1 0 0 1 0 1 1 0 0 1 1 0 0 1
A-B Subtract 0 0 1 0 1 1 0 1 0 0 1 0 1
B-A Subtract 0 0 1 1 0 0 1 0 1 1 0 0 1
B+1 Increment 0 0 1 1 1 0 0 0 1 1 0 0 1
+1 2s compl 0 0 1 1 1 0 0 1 0 0 1 0 1
A+1 Increment 0 0 1 0 1 1 0 1 1 0 0 0 1
+1 2s compl 0 0 1 1 0 0 1 1 1 0 0 0 1
Logical
1 1 1 0 0 0 0 0 0 0 0 0 0 0
B 1 1 0 0 0 0 0 0 1 0 1 0 0
1 1 0 0 0 0 0 1 0 1 0 0 0
1 1 0 0 1 0 1 0 1 0 1 0 0
1 1 0 0 1 0 1 1 0 1 0 0 0
1 1 0 1 0 1 0 0 0 0 0 0 0
1 1 0 1 0 1 0 0 1 0 1 0 0
0 1 1 0 0 0 0 0 0 0 0 0 1 1
1 1 0 1 0 1 0 1 0 1 0 1 1
A 1 1 0 1 0 1 0 0 0 0 0 1 1
1 1 0 0 1 0 1 0 1 0 1 1 1
1 1 0 0 1 0 1 1 0 1 0 1 1
1 1 0 1 0 1 0 0 1 0 1 1 1
0 1 0 0 1 0 1 0 1 0 1 1 1
0 1 0 0 1 0 1 1 0 1 0 1 1
0 1 0 1 0 1 0 0 1 0 1 1 1
Fall 2004 Prof. V.G. Oklobdzija: High-Performance System Design
35
Pass-Transistor Pass-Transistor DesignDesign
Compact ALU Example (IBM PC/RT)
A B
K2 A
B
K1
A B K2
IC
OC
OCK2
A
B
f
HV
HV
Carry Generator
Function Generator