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VirtualMemoryProcessAbstraction,Part2:PrivateAddressSpace
Motivation: whynotdirectphysicalmemoryaccess?Address translation withpagesOptimizing translation: translation lookaside bufferExtrabenefits:sharingandprotection
Memoryasacontiguousarrayofbytesisalie!Why?
1
ProblemswithPhysicalAddressing
2
Fineforsmallembeddedsystemswithoutprocesses.Elevators, microwaves, radio-powered devices, …
0:1:
M-1:
Mainmemory
CPU2:3:4:5:6:7:
Physicaladdress(PA)
Data
8: ...
4
Whataboutlargersystems?
Withmanyprocesses?
Problem1:MemoryManagement
3
Mainmemory
Whatgoeswhere?
stackheapcode
globals…
Process1Process2Process3…Processn
×
Also:Contextswitches mustswapoutentirememorycontents.Isn'tthatexpensive?
Problem2:Capacity
4
64-bitaddresses canaddressseveralexabytes
(18,446,744,073,709,551,616bytes)
Physicalmainmemoryoffersafewgigabytes
(e.g.8,589,934,592bytes)
?
1virtualaddressspaceperprocess,withmanyprocesses…
(Actually,it’ssmaller thanthatdotcomparedtovirtualmemory.)
Problem3:Protection
5
Physicalmainmemory
Process i
Process j
Problem4:SharingPhysicalmainmemory
Process i
Process j
Solution: VirtualMemory(addressindirection)
6
Privatevirtualaddressspaceperprocess.
Physicalmemory
Virtualmemory
Virtualmemory
Process1
Processn
virtual-to-physical
mapping
virtualaddresses
physicaladdresses
virtualaddresses
SinglephysicaladdressspacemanagedbyOS/hardware.
Indirection
Directnaming
Indirectnaming
7
"2"
"x" 2
WhatifwemoveThing?
Thing
7
01
2
3
6
5
4WhatXcurrentlymapsto
"2"
"2"
"x""x"
"x"
(it'severywhere!)
Tangent: Indirectioneverywhere• Pointers• Constants• Proceduralabstraction• DomainNameService(DNS)• DynamicHostConfigurationProtocol(DHCP)• Phonenumbers• 911• Callcenters• Snailmailforwarding• …
“Anyproblemincomputersciencecanbesolvedbyaddinganotherlevelofindirection.”–DavidWheeler,inventorofthesubroutine,orButlerLampson
AnotherWheelerquote?"Compatibility meansdeliberately repeatingotherpeople'smistakes."
VirtualAddressingandAddressTranslation
9Physicaladdressesare invisible toprograms.
0:1:
M-1:
Mainmemory
MMU2:3:4:5:6:7:
Physicaladdress(PA)
Data
8: ...
CPUVirtualaddress
(VA)
CPUChip
44100
MemoryManagementUnittranslates virtualaddresstophysicaladdress
Page-basedMapping
PhysicalAddressSpace
PhysicalPage0
PhysicalPage1
…PhysicalPage2p - 1
0
2m - 1
VirtualAddressSpace
VirtualPage0
VirtualPage1
…VirtualPage2v - 1
0
2n - 1
VirtualPage2
VirtualPage3
bothaddressspacesdividedintofixed-size,alignedpagespagesize=poweroftwo
Mapvirtualpagesontophysicalpages.
Somevirtualpagesdonotfit!Wherearetheystored?
Somevirtualpagesdonotfit!Wherearetheystored?
PhysicalMemoryAddressSpace
PhysicalPage0
PhysicalPage1
…PhysicalPage2p - 1
0
2m - 1
VirtualMemoryAddressSpace
VirtualPage0
VirtualPage1
…VirtualPage2v - 1
0
2n - 1
VirtualPage2
VirtualPage3
1.Ondisk (ifused)
2.Nowhere! (ifnotyetused)
virtualaddressspaceusuallymuchlargerthanphysicaladdressspace
VirtualMemory:cachefordisk?
12
DiskMainMemory
L2unifiedcache
L1I-cache
L1D-cache
CPU Reg
2B/cycle8B/cycle16B/cycle 1B/30cyclesThroughput:Latency: 100cycles14cycles3cycles millions
~4MB
32KB
~8GB ~500GB
Examplesystem
Cachemiss penalty(latency):33x
Memorymisspenalty(latency):10,000x
SRAM DRAM
solid-state"flash"or
spinningmagneticplatter.
Notdrawntoscale
DesignforaSlowDisk:ExploitLocality
PhysicalMemoryAddressSpace
PhysicalPage0
PhysicalPage1
…PhysicalPage2p - 1
0
2m - 1
VirtualMemoryAddressSpace
VirtualPage0
VirtualPage1
…VirtualPage2v - 1
0
2n - 1
VirtualPage2
VirtualPage3
ondisk
Fullyassociative• Storeanyvirtualpageinanyphysicalpage• Largemappingfunction
Largepagesizeusually4KB,upto2-4MB
Sophisticatedreplacementpolicy• Notjusthardware Write-back
Associativity?
Pagesize?
Replacementpolicy? Write
policy?
AddressTranslation
15
Whathappensinhere?
0:1:
M-1:
Mainmemory
MMU2:3:4:5:6:7:
Physicaladdress(PA)
Data
8: ...
CPUVirtualaddress
(VA)
CPUChip
44100
PageTablearrayofpagetableentries (PTEs)mappingvirtualpagetowhere itisstored
16
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0
VP2
VP1
PP3
Howmanypagetablesareinthesystem?
null
null
pagetable
01
0
01101
ValidPhysicalPageNumber
ordiskaddress
PTE0
PTE7
Memoryresident,managedbyHW(MMU),OS
VP3
VP6
AddressTranslationwitha PageTable
17
Virtualpagenumber (VPN) Virtualpageoffset (VPO)
Physicalpagenumber (PPN) Physicalpageoffset (PPO)
Virtualaddress (VA)
Physicaladdress (PA)
Valid Physicalpagenumber(PPN)
Pagetablebaseregister
(PTBR)
PagetableBaseaddressofcurrentprocess'spagetable
Virtualpagemappedtophysicalpage?
Ifso:PageHit
Ondisk
PageHit: virtualpageinmemory
18
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0VP1
PP3
OndiskPP2
null
nullPP0PP1
PP3
pagetable
01
0
01101
ValidPhysicalPageNumber
ordiskaddressPTE0
PTE7
Virtual PageNumber
VP2
VP3
VP6
PP1
PP3Ondisk
PageFault:
19
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0VP1
PP3
OndiskPP2
null
nullPP0
pagetable
01
0
01101
ValidPhysicalPageNumber
ordiskaddressPTE0
PTE7
Virtual PageNumber
VP2
VP3
VP6
PP1
PP2
Process
PageFault:exceptionalcontrolflow
Processaccessed virtualaddress inapagethatisnotinphysicalmemory.
20
UserCode OSexceptionhandler
exception:pagefault
Loadpageintomemoryreturn
movl
Returnstofaultinginstruction:movl isexecutedagain!
PP1
PP3Ondisk
PageFault:1. pagenotinmemory
21
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0VP1
PP3
OndiskPP2
null
nullPP0
pagetable
01
0
01101
ValidPhysicalPageNumber
ordiskaddressPTE0
PTE7
Virtual PageNumber
VP2
Whatnow?OShandlesfault
VP3
VP6
null
0 OndiskPP1Ondisk
PP3
PageFault:2. OSevictsanotherpage.
22
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0VP1
PP3
VP3
OndiskPP2
null
pagetable
01
0
0
10
1
ValidPhysicalPageNumber
ordiskaddressPTE0
PTE7
VP6
Virtual PageNumber
VP2
"Pageout"
VP1
PP11
PP3PP0
PageFault:3. OSloadsneededpage.
23
Physicalpages(Physicalmemory)
Swapspace(Disk)
VP7
VP4
PP0
VP2
PP3
OndiskPP2
null
nullOndisk
pagetable
01
0
01
11
ValidPhysicalPageNumber
ordiskaddressPTE0
PTE7
Virtual PageNumber
VP3
VP6
VP1
VP3
Finally:Re-executefaultinginstruction.Pagehit!
"Pagein"
Terminologycontextswitch
Switchcontrolbetweenprocesses onthesameCPU.
pageinMovepageofvirtualmemoryfromdisktophysicalmemory.
pageoutMovepageofvirtualmemoryfromphysicalmemorytodisk.
thrashTotalworkingsetsizeofprocesses islarger thanphysicalmemory.Mosttimeisspentpaginginandoutinsteadofdoinguseful computation.
(Ifindallthesetermsusefulwhentalkingtoothercomputerscientistsaboutmybrain…)
24
swap
AddressTranslation:PageHit
25
1)Processor sendsvirtualaddress toMMU(memorymanagementunit)
2-3)MMUfetchesPTEfrompagetable incache/memory
4)MMUsendsphysicaladdress tocache/memory
5)Cache/memory sendsdatawordtoprocessor
MMU Cache/Memory
PA
Data
CPU VA
CPUChip PTEA
PTE1
2
3
4
5
AddressTranslation:PageFault
26
1)Processor sendsvirtualaddress toMMU2-3)MMUfetchesPTEfrompagetable incache/memory4)Validbitiszero, soMMUtriggerspagefaultexception5)Handler identifies victim(and,ifdirty,pages itouttodisk)6)Handlerpages innewpageandupdatesPTEinmemory7)Handler returns tooriginalprocess, restarting faultinginstruction
MMU Cache/Memory
CPU VA
CPUChip PTEA
PTE1
2
3
4
5
Disk
Pagefaulthandler
Victimpage
Newpage
Exception
6
7
TranslationLookaside Buffer(TLB)SmallhardwarecacheinMMUjustforpagetableentries
e.g.,128or256entries
Muchfasterthanapagetablelookupinmemory.
Intherunningfor"un/classiestnameofathinginCS"
27
Howfastistranslation?Howmanyphysicalmemoryaccessesarerequiredtocompleteonevirtualmemoryaccess?
TLBHit
28
MMU Cache/Memory
PA
Data
CPU VA
CPUChip
PTE
1
2
4
5
ATLBhiteliminatesamemoryaccess
TLB
VPN 3
TLBMiss
29
MMU Cache/MemoryPA
Data
CPU VA
CPUChip
PTE
1
2
5
6
TLB
VPN
4
PTEA3
ATLBmissincursanadditionalmemoryaccess(thePTE)Fortunately,TLBmissesarerare. DoesaTLBmissrequire diskaccess?
SimpleMemorySystemExample(small)
Addressing14-bitvirtualaddresses12-bitphysicaladdressPagesize=64bytes
30
13 12 11 10 9 8 7 6 5 4 3 2 1 0
11 10 9 8 7 6 5 4 3 2 1 0
VPO
PPOPPN
VPN
VirtualPageNumber VirtualPageOffset
PhysicalPageNumber PhysicalPageOffset
Simulateaccessing thesevirtualaddresses onthesystem:0x03D4, 0x0B8F, 0x0020
SimpleMemorySystemPageTableOnlyshowingfirst16entries(outof256=28)
Whataboutarealaddressspace?Readmoreinthebook…
31
10D0F1110E12D0D0–0C0–0B1090A1170911308
ValidPPNVPN
0–070–06116050–0410203133020–0112800
ValidPPNVPN
virtualpage#___ TLBindex___ TLBtag____ TLBHit?__PageFault?__physicalpage#:____
SimpleMemorySystemTLB
16entries4-wayassociative
32
13 12 11 10 9 8 7 6 5 4 3 2 1 0
virtualpageoffsetvirtualpagenumber
TLBindexTLBtag
0–021340A10D030–073
0–030–060–080–022
0–0A0–040–0212D031
102070–0010D090–030
ValidPPNTagValidPPNTagValidPPNTagValidPPNTagSet
TLBignorespageoffset. Why?
virtualpage#___ TLBindex___ TLBtag____ TLBHit?__PageFault?__physicalpage#:____
SimpleMemorySystemCache
16lines4-byteblocksizePhysicallyaddressedDirectmapped
33
11 10 9 8 7 6 5 4 3 2 1 0
physicalpageoffsetphysicalpagenumber
cacheoffsetcacheindexcachetag
03DFC2111167––––03161DF0723610D5
098F6D431324––––03630804020011B2––––0151112311991190B3B2B1B0ValidTagIdx
––––014FD31B7783113E15349604116D
––––012C––––00BB3BDA159312DA––––02D98951003A1248B3B2B1B0ValidTagIdx
cacheoffset___ cacheindex___ cachetag____ Hit?__Byte:____
SimpleaddressspaceallocationProcessneedsprivatecontiguous addressspace.
Storageofvirtualpagesinphysicalpagesisfullyassociative.
40
0
N-1
VP1VP2...
0
N-1
VP1VP2...
PP2
PP6
PP8
...
0
M-1
PP9
Process1:PhysicalAddressSpace(DRAM)
Process2:
VirtualAddressSpaces
Simplecachedaccesstostorage>memoryGoodlocality,orleast"small"workingset=mostlypagehits
Ifcombinedworkingset>physicalmemory:Thrashing: Performance meltdown.CPUalwayswaitingorpaging.
Fullindirectionquote:“Everyproblemincomputer sciencecanbesolvedbyaddinganother levelofindirection,butthatusuallywillcreateanotherproblem.”
41
Allnecessarypagetableentries
fitinTLB
Workingsetpagesfitinphysicalmemory
FreebiesProtection:
Allaccesses gothrough translation.Impossible toaccessphysicalmemorynotmappedinvirtualaddress space.
Sharing:Mapvirtualpages inseparate address spaces tosamephysicalpage (PP6).
42
Process1:PhysicalAddressSpace(DRAM)
0
N-1(e.g.,execute-onlylibrarycode:libc)
Process2:
VP1VP2...
0
N-1
VP1VP2...
PP2
PP6
PP8
...
0
M-1
VirtualAddressSpaces
Memorypermissions
43
Process1: PhysicalPageNumWRITE EXECPP6NoNoPP4No YesPP2Yes
Process2:
No
READYes
NoYes
WRITE EXECPP9Yes NoPP6NoNoPP11Yes No
READ
YesNo
VP0:VP1:VP2:
VP0:VP1:VP2:
PhysicalAddressSpace
PP2
PP4
PP6
PP8PP9
PP11
YesYesYes
YesYesYes
Valid
Valid PhysicalPageNum
permissionbits
PageTable
PageTable
permissionbits
MMUchecksoneveryaccess.Exception ifnotallowed.
Yes
Howwouldyousetpermissions forthestack,heap,globalvariables, literals, code?
Summary:VirtualMemoryProgrammer’sviewofvirtualmemory
Eachprocesshasitsownprivate linearaddress spaceCannotbecorrupted byotherprocesses
SystemviewofvirtualmemoryUsesmemoryefficiently (due tolocality)bycachingvirtualmemorypagesSimplifiesmemorymanagementandsharingSimplifiesprotection -- easytointerpose andcheckpermissionsMoregoodies:
• Memory-mapped files• Cheap fork()withcopy-on-write pages (COW)
45
Summary:MemoryHierarchy
L1/L2/L3Cache:PureHardwarePurelyanoptimization"Invisible" toprogramandOS,nodirectcontrolProgrammer cannotcontrolcaching,canwritecodethatfitswell
VirtualMemory:Software-HardwareCo-designSupportsprocesses, memorymanagementOperatingSystem(software)manages themapping
AllocatesphysicalmemoryMaintainspagetables,permissions,metadataHandlesexceptions
MemoryManagement Unit(hardware) does translationandchecksTranslates virtualaddresses viapagetables,enforces permissionsTLBcachesthemapping
Programmer cannotcontrolmapping,cancontrolsharing/protection viaOS46