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University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

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Page 1: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell

State Machines

Page 2: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 2

Another look at D latch/flip-flop

qold D qnew

0 0 0

0 1 1

1 0 0

1 1 1

qnew = D

This is an example of a state diagrammore specifically a Moore machine

Page 3: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 3

Synchronous state machines

If a system can both process and store information, then thevalues stored in the memory elements depend on both theinputs and the previous values in these elements. This iscalled a sequential system.

Such a system is also calleda finite-state machine (FSM).

If all changes to memoryvalues happen at the sametime as determined by aglobal system clock, wehave a synchronous FSM.

Page 4: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 4

FSM definitionAn FSM has the following components:

• A set of states• A set of inputs• A set of outputs• A state-transition function (of the states and inputs)• An output function (of the states and maybe inputs)

• Moore machine - function of states only• Mealy machine - function of states and inputs

This can be represented by a state diagram• States are circles• Arcs show the state transition function• Arcs are labeled with input values• Outputs are labels on states (Moore) or arcs (Mealy)

Page 5: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 5

Another example - 2-bit counter

Counter starts at 0 (green) and incrementseach time the clock cycles, until it gets to3 and then overflows back to 0.

Only input is the clock, we don’t showthat.

Hold Lold Hnew Lnew

0 0 0 1

0 1 1 0

1 0 1 1

1 1 0 0

Page 6: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 6

2-bit counter

Hold Lold Hnew Lnew

0 0 0 1

0 1 1 0

1 0 1 1

1 1 0 0

Hnew = Hold’Lold + HoldLold’

Lnew = Hold’Lold’ + HoldLold’ = Lold’

Page 7: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 7

2-bit counter with reset

R Hold Lold Hnew Lnew

0 0 0 0 1

0 0 1 1 0

0 1 0 1 1

0 1 1 0 0

1 x x 0 0

Lnew = R’Hold’Lold’ + R’HoldLold’ = R’Lold’ = (R + Lold)’

Hnew = R’Hold’Lold + R’HoldLold’ = R’(Hold’Lold + HoldLold’)

Page 8: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 8

2-bit counter with reset

Page 9: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 9

Counter with 7-segment display

Each segment in the display can be lit independentlyto allow all 10 decimal digits to be displayed (also hex)

2-bit counter will need to display digits 0-3,so will output a 1 for each segment to be litfor a given state

Page 10: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 10

Counter with output functions

R Ho Lo Hn Ln A B C D E F G

0 0 0 0 1 1 1 1 1 1 1 0

0 0 1 1 0 0 1 1 0 0 0 0

0 1 0 1 1 1 1 0 1 1 0 1

0 1 1 0 0 1 1 1 1 0 0 1

1 x x 0 0 0 0 0 0 0 0 0

A = D = R’Ho’Lo’+R’HoLo’+R’HoLo = R’(Ho’Lo)’

B = R’ C = R’(HoLo’)’ E = R’Lo’

F = R’Ho’Lo’ = (R+Ho+Lo)’ G = R’Ho

Page 11: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 11

7-segment output logic

Page 12: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 12

Example - 101 lock

Combination lock with 101being the combination B Ho Lo Hn Ln X

0 0 0 0 0 0

0 0 1 1 0 0

0 1 0 0 0 0

0 1 1 0 0 1

1 0 0 0 0 0

1 0 1 0 1 0

1 1 0 1 1 1

1 1 1 0 1 0B is input signal to the lock,X is output signal to unlock

Page 13: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 13

101 combination lock

Hn = B’Ho’Lo + BHoLo’

Ln = BHo’Lo + BHoLo’ + BHoLo

= BHo’Lo + BHoLo + BHoLo’ + BHoLo

= BLo + BHo

X = HoLo

Page 14: University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell State Machines

University of Texas at Austin CS310 - Computer Organization Spring 2009 Don Fussell 14

LC-3 datapath