Embed Size (px)
Citation preview
BOARD SIZE = 400MM X 366.7MM
B
G3
P4
S6
G2
G4
SHEET39 = VOLTAGE REGULATORS - AREA 4SHEET40 = VOLTAGE REGULATORS - AREA 5SHEET41 = 51R DISCRETE FPGA/RAM TERMINATIONS
S2
P3S4S3
SHEET1 = THIS SHEETSHEET2 = JI/JTAG/I2C/MISC
SHEET4 = TTCRXSHEET5 = 3 X 12 CHANNEL RXSHEET6 = FPGA1 ROCKETS + PROM1SHEET7 = FPGA2 ROCKETS + PROM2SHEET8 = FPGA3 ROCKETS + PROM3SHEET9 = FPGA4 ROCKETS + PROM4SHEET10 = FPGA5 ROCKETS + PROM5SHEET11 = FPGA1 BANKS 0/1/4 + 5 = RAM CONTROL
SHEET17 = FPGA3 BANKS 0/1/4 + 5 = RAM CONTROL
SHEET20 = FPGA4 BANKS 0/1/4 + 5 = RAM CONTROL
SHEET26 = RAMS 1-4 (FPGA1)SHEET27 = RAMS 1-9 (FPGA2)SHEET28 = RAMS 1-9 (FPGA3)SHEET29 = RAMS 1-9 (FPGA4)SHEET30 = RAMS 1-9 (FPGA5)SHEET31 = 4 X TXRX (AGILENT)SHEET32 = QUAD GBESHEET33 = GLUE CARD
SHEET36 = VOLTAGE REGULATORS - AREA 1
SHEET38 = VOLTAGE REGULATORS - AREA 3SHEET37 = VOLTAGE REGULATORS - AREA 2
S1
P1G1
T
P2
S5
SHEET34 = CREDIT CARD PC
1
SHEET3 = USB - ETH + XTAL OSC
SHEET12 = FPGA1 BANKS 2/3 = TTCRX/USB/ETH
SHEET15 = FPGA2 BANKS 2/3 = RAM 7-9 CONTROL
SCHEMATIC LISTING
BO
AR
DB
UIL
D
PROPAGATION DELAY
SHEET13 = FPGA1 BANKS 6/7 = RAM 1-4 CONTROLSHEET14 = FPGA2 BANKS 0/1/4 + 5 = RAMCONTROL
SHEET16 = FPGA2 BANKS 6/7 = RAM 1-6 CONTROL
SHEET18 = FPGA3 BANKS 2/3 = RAM 7-9 CONTROLSHEET19 = FPGA3 BANKS 6/7 = RAM 1-6 CONTROL
SHEET21 = FPGA4 BANKS 2/3 = RAM 7-9 CONTROLSHEET22 = FPGA4 BANKS 6/7 = RAM 1-6 CONTROLSHEET23 = FPGA5 BANKS 0/1/4 + 5 = RAM CONTROLSHEET24 = FPGA5 BANKS 2/3 = RAM 7-9 CONTROLSHEET25 = FPGA5 BANKS 6/7 = RAM 1-6 CONTROL
INTERNAL = 68.37 PS/CM
SHEET35 = CLOCKS - SYSTEM=80.440MHZ - REFERENCE=80.157MHZ
TOP/BOTTOM = 54.46 PS/CM
100R GAP INTERNAL = 7.00 MIL = 0.1778MM100R TRACK INTERNAL = 4.25 MIL = 0.1080MM100R GAP TOP/BOTTOM = 8.30 MIL = 0.2108MM100R TRACK TOP/BOTTOM = 4.50 MIL = 0.1143MM
50R INTERNAL = 5.50 MIL = 0.1397MM50R TOP/BOTTOM = 6.00 MIL = 0.1524MM
TRACK - GAP
TOP/BOTTOM CALCULATED IMPEDANCE = 51R2/100R1INTERNAL CALCULATED IMPEDANCE = 50R7/100R4
Thu Dec 07 16:09:36 2006
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2DRAWING
200MS
GC
GBE
CCPC
J1/JTAG/I2C/RESET/CONFIG
JTAG
3V3
2
UPDOWN
3V3
3V3
JOINED AT PCBJ1 PINS
NOT USED
GC
R155 CAN BE INCREASED IN VALUE TO
ACT AS RC NOISE FILTER WITH C225
3 X GROUND CONNECTIONS
Fri Dec 08 09:25:15 2006
4
R155
5V
100N
C22
6
3
3K3
5
4XGBE_RST*
MRESET*
8
3
7
6
1
2
U50
C22
510
0N
2
16
2
1 R15
4
U5
0R
JTAG_RST*
GBE_TMS16
14
3
C1706 C1707100N4U7
321
6
5
7
U70
R22
9
8
4
SCL
4
61
2
35
U90
100N10
0N
4U91
C32
3
R151
0R
1K2
R14
6
1
U48 100N
C22
9
R14
5
DONE1
PROG214
U60
C365
100APROM1_TCK
PROM2_TCK
PROG4
B27
G2
A15
B22C22
C9
3
5
3K3
C22
4
R7
FH2
FH1
R6 R4
3K3
R15
2
3K3R26
710
K
R26
310
K
EX
T_TM
S
EX
T_TD
I
10KR18610KR18510KR184
R26
4
R10
55
R26
5
R21
910
K
3
62
1
5
7
R9
R2
R8 R1
15
FPGA_CONFIG
8
100N
8
21
21
D1
8
72
5
5
4U51R
153
C92
3
4
810
6
975312
PL1
8
4
3
7
6
1
2
8
4
U3
C367
C366
C4
SW1
20
10
3
5
7
9
19
17
15
13
11
12
14
18
1
8
6
4
20
10
5
7
9
19
17
15
13
11
12
18
1
8
6
4
2
U58
5 4
3
1
SW2 R5R3 C84
3
7
5
6
1
2
U4
54
1
SW3
C22
20
10
3
5
7
9
19
17
13
11
12
16
18
1
6
4
2
U6
LED
1
6
54
3
21
SW8
SW7
C11
03
C11
00
61
2
35
12
9
7
4
16
8
151
13
10
6
3
14
11
5
2
U59
4
61
2
35
U92
G1
C9
C8
C7
C6
C5
C4
C32
C31
C30
C3
C29
C28
C27
C26
C25
C24
C23
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B32
B31
B30
B3
B29
B28
B26
B25
B24
B23
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A32
A31
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A14
A13
A12
A11
A10
A1100A
200A20A
2AD5VIN
0A5
D3V3IN
15A
12A
GBERST*
100N
2K2
100N
SDA
PROM5_TCK
TTC
TTC_TCK
3K3
3K3
GC_TCK3
GC_TMS3
TTC
10K
GC_TDO3
100N
TTC_TMS
PROM4_TMS
FPG1_SCLRST*
PROM1_TMS
1K0
TCK
PROM1_TDI
GC_SCL
3K3
100N
100N
51R
51R
PROM2_TMS
PROM3_TMS
GBE_TDO
3K3
GC_TDI3
GC_RST3*
PROG5
100N
TMS
EXT_TDO
3K3
100N
PROM5_TMS
CRATE_RESET*
FPGA_POR*
PROG3
FPG1_SDA
GC_SDA
100N
GC_CONFIG*
3K3
100N
PROM3_TCK
270R
EX
T_TC
K
3K3
100A
PROG1
PROM4_TCK
GBE_TCK
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
PBNORTAH
EDC
A
D3V3
DGND
D3V3
74LVC244A
VCC
1Y2
GND
1Y1
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
1A1
1OE*
1A4
2A1
2A2
2OE*
2A3
2A4
1A3
1A2
KA
TMP100
V+
GND
SCLSDA
ADD0ADD1
DGND
D3V3
TMP100
V+
GND
SCLSDA
ADD0ADD1
157A
B2
A3B3
A4B4
B/A*G*
GND
VCC
Y1
Y4
A2
B1A1
Y2
Y3
D3V3
DGND
A-5V
AGND DGND256x8
2K
24LC
024S
T
WP
SCL
SDA
VCC
A1A2
A0
VSS
DGND
AGND
A2A1
D3V3
A5V
DGND
018M
OP
IN-
IN+
NC GND
VCC
DGND
G125
VCC
2Y
GND
1Y
OE*
2A
OE*
1A
D3V3
DGND
DGND
TPS3838
CT
GND
VDD
RST*MR*
D3V3
D3V3
TMP100
V+
GND
SCLSDA
ADD0ADD1
DGND
JTAGHDR
TDI GND
GND
GND
GND
GND3V3
TDOTCKTMS
G125
VCC
2Y
GND
1Y
OE*
2A
OE*
1A
G125
VCC
2Y
GND
1Y
OE*
2A
OE*
1A
D48V
D5V
74LVC244A
VCC
1Y2
GND
1Y1
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
1A1
1OE*
1A4
2A1
2A2
2OE*
2A3
2A4
1A3
1A2
74LVC244A
VCC
1Y2
GND
1Y1
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
1A1
1OE*
1A4
2A1
2A2
2OE*
2A3
2A4
1A3
1A2
PBNORTAH
E DC
A
G125
VCC
2Y
GND
1Y
OE*
2A
OE*
1A
PCBJ1
A30
M2.5
C30
A31
B29 C29
B30
M2.5
A27
B1
C18
B9 C9
A10 B10 C10
A11
A8 C8
A9
C13
C23
C17
B3
C1
C2
C3
C4
C5
C6
C7
C11
C12
C14
C15
C16
C19
C20
C21
C22
C24
C25
C26
C27
C28
C31
C32
B19
B32
A15 B15
A12
B31
B28
B27
B26
B24
B25
B23
B22
B21
B20
B18
B17
B16
B14
B13
B12
B11
A14
B5
B2
B4
B6
B7
B8
A1
A3
A21
A22
A17
A16
A32
A29
A28
A26
A25
A24
A23
A20
A19
A18
A13
A7
A6
A4
A5
A2
3
USB - ETH
R1005 DO NOT FIT ?
Fri Dec 08 11:24:21 2006
2
CMOS
25MHZU39
L204
RDCT
11
GREENLED
XOPL91
ETHADDR2
R399
100N
USBD-
VBUS
P2_1
270R
P1_4
MANAGEMENT_DATA_I/O
100N
ETHRESET*
MANAGEMENT_DATA_CLOCK
RED
RXDATA0
270R
4U7
P1_1
RED
P0_3P0_2
1K0
MANAGEMENT_DISABLE
330P
TPFINTPFIP
ETHADDR3
ETHADDR4
POWERDOWN
PAUSE
TXDATA0
22K1
P2_0
TXDATA1
RD+
RD-
RX_DATA_VALID
6N8
???
270R
TD+
TD-
ETHVCCD
ETHVCCA\G
TDCT
TXDATA2
CONFIG2
RXDATA3
RXDATA2
RXDATA1
RXERROR
RXCLOCK
TXCLOCK
P2_3
CONFIG1
CARRIER_SENSE
???
100N
P1_3
P1_0
100N
4U7
330P
10K
P1_2
P0_1
ETHADDR1
P2_2
4U7
USBD+
120R
TXSLEW0
TXSLEW1
TXENABLE
TXERROR
ETHADDR0
SLEEP
25MHZ
???
TXDATA3
P1_5P1_6
C2DC2CK
P0_4
P0_0
P1_7
CONFIG3
120R
YELLOWLED
COLLISION_DETECTED
270R
SK2
1
23
45
67
8
9 10
12
13 14
E1E2F2F1G1
B1 C1
B2A2
E6F7F8
E7D3
A1D8
H8E8
C2
B6A7A5A8B8C8D6
G2
H7
F5 G5
H5
H4
H3
H2
C5
B4B5A4C4B3A3
D1D2
A6
U44
4
5
212827
252423
2221201918171615
14131211
109
8
6
7
SK13
2
11
C205
L202 L203
1 3
4
C582
C572
C571
SW4
SW5
1
2
3
4
C574 C566
LED
26
PL51
3
5
7
9
2
4
6
8
10
F1_USBRST*
USB3V3
P0_7P0_6P0_5
26
4
1
C215100N
R14
4
C210
C212
10RR397
LED
27
R40
5
R13
1
R14
3
C211 C213
100N
R10
56
R10
57
C170510N
C170410N
R1005
R408
C204
R13
2
C5844U7
C563100N
C5834U7
C565100N
4U7
1K0R396
1K0
MANAGEMENT_DATA_INTERRUPT
U40
H6G6
F6H1
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
LXT971A
VCCI
O
VCCA
ADDR<2>
RXD<1>
CRS
MDINT*
MDIO
RXD<3>
COL
LED/CFG2
LED/CFG3
TXSLEW1
TXSLEW0
TX_EN
TX_ER
TXD<2>
TXD<1>
TXD<0>
TXD<3>
ADDR<0>
RESET*
MDC
MDDIS
ADDR<1>
ADDR<3>
ADDR<4>
SD/TP*
TDI
TDO
TMS
TRS
T*
TCK
RX_CLK
RX_DV
RX_ER
RXD<2>
PWRDWN
CLKI
SLEEP
PAUSE
CLKO
TPFIP
N/C
GND
RB
IAS
TPFONTPFIN
TPFOP
TX_CLK
RXD<0>
LED/CFG1
VCCD
4
875
3
6
1
TX-
TERMTERMTERMTERM
2
TX+
RX+J0035
RX-
TD-
RK
RDCT
RD-
TD+
TDCT
LKLA
RA
SHIELD
CHS
RD+
D3V3
5B
4B
3B
2B
1B
5A
4A
3A
2A
1A
DGNDDGNDDGND
AK
AK
DGND
SPNO C
D
A
B
OPENVDD
GND
DGND
DGND
DGND
DGNDDGNDDGNDDGND
DGND
D5V
USB4PVBUS
D-
CASEGND
D+
C8051F321
TXRXUSB
P2.0P2.1P2.2P2.3
P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7
P0.0
P0.2/XTAL1P0.1
P0.4P0.3/XTAL2
P0.5P0.6/CNVSTR
P0.7/VREFVIN
VOUT
VBUS
D+
GND
D-
RST*/C2CKP3.0/C2D
D3V3
D3V3
TTCRX
NORMAL OPERATION = FIT R354/R356 - NO FIT R348
USE DIRECT - NOT BUFFERED
BYPASS = FIT R348 - NO FIT R354/R356
DO NOT FIT C306/C209/C320/C321
4
3V3?
PIN+ACACG12
CLKL1ACC
Fri Dec 08 11:44:30 2006
TTCTDO_GBETDI
U69
C320
J7
SINERRSTR
DOUT1U46
R37
1
TTCRDYSERBCHAN
DBERRSTR
DQ3
B9A9
PIN+AC
C470
100N
K4
U717
6
2
3
TTC_TCK
F5TDO_TTCTDI
G2
R36
7
R36
5
100N100N
C476
100NF5
C487
3V3
C457
C488
C468
C304100N
100N
100R
R236
C324100N
C31
7
C321
100N
BUFPIN+
BUFPIN-
100K
H4
J6
100R
100R
100R
C1D3E5
J1
TTCRST_B
100K
100K
R348
R356
R354
GBE SCLSDA
R220
C306
C309
R238
R35
5
R37
4
R36
3
R36
4
R35
8
R37
2R
373
R36
9
R37
0
R237
R36
6
C307
C308
L201
C31
6
C325
C305
C478
D2
F6D8A8C9
E7E8
E9
J2H3
C2
J8
J3
K1
M2
G1
F1
L9
K8
D7C7A7B7
A6
C4B4A4D5C5B5C6B6
C12
F8
F12
H11
K12D10
K9K11J10J11D11D12
L8
M9
H6L4L5M5J5
L6M6K6G7M7L7
100K
100K
100K
100K
100K
100K
10K
BCNT2
BCNT6BCNT7
0R
SUBADDR5SUBADDR6
SUBADDR3SUBADDR2
BCNT4BCNT3
BCNT1
GBE
TTC_RST*
TTC_TMS
10N
PIN+DC
PIN-ACAC
BRCST3
PIN-DC
10N
10N
PIN-AC
100N
4U7
100R
100N
4U7
SUBADDR7
???
SUBADDR4
DOUT0
3V3
DOUT7
CLK40DES1
EVCNTLSTR
DOUT5
BRCSTSTR2
DOUT6
BRCST4
L1ACC
BRCST2
EVCNTRESBCNTRES
DQ0DQ1
BCNT10
DOUT2
EVCNTHSTR
TTCAVDD\G
BRCST5
CLK40DES2
100N
CLK40
BCNT5
BCNT9
BCNT0
BCNT11
DOUTSTR
SUBADDR1
DQ2
DOUT3DOUT4
SUBADDR0
BCNT8
BCNTSTR
0R
BRCSTSTR1
4U7
100R
3V3
0R
3V3
BRCST6BRCST7
0R
10N
100N
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
JTA
GP
RO
MI2
C
TTCRXFBGA
PIN
AVDDDVDDCDVDD
DOUT0
IN -
CLK40DES1CLK40DES2
CLKL1ACC
BCNT5BCNT4
RST_B
GND
SUBADDR2SUBADDR1SUBADDR0
SUBADDR3
BRCSTSTR2BRCSTSTR1
DOUT5DOUT4
SUBADDR4
SUBADDR6SUBADDR7
DOUT1DOUT2DOUT3
DOUT6DOUT7
BRCST6
BRCST3
BCNTSTREVCNTLSTR
BCNT1BCNT2
TTCRDY
DBERRSTRSINERRSTR
EVCNTHSTR
BCNT6
BCNT11BCNT10
BCNT9BCNT8BCNT7
BCNT3
DQ2DQ3
DQ1DQ0
DOUTSTR
BCNTRES
IN +
SUBADDR5
CLK40
L1ACC
BRCST7
BRCST5BRCST4
BRCST2
EVCNTRES
VDD
NCGGNDDGND DGNDC
BCNT0
SERBCHAN
SDASCL
DATA
CLKRST
TCK
RST
TDI
TDO
TMS
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
TRR1B43
VCC
+
NCGND
DGND
DGND
DGND
DRAWING
D3V3
DGND
DGND DGNDDGND
D3V3D3V3
D5V
3 X 12 CHANNEL RX
5
TP FPGA4
FPGA2TP
FPGA3TP
Fri Dec 08 15:53:06 2006
VCCRX1\G
470R
LED3
R10
16
R10
17
470R
C14U7
1K0
R10
30
R10
25
R10
26
LED7
RED
21*
100R
C124U7
R15R14
C7100N
C7 RX22-
R10
24
470R
470R
470R
R10
38
R10
36
RX35-RX34+
D8
PL3
RXBENSDRXBENRXBSQUEN
F10
RXB
RED
14*
RX20+RX21-B6
R10
19
470R
RXCSQUENRXCENRXCENSD
RXAENRXAENSD
100N4U7
VCCRX2\G
RED
0*
RX2-
470R
RED
8*
RED
4*
RX4+
RX11+
RX15-
RED
30*
RED
34*
RX6+RX6-
RED
3*
RED
2*
RED
5*
RED
6*
RED
7*
470R
470R
RED
11*
RED
31*
RED
32*
RED
33*
3V3
RX7+
6N8
100N
RXA
RX5-
RX0+RX0-
RX3+
RX2+
0R
RX4-
4U73V3
RX23+
RED
35*
RX30-RX29+
0RRXC_SD
RXB_SD
0R
470R
RX11-
RX8-RX8+
RX7-
RX9-0R
100N
0R0R
RX15+
RX16+RX17-
RX19+RX19-
RED
12*
RX12-
RED
13*
470R
RED
10*
RED
16*
470R
RED
9*
RX33+RX33-
RX32-RX31+
RX26-
RX25-
RX24-
VCCRX3\G
RX29-
RX27-
RX25+
RX13-RX13+RX14-
RX20-
RED
17*
RED
19*
RED
22*
RED
23*
RX28+
RED
28*
RED
27*
RX27+RX28-
RX30+
RX26+
RX12+
RX18+
RX23-RX22+
RX24+
RX32+
RX31-
RED
25*
RED
26*
RED
29*
RED
18*
RX21+
RED
15*
RX14+
RX16-
RX17+RX18-
RX35+
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
470R
RXC
1K0
6N8
100R
1UH
4U7
6N8
470R
1K0
0R 0R0R0R0R
1UH
470R
RED
20*
RED
24*
470R
RXA_SD
470R
G7G8
C7C6
F7
G4
F3F4E2E3D4D5C3C4B2B3B6
H9J9
H7
K10
G10H10
E10
J10
F10
L4
C13C10 C5
C2
L2
R12
C11 C14
L5
R13
G7G8
C6D8D7
F6F7E5E6G4G5F3F4E2E3D4D5C3C4B2B3
B5
H9J9
H7
K10
G10H10
E10
J10
C6
L3 L6
PL4
G7G8
C7C6
D7
F6F7E5E6G4G5F3F4E2E3D4D5C3C4B2B3B6B5
H9J9
H7
K10
G10H10
E10
J10
F10
LED5
LED8LED6LED9
LED14 LED10 LED12
R99
6
R99
3
R99
0R
991
R99
4
R99
7
R99
2
R99
5
R99
8
470R
LED4LED2RX5+
RXASQUEN
L1100R
RX9+B5
1UH
R11R10
R10
08
R10
07
R10
09
R10
11
R10
10
R10
12
R10
14
R10
13
R10
15
R10
18
RED
1*
RX10-RX10+
D8D7
100N
F6 RX1-RX1+
E5E6
PL2RX3-
G5
R999
R10
21
R10
23
R10
22
R10
27
R10
28
R10
29
R10
20
R10
33
R10
31
R10
32
R10
34
R10
37
R10
42
R10
40
R10
41
LED11
R10
39
470R
470R
R10
35
RX34-
0R
R1000
R1001
C34U7 C15
100N
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
D3V3
D3V3
D3V3
2V5E4
2V5E3
2V5E2
AGND
AGND
AGND
R R RR R RR R RR R R
R R R R R R R R R R R R
R R R R R R R R R R R R
AGND
MRX9512
VCCVPP
ENSDRXEN
2+2-
9-9+
10-
NIC
TMSTDI
TRST*TDO
TCK
SQUEN*
GND UNC
SD
3-
4-
5-
1-
0-
4+
3+
1+
0+
8+
6-
7-7+8-
10+
11+11-
5+
6+
AGND
AGND
MRX9512
VCCVPP
ENSDRXEN
2+2-
9-9+
10-
NIC
TMSTDI
TRST*TDO
TCK
SQUEN*
GND UNC
SD
3-
4-
5-
1-
0-
4+
3+
1+
0+
8+
6-
7-7+8-
10+
11+11-
5+
6+
AGND
AGND
AGND
MRX9512
VCCVPP
ENSDRXEN
2+2-
9-9+
10-
NIC
TMSTDI
TRST*TDO
TCK
SQUEN*
GND UNC
SD
3-
4-
5-
1-
0-
4+
3+
1+
0+
8+
6-
7-7+8-
10+
11+11-
5+
6+
JTAG BYPASS BOTH = FIT R337 - NO FIT R332/R333/R334/R335/R336JTAG BYPASS FPGA1 = FIT R333/R336 - NO FIT R332/R334/R335/R337JTAG BYPASS PROM1 = FIT R332/R335 - NO FIT R333/R334/R336/R337
TO SYSTEM RESET
27.28.29
FPGA1 CORE-RKT I/O-CONF.PROM1
3.4.5
15.16.17
GB2
6.7.8
6
GB1
GB3
9.10.1112.13.14
0.1.2
3V3
OK
30.31.32
24.25.26
33.34.35
GB4
21.22.23
3V3
NORMAL OPERATION = FIT R332/R334/R336 - NO FIT R333/R335/R337
18.19.20
Fri Dec 08 15:44:23 2006
PROG1
K25K26
0RR335
FPGA_MODE
AF26
AE25
AF9
XC2VP50
R332
RX21.22.23-
A33
RX12.13.14-
100N
C545
CNT21.22.23+
CNT21.22.23-
A32
1V7
RX21.22.23+
3K3
RX18.19.20+
RX18.19.20-
RIO 4
F1TDO_P2TDI
???
???
???
???
X2Y1
C541
100N
R333
P1T
DO
_F1T
DI
C5
G4
100N
100N
1V5
U45
2V5
CNT33.34.35-
AN13
L186
L189
???
B31 B32B33B30
C30
A30
B16B17B15B14
C15
A17A14
AN4AN5AN3AN2
AM5
AP5AP2
AN20AN21AN19AN18
AP18 AP21
AM20
???
L166
2V5
AP20
GB1OUT+GB1IN+
AP19
1V7 2V5
GB1OUT-
AN24AN25AN23AN22
AP25AP22
AM23
C52
8
C52
7
4U7
10N
10N
10N
100N10N
C49
1
LED
28
RED
100N
C47
4
C49
4
C40
0
C39
910
0N
100N
100N
L141
C40
5
1V8
B3B4
C381
C44
6
R26
9
L150
???
100N
PROM1
10N
10N
PROM1_D0
100N
100N
100N
SW
ITC
HC
LOS
ED
=M
AS
TE
RS
ER
IAL
100N
INIT1
100R
100N
???
100N
100N
???
???
???
100N
???
100N
???
4U7
???
???
???
???
???
100N
???
???
100N
???
???
???
100N
???
???
???
100N
???
100N
???
???
???
???
4U7
???
???
100N
100N
100N
100N
100N
100N
???
???
100N
100N
100N
???
4U7
10N
100N
10N
10N
100N
100N
100N
100R
PROM1_TDI
???
3K3
???
10N
0R
RED
SW
ITC
HO
PE
N=
BO
UN
DA
RY
SC
AN
0R
100N
0R
2V5 3V3
100N
???
???
???
10N
CCLK1
0R
DONE1
???
???
???
SW6
PROM5
C1
D2
D1
C2
H6H5E5D5
B5A5A6
H4
A3
H3
E6
H2
R31
3
L128
L144
L127
L135
L151
L152
L136
L190
L174
L175
L191
L182
L167
L183
L145
L129
L154
L153
L137
L173
L172
L181
L165
L164
L180
L147
L131
L171
L170
L179
L163
L162
L178
L142
L158
L157
L133
L149
L134
L184
L168
L169
L185
L176
L160
L161
L177
C55
6
C55
9
C52
6
C52
9
C47
3
C376C377
C543 C404 C418
C412C406C537
C547 C414
C416C410C549
C557C395
R336
R334
C55
0
C54
8
C54
6
C54
4
C54
2
C54
0
C53
8
C53
6
C41
9
C41
7
C41
5
C41
3
C41
1
C40
9
C40
7
R33
8
R31
1
R337
3K3
R28
9
100N
L143
L138
C535
C51
0
C50
9
100N
100N
100N
3K3
LED
29
R26
8
C55
8
C43
0
C42
9
3K3
R31
2
C51
7
C51
9
C44
7
C51
8
C44
8
R33
9
???
???
???
???
???
???
???
???
???
???
???
???
???
???
???
???
C408
L187
???
L156
L140
???
C539
L148
L132
2V51V7
RIO 6
2V5
2V5
RIO 11
X1Y1
X4Y0
1V7
X5Y0
2V5
X6Y0
2V5 2V5 2V5
X7Y0
X0Y0
2V5
RIO 18
RIO 17
2V5
2V5
2V5
RIO 16
X2Y0
RIO 20
RIO 19
2V5
2V5
2V5
2V51V72V5
2V5 1V7
2V51V7
2V5
RIO 14
X4Y1
1V72V5
1V72V5
2V52V51V7
2V51V72V52V5
2V5
2V5
2V52V51V7
X3Y0
2V5
RIO 2
X7Y1
2V5
2V5
RIO 21
X1Y0
X0Y1
2V5
1V7 2V5
2V5
2V5
2V5
X3Y1
FPGA1
X5Y1
1V7
2V5
2V5
RIO 23
RIO 5
A3
AP3
AP7
AP11
AP15
A31
AP23
AP27
AP31
A27
A23
A19
A15
A11
A7
H7
A4
AP4
AP8
AP12
AP16
AP24
AP28
AP32
A28
A24
A20
A16
A12
A8
X6Y1
2V5
2V5
1V7 2V5
H28
AE26
J9
K10
G27
J26
G8
AE10
AE9
K9
A18 A21
C20
B18 B21 B20
A2 A5
C5
B4B5B3B2
AM15
AP17AP14
AN16AN17AN15AN14B19
AM30
AN30 AN31 AN33 AN32
AP30 AP33
AP26 AP29
AM27
AN26 AN27 AN29 AN28
AM12
AP13
AN10 AN11 AN12
C8
A6 A9
B6 B7 B9 B8
C23
A22 A25
B22 B23 B25 B24
C27
B26 B27 B29 B28
A29
C12
A10 A13
B10 B11 B13 B12
AM8
AP6 AP9
AN6 AN7
CNT6.7.8+
CNT6.7.8-
CNT0.1.2+
CNT0.1.2-
CNT30.31.32-
GB4OUT+
RX30.31.32+
RX30.31.32-
CNT30.31.32+ RX27.28.29+
RX27.28.29-
CNT27.28.29+
CNT27.28.29-
GB2IN-
GB2IN+ GB2OUT+
GB2OUT- RX0.1.2-
RX0.1.2+
RX15.16.17+
RX15.16.17-
CNT15.16.17+
RX24.25.26+
RX24.25.26-
CNT24.25.26+
CNT24.25.26- GB1IN-
RX6.7.8+
RX6.7.8-GB3OUT-
GB3IN+
GB3IN-CNT33.34.35+RX33.34.35+
CNT3.4.5-RX3.4.5-
RX3.4.5+
CNT18.19.20+
CNT18.19.20-
RX12.13.14+ CNT12.13.14+
CNT12.13.14-
GB4IN- GB4OUT- RX9.10.11-
RX9.10.11+
CNT9.10.11-
CNT9.10.11+
CNT3.4.5+
CNT15.16.17-
???
AN9 AN8
GB3OUT+
1V72V5
L139
L155
2V5
RIO 8
GB4IN+
AP10RIO 9
RX33.34.35-
L146
???
10N
L188
RIO 7
L130
2V5
A26
3K3
100N
0R
G1
E2PROM1_TMS
PROM1_TCK
G3
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
1V8A1
D3V3
AGND AGND
1V7A1
AGND
AGND
2V5E1
AGND AGND
AGND AGND
AGND AGND
AGND AGND
D3V3
AGND AGNDAGNDAGND
AGNDAGND
XCF32PFLASH PROM
VCCJ
TDI
D7
D2
D0
DNC
CEO*
TDO
REVSEL1
BUSY
CE*CCLK
CF*
D5
D3D4
D1
REVSEL0
GND
VCCINT
D6
CCLKOUT
OERST*
EXTSEL*
TCK
TMS
VCCO
2V5D12V5C11V7A1
1V7A1
1V7A1
1V7A1 2V5D1
2V5D1
2V5D12V5C1
2V5C1
2V5C1
AGND
2V5E1
2V5E1
DGND
DGNDDGNDDGND
DGND
DGND
AGND
GND
DONE
HSWAP
VCC
VCC
TX+
VCCINT VCCAUX
M2
VTRXVCC
GND
TCK
DXP
VTRXVCC
M0
PROG
PWRDWNRSVD
VBATT
CCLK
VCC
TX-
VTTXVCC VTRX VCC
VCC
TX+
VTTX
TX-GND
VTRXVCC
RX+
RX-
VCCVTTXVTRX
TX-GND
VCC
RX+
RX-
TX+
VTTXVTRX
TX-GND
RX+
RX-
VCC
TX+
VTTXVTRX
TX-GND
RX-
RX-
RX+
GND
TX+
VCC
RX-
RX+
GNDTX-
VTRX VTTX VCC
TX+
RX-
RX+
VCC
GNDTX-
VTRX VTTX
TX+
RX-
RX+
VCC VTRX
GND
VTTX VCC
VCCVTTX
TX+
TX-GND
VTRXVCC
RX+
RX-TX-
TX+
VCCVTTX
GNDRX-
RX+
TX-
VTTX VCCVTRX
GND
VCC
RX+
RX-
TX+
VTTXVTRX
RX-
VTTXVCC VTRXVCCVTTX
RX+
RX-TX-
TX+
GND
VCCVTRX
RX+
RX-
TX+
TX-GND
VCCVCCVTTXVCC VTRX
RX+
RX-TX-
RX+
RX-
VCC
RX+
RX+ TX+
M1
TDI
TMS
TDO
VTTX
DXN
TX+
GND
VCC
VCC
TX-
GND
VCC
TX-
TX+
TX-
TX+
1V5A1
AK
AK
AGND
AGND
AGND
AGNDAGNDAGND
AGNDAGND
AGNDAGNDAGND
AGNDAGNDAGNDAGND
JTAG BYPASS BOTH = FIT R575 - NO FIT R571/R572/R573/R574/R576JTAG BYPASS FPGA2 = FIT R572/R576 - NO FIT R571/R573/R574/R575JTAG BYPASS PROM2 = FIT R571/R574 - NO FIT R572/R573/R575/R576
FPGA2 CORE-RKT I/O-CONF.PROM2
3V3
6.7.8
7
9.10.11
NORMAL OPERATION = FIT R571/R573/R576 - NO FIT R572/R574/R575
0.1.28 10 1
7 11
6 92
3V3
OK
0
Fri Dec 08 15:37:26 2006
RED
0R
H28
XC2VP40
R575
R576
G4
C13
39
C52
C82
2
H3
E2
PROM2_TCK
PROM2_TMS
G1
C1F1TDO_P2TDI
1V8
H4
FPGA_MODE
C14
19
100N
100N
F2TDO_P3TDI
C82
5
4U7
100N
RX1-R1-
R1+
???
???
L71
L72
C138
???
???
100N
C13
41
100N
C13
40
100N
C13
70
C44
L25
L26
C50
100N
R10+
100N
4U7
C13
71
C13
18
R8+
R8-
???
???
RX10+
C46RX7+
RX11+100N
0R
PROG2
3V3
PROM2
100N
RX11-
10N
100N
INIT2
3K3
100N
10N
10N
10N
2V5
CNT9.10.11-
100N
100N
RX8+
RX8-
RX6.7.8+
CNT9.10.11+
RX6.7.8-
RX9.10.11+
RX9.10.11-
RX1+
RX0+
RX9-
RX9+
100N
100N
100N
100N
100N
10N
100N
4U7
10N
100R
100N
10N
10N
PROM2_D0
3K3
3K3
RX0-
0R
100N
3K3
0R
LED
18
C43
PROM1
R55
8
R53
0
R54
6
R53
1
R55
9
L8 L7 L64
L63
L65
L60
L29
L23
L67
L68
L56
L55
L57
L58
C79
2
C13
19
C12
82
C12
94
C14
10
C77
5
C78
1
C803C767C768
R572
R574
C45
C49
C51
C137
R55
0R
570
RX2-RX6+
C14
32
C11
86
10N
4U7
100N
3K3
A6
E5
D2
E6
B4B3
D1
B5
D5C5
H5
G3
A5
C2
A3
C13
94
DONE2
100N
100N
100N10N
10N
10N
RED
100R
0R
R571
RX7-C10
63
C11
70
C11
63
C10
60
C10
28
C10
62
C10
61
C98
9
C11
71
C12
22
C11
62
C12
27
LED
22
RX2+
100N
H6
RX6-
R573
P2T
DO
_F2T
DI
H2L3
0
0R
L24
100N
C47
???
???
???
??? ??
?
C48
100N
100N
C94
C103
100N
C104
100N
C53
100N
100N
C54
C93
C91100N
100NC92
C80
8
100N
C81
0
100N
C80
7
100N
100N
100N
100N
C13
38
C13
44
T9.10.11+
T9.10.11-
R9.10.11-
R9+R2+
R2-
R6+
R6-
CCLK2
R9-
R9.10.11+
C13
4510
0N
100N
100N
C82
0
100N
C80
9
C82
110
0N
???
???
???
?????
?
C95
C96
T6.7.8-
T6.7.8+
C97
100N
R6.7.8-
C81
2
C81
1
100N
C98
L59
L62
L61
???
???
???
???
C135
100N
C136R7-
R7+R11+
R11-
???
???
C81
8
100N
C81
5
C82
6
100N
L66
CNT0.1.2+
CNT0.1.2- RX0.1.2-
RX0.1.2+
???
???
???
???
100N
C101
C102
100N
R0.1.2+
R0.1.2-
T0.1.2+
T0.1.2-
C99
100N
C100
100N
C81
7
100N
C81
910
0NC
814
100N
CNT6.7.8+
R6.7.8+
100N
CNT6.7.8-
L28
L27
R0-
R0+
X2Y1
RIO 2
(RIO 5)
RIO 6
1V5
X0Y1
RIO 14
RIO 21
X0Y0
RIO 19
RIO 16
X1Y0
X1Y1
RIO 23RIO 11
(RIO 17)
(RIO 20)
X2Y0X5Y0
X3Y0X5Y1
X4Y1
RIO 18
RIO 9
RIO 42V5
FPGA2
X4Y0
RIO 7
AP13
A8
A13
A11 A12
B13
A10K9
B23
B22
A16
AN24
AN25
AM23
AN23
AN22
AP23
AP22
AP7
A23
C23
AP10
AP11
AN11
AP12 AP27 AP28
AP5
AP4
A17
AP32
AP17
AP16A4
A5A21
A19
AP8
H7
B11
AN13
AN12
AM12
AN10
A27
A32
A20
A33
B12
B25
B24
A25A22
AP25
AP24
AP9
A24
A29
AE10
AE9
K26K25
G27G8
AF9
J26
J9
K10
AE25AE26AF26
C20
B18 B19 B21 B20
A2
C5
B4B5B3B2
A3
AP14
AM15
AN14 AN15 AN17 AN16
AP15
AM30
AP30
AP31
AP33
AN30 AN31 AN33 AN32
A18
AP29AP26
AM27
AN26 AN27 AN29 AN28
AP6
AM8
AN6 AN7 AN9 AN8
C27
B26 B27 B29 B28
A26
C30
B30 B31 B33 B32
A30
A31
A14
A15
C15
B14 B15 B17 B16
AM5
AN2 AN3 AN5 AN4
AP2
AP3
AM20
AP18 AP21
AP19 AP20
AN18 AN19 AN21 AN20
A6
A7
C8
RX10-
???
B6 B7 B9 B8
C13
42
100N
C81
3
100N
A9
100N
C13
43
A28
???
C12
B10
???
???
L70
L69
100N
C82
3
100N
C13
72
100N
L10 L9
100N
C13
73
X3Y1
(RIO 8)
U15
R10-
100N
C81
610
0N
100N
100N
100N
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
1V8A2
AGND
AGND
AGND
AGNDAGND
AGND
AGND AGND
AGND
D3V3
AGND
AGND
RX+
TX-
VTTX
TX-
VCCVTTX
NC
TX-
NC
NC
VTTX
RX+
NC
VCC
RX-
VCC
NC
GND
NC
CCLK
NC
GND
NC
TX-
RX-TX-
TX+
VCCVTTXVTRXVCCVCCVTTXVCC
TX+RX+
VTTXVTRXVCC
GND
VCC
RX+
RX-
VTRX
VCC VTRX VCC VTTX VCC
NC
NC
NCNC
NC
VCC
VCCAUX
TDO
TMS
TDI
M2M1
TX+
RX-
RX+
GNDTX- RX-
RX+
GNDTX-
TX+ RX+
VTRX
TX+
TX- RX-
VTRX VTTX VCC VTRXVCC
GNDTX-
TX+
VCCVTTX
RX-
VCC
TX-
RX+
RX- GND
TX+
TX- RX-
RX+
VCC VTRX
GND
TX+
VTTX VCC
VCC
TX+
TX-GND
VTRXVCC
RX+
RX-
NC
NC
NC
NC
VCCVTTXVTRX
RX+
RX-NC
NC
VTRX
TX+
RX-
RX+
VCC
GND
VTRX VTTX VCC
NC
NC
NC NC
NC
NC NC
GND
DXPHSWAP
DXNRSVDPWRDWN
PROG DONE
TX+
NC NC
TCK
VBATT
M0
VCCINT
NC
NC
NC
GND
GND
NCNC
NC
NC
TX+
NC
AGND
AGNDAGND
XCF32PFLASH PROM
VCCJ
TDI
D7
D2
D0
DNC
CEO*
TDO
REVSEL1
BUSY
CE*CCLK
CF*
D5
D3D4
D1
REVSEL0
GND
VCCINT
D6
CCLKOUT
OERST*
EXTSEL*
TCK
TMS
VCCO
2V5D22V5C21V7A2
1V7A2
1V7A2
1V7A22V5D2
2V5D2
2V5D22V5C2
2V5C2
2V5C2
2V5E2
2V5E2
2V5E2
DGND
DGNDDGNDDGND
DGND
DGND
1V5A2
AK
AK
AGND
AGND
AGND
AGNDAGNDAGND
AGNDAGNDAGND
AGND
AGNDAGND
3V3
FPGA3 CORE-RKT I/O-CONF.PROM3
8
JTAG BYPASS PROM2 = FIT R578/R581 - NO FIT R579/R580/R582/R583JTAG BYPASS FPGA2 = FIT R579/R583 - NO FIT R578/R580/R581/R582JTAG BYPASS BOTH = FIT R582 - NO FIT R578/R579/R580/R581/R583
5 23 20 21.22.23
18.19.2021
3V3
OK
18
3.4.522193
NORMAL OPERATION = FIT R578/R580/R583 - NO FIT R579/R581/R582
4
Mon Dec 11 12:15:55 2006
H2
0R
R55
1
A11
???
L35
L36
???
X0Y1
3K3
P3T
DO
_F3T
DI
100N
C84
6
100N
C112
100N
C111
C109
C110
100N
???
L79
L80
???
???
???
???
L74
C105100N
100NC84
1
100N
C107
C108
100NCNT21.22.23-
C106
L73
L75
L76
L85
L86
L37
L38
C66 C144
???
???
C83
9
100N
C13
49
100N
100N
C13
51
C13
52
C13
46
???
???
???
???
E2
H3
1V8
R583PROM3_TMS
PROM3_TCK
FPGA_MODE
C10
67
C11
65
C10
64
C11
72
C99
2
C10
29
C10
66
C11
64
C12
23
C11
73
C12
2910
N
0R
R582
0R
R581
LED
19
10N
R53
2
R53
3
100R
R54
7
100N
RX3-
RX4-
100N
F3TDO_P4TDI
C57RX4+
F2TDO_P3TDI 0R
PROG3
100N
100N
100N
RED
100N
RX5+
100N
RX18+
100N
CNT18.19.20-
100N
RX3.4.5+
RX3.4.5-
RX18.19.20+
RX18.19.20-
RX21.22.23+
RX21.22.23-
CNT3.4.5+
100N
100N
100N
100N
100N
10N
4U7
4U7
10N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
RX22+
100N
100N
RX19-
RX20+
CNT21.22.23+
100N
2V5
3K3
100N
100N
RX20-
CNT3.4.5-
RX18-
RX5-
100N
100N
100N
3V3
PROM3
100N
3K3
100N
100N
100N
100N
INIT3
RX21-
RED
100N
DONE3
100N
RX23+
100N
10N
100N
LED
23
PROM2
L12
L11
L87
L31
L32
C79
4
C12
83
C14
33
C13
96
C14
12
C14
22
C77
6
C78
4
C804C769C770
C13
77
C84
3
R578
R580
C59
C61
C63
C65
C147
C145
C143
C13
48
C13
74
C84
2
C84
5
C83
1
C82
7
C13
50
C13
76
C84
0
C83
2
C82
8
C82
9
C83
8
C83
4
C83
0
PROM3_D0
RX23-
100N
C55
100N
G1
A6
E5
H6
D2
E6
G4
C1
B4B3
D1
B5
D5C5
H5
G3
A5
C2
A3
H4
L77
???
???
???
L78
CNT18.19.20+
100N
C64
100N
RX21+
C10
65
100N
100N
0R
C13
53
100N
C83
310
0N
3K3
C58
L14
L13
C13
47
100N
???
???
C146
L88
C83
7
100N
???
B25
RIO 7
X2Y0
X3Y0
X4Y0
X5Y0X3Y1
X4Y1
X5Y1
RIO 18
RIO 9
(RIO 8)
X1Y0
RIO 14
RIO 4
RIO 19
X0Y0
RIO 23
FPGA3
2V5
(RIO 5)RIO 21
(RIO 17)
RIO 11
X1Y1
RIO 16(RIO 20)
RIO 6
1V5
U16
X2Y1
XC2VP40
AP9
AP24
AP25
A22 A25
B12
A9
A33
A20
AN10
AM12
AN12
AN13
B11
H7
AP8
A21 A5
A4 AP16
AP17
AP32
A17
AP4
AP5
AP12
AN11
AP11
AP10
C23
A23
AP22
AP23
AN22
AN23
AM23
AN25
AN24
A16
B22
B23
K9
AF26
A10
B13
A12
A13
C12
A8
AP13
A24
B24
AE25AE26
J9
K10
H28
K26K25
G27
J26
AF9G8
A18
A19
B18 B19 B20B21
C20
A2
A3
C5
B2 B3 B5 B4
AP14
AP15
AM15
AN14 AN15 AN17 AN16
AP31
AP30 AP33
AM30
AN30 AN31 AN32AN33
AP29
AP28
AP26
AP27
AM27
AN26 AN27 AN29 AN28
A6
A7
B6 B7 B9 B8
C8
AE9
AE10
C27
A26
A27
B26 B27 B29 B28
AM8
AN7 AN9 AN8
R21-
R21+
R18.19.20-R18.19.20+
T18.19.20-T18.19.20+
T21.22.23+T21.22.23-R21.22.23-
R20+R23+
R23-
R5+
R5-
R4-
R4+
CCLK3
R20-
R21.22.23+
AN6
???
AP6
AP7
R18+
R18-
L84
L83
L81
L82
AM20
AP21
AP20
T3.4.5+
T3.4.5-
AP18
AP19C141
100N
100N
100N
C140
C139
100N
R3.4.5+
R3.4.5-C142
AN18 AN19 AN21 AN20
???
???
???
???
L90
L89
C148
AM5
C83
5
4U7
C83
6
100N
???
???
AN2 AN3 AN5 AN4
AP2
AP3
R22+
R22-
L34
L33
C62
C15
R19+
A14
A15
R19-
B14 B15 B17 B16
???
???
C56
B30 B31 B33 B32
A30
R3+
R3-
C13
75
100N
4U7
C13
21
???
???
RX3+
RIO 2
A32
RX19+ RX22-
100N
B10
A29
A28
C30
A31
100N
10N
10N
10N
C13
22
10N
10N
10N
C11
87
C12
97
100N
R56
010
0R
10N
R56
1
R57
7
3K3
0R
R579
C60
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2DRAWING
1V8A3
AGND
AGND
AGND
AGND
AGND
AGND
AGND AGND
AGND
D3V3
AGND
AGND
RX+
TX-
VTTX
TX-
VCCVTTX
NC
TX-
NC
NC
VTTX
RX+
NC
VCC
RX-
VCC
NC
GND
NC
CCLK
NC
GND
NC
TX-
RX-TX-
TX+
VCCVTTXVTRXVCCVCCVTTXVCC
TX+RX+
VTTXVTRXVCC
GND
VCC
RX+
RX-
VTRX
VCC VTRX VCC VTTX VCC
NC
NC
NCNC
NC
VCC
VCCAUX
TDO
TMS
TDI
M2M1
TX+
RX-
RX+
GNDTX- RX-
RX+
GNDTX-
TX+ RX+
VTRX
TX+
TX- RX-
VTRX VTTX VCC VTRXVCC
GNDTX-
TX+
VCCVTTX
RX-
VCC
TX-
RX+
RX- GND
TX+
TX- RX-
RX+
VCC VTRX
GND
TX+
VTTX VCC
VCC
TX+
TX-GND
VTRXVCC
RX+
RX-
NC
NC
NC
NC
VCCVTTXVTRX
RX+
RX-NC
NC
VTRX
TX+
RX-
RX+
VCC
GND
VTRX VTTX VCC
NC
NC
NC NC
NC
NC NC
GND
DXPHSWAP
DXNRSVDPWRDWN
PROG DONE
TX+
NC NC
TCK
VBATT
M0
VCCINT
NC
NC
NC
GND
GND
NCNC
NC
NC
TX+
NC
AGND
AGNDAGND
XCF32PFLASH PROM
VCCJ
TDI
D7
D2
D0
DNC
CEO*
TDO
REVSEL1
BUSY
CE*CCLK
CF*
D5
D3D4
D1
REVSEL0
GND
VCCINT
D6
CCLKOUT
OERST*
EXTSEL*
TCK
TMS
VCCO
2V5D32V5C31V7A3
1V7A3
1V7A3
1V7A32V5D3
2V5D3
2V5D32V5C3
2V5C3
2V5C3
2V5E3
2V5E3
2V5E3
DGND
DGNDDGNDDGND
DGND
DGND
1V5A3
AK
AK
AGND
AGND
AGND
AGNDAGNDAGND
AGNDAGNDAGND
AGND
AGNDAGND
NORMAL OPERATION = FIT R585/R587/R590 - NO FIT R586/R588/R589JTAG BYPASS PROM2 = FIT R585/R588 - NO FIT R586/R587/R589/R590JTAG BYPASS FPGA2 = FIT R586/R590 - NO FIT R585/R587/R588/R589JTAG BYPASS BOTH = FIT R589 - NO FIT R585/R586/R587/R588/R590 FPGA4 CORE-RKT I/O-CONF.PROM4
3V3
9
30.31.32
15.16.17
12.13.14
17
1612
13
35
153314
3V3
OK
34
Mon Dec 11 14:22:50 2006
C11
67
XC2VP40
F4TDO_P5TDI
100N
C70
R13+
A27
100NC
1284
C79
5
(RIO 5)
RX16+
RX35-
C85
7
L106
L105
CNT12.13.14-
AN18
L101
L10210
0N
C84
7
AN4
C86
5
C86
2
A15
RIO 7
X3Y1A14
X0Y1
RIO 2
???
L16
100N
4U7
C13
79
C13
24
???
B32B33B31B30
R12+
R12-
A30
A31
C30
C68
100N
C13
57
???
???
B16B17B15B14
R16+
R16-T12.13.14-
R30.31.32+
R15-
R13-
R14-
R14+
R33-
R33+ R15+
R30.31.32- T30.31.32-T30.31.32+
R34+
R34-R12.13.14-R12.13.14+ T12.13.14+
T15.16.17+T15.16.17-
R15.16.17+R15.16.17-
R35+
R35-
R17-
R17+
FPGA_MODE
C15
AP3
AP2
AN5AN3AN2
AM5
AN20AN21AN19
AP20
AP21AP18
AP19
AM20
AN8AN9AN7AN6
AM8
AP7
AP6A26
B28B29B27B26
C27
A7
A6
B8B9B7B6
C8
AN28AN29AN27AN26
AP28
AP29
AP27
AP26
AM27
AP31
AP30
AN32AN33AN31AN30
AM30
AN16AN17AN15AN14
AP14
AP15
AM15
A3
A2
B4B5B3B2
C5
B19 B20
A19
A18
B21B18
C20
AE9
AE10
G8
J26
AF9
G27
K25K26
J9
K10
H28
AE25
A29
A24
AP9
AP24
AP25
A22 A25
B24
B25
B12
A9
A33
A20
A32
AN10
AM12
AN12
AN13
B11
H7
AE26
AP8
A21 A5
A4 AP16
AP17 AP33
AP32
A17
AP4
AP5
AP12
AN11
AP11
AP10
C23
A23
A28
AP22
AP23
AN22
AN23
AM23
AN25
AN24
A16
B22
B23
K9
AF26
B10
A10
B13
A12A11
A13
C12
A8
AP13(RIO 17)
(RIO 8)
RIO 14
RIO 23RIO 18
RIO 19
RIO 21
X1Y0
RIO 16(RIO 20)
RIO 11
X1Y1
X5Y1
X4Y1
X5Y0
X4Y0
X3Y0
X2Y0
X0Y0
RIO 4
RIO 9
1V5 2V5
FPGA4
RIO 6
U17
X2Y1
100N
C73
100N
C74
100N
C85
3
C13
58
L41
L42
100N
C85
64U
7
C85
5
???
???
L107
L108
C152
100N
C86
1
???
???
???
???
C122
100N
C124
100N
C123
C85
1
C121
L100
L99
100N
100N
100N
RX34+
RX34-
RX33-
RX35+
100N
RX15+
RX17-
RX17+
RX16-
100N
100N
100N
100N 10
0N
100N
100N
100N
100N
100N 10
0N
100N
100R
100N
100N
CNT15.16.17-
CNT15.16.17+
CNT30.31.32-
RX12.13.14+
RX30.31.32+
RX12.13.14-
CNT30.31.32+
CNT12.13.14+
RX13+
RX13-
RX15.16.17+
RX15.16.17-
RX30.31.32-
100N
10N
10N
10N
100N
100N
100N
100N
100N
4U7
10N
100N
100N
100N
100N
100N
100N
2V5 3V3
RX15-
100N
100N
RX12-
RX12+
100N
100N
1V8
100N
100N
10N
3K3
100N
PROG4
0RF3TDO_P4TDI
0R
0R
100N
0R
RED
4U7
100N
3K3
3K3
100N
DONE4CCLK4
3K3
3K3
PROM40R
RX14+
100N
INIT4
RX14-
C67
PROM3
R56
2
R53
4
R53
5
R56
3
L15
C151
C69 C149
C71 C77
C13
00
C11
88
C805C771C772
R590
R588
R587 R586
R585
R589
R58
4R
552
PROM4_D0
100N
RX33+
C125
R54
8
100N
0R
C75
LED
20
100R
10N
10N
10N
10N
10N
10N
10N
C14
57
C13
25
RED
C10
69
C11
75
C12
31
C10
70
C10
30
C11
66
C12
24
C99
5
C10
68
C11
74
C10
71
C77
7
C78
7
C14
24
C14
14
C13
98
LED
24
A6
E5
H6
D2
E6
G4
B4B3
D1
B5
D5C5
H5
G3
A5
C2
A3
H4
PROM4_TCK
PROM4_TMS H3
E2G1
C1
P4T
DO
_F4T
DIH2
C72
100N
L40
L39
???
???
C84
9
C86
0
C78
L46
L45
100N
C13
55
C13
61
100N
???
???
C126
L104
L103
???
???
C85
9
100N
100N
C115
C116
100N
100N
C114
C113
???
???
???
???
C86
6
100N
C85
4
C85
0
L94
L93
L91
L92
L96
L95
L97
L98
C13
56
C13
80
C119
100N
C120
100N
100N
C118
C117100N
???
???
???
???
C86
3
100N
100N
C85
210
0N
C84
8
C13
54
C13
78
L44
L43
C76
???
???
C13
59
100N
L18
L17
???
???
C13
81
100N
C13
60
C85
8
???
???
C150
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
AGND
AGNDAGND
1V8A4
AGND
AGND
AGND
AGND AGND
AGND
D3V3
AGND
AGND
RX+
TX-
VTTX
TX-
VCCVTTX
NC
TX-
NC
NC
VTTX
RX+
NC
VCC
RX-
VCC
NC
GND
NC
CCLK
NC
GND
NC
TX-
RX-TX-
TX+
VCCVTTXVTRXVCCVCCVTTXVCC
TX+RX+
VTTXVTRXVCC
GND
VCC
RX+
RX-
VTRX
VCC VTRX VCC VTTX VCC
NC
NC
NCNC
NC
VCC
VCCAUX
TDO
TMS
TDI
M2M1
TX+
RX-
RX+
GNDTX- RX-
RX+
GNDTX-
TX+ RX+
VTRX
TX+
TX- RX-
VTRX VTTX VCC VTRXVCC
GNDTX-
TX+
VCCVTTX
RX-
VCC
TX-
RX+
RX- GND
TX+
TX- RX-
RX+
VCC VTRX
GND
TX+
VTTX VCC
VCC
TX+
TX-GND
VTRXVCC
RX+
RX-
NC
NC
NC
NC
VCCVTTXVTRX
RX+
RX-NC
NC
VTRX
TX+
RX-
RX+
VCC
GND
VTRX VTTX VCC
NC
NC
NC NC
NC
NC NC
GND
DXPHSWAP
DXNRSVDPWRDWN
PROG DONE
TX+
NC NC
TCK
VBATT
M0
VCCINT
NC
NC
NC
GND
GND
NCNC
NC
NC
TX+
NC
AGND
AGNDAGND
XCF32PFLASH PROM
VCCJ
TDI
D7
D2
D0
DNC
CEO*
TDO
REVSEL1
BUSY
CE*CCLK
CF*
D5
D3D4
D1
REVSEL0
GND
VCCINT
D6
CCLKOUT
OERST*
EXTSEL*
TCK
TMS
VCCO
2V5D42V5C41V7A4
1V7A4
1V7A4
1V7A42V5D4
2V5D4
2V5D42V5C4
2V5C4
2V5C4
2V5E4
2V5E4
2V5E4
DGND
DGNDDGNDDGND
DGND
DGND
1V5A4
AK
AK
AGND
AGND
AGND
AGNDAGNDAGND
AGNDAGNDAGND
AGND
AGNDAGND
JTAG BYPASS BOTH = FIT R596 - NO FIT R592/R593/R594/R595/R597JTAG BYPASS FPGA2 = FIT R593/R597 - NO FIT R592/R594/R595/R596JTAG BYPASS PROM2 = FIT R592/R595 - NO FIT R593/R594/R596/R597NORMAL OPERATION = FIT R592/R594/R597 - NO FIT R593/R595/R596
3V3
10
FPGA5 CORE-RKT I/O-CONF.PROM5
3V3
OK
24 33.34.35
27.28.2927
31 26
24.25.26283025
2932
Mon Dec 11 15:32:28 2006
???
???
B18
A20
C13
84
100N
C13
64
100N
AP16 CNT33.34.35+C129
CNT33.34.35-
100N
CNT27.28.29-
CNT27.28.29+AP12
(RIO 17)AP10
AN13
A24
B24
B25
B11
C15
RX28+
100N
B14
C13
67
100N
C13
854U
7
C13
27
???
???
B32B33B31B30
R30-
R30+
A31
A30
C30
C80
R25+
R25-
???
???
B16B17B15
A14
A15
L50
L49
C88
0
C86
9
C86
AN4AN5AN3AN2
???
???
100N
C87
64U
7
C87
5
R28-
R28+
AP3
AP2
AM5
C162
C87
3
C88
5
L126
L125
AN20AN21AN19AN18
100N
C88
1
C87
1
C86
7
???
???
???
???
R24.25.26-
AP19
AP18
L117
R24.25.26+T24.25.26-
R33.34.35+
R24-
R31+
R31-
R32-
R32+
R29-
R29+ R24+
R33.34.35- T33.34.35-T33.34.35+
T24.25.26+
T27.28.29+T27.28.29-
R27.28.29+R27.28.29-
R27+
R27-
R26-
R26+
FPGA_MODE
AP20
AP21
AM20
AN8AN9AN7AN6
AP6
AP7
AM8
B28B29B27B26
A27
A26
C27
A7
A6
B8B9B6 B7
C8
AN28AN29AN27AN26
AP28
AP29
AP27
AP26
AM27
AP32
AP33
AN32AN33AN31AN30
AP31
AP30
AM30
AN16AN17AN15AN14
AP15
AP14
AM15
A3
A2
B4B5B3B2
C5
A19
A18
B20B21B19
C20
U18
AE9
AE10
J26
AF9G8
G27
K25K26
J9
K10
H28
AE25
XC2VP40
A29 AP9
AP24
AP25
A22 A25
B12
A9
A33
A32
AN10
AM12
AN12
H7
AE26
AP8
A21 A5
A4
AP17
A17
AP4
AP5
AN11
AP11
C23
A23
A28
AP22
AP23
AN22
AN23
AM23
AN25
AN24
A16
B22
B23
K9
AF26
B10
A10
B13
A12A11
A13
C12
A8
AP13
X2Y0
X3Y0
X4Y0
X5Y0X3Y1
X4Y1
RIO 2
RIO 16
FPGA5
RIO 7
X1Y1
X0Y0
X1Y0
RIO 21
RIO 4
RIO 14
RIO 18 RIO 23
(RIO 5)
1V5 2V5
RIO 6
RIO 19
X0Y1
RIO 11
(RIO 8) (RIO 20)
X2Y1
RIO 9
X5Y1
100N
C155
100N
C156
C153
C154
L120
L119
L118
100N
???
???
C87
7
100N
C160
L124
L123
???
???
100N
C13
63
C82
L21
L22
C13
68
C13
66
C13
62
C13
82
100N
C13
69
???
???
L51
L52
C88
100N
C88
3
C87
2
C86
8
100N
???
???
???
???
C131
C132
C134
100N
C133
100N
L116
L115
L113
L114
C127
C128
???
???
???
???
C87
0
C87
4
100N
C88
6
100N
C130
L110
L109
L111
L112
???
???
100N
C87
9
100N
C158
100N
C157
???
???
L121
L122
100N
C13
83
L54
L53
C90
C88
2
C87
8
100N
C13
65
C84
L47
L48
P5T
DO
_F5T
DI
H2
CCLK5
PROG5
C10
75
C11
76
C10
72
C11
69
C96
2
C96
1
C10
74
C11
77
C10
73
C12
61
C12
60
C12
33
3K3
10N
10N
10N
10N
100N
100N
100N
100N
10N
10N
C13
28
C79
7
C79
8
C88
4
C11
2510
0N
E2
H3
H4
A3
C2
A5
G3
H5
C5D5
B5
D1
B3B4
C1
G4
E6
D2
H6
E5
A6
G1
1V8
10N
3K3
LED
21
RX31-
R55
3R
591
R596
R592
R593R594
R595
R597
C774 C773 C806
C79
0
C77
8
C14
16
C14
27
C14
00
C13
03
C89C83
C87
C159C81
C161C85
L19
L20
R56
5
R53
7
R54
9
R53
6
R56
4
PROM4
C79
LED
25
RX32+
100R
RED
RX31+
100N
100N
DONE5
0R
100N
F4TDO_P5TDI 0R
PROM5_TCK
PROM5_TMS
INIT5
PROM5_D0
PROM5
3V32V5
RX33.34.35-
100N
100N
100N
100N
100N
100N
100N 10
0N10
0N
100N
100N
100N
100N
100N
100N
100N
RX24.25.26-
100N
4U7
10N
10N
10N
10N
4U7
10N
RED
RX33.34.35+
CNT24.25.26+
RX27.28.29+
RX27.28.29-
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N100N
100N100N
100N
100N
100N
RX25+
RX25-
RX27+
RX27-
RX29-
RX26+
RX26-
RX28-
100N
RX30-
RX32-
100N
100R
100N
0R
100N
RX24-
RX24+
RX24.25.26+RX30+
F5TDO_TTCTDI
100N
CNT24.25.26-
100N
100N
RX29+
0R
0R
0R
3K3
3K3
3K3
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
AGND
AGNDAGND
1V8A5
AGND
AGND
AGND
AGND AGND
AGND
D3V3
AGND
AGND
RX+
TX-
VTTX
TX-
VCCVTTX
NC
TX-
NC
NC
VTTX
RX+
NC
VCC
RX-
VCC
NC
GND
NC
CCLK
NC
GND
NC
TX-
RX-TX-
TX+
VCCVTTXVTRXVCCVCCVTTXVCC
TX+RX+
VTTXVTRXVCC
GND
VCC
RX+
RX-
VTRX
VCC VTRX VCC VTTX VCC
NC
NC
NCNC
NC
VCC
VCCAUX
TDO
TMS
TDI
M2M1
TX+
RX-
RX+
GNDTX- RX-
RX+
GNDTX-
TX+ RX+
VTRX
TX+
TX- RX-
VTRX VTTX VCC VTRXVCC
GNDTX-
TX+
VCCVTTX
RX-
VCC
TX-
RX+
RX- GND
TX+
TX- RX-
RX+
VCC VTRX
GND
TX+
VTTX VCC
VCC
TX+
TX-GND
VTRXVCC
RX+
RX-
NC
NC
NC
NC
VCCVTTXVTRX
RX+
RX-NC
NC
VTRX
TX+
RX-
RX+
VCC
GND
VTRX VTTX VCC
NC
NC
NC NC
NC
NC NC
GND
DXPHSWAP
DXNRSVDPWRDWN
PROG DONE
TX+
NC NC
TCK
VBATT
M0
VCCINT
NC
NC
NC
GND
GND
NCNC
NC
NC
TX+
NC
AGND
AGNDAGND
XCF32PFLASH PROM
VCCJ
TDI
D7
D2
D0
DNC
CEO*
TDO
REVSEL1
BUSY
CE*CCLK
CF*
D5
D3D4
D1
REVSEL0
GND
VCCINT
D6
CCLKOUT
OERST*
EXTSEL*
TCK
TMS
VCCO
2V5D52V5C51V7A5
1V7A5
1V7A5
1V7A52V5D5
2V5D5
2V5D52V5C5
2V5C5
2V5C5
2V5E5
2V5E5
2V5E5
DGND
DGNDDGNDDGND
DGND
DGND
1V5A5
AK
AK
AGND
AGND
AGND
AGNDAGNDAGND
AGNDAGNDAGND
AGND
AGNDAGND
GLUECARD
FPGA1 BANKS 0/1/4/5
11
Wed Dec 20 12:05:05 2006
AL21AK19
AK18
AM21AK21
AK25
AL24AL26
AL30
AL29AK26AM26AJ26AG25AJ23AJ21
AJ20AK22
AL23AJ19AL20AK24AL25
AL22
AM28
AL28AK29
AM22AM24AL19
AH19
AL18
AF18
AE18AD18
AH20
AG19AF19
AE19AD19
AG21AH21AE20
AE21
AF20AJ22
AJ24AF21
AG22
AE22AH22
AF22AH23
AE23
AG24AH24
AH25AF23
AE24
AF25
AG26AK28
AH26
AL27AG18AK27
AF24
AJ18
AH18
AF15
U45
FPGA1_TX<6>FPGA1_TX<4>FPGA1_TX<3>FPGA1_TX<2>FPGA1_TX<0>
4XGBE_LA<3>4XGBE_LA<2>4XGBE_RD*4XGBE_WR*
FPGA1
4XGBE_LA<9>
4XGBE_LA<4>4XGBE_LA<5>
4XGBE_LA<13>4XGBE_LA<12>4XGBE_LA<10>
FPGA1_TX<7>FPGA1_TX<9>FPGA1_TX<10>FPGA1_TX<12>
FPGA1_TX<15>FPGA1_TX<14>
FPGA1_TX<16>FPGA1_TX<17>FPGA1_TX<18>FPGA1_TX<19>FPGA1_TX<21>
FPGA1_TSXK
FPGA1_TX<31>
FPGA1_TX<25>FPGA1_TX<28>
FPGA1_TSOPFPGA1_TPRTYFPGA1_TFCLK
BANK 5
125MHZ
U45
3V3INIT1
FPGA1_TADR1
FPGA1_TMOD1
FPGA1_TENB
FPGA1_TX<30>
FPGA1_TX<26>
FPGA1_TX<22>
FPGA1_TX<13>
4XGBE_RX<10>4XGBE_RX<9>4XGBE_RX<8>4XGBE_RX<7>4XGBE_RX<6>4XGBE_RX<5>
FPGA1_RFCLK
G25F26E28
D23E19
C21D24D20
G19F23
F20
D22
E25C22D25E21G20C24E26
D28C28
H18
E18
J18D18
F18G18K18L18F19
J19H19
K19
J20K20G21
J21K21
H22G22
J22K22G24
F24H24
K23D30J24K24J25H25
H26G26
E29
D19
L19
J23
G23E24
E27
F21
D26
C26E22
F22
D29GBE_TXPAUSEADD1
GBE_TXPAUSEFRGBE_TXPAUSEADD0
GBE_TXPAUSEADD2
BANK 0FPGA1
4XGBE_RX<16>
4XGBE_RX<4>4XGBE_RX<3>4XGBE_RX<2>4XGBE_RX<1>4XGBE_RX<0>
U1U24_1U1U24_2U1U24_3U1U24_4U1U24_5U1U24_6
4XGBE_WP4XGBE_CI816
C48
0
C42
8
U61
1 3
4
2
C43
1
C56
1
C49
2
C249
C47
9
C45
6C
463
C47
2C
471
C49
3
C46
4
100N
10N
125MHZ
10N
10N
10N
10N
100N
100N 10
N
4U7
C56
0
4U7
100N
C346
2
31
4
20MHZ
FPGA1BANK 1
100N
100N
100N
100N
4XGBE_D<7>
4XGBE_D<13>
4XGBE_D<15>
4XGBE_RMOD04XGBE_RSOP
4XGBE_RSX4XGBE_RPRTY
GC_CS1*GC_ADS*
4XGBE_D<10>
U45
C48
3
4XGBE_D<14>
4XGBE_D<6>
FPGA1BANK 4
AG14AH14
AF16AG16AH15
AH9AF10
AE11AF11AG10
AF12AE12
AJ9
AE13AF13
AH13AJ11AE14AF14
AM11AJ13
AE15
AD16
AD17AE17
AF17
AK13
AL6
AK7
AG9
AK6AL5
AM7
AK16AK8
AL16
AL8
AK9AL9
AK11
AJ16
FPGA1_TADR0
FPGA1_TMOD0FPGA1_TERR
FPGA1_TX<29>
4XGBE_LA<8>4XGBE_LA<11>
4XGBE_LA<7>
4XGBE_PTPA4XGBE_LA<6>
4XGBE_STPA
GC_BLAST*
FPGA1_TX<27>
FPGA1_TEOP
AJ15
AK14AL12
AH17
AK17AL11
AL13
AL17
AK10AJ14
FPGA1_TX<20>
FPGA1_TX<23>FPGA1_TX<24>
AL14
AH16
AE16
71
2
5
C24
1
1K2
R16
6
PROM1_D0
1K2
R16
4
2K2
R16
3
C24
0
100N
5
8
1
2
7INIT1
R16
5
2K2
100N
8U55
U54
4XGBE_RX<15>
D21
80.44MHZ
3V3PROM1_D0
10N
4XGBE_RX<19>4XGBE_RX<17>
4XGBE_RX<20>4XGBE_RX<21>4XGBE_RX<23>4XGBE_RX<24>4XGBE_RX<26>4XGBE_RX<27>4XGBE_RX<28>4XGBE_RX<30>
FPGA1_TX<1>
FPGA1_TX<8>FPGA1_TX<11>
AG17
AL15AM13
80.44MHZ
4XGBE_D<0>
4XGBE_D<4>4XGBE_D<5>
4XGBE_D<1>
C39
6
H21
U73
20MHZ
4XGBE_D<2>
4XGBE_D<8>4XGBE_D<9>
4XGBE_D<11>
4XGBE_REOP4XGBE_RVAL
GC_LW/R*
FPGA1_RENB
4XGBE_RX<11>4XGBE_RX<12>4XGBE_RX<13>
FPGA1_TX<5>
AM14
GC_LINT1ECS_RESET*
F1_CLKBOT+
AH11AH12AJ12
D14
G15
J12
E6
D11
E10H10
J10
F9
G16D16
C11
G9
H9
D7
E8
D9
F11
F12F13D13
C7F15D8G12
F16
G10D6E11
G13
J14H14G14
J15L16
H16E16
K17
E7
D5
E9F14
L17
G17F17
K16
J16
K15
K11J11K12
G11H11
K13
H13J13
K14
C9D10C13D15E13E14D12C14
H17
D17J17
E17
4XGBE_RX<31>
4XGBE_RX<14>
4XGBE_D<12>
4XGBE_D<3>
4XGBE_RMOD1
4XGBE_RERR
AG13
AL10
AG11
AH10
AL7
AJ17
AM9
F1_CLKTOP+
U45
D27
4XGBE_RX<29>4XGBE_RX<25>4XGBE_RX<22>4XGBE_RX<18>
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
XC2VP50
IO_L47N_4IO_L47P_4
IO_L49P_4IO_L55N_4IO_L55P_4IO_L56N_4
IO_L02P_4/D1IO_L05_4
IO_L06N_4/VRP_4IO_L07N_4
IO_L07P_4/VREF_4IO_L08N_4
IO_L19P_4IO_L19N_4IO_L08P_4
IO_L20N_4IO_L25N_4
IO_L26N_4IO_L25P_4
IO_L26P_4IO_L27P_4/VREF_4
IO_L37N_4IO_L37P_4IO_L38N_4IO_L38P_4IO_L39N_4IO_L43N_4IO_L43P_4
IO_L45P_4/VREF_4IO_L44N_4
IO_L46N_4IO_L46P_4
IO_L49N_4
IO_L67N_4IO_L67P_4
IO_L73N_4IO_L68N_4
IO_L74P_4/GCLK2P
IO_L75N_4/GCLK1S
IO_L48P_4
IO_L44P_4
IO_L01P_4/INIT_B
VCCO_4
IO_L03P_4/D3
IO_L02N_4/D0
IO_L03N_4/D2IO_L01N_4/DOUT
IO_L06P_4/VRN_4
IO_L69N_4IO_L09N_4
IO_L69P_4/VREF_4
IO_L09P_4/VREF_4
IO_L20P_4IO_L21N_4
IO_L39P_4IO_L27N_4
IO_L50_4
IO_L56P_4IO_L73P_4
IO_L53_4
IO_L54P_4IO_L57P_4/VREF_4
IO_L75P_4/GCLK0PIO_L57N_4
IO_L48N_4IO_L54N_4
IO_L74N_4/GCLK3SIO_L68P_4
IO_L45N_4IO_L21P_4
018M
OP
IN-
IN+
NCGND
VCC
DGND
D3V3
018M
OP
IN-
IN+
NCGND
VCC
DGND
XC2VP50
IO_L74P_5/GCLK4P
IO_L74N_5/GCLK5S
IO_L07N_5/VREF_5
IO_L09P_5IO_L73N_5
IO_L09N_5/VREF_5
VCCO_5
IO_L02N_5/D6
IO_L03N_5/D4IO_L02P_5/D7
IO_L05_5
IO_L07P_5
IO_L19N_5IO_L08N_5
IO_L25N_5IO_L25P_5
IO_L19P_5
IO_L26P_5IO_L37N_5
IO_L38N_5IO_L37P_5
IO_L38P_5
IO_L43N_5IO_L39P_5
IO_L44P_5IO_L46N_5
IO_L43P_5
IO_L46P_5IO_L47N_5IO_L47P_5
IO_L49P_5IO_L49N_5
IO_L55P_5IO_L55N_5
IO_L56P_5
IO_L67P_5IO_L67N_5
IO_L73P_5
IO_L75N_5/GCLK7S
IO_L68P_5
IO_L69N_5/VREF_5IO_L45N_5/VREF_5
IO_L54N_5
IO_L03P_5/D5IO_L06P_5/VRN_5
IO_L06N_5/VRP_5
IO_L48P_5
IO_L27N_5/VREF_5IO_L39N_5
IO_L57N_5/VREF_5IO_L68N_5IO_L48N_5
IO_L44N_5IO_L56N_5
IO_L50_5IO_L26N_5IO_L08P_5IO_L20P_5IO_L21N_5IO_L20N_5
IO_L01N_5/RDWR_B
IO_L01P_5/CS_B
IO_L21P_5IO_L45P_5
IO_L27P_5
IO_L53_5IO_L54P_5
IO_L75P_5/GCLK6P
IO_L69P_5IO_L57P_5
XC2VP50
IO_L56P_1
IO_L55P_1
IO_L09N_1/VREF_1
IO_L01P_1/VRN_1
IO_L47P_1
IO_L44P_1IO_L03P_1
IO_L05_1
IO_L07P_1
IO_L67P_1IO_L68N_1
IO_L47N_1
IO_L02N_1
IO_L02P_1
IO_L20P_1
IO_L26P_1
IO_L38P_1
IO_L19P_1
IO_L25N_1IO_L43P_1IO_L46P_1
IO_L20N_1IO_L55N_1IO_L26N_1IO_L25P_1
IO_L67N_1
IO_L03N_1/VREF_1IO_L08N_1IO_L19N_1
IO_L37N_1
IO_L39N_1IO_L45P_1
IO_L45N_1/VREF_1
IO_L48N_1IO_L54P_1
IO_L57N_1/VREF_1IO_L68P_1
IO_L69N_1/VREF_1
IO_L01N_1/VRP_1
IO_L08P_1
IO_L07N_1IO_L49P_1
IO_L69P_1
IO_L73P_1IO_L73N_1
IO_L54N_1
IO_L57P_1
IO_L48P_1
VCCO_1
IO_L06P_1IO_L06N_1IO_L09P_1
IO_L21N_1IO_L21P_1
IO_L27P_1
IO_L37P_1IO_L27N_1/VREF_1
IO_L39P_1
IO_L38N_1IO_L44N_1
IO_L53_1IO_L56N_1IO_L43N_1IO_L49N_1IO_L46N_1
IO_L50_1
IO_L75N_1/GCLK3P
IO_L74N_1/GCLK1PIO_L75P_1/GCLK2S
IO_L74P_1/GCLK0S
D3V3
DGND
D3V3 D3V3
OPENVDD
GND
OPENVDD
GND
D3V3D3V3D3V3D3V3
DGND
2V5E1
XC2VP50
IO_L08P_0
IO_L43N_0
IO_L43P_0IO_L38P_0
IO_L38N_0
IO_L49N_0
IO_L26N_0
IO_L19P_0IO_L25N_0
IO_L09P_0/VREF_0
IO_L54N_0
IO_L68P_0
IO_L01N_0/VRP_0
IO_L02P_0IO_L02N_0
IO_L03N_0IO_L05_0
IO_L06N_0IO_L06P_0IO_L08N_0IO_L09N_0
IO_L21N_0IO_L19N_0
IO_L21P_0IO_L27N_0
IO_L27P_0/VREF_0
IO_L37P_0IO_L37N_0
IO_L39N_0IO_L39P_0
IO_L45P_0/VREF_0IO_L48N_0
IO_L45N_0
IO_L48P_0
IO_L54P_0
IO_L57P_0/VREF_0IO_L57N_0
IO_L67P_0IO_L69N_0
IO_L69P_0/VREF_0IO_L73N_0IO_L73P_0
IO_L74P_0/GCLK6SIO_L75N_0/GCLK5P
IO_L74N_0/GCLK7P
IO_L75P_0/GCLK4S
VCCO_0
IO_L20P_0IO_L26P_0
IO_L20N_0
IO_L07P_0IO_L47P_0IO_L55N_0IO_L49P_0IO_L44P_0
IO_L53_0IO_L44N_0
IO_L46N_0IO_L56N_0IO_L55P_0
IO_L25P_0IO_L67N_0
IO_L56P_0IO_L47N_0
IO_L50_0
IO_L68N_0IO_L46P_0
IO_L01P_0/VRN_0IO_L07N_0
IO_L03P_0/VREF_0
THROTTLE
FPGA1 BANKS 2/3-TTCRX-USB-ETH
TTC
RX
US
B
12
FRONT PANEL LEDS
TTC
RX
ETH
ER
NE
T
Wed Dec 20 16:24:32 2006
DBERRSTR
L1_THROTTLE
PLX_READY*
T3R3U4P2
R1
P3
R6
M6
L5
M2
P0_0P0_1P0_2P0_3
AH2
BCNT4
R10
45
AD3
GB4_SD
W4
GB3_TDIS
GB4_TDIS
AA4AB4
AC1
AF2AG2
AE1
AE2Y1
V4W3Y3
AL2
AK2AJ2
AK1
AH3AJ4
AE4AC3
AF3
W6Y6AA6AB6AC6AD6AF6AG6
AE5AD5AF5AK4AJ5AC4AA5Y4AB5AH5AG5W5
AH6
AB1
V8V7
V6
AE7AE8
AC9AC10
AD8
AB10AD7
AC7AD4AB9
AB7AB8
AA8AA9AA10
AB3AA7
Y9Y10
W10
Y7W9
W8
W11W7
V9
V11V10
V5W2
AG4AD9
AH4AF7AF8
AJ7AH8AG7
AG3AF4
Y2V3AD1
AD2AB2
AA1AC2
AA3
AH1
AL1
AK3
AG1
SINERRSTR
TTCRDY
FPGA_POR*
RLED1*YLED1*GLED1*
GLED2*YLED2*
YLED3*GLED3*RLED2*
GLED4*RLED3*
YLED4*RLED4*
GB1_TDISGB1_SD
GB2_SDGB2_TDISGB3_SD
BCNTRES
EVCNTHSTR
BCNT1BCNT0
BCNT2BCNT3
BCNT6BCNT5
BCNT7
BCNT9BCNT8
BCNT11BCNT10
SUBADDR1SUBADDR0
SUBADDR7SUBADDR6
BRCSTSTR1BRCSTSTR2
EVCNTRESBCNTSTR
BRCST2BRCST3
BRCST5BRCST4
BRCST7BRCST6
CLKL1ACCL1ACC
CLK40DES2CLK40DES1CLK40
U45
R22
110N
C48
6
100N
R10
44
470R
RLE
D1*
RLE
D2*
GLE
D1*
470R
R22
21K
2
R10
43
C43
8C
530
100N
470R
R10
52
R10
54
R10
53
R10
51
R10
49
R10
50
R10
48
R10
47
R10
46
LED15 LED16 LED13 LED17
470R
470R
GLE
D2*
C47
7100N
U72
C327
4
L0_THROTTLE
R23
9
U45
R24
0
5
81
910121113141615
7
6
3
2 SK4
R37
5
C51
4C
460
C46
5
C39
8
C48
1
C55
2
U3
U7U8
V2
U2
U5
U6
U9U10
T4
T5
T6
T7
T8
T2
R2
R4
T9T10
P1
R7
U11T11
P4
P5
P6
R9R10
N2
N3
N4
P7
P8
N1
M1
N5
N6
P9P10M3
M4
L3
L4
N7
N8
L2
M7
N9N10
L1
K1
L6
L7
L8
K2
J2
K4
K5
M9M10
H1H2
H3H4
K7
K8
J3
J4
J5
J6
G1G2
H5
H6
L9L10
F1F2
G5
G6
G3
G4
F4
F5
J7
J8
E1E2
E3E4
F7F8
D1D2
MANAGEMENT_DATA_CLOCK
TXDATA1
DQ3
SUBADDR3
L1THR+L1THR-
L0THR+
10N
100N
P2_0
RLE
D3*
GLE
D4*
YLED
1*
470R
470R
YLED
2*
RXDATA3
POWERDOWN
ETHADDR4
100N 10N
10N
DOUT6
TTCRST_B
P1_0
RXDATA1
YLED
4*
RLE
D4*
GLE
D3*
YLED
3*
PAUSE
ETHADDR3ETHADDR2
ETHADDR0ETHADDR1
MANAGEMENT_DISABLE
TXDATA3TXDATA2
TXDATA0TXERROR
TXSLEW1TXENABLE
TXSLEW0
CONFIG2CONFIG3
GREENLED
RXDATA2
RXDATA0
RX_DATA_VALIDRXERROR
TXCLOCK
P0_7P0_6
P0_4P0_5
P1_7P1_6P1_5
P1_3P1_2P1_1
DOUT4
DOUT1
SUBADDR5
SUBADDR2
DQ2
FPGA1BANK 2
4U7
4U7
470R
470R
470R
470R
470R
RXCLOCK
SLEEP
P1_4
SUBADDR4
DOUT2DOUT3
DOUT0
DOUTSTR
ETHRESET*
DOUT5
DOUT7
F1_USBRST*
P2_1
CONFIG1YELLOWLED
CARRIER_SENSECOLLISION_DETECTED
MANAGEMENT_DATA_I/OMANAGEMENT_DATA_INTERRUPT
DQ0DQ1
L0THR-
3K3
3K3
3K3
FPG1_SDAFPG1_SCL
1K2
AA2
AJ1
EVCNTLSTR
SERBCHAN
AJ8
AD10
BANK 3FPGA1
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
D3V3
DGND
D3V3
DGND
D3V3
90LV0473V3
IN2
IN1 OP1+
OP2+
IN3
IN4
GND
OP1-
OP2-OP3+OP3-OP4+OP4-
ENEN*
34
21
GR Y
D3V3
GR Y GR Y GR Y
XC2VP50
IO_L33N_3/VREF_3IO_L18N_3
IO_L03N_3/VREF_3
IO_L24P_3
IO_L06N_3
IO_L24N_3
IO_L52N_3
IO_L45N_3/VREF_3IO_L60P_3
IO_L54P_3IO_L45P_3
IO_L42N_3IO_L90N_3IO_L87P_3
IO_L31P_3IO_L21N_3/VREF_3
IO_L05N_3IO_L05P_3IO_L02N_3
IO_L17P_3IO_L17N_3IO_L19P_3IO_L20P_3IO_L20N_3IO_L21P_3
IO_L02P_3
IO_L87N_3/VREF_3IO_L88N_3
IO_L86P_3IO_L59N_3
IO_L86N_3
IO_L56N_3IO_L59P_3
IO_L56P_3
IO_L53N_3IO_L55P_3
IO_L53P_3
IO_L50P_3IO_L50N_3
IO_L47N_3IO_L48N_3
IO_L44P_3IO_L44N_3IO_L47P_3
IO_L41P_3IO_L41N_3
IO_L38N_3IO_L39P_3IO_L40P_3
IO_L35N_3IO_L38P_3
IO_L35P_3
IO_L32P_3IO_L32N_3
IO_L23P_3IO_L23N_3
IO_L88P_3
IO_L89N_3IO_L89P_3
IO_L51N_3/VREF_3
IO_L04P_3
IO_L58N_3IO_L15N_3/VREF_3
IO_L04N_3IO_L46N_3IO_L57P_3IO_L49N_3IO_L43P_3
IO_L01P_3/VRN_3IO_L03P_3IO_L22N_3IO_L37N_3IO_L34P_3
IO_L15P_3IO_L22P_3IO_L37P_3IO_L40N_3IO_L46P_3IO_L49P_3IO_L55N_3IO_L58P_3
IO_L39N_3/VREF_3IO_L85P_3
IO_L31N_3
IO_L54N_3
IO_L43N_3IO_L34N_3
IO_L01N_3/VRP_3IO_L19N_3
IO_L16N_3
IO_L18P_3IO_L16P_3
IO_L06P_3
IO_L57N_3/VREF_3IO_L85N_3IO_L90P_3
IO_L60N_3IO_L36N_3
IO_L42P_3
IO_L33P_3IO_L36P_3
IO_L51P_3
VCCO_3
IO_L48P_3IO_L52P_3
XC2VP50
IO_L60N_2IO_L41N_2
IO_L15P_2
IO_L19P_2
IO_L86P_2
IO_L89P_2IO_L89N_2
IO_L56P_2IO_L56N_2IO_L53P_2IO_L53N_2IO_L50P_2IO_L50N_2IO_L44P_2IO_L44N_2
IO_L59N_2IO_L60P_2IO_L86N_2
IO_L19N_2IO_L16N_2/VREF_2
IO_L21N_2
IO_L42N_2
IO_L23P_2IO_L05P_2
IO_L43N_2IO_L41P_2IO_L35P_2
IO_L47N_2IO_L16P_2
IO_L21P_2IO_L33N_2
IO_L39N_2IO_L45N_2
IO_L87N_2IO_L36N_2
IO_L57N_2
IO_L22P_2IO_L33P_2
IO_L47P_2IO_L54N_2
IO_L59P_2IO_L06N_2
IO_L22N_2/VREF_2
IO_L15N_2IO_L24P_2IO_L24N_2
IO_L03P_2IO_L03N_2
IO_L06P_2IO_L51N_2
IO_L20P_2IO_L20N_2IO_L17P_2IO_L17N_2IO_L04P_2
IO_L01N_2/VRP_2IO_L01P_2/VRN_2
IO_L04N_2/VREF_2
IO_L46N_2/VREF_2
IO_L37P_2IO_L40N_2/VREF_2
IO_L34P_2IO_L37N_2
IO_L34N_2/VREF_2IO_L31P_2
IO_L46P_2IO_L49N_2
IO_L31N_2
IO_L40P_2
IO_L39P_2IO_L45P_2IO_L36P_2
IO_L87P_2IO_L54P_2IO_L51P_2IO_L48N_2
IO_L52N_2/VREF_2IO_L48P_2IO_L52P_2IO_L85N_2
IO_L55P_2IO_L90P_2IO_L58P_2
IO_L88N_2/VREF_2
IO_L49P_2
IO_L57P_2IO_L90N_2
IO_L85P_2
IO_L58N_2/VREF_2
IO_L88P_2
IO_L55N_2
IO_L02N_2IO_L02P_2IO_L05N_2IO_L18N_2IO_L18P_2
IO_L32N_2IO_L23N_2
IO_L35N_2IO_L32P_2
IO_L38N_2IO_L38P_2IO_L42P_2IO_L43P_2
VCCO_2
D3V3
DGND
D3V3
13
FPGA1 BANKS 6/7 (DDR SDRAM)
7 X 10NF
Thu Dec 21 14:35:51 2006
F1RAM3_ADD<12..0>
BANK 7FPGA1
P32N31N32U31
T25
M32M31
H33
F33
V33
F34
P33G34N34
K34
L25L26
F28
T29U29
N29P29
M29L29J29H29U28T28R28P28N28
L28M28
K28
T26
H31H32
J32
G32G31
F30E31E32R29P30N30L31L30
J30K30
H30
D33
D34
P34
N33
E34
R33U33
P31
L33M34
J31J33
G29E33
R34T33U32
G33
H34
M33K33
L34
G30L32
J28F27
R32R31T32T31
J27K27L27N27P27T27
U27U30
F31M26M25K31N26N25P26P25R26
U24R25
T24
U25U26T30
F1F2_A
F1F3_AF1F3_B
F1F2_B
F1F4_BF1F4_A
F1F5_AF1F5_B
F1RAM3_UDM
F1RAM2_BA0
F1RAM2_D<3>
F1RAM1_ADD<2>F1RAM1_ADD<3>
F1RAM1_ADD<5>F1RAM1_ADD<6>
U45
F1RAM3_D<5>
F1RAM3_D<15>
U45
51R
51RR383
R380
51R
51R
R353
R357
F1RAM3_D<15..0>
F1RAM2_D<15..0>
F1RAM1_D<15..0>
F1RAM4_D<15..0>
C52
3C
393
100N
C50
7C
485
C39
4
C47
5C
462
C45
5C
502
C50
8C
458
C44
0
C46
7C
466
C50
1C
482
C48
4C
450
C55
4
C55
5
100N
10N
100N
AG32AG34AD32
AG30
F1RAM3_LDQS
F1RAM3_D<7>
F1RAM3_ADD<0>F1RAM3_ADD<1>F1RAM3_ADD<2>
AL33AL34
AF33AE33
F1RAM3_CKF1RAM3_CK*F1RAM3_LDM
AE30AD30AB31AB30AA30Y29W31
V29W30W29Y26
AA27
AD27AD28
W28W27
AH32
AC26AF29AF30AA29AH31
AK31
AG31
AF32AF31
AC32AD31AE31
AC31
AK33
Y34AA33AA34AB33
AB27AA31AA32W32
AB29AC29AD29AF27AF28AH29AH30
AE34
AJ33
AC34
AC33
AJ31
AD34
AK32
AB34Y32W33
AJ30
AH34AH33
AJ34
AK34
AD33
AG33
V30V32
AJ28AJ27
AH27AG28AG29AD25AD26AE27
AC25AE28
AC28AB26AB25
AB28
Y25W25W26
Y31Y28
V24W24
V25
Y33V26
V31
V27V28
AA25AA26AA28AB32
F1RAM3_ADD<11>
F1RAM3_ADD<9>
F1RAM3_ADD<7>
F1RAM3_ADD<12>
F1RAM3_ADD<3>
F1RAM2_D<4>F1RAM2_CK
F1RAM3_UDQS
BANK 6FPGA1
F1RAM1_LDQSF1RAM1_UDQS
10N
10N
10N
10N
F1RAM2_BA1
F1RAM3_CS*F1RAM3_WE*F1RAM3_CAS*F1RAM3_RAS*F1RAM3_BA0F1RAM3_BA1
F1RAM3_ADD<4>F1RAM3_ADD<5>F1RAM3_ADD<6>
F1RAM4_D<14>F1RAM4_D<13>F1RAM4_D<12>F1RAM4_D<11>F1RAM4_D<10>F1RAM4_D<9>F1RAM4_D<8>F1RAM4_D<7>
F1RAM4_D<5>F1RAM4_D<4>F1RAM4_D<3>
F1RAM4_D<0>
F1RAM1_BA1F1RAM1_BA0
F1RAM1_WE*F1RAM1_CS*F1RAM1_CKF1RAM1_CK*F1RAM1_UDMF1RAM1_LDM
F1RAM1_ADD<0>
F1RAM1_ADD<12>
F1RAM1_D<14>F1RAM1_D<15>
F1RAM1_D<7>F1RAM1_D<6>
F1RAM1_D<4>
F1RAM1_D<2>
F1RAM1_D<0>
F1RAM2_D<8>
F1RAM2_D<14>
F1RAM2_D<9>
F1RAM2_D<7>F1RAM2_D<6>F1RAM2_D<5>
F1RAM2_D<2>F1RAM2_D<1>
F1RAM3_D<8>F1RAM3_D<9>F1RAM3_D<10>F1RAM3_D<11>F1RAM3_D<12>F1RAM3_D<13>
F1RAM2_D<11>F1RAM2_D<12>
F1RAM3_ADD<8>
F1RAM4_CKE
F1RAM1_RAS*
F1RAM2_D<10>
F1RAM2_D<13>
F1RAM2_D<15>
F1RAM1_D<1>
F1RAM1_D<3>
F1RAM1_D<5>
F1RAM1_D<8>F1RAM1_D<9>F1RAM1_D<10>F1RAM1_D<11>F1RAM1_D<12>F1RAM1_D<13>
F1RAM2_D<0>
F1RAM2_UDM
F1RAM3_D<1>F1RAM3_D<0>
F1RAM4_D<6>
4U7 10N4U
7
F1RAM2_CK*F1RAM2_LDM
F1RAM2_CKE
F1RAM1_CKE
F1RAM4_LDQS
F1RAM4_CK*F1RAM4_CK
F1RAM4_UDM
F1RAM4_UDQS
F1RAM4_D<15>
F1RAM2_CS*F1RAM2_WE*
F1RAM3_ADD<10>
F1RAM2_LDQSF1RAM2_UDQS
100N
F1RAM3_CKE
F1RAM4_D<2>F1RAM4_D<1>
F1RAM1_ADD<1>
F1RAM1_ADD<4>
F1RAM1_ADD<7>F1RAM1_ADD<8>F1RAM1_ADD<9>F1RAM1_ADD<10>
10N
F1RAM3_D<14>
F1RAM1_ADD<12..0>
F1RAM1_CAS*
F1RAM3_D<14>F1RAM3_D<13>F1RAM3_D<12>F1RAM3_D<11>F1RAM3_D<10>
F1RAM4_CAS*F1RAM4_BA0 F1RAM3_D<2>
F1RAM3_D<3>F1RAM3_D<4>
F1RAM3_D<6>
F1RAM3_D<0>F1RAM3_D<1>F1RAM3_D<8>F1RAM3_D<9>
F1RAM2_RAS*F1RAM4_RAS*F1RAM2_CAS*
F1RAM4_WE*F1RAM4_CS*
F1RAM4_BA1
F1RAM4_LDM
F1RAM1_ADD<11>
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
2V5A12V5A12V5A1
2V5A12V5A1
2V5A1
1V25R1 1V25R1
DGND
DGND
DGND
DGND
XC2VP50
IO_L60P_7IO_L86P_7IO_L86N_7
IO_L53N_7
IO_L50N_7IO_L53P_7
IO_L50P_7IO_L44N_7IO_L44P_7IO_L38N_7IO_L38P_7IO_L33P_7IO_L32N_7IO_L32P_7IO_L06P_7
IO_L87P_7IO_L89N_7
IO_L59N_7IO_L47N_7IO_L41N_7IO_L35N_7IO_L23N_7IO_L05N_7
IO_L85N_7IO_L85P_7IO_L57N_7IO_L57P_7
IO_L02N_7IO_L05P_7
IO_L42P_7IO_L16P_7
IO_L37P_7
IO_L34P_7IO_L40P_7
IO_L31P_7
IO_L20N_7
IO_L90P_7IO_L58P_7IO_L55P_7
IO_L04N_7/VREF_7IO_L16N_7/VREF_7
IO_L34N_7/VREF_7IO_L22N_7/VREF_7
IO_L46N_7/VREF_7IO_L40N_7/VREF_7
IO_L52N_7/VREF_7
IO_L88N_7/VREF_7IO_L58N_7/VREF_7
VCCO_7
IO_L04P_7
IO_L49N_7
IO_L55N_7
IO_L01P_7/VRN_7
IO_L01N_7/VRP_7
IO_L19P_7
IO_L33N_7IO_L21P_7
IO_L36P_7IO_L42N_7IO_L45P_7IO_L51P_7IO_L54P_7IO_L03P_7IO_L03N_7IO_L06N_7
IO_L15N_7IO_L15P_7
IO_L22P_7
IO_L24P_7IO_L24N_7
IO_L56P_7
IO_L23P_7
IO_L39N_7IO_L35P_7
IO_L41P_7IO_L47P_7IO_L54N_7IO_L59P_7IO_L89P_7IO_L19N_7IO_L21N_7IO_L36N_7IO_L39P_7
IO_L51N_7IO_L45N_7
IO_L87N_7IO_L60N_7
IO_L02P_7
IO_L18P_7IO_L18N_7
IO_L37N_7
IO_L46P_7IO_L20P_7IO_L49P_7
IO_L17P_7
IO_L88P_7
IO_L17N_7
IO_L31N_7
IO_L43N_7IO_L43P_7
IO_L56N_7
IO_L90N_7IO_L48P_7IO_L48N_7IO_L52P_7
XC2VP50
IO_L48N_6IO_L47N_6IO_L44N_6IO_L44P_6
IO_L89N_6IO_L89P_6
IO_L90P_6
IO_L86N_6IO_L87P_6
IO_L86P_6
IO_L59P_6IO_L59N_6
IO_L55P_6IO_L57P_6
IO_L53N_6IO_L53P_6IO_L50P_6
IO_L41N_6
IO_L38P_6IO_L38N_6IO_L40P_6
IO_L23N_6IO_L32P_6
IO_L23P_6IO_L20N_6IO_L20P_6IO_L15P_6IO_L05N_6IO_L05P_6
IO_L02P_6IO_L02N_6
IO_L90N_6IO_L88N_6
VCCO_6
IO_L36P_6IO_L33P_6
IO_L45P_6
IO_L16N_6
IO_L18N_6
IO_L24P_6IO_L24N_6
IO_L01P_6/VRN_6
IO_L87N_6/VREF_6IO_L57N_6/VREF_6IO_L51N_6/VREF_6
IO_L39N_6/VREF_6IO_L33N_6/VREF_6IO_L21N_6/VREF_6IO_L15N_6/VREF_6IO_L03N_6/VREF_6
IO_L42N_6
IO_L01N_6/VRP_6
IO_L45N_6/VREF_6
IO_L51P_6
IO_L18P_6
IO_L42P_6
IO_L04N_6IO_L04P_6IO_L17N_6IO_L17P_6IO_L37P_6IO_L40N_6IO_L46P_6
IO_L85N_6IO_L52N_6IO_L52P_6IO_L41P_6IO_L36N_6
IO_L54P_6IO_L60P_6IO_L54N_6IO_L60N_6IO_L06P_6IO_L06N_6IO_L16P_6
IO_L43P_6
IO_L34N_6IO_L39P_6IO_L43N_6
IO_L31P_6IO_L31N_6
IO_L21P_6
IO_L03P_6
IO_L19P_6IO_L49P_6IO_L22N_6IO_L22P_6IO_L32N_6
IO_L19N_6
IO_L56P_6IO_L56N_6
IO_L35N_6IO_L35P_6
IO_L47P_6
IO_L50N_6IO_L58P_6IO_L58N_6IO_L88P_6
IO_L85P_6IO_L55N_6IO_L49N_6IO_L46N_6IO_L48P_6IO_L37N_6IO_L34P_6
FPGA2 BANKS 0/1/4/5
14
Tue Dec 12 09:12:00 2006
F2_CLKBOT+F2_CLKBOT-
F2_CLKTOP+
10N
C11
22
4U7
100N4U
7
100N
C12
54
C12
55C
1092
C12
70
C11
06
C10
42
51R
R614
R618
51R
U15U15U15U15
AK26
AK18
AH18AJ18
AL18AL30AL29
AH26AG25AJ26
AM28
AL28
AF24AL27AL25AM24AL20AL19
AK27AK25
AK29AK24
AK28
AE21
AE20AE22
AE23
AG26
AG18AF18
AD18AK19AE18AF19AG19AM21AM22AJ21AD19AE19
AH25AF23
AF22AH23AJ23
AF21AJ24
AJ22AF20
AE24AF25
AG21AH21
AH20AJ20
AH22AH19AJ19
AM26AG22
AL26
AG24AH24
AL21AL24
AL23AL22
AK21AK22
AL5
AG9AH9
AL6
AK7AK6
AL7
AF11AE11
AK8AH10AG10
AF10
AE12AL8
AF12AJ9AK9
AM9AL9
AG11
AH12AH11
AL10AK10AJ12
AE13AF13
AJ11AH13AG13
AE14AK11
AF14
AK13AJ13
AL11AM11AE15
AG14AF15
AH14
AF16AM13
AG16
AJ15AH15
AM14
AE16AD16AL12AL13
AJ14AK14
AL15AL14
AD17AE17AH16
AK16AJ16
AL16
AG17AF17
AJ17
AL17
AH17
AK17
AM7
J10
E6
G9H10
E7H9
G10
K11J11F9E9D5D6
J14K14
D9G13
D8E8F12G12
H11G11
E11
K12J12F11
D7C7
F13
C14C13L16
F15D14
K16
E14
J15F14
D11C11K15
D12D13
D10H14G14
E13
G15
L17
D17E17F17
H17
K17G17
E16F16G16
D15J16H16
D16
J17
H13J13K13
C9
E10
G23
H19
D20
F20
G25
H26G26
J24
E26D30
J23
C28D28
E27F23
K22J22H22
D26C26K21
H24
J21
F24
E22
D21
L19K19
D22
C24K20J20F21E21
G20
D25
D23
C21C22
J19
G19
E19F19
D19L18K18
F18G18
E18
H18J18D18
D29
G21
E25
K24
D24
H21
F22
G22
D27
G24
E24
K23
F26
J25
H25
E28E29
FPGA2
F2RAM5_WE*
C95
3C
952
C82
4
C89
2
C75
5C
791
C95
4
C77
9
80.44MHZ
80.44MHZ80.44MHZ
F2_BREFCLKBOT+
10N
RED3*
RED5*
F2RAM5_BA0F2RAM5_CAS*F2RAM5_RAS*
F2RAM6_CAS*
F2RAM6_WE*
F2RAM6_LDM
F2RAM1_UDQSF2RAM1_LDQS
F2RAM2_CAS*
80.44MHZ
80.157MHZFPGA2
RED4*
RED1*
RED7*RED6*RED8*
FPGA2BANK 0 BANK 4
RED0*
10N
F2_CLKTOP-
F2RAM3_CAS*
F2RAM5_BA1
F2RAM3_RAS*F2RAM3_WE*F2RAM3_CS*
F2RAM2_CS*F2RAM2_WE*F2RAM2_RAS*
F2RAM5_CS*
F2RAM6_RAS*
F2RAM6_UDMF2RAM6_CS*
F2RAM2_UDQS
F2RAM6_UDQSF2RAM6_LDQS
F2RAM4_LDQSF2RAM5_UDQSF2RAM5_LDQS
F2RAM4_UDQSF2RAM3_LDQSF2RAM3_UDQSF2RAM2_LDQS
80.157MHZF2_BREFCLKBOT-
100N 10
N
10N
10N
100N
100N
BANK 1
100N 10
N
RED2*
BANK 5FPGA2
F1F2_B
F1F2_A
PROM2_D0INIT2
F2_BREFCLKTOP+F2_BREFCLKTOP- 80.157MHZ
80.157MHZ
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
XC2VP40
IO_L06P_4/VRN_4
IO_L75N_4/GCLK1S
IO_L74N_4/GCLK3S
IO_L75P_4/GCLK0P
IO_L74P_4/GCLK2P
IO_L73N_4IO_L73P_4
IO_L69P_4/VREF_4
IO_L68P_4IO_L69N_4
IO_L68N_4IO_L67P_4IO_L67N_4
IO_L57N_4IO_L57P_4/VREF_4
IO_L53_4IO_L50_4
IO_L48N_4IO_L48P_4IO_L49N_4IO_L49P_4
IO_L54N_4
IO_L56N_4IO_L56P_4
IO_L55P_4
IO_L54P_4IO_L55N_4
IO_L47P_4
IO_L46P_4IO_L47N_4
IO_L46N_4IO_L45P_4/VREF_4
IO_L45N_4
IO_L44N_4IO_L44P_4
IO_L43P_4
IO_L39P_4IO_L43N_4
IO_L38N_4IO_L38P_4IO_L39N_4
IO_L37P_4IO_L37N_4
IO_L26P_4IO_L27N_4
IO_L27P_4/VREF_4
IO_L25P_4IO_L26N_4
IO_L25N_4
IO_L21N_4IO_L21P_4
IO_L20P_4IO_L20N_4IO_L19P_4
IO_L09P_4/VREF_4IO_L19N_4
IO_L05_4
IO_L08N_4IO_L08P_4IO_L09N_4
IO_L07N_4IO_L07P_4/VREF_4
IO_L06N_4/VRP_4
IO_L03N_4/D2IO_L03P_4/D3
IO_L01P_4/INIT_B
IO_L02P_4/D1IO_L02N_4/D0
IO_L01N_4/DOUT
VCCO_4
XC2VP40
IO_L44N_5IO_L53_5
IO_L48P_5IO_L48N_5
IO_L45P_5IO_L57P_5
IO_L25N_5IO_L25P_5
IO_L21P_5
IO_L38P_5IO_L21N_5
IO_L68N_5IO_L68P_5IO_L38N_5
IO_L56N_5IO_L56P_5
IO_L47N_5IO_L47P_5
IO_L05_5IO_L07P_5
IO_L46N_5IO_L44P_5
IO_L39P_5IO_L43N_5
IO_L26N_5IO_L26P_5IO_L37N_5
IO_L19N_5IO_L08N_5
IO_L49N_5IO_L49P_5
IO_L50_5IO_L54N_5IO_L54P_5IO_L55N_5IO_L55P_5IO_L67N_5IO_L69P_5IO_L67P_5
IO_L73P_5IO_L73N_5
IO_L02P_5/D7
IO_L19P_5
VCCO_5
IO_L37P_5IO_L46P_5
IO_L43P_5
IO_L03N_5/D4
IO_L39N_5IO_L03P_5/D5
IO_L27P_5IO_L09P_5
IO_L69N_5/VREF_5IO_L57N_5/VREF_5IO_L45N_5/VREF_5IO_L27N_5/VREF_5IO_L09N_5/VREF_5IO_L07N_5/VREF_5
IO_L06P_5/VRN_5
IO_L06N_5/VRP_5
IO_L20P_5IO_L08P_5
IO_L02N_5/D6
IO_L01N_5/RDWR_BIO_L01P_5/CS_B
IO_L75N_5/GCLK7S
IO_L74N_5/GCLK5SIO_L74P_5/GCLK4P
IO_L75P_5/GCLK6P
IO_L20N_5
XC2VP40
IO_L44P_1
IO_L38N_1
IO_L27P_1IO_L27N_1/VREF_1
IO_L37P_1
IO_L75P_1/GCLK2S
IO_L68N_1
IO_L57N_1/VREF_1IO_L57P_1IO_L56N_1
IO_L67P_1IO_L67N_1IO_L68P_1
IO_L73P_1IO_L69N_1/VREF_1
IO_L75N_1/GCLK3P
IO_L73N_1IO_L74P_1/GCLK0SIO_L74N_1/GCLK1P
IO_L69P_1
IO_L55P_1
IO_L43N_1
IO_L45N_1/VREF_1IO_L45P_1IO_L44N_1
IO_L46P_1IO_L46N_1
IO_L48P_1IO_L47N_1IO_L47P_1
IO_L49P_1IO_L48N_1
IO_L49N_1
IO_L54N_1
IO_L56P_1IO_L55N_1
IO_L54P_1IO_L53_1IO_L50_1
IO_L43P_1
IO_L20N_1IO_L20P_1
IO_L19P_1IO_L09N_1/VREF_1
IO_L09P_1
IO_L19N_1
IO_L21N_1IO_L21P_1
IO_L25P_1IO_L25N_1IO_L26P_1IO_L26N_1
IO_L37N_1IO_L38P_1
IO_L39P_1IO_L39N_1
IO_L08N_1IO_L08P_1IO_L07N_1IO_L07P_1IO_L06N_1IO_L06P_1
IO_L03N_1/VREF_1
IO_L02P_1IO_L01N_1/VRP_1
IO_L03P_1IO_L02N_1
IO_L01P_1/VRN_1
IO_L05_1
VCCO_1
2V5E2 2V5E22V5E2
2V5E2
2V5E2 2V5E21V25R2
XC2VP40
IO_L01N_0/VRP_0IO_L01P_0/VRN_0
IO_L03N_0
IO_L05_0
IO_L07N_0
IO_L09N_0
IO_L19P_0
IO_L21P_0
IO_L26P_0
IO_L37P_0
IO_L43N_0
IO_L45N_0
IO_L47N_0
IO_L06N_0
IO_L44N_0
IO_L45P_0/VREF_0
IO_L08P_0
VCCO_0
IO_L74P_0/GCLK6SIO_L75N_0/GCLK5PIO_L75P_0/GCLK4S
IO_L74N_0/GCLK7P
IO_L73N_0IO_L73P_0
IO_L69P_0/VREF_0IO_L69N_0IO_L68P_0
IO_L67P_0IO_L68N_0
IO_L67N_0
IO_L57N_0
IO_L53_0IO_L50_0
IO_L46P_0
IO_L44P_0
IO_L55N_0
IO_L49P_0IO_L49N_0IO_L48P_0IO_L48N_0IO_L47P_0
IO_L46N_0
IO_L54P_0IO_L54N_0
IO_L56N_0
IO_L43P_0
IO_L19N_0
IO_L39P_0
IO_L21N_0
IO_L39N_0IO_L38P_0IO_L38N_0
IO_L37N_0IO_L27P_0/VREF_0
IO_L27N_0
IO_L25P_0IO_L26N_0
IO_L20N_0IO_L20P_0
IO_L09P_0/VREF_0
IO_L08N_0IO_L07P_0
IO_L06P_0
IO_L02P_0IO_L02N_0
IO_L03P_0/VREF_0
IO_L55P_0
IO_L56P_0
IO_L57P_0/VREF_0
IO_L25N_0
15
FPGA2 BANKS 2/3Tue Dec 12 10:12:40 2006
M1
F2RAM7_D<15>
F2RAM7_ADD<12>51R
51R
R734
R714 51RR626
51RR634
AJ1 F2RAM7_ADD<10>F2RAM7_ADD<3>AL1F2RAM7_ADD<2>F2RAM7_ADD<1>AK1
AH4AG4 F2RAM7_D<5>
F2RAM7_D<4>
F2RAM7_BA1
C12
46C
1093
C10
16
C97
6
C13
95
C11
38
C90
3
C14
20C
1002
C10
88
10N
10N
10N
10N
100N
100N
100N
100N
4U7
4U7
U15U15
V4V3Y2
V9V10
W4
Y1W3
W11V11Y4Y7W10W9
AA3AA4
AB4Y9Y10
AA10AB3
AA9
AE1AC4
AB8AC7
AF2AB9AB10
AG2AE2
AC10
AH2AC9
AE8AD10
AK4
AJ7
AA8AA7
AB7
V8W8
AC3
AF4AE4AD4
AF3
AH3
AL2
AK2
AJ5
AJ4
Y3AB1
W2
AC2AD3AG1
AG5AG3
AK3
AD9
AH8
AJ8
AH6
AG6
AF6AD6AC6AB6AA6Y6
V6W6
AF5AH5
AE5AD5
AA5W5
AB5
V5
V7
AE7W7
AD8AD7
AJ2AH1AD1AB2
AA2AD2AC1
AA1AG7AF8AF7
R7
U4U3
H6
L6J6
J7J8E4F7F8
N8K8
L8
T8
F5
T9T2
H4H3
U2
D1D2
H1H2G1G2F1F2E1E3
K2K4J3
G3G4F4
R3
H5
K5L5
E2G6J4
L2
R2
J2
P4
L9
M9
K7M10
L7K1L1
N9N10
M4M2
P2N2
R9P3
R10
U11T11
P1
T10R1
T5
U9U6
U10
U8
P8
V2U5
M3P10P9N1N4N3
N7U7M7
R6
M6N6P6
T6
P7
L10
J5
G5
R4
T7
N5P5
L3L4
T3T4
FPGA2BANK 2
F2RAM9_UDQS
F2RAM9_WE*
F2RAM9_RAS*F2RAM9_CAS*
F2RAM9_LDQS
F2RAM9_LDMF2RAM9_UDMF2RAM9_CS*
FPGA2
F2RAM7_RAS*F2RAM7_CAS*
BANK 3
F2RAM8_CS*F2RAM8_WE*
F2RAM7_BA0
F2RAM7_LDQS
F2RAM8_UDQS
F2RAM7_UDQS
F2RAM7_ADD<0>
F2RAM7_D<8>F2RAM7_D<9>F2RAM7_D<10>F2RAM7_D<11>F2RAM7_D<12>F2RAM7_D<13>F2RAM7_D<14>
F2RAM8_D<8>F2RAM8_D<9>F2RAM8_D<10>F2RAM8_D<11>F2RAM8_D<12>F2RAM8_D<13>
F2RAM9_D<8>F2RAM9_D<9>F2RAM9_D<10>F2RAM9_D<11>F2RAM9_D<12>F2RAM9_D<13>F2RAM9_D<14>F2RAM9_D<15>
F2RAM7_D<0>
F2RAM7_D<3>
F2RAM7_D<6>
F2RAM7_ADD<11>F2RAM7_ADD<9>F2RAM7_ADD<8>F2RAM7_ADD<7>F2RAM7_ADD<6>F2RAM7_ADD<5>F2RAM7_ADD<4>
F2RAM7_D<7>
F2RAM8_LDQS
F2RAM8_RAS*F2RAM8_CAS*
F2RAM8_D<14>F2RAM8_D<15>
F2RAM8_LDMF2RAM8_UDM
F2RAM8_BA0F2RAM8_BA1
F2RAM9_D<3>
F2RAM7_WE*F2RAM7_CS*F2RAM7_UDMF2RAM7_LDMF2RAM7_CKEF2RAM7_CKF2RAM7_CK*
F2RAM8_D<7>F2RAM8_D<6>F2RAM8_D<5>F2RAM8_D<4>F2RAM8_D<3>F2RAM8_D<2>F2RAM8_D<1>
F2RAM7_D<1>F2RAM7_D<2>
F2RAM9_BA0
F2RAM8_D<0>
F2RAM9_D<4>
F2RAM9_BA1
F2RAM9_D<0>
F2RAM9_D<2>
F2RAM9_CK*
F2RAM9_CKE
F2RAM8_CKEF2RAM8_CKF2RAM8_CK*
F2RAM9_D<7>F2RAM9_D<6>F2RAM9_D<5>
F2RAM9_D<1>
F2RAM9_CK
FPGA_POR*
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
XC2VP40
IO_L85N_2IO_L85P_2
IO_L42N_2IO_L42P_2
IO_L51P_2IO_L45P_2
IO_L59P_2
IO_L57N_2
IO_L16P_2
IO_L21P_2
IO_L18N_2
IO_L47P_2
IO_L60N_2
IO_L51N_2IO_L45N_2IO_L39P_2
IO_L54P_2
IO_L39N_2IO_L89P_2IO_L41P_2
IO_L48P_2IO_L48N_2IO_L46P_2IO_L44P_2IO_L44N_2IO_L43P_2
IO_L87P_2IO_L88P_2
IO_L47N_2
IO_L89N_2
IO_L86N_2
IO_L87N_2IO_L86P_2
IO_L60P_2
IO_L55P_2IO_L56N_2
IO_L55N_2
IO_L53N_2IO_L53P_2
IO_L50N_2
IO_L52P_2IO_L50P_2
IO_L49N_2IO_L49P_2
IO_L40P_2IO_L43N_2
IO_L38N_2IO_L38P_2
IO_L37P_2IO_L37N_2IO_L35P_2
IO_L32N_2IO_L23P_2
IO_L32P_2
IO_L18P_2
IO_L52N_2/VREF_2
IO_L34N_2/VREF_2
VCCO_2
IO_L58N_2/VREF_2
IO_L40N_2/VREF_2IO_L46N_2/VREF_2
IO_L22N_2/VREF_2IO_L16N_2/VREF_2IO_L04N_2/VREF_2
IO_L36P_2IO_L33N_2
IO_L19P_2
IO_L57P_2
IO_L06P_2IO_L15N_2IO_L15P_2
IO_L22P_2IO_L33P_2IO_L34P_2
IO_L03P_2IO_L04P_2IO_L17N_2IO_L17P_2IO_L20N_2IO_L20P_2IO_L31N_2IO_L31P_2
IO_L01N_2/VRP_2IO_L01P_2/VRN_2
IO_L88N_2/VREF_2
IO_L24P_2IO_L24N_2
IO_L58P_2IO_L56P_2
IO_L06N_2
IO_L59N_2
IO_L35N_2
IO_L23N_2IO_L41N_2
IO_L02N_2IO_L02P_2IO_L03N_2IO_L05N_2IO_L05P_2
IO_L21N_2IO_L36N_2
IO_L19N_2
IO_L90P_2IO_L90N_2
IO_L54N_2
1V25R2
DGND
2V5F2
DGND
2V5F2
2V5F22V5F2
2V5F2
1V25R2
XC2VP40
IO_L17N_3IO_L17P_3IO_L05N_3IO_L60P_3
IO_L51P_3IO_L45P_3IO_L54N_3
IO_L54P_3IO_L42N_3IO_L24N_3IO_L18P_3
IO_L35N_3IO_L35P_3
IO_L56N_3IO_L23N_3
IO_L89N_3
IO_L88N_3
IO_L46N_3
IO_L58N_3IO_L49N_3
IO_L37N_3IO_L34P_3
IO_L04N_3IO_L22N_3
IO_L58P_3IO_L88P_3
IO_L55N_3IO_L49P_3IO_L46P_3IO_L40N_3IO_L37P_3IO_L22P_3
IO_L15P_3
IO_L04P_3
IO_L02P_3
IO_L05P_3
IO_L20N_3
IO_L03N_3/VREF_3
IO_L21N_3/VREF_3IO_L15N_3/VREF_3
IO_L33N_3/VREF_3IO_L39N_3/VREF_3IO_L45N_3/VREF_3
IO_L87N_3/VREF_3
IO_L51N_3/VREF_3IO_L57N_3/VREF_3
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
IO_L18N_3IO_L06N_3
IO_L16P_3IO_L16N_3IO_L06P_3
IO_L19N_3IO_L19P_3IO_L21P_3IO_L31N_3
IO_L39P_3IO_L34N_3IO_L31P_3
IO_L43N_3
IO_L56P_3IO_L89P_3
IO_L41N_3
IO_L47N_3IO_L47P_3
VCCO_3
IO_L02N_3
IO_L03P_3
IO_L20P_3IO_L23P_3
IO_L32N_3IO_L24P_3
IO_L32P_3
IO_L36N_3IO_L33P_3
IO_L38P_3IO_L38N_3IO_L36P_3
IO_L40P_3IO_L41P_3
IO_L43P_3IO_L42P_3
IO_L44N_3
IO_L48N_3IO_L44P_3
IO_L50P_3IO_L50N_3IO_L48P_3
IO_L52P_3IO_L52N_3
IO_L53N_3IO_L53P_3IO_L55P_3IO_L57P_3IO_L59N_3IO_L59P_3
IO_L85N_3IO_L60N_3
IO_L85P_3
IO_L86P_3IO_L86N_3
IO_L87P_3IO_L90N_3IO_L90P_3
DGND
16
FPGA2 BANKS 6/7 (DDR SDRAM)
7 X 10NF
Tue Dec 12 10:20:00 2006
C75
64U
7
AJ34 F2RAM4_ADD<9>
F2RAM4_ADD<12..0>
F2RAM6_D<15..0>
F2RAM4_ADD<11>F2RAM4_ADD<12>
F2RAM1_ADD<8>F2RAM1_ADD<7>F2RAM1_ADD<6>F2RAM1_ADD<5>F2RAM1_ADD<4>F2RAM1_ADD<3>F2RAM1_ADD<2>F2RAM1_ADD<1>
H34
F2RAM5_D<15..0>
F2RAM4_BA0
C11
43
F2RAM4_CAS*F2RAM4_WE*
U15U15
F2RAM4_D<15..0>
F2RAM3_D<15..0>
F2RAM2_D<15..0>
F2RAM1_D<15..0>
AG30
C10
41
C14
37
C11
90C
1418
C96
4
C10
01
C10
81C
1198
C12
26
C10
36C
944
C98
8
C11
30
C11
14C
1032
C12
18C
1458
C78
0
T30
T24
J28F27
J29
F31
T32R31
L29M29
F28
T26
G29E33
D34
D33
P34
N33
R33U33
P31
L33M34
J31J33
N34
R34T33
V33U32
H30
K30J30
L30L31N30
R29P30
L28M28
P28N28
T28U28
R28
N27P27R26
N31P32R32
T31
N26
F30E31
G31G32
H31J32
H32
E32
K28
P26
G34P33
E34F33F34
G30M31M32
K34L34M33K33
H33G33
U26
K31
H29
N29
L27
T27
U31U30
K27L25
N25M25
L26
P29T29
M26
U27
P25
J27
U29
U24U25T25R25
L32
N32
AD30
AA30AB30AB31
Y29W31
V24V27
AB26AB25
W25
V29W30W29Y26
AD27AD25AD26
AJ28AJ27
AC25AA25
W26Y25
AE27AG28V25
AD28AE28
AC28AB28AA28Y28
AH31
AK31AH27AG29
AD33
AJ33
AC34
AC33
AJ31
AL34
AD34
AK32
AG32AG34AD32
AB34Y32W33
AJ30
AH34AH33
AK34
AA33AA34AB33
W32
Y34
AA31
AL33
AK33
AA32
AF33AE33AB27
AG33AE34
Y31AB29AC29AD29AF27AF28AH29
AC32AH30
AC31AD31AE31
AF31AF32
AG31AH32
AC26AF29
AA29AF30
AE30
Y33V26
V28
AA26AB32
W27
AA27W28
W24
V30
V31
V32
F2RAM6_D<11>F2RAM6_D<12>F2RAM6_D<13>F2RAM6_D<14>
R638
R642
R739
R720
F2RAM4_D<14>F2RAM4_D<15>
F2RAM3_UDMF2RAM3_CKEF2RAM3_BA0F2RAM3_BA1F2RAM3_D<1>F2RAM3_D<2>
F2RAM5_UDM
F2RAM5_CKE
F2RAM4_CS*
F2RAM4_BA1
BANK 7FPGA2
F2RAM1_UDMF2RAM1_LDM
F2RAM1_CKF2RAM1_CK*
F2RAM1_ADD<12..0>
F2RAM1_WE*
10N
F2RAM1_BA1
F2RAM1_CAS*
10N4U
7
F2RAM5_LDM
F2RAM5_CK*
FPGA2
F2RAM2_CKF2RAM2_CKE
F2RAM2_CK*F2RAM2_LDM
F2RAM3_LDM
F2RAM3_CKF2RAM3_CK*
F2RAM1_RAS*F2RAM1_BA0
F2RAM1_CKEF2RAM1_CS*
BANK 6
F2RAM4_ADD<0>
F2RAM4_ADD<2>
F2RAM4_ADD<4>F2RAM4_ADD<5>F2RAM4_ADD<6>F2RAM4_ADD<7>
F2RAM5_D<7>
F2RAM5_D<4>F2RAM5_D<3>F2RAM5_D<2>
F2RAM5_D<0>
F2RAM6_D<8>F2RAM6_D<9>
F2RAM6_D<15>
F2RAM6_D<4>F2RAM6_D<3>
F2RAM6_D<1>
F2RAM3_D<8>F2RAM3_D<0>
F2RAM4_D<1>F2RAM4_D<0>
F2RAM4_D<8>F2RAM4_D<9>F2RAM4_D<10>F2RAM4_D<11>F2RAM4_D<12>F2RAM4_D<13>
F2RAM1_ADD<0>
F2RAM1_ADD<9>F2RAM1_ADD<10>
F2RAM1_D<8>F2RAM1_D<9>
F2RAM1_D<15>
F2RAM1_D<7>F2RAM1_D<6>F2RAM1_D<5>F2RAM1_D<4>F2RAM1_D<3>F2RAM1_D<2>F2RAM1_D<1>F2RAM1_D<0>
F2RAM2_D<15>F2RAM2_D<14>F2RAM2_D<13>F2RAM2_D<12>F2RAM2_D<11>F2RAM2_D<10>
F2RAM2_UDM
F2RAM2_D<9>F2RAM2_D<8>F2RAM2_D<7>F2RAM2_D<6>F2RAM2_D<5>F2RAM2_D<4>F2RAM2_D<3>F2RAM2_D<2>F2RAM2_D<1>F2RAM2_D<0>F2RAM2_BA1F2RAM2_BA0
F2RAM3_D<9>F2RAM3_D<10>F2RAM3_D<11>F2RAM3_D<12>F2RAM3_D<13>F2RAM3_D<14>F2RAM3_D<15>
F2RAM4_UDM
F2RAM3_D<3>
F2RAM3_D<5>F2RAM3_D<6>F2RAM3_D<7>
F2RAM6_D<7>F2RAM6_D<6>
F2RAM4_D<1>F2RAM4_D<0>
F2RAM4_D<2>F2RAM4_D<3>F2RAM4_D<4>F2RAM4_D<5>F2RAM4_D<6>F2RAM4_D<7>
F2RAM4_D<8>F2RAM4_D<9>F2RAM4_D<10>
F2RAM3_D<0>
F2RAM3_D<8>
F2RAM4_D<13>F2RAM4_D<12>F2RAM4_D<11>
F2RAM6_D<5>
F2RAM4_ADD<3>
F2RAM1_D<10>F2RAM1_D<11>F2RAM1_D<12>F2RAM1_D<13>F2RAM1_D<14>
F2RAM4_ADD<1>
F2RAM4_ADD<8>
F2RAM4_LDM
F2RAM5_D<6>
F2RAM5_CK
F2RAM6_D<10>
F2RAM6_D<2>
F2RAM6_CK*F2RAM6_CKF2RAM6_CKEF2RAM6_BA0F2RAM6_BA1
F2RAM6_D<0>
F2RAM3_D<4>
10N
10N
10N
F2RAM4_ADD<10>
F2RAM5_D<11>
F2RAM5_D<13>
F2RAM4_CK
F2RAM5_D<14>
F2RAM5_D<12>
F2RAM5_D<10>
F2RAM5_D<8>
F2RAM5_D<1>
F2RAM5_D<5>
F2RAM5_D<9>
F2RAM5_D<15>
F2RAM4_CK*
F2RAM4_CKE
F2RAM4_RAS*
10N
10N
F2RAM1_ADD<11>F2RAM1_ADD<12>
51R
51R
51R
51R
100N
100N 10
0N
100N
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
2V5A22V5A22V5A2
2V5A22V5A2
2V5A2
1V25R2 1V25R2
XC2VP40
IO_L48P_7
IO_L42P_7
IO_L50N_7IO_L56N_7IO_L86N_7IO_L53P_7
IO_L87N_7
IO_L05N_7
IO_L44N_7
IO_L89N_7
IO_L32P_7
IO_L60N_7IO_L51N_7
IO_L18P_7
IO_L32N_7IO_L38N_7
IO_L18N_7IO_L23N_7
IO_L87P_7IO_L90N_7
IO_L59N_7
IO_L35N_7
IO_L45N_7
IO_L19N_7
IO_L33P_7
IO_L86P_7
IO_L20N_7IO_L31N_7
IO_L34P_7IO_L40P_7IO_L37P_7IO_L37N_7
IO_L43P_7IO_L43N_7IO_L16P_7
IO_L17P_7IO_L17N_7IO_L04P_7
IO_L31P_7
IO_L49P_7IO_L20P_7
IO_L44P_7
IO_L23P_7
IO_L03P_7
IO_L24P_7
IO_L22P_7IO_L24N_7
IO_L15P_7IO_L15N_7
IO_L03N_7IO_L06N_7
IO_L38P_7
IO_L85N_7
IO_L57P_7IO_L52P_7IO_L48N_7
IO_L50P_7IO_L47N_7IO_L41N_7
IO_L54N_7
IO_L89P_7IO_L59P_7
IO_L41P_7IO_L47P_7
IO_L39N_7IO_L35P_7
IO_L51P_7IO_L54P_7
IO_L45P_7IO_L42N_7IO_L36P_7
IO_L21P_7IO_L33N_7
IO_L19P_7
IO_L90P_7IO_L88P_7
IO_L58P_7IO_L55P_7
IO_L46P_7
IO_L34N_7/VREF_7IO_L22N_7/VREF_7
IO_L46N_7/VREF_7IO_L40N_7/VREF_7
IO_L52N_7/VREF_7
IO_L88N_7/VREF_7IO_L58N_7/VREF_7
IO_L49N_7
IO_L55N_7
IO_L01N_7/VRP_7
IO_L01P_7/VRN_7
IO_L04N_7/VREF_7IO_L16N_7/VREF_7
VCCO_7
IO_L56P_7
IO_L02P_7
IO_L39P_7IO_L36N_7
IO_L57N_7IO_L85P_7
IO_L06P_7
IO_L21N_7
IO_L02N_7IO_L05P_7
IO_L53N_7
IO_L60P_7
XC2VP40
IO_L90N_6
IO_L90P_6
IO_L88N_6
IO_L59P_6
IO_L56N_6IO_L47P_6
IO_L56P_6
IO_L48N_6IO_L44N_6
IO_L89N_6
IO_L86N_6IO_L87P_6
IO_L34P_6
IO_L22N_6IO_L49P_6
IO_L22P_6IO_L32N_6
IO_L19N_6IO_L21P_6
IO_L31N_6IO_L31P_6
IO_L34N_6IO_L39P_6IO_L43P_6
IO_L04N_6IO_L43N_6
IO_L04P_6IO_L17N_6IO_L17P_6IO_L37P_6IO_L40N_6IO_L46P_6IO_L57P_6
IO_L42P_6IO_L33P_6
IO_L41P_6IO_L36N_6IO_L36P_6
IO_L52N_6
IO_L16P_6
VCCO_6
IO_L06P_6
IO_L52P_6
IO_L60N_6
IO_L85N_6
IO_L54P_6IO_L60P_6IO_L54N_6
IO_L16N_6
IO_L18N_6
IO_L24P_6IO_L24N_6
IO_L01P_6/VRN_6
IO_L87N_6/VREF_6IO_L57N_6/VREF_6IO_L51N_6/VREF_6
IO_L39N_6/VREF_6IO_L33N_6/VREF_6IO_L21N_6/VREF_6IO_L15N_6/VREF_6IO_L03N_6/VREF_6
IO_L42N_6
IO_L06N_6
IO_L01N_6/VRP_6
IO_L45N_6/VREF_6
IO_L51P_6
IO_L18P_6
IO_L45P_6
IO_L15P_6IO_L05P_6IO_L03P_6
IO_L19P_6
IO_L55P_6IO_L47N_6IO_L41N_6IO_L40P_6
IO_L23N_6IO_L35N_6
IO_L86P_6IO_L05N_6IO_L23P_6
IO_L50P_6IO_L53N_6
IO_L44P_6IO_L32P_6
IO_L02P_6IO_L02N_6
IO_L20N_6IO_L20P_6IO_L35P_6
IO_L50N_6IO_L58P_6IO_L58N_6IO_L88P_6
IO_L53P_6
IO_L38P_6IO_L38N_6
IO_L89P_6IO_L59N_6
IO_L85P_6IO_L55N_6
IO_L48P_6IO_L46N_6IO_L49N_6
IO_L37N_6
DGNDDGND
DGND
DGND
DGND
FPGA3 BANKS 0/1/4/5
17
Tue Dec 12 10:29:50 2006
H22
RED17*
C95
7C
1271
C12
57C
956
C95
5
C12
56C
895
C10
94
C84
4
C11
07C
1045
C79
3C
1123
C75
8
C78
2
51R
51RR619
R615
U16U16U16U16
100N4U
7
4U7
AK18AL18
AH18AJ18
AF18AG18
AK19
AL19
AH19AJ19
AD18
AE18
AL21
AL20
AH20AJ20
AF19AG19AM21AM22
AK21
AJ21AD19AE19
AL22AL23
AG21AH21
AE20
AF20
AL24
AM24
AJ22
AK22
AE21
AF21AJ24
AK24
AG22AH22
AE22
AF22
AK25
AL25
AH23AJ23
AG24AH24AL26AM26
AJ26
AK26
AE23
AF23
AK27
AL27
AG25
AH25AE24
AF24
AL28
AM28
AF25
AK29AK28
AG26AH26
AL30AL29
AL17AK17AJ17AH17AG17AF17AL16AK16AJ16AH16AE17AD17AL15AL14AJ15AH15AG16AF16AM13AM14AK14AJ14AE16AD16AL12AL13AH14AG14AF15AE15AM11AL11AK13AJ13AF14AE14AK11AJ11AH13AG13AF13AE13AL10AK10AJ12AH12AH11AG11AM9AL9AK9AJ9AF12AE12AL8AK8AH10AG10AF11AE11AM7AL7AF10AK7AK6AH9AG9AL6AL5
J17H17
E17D17
G17F17
L17K17
E16D16
G16F16
J16H16
D14D15
G15F15
L16K16
C13C14
F14E14
K15J15
D11C11
D13D12
H14G14
E10D10
F13E13
K14J14
D9C9
H13G13
K13J13
E8D8
G12F12
H11G11
D7C7
F11E11
K12J12
D5D6
F9E9
K11J11
J10
H10G10
H9G9
E6E7
H18J18D18E18F18G18K18L18D19E19F19G19H19J19D20D21F20G20K19L19C22C21E21F21J20K20C24D24D23D22G21H21D25E25E22F22J21K21C26D26G22
J22K22D27E27F23G23G24H24C28D28E24F24J23K23D29D30E26F26J24K24J25G25H25G26H26E28E29
80.157MHZ
F1F3_A
F1F3_B
F3RAM2_CAS*
FPGA3BANK 1 BANK 4
RED16*RED15*
RED14*
RED13*
RED12*
RED11*
RED10*
RED9*
100N
80.44MHZ80.44MHZF3_CLKTOP+
F3_CLKTOP-
F3_BREFCLKBOT-F3_BREFCLKBOT+ 80.157MHZ
F3_CLKBOT-F3_CLKBOT+ 80.44MHZ
10N
F3_BREFCLKTOP+F3_BREFCLKTOP-
100N 10
N10
N
PROM3_D0
F3RAM6_CAS*
F3RAM3_WE*F3RAM3_CS*
F3RAM5_BA1
F3RAM5_CAS*F3RAM5_BA0
F3RAM5_RAS*
F3RAM3_RAS*F3RAM3_CAS*
F3RAM2_CS*F3RAM2_WE*F3RAM2_RAS*
F3RAM5_WE*
F3RAM6_CS*
F3RAM5_CS*
F3RAM6_RAS*F3RAM6_WE*
F3RAM6_LDQSF3RAM6_UDQSF3RAM5_LDQSF3RAM5_UDQSF3RAM4_LDQSF3RAM4_UDQSF3RAM3_LDQSF3RAM3_UDQSF3RAM2_LDQSF3RAM2_UDQSF3RAM1_LDQSF3RAM1_UDQS
F3RAM6_LDMF3RAM6_UDM
80.157MHZ
BANK 5FPGA3
80.44MHZ10
N10
N
10N
10N
BANK 0
100N
FPGA3 FPGA3
80.157MHZ
INIT3
100N
100N
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
XC2VP40
IO_L06P_4/VRN_4
IO_L75N_4/GCLK1S
IO_L74N_4/GCLK3S
IO_L75P_4/GCLK0P
IO_L74P_4/GCLK2P
IO_L73N_4IO_L73P_4
IO_L69P_4/VREF_4
IO_L68P_4IO_L69N_4
IO_L68N_4IO_L67P_4IO_L67N_4
IO_L57N_4IO_L57P_4/VREF_4
IO_L53_4IO_L50_4
IO_L48N_4IO_L48P_4IO_L49N_4IO_L49P_4
IO_L54N_4
IO_L56N_4IO_L56P_4
IO_L55P_4
IO_L54P_4IO_L55N_4
IO_L47P_4
IO_L46P_4IO_L47N_4
IO_L46N_4IO_L45P_4/VREF_4
IO_L45N_4
IO_L44N_4IO_L44P_4
IO_L43P_4
IO_L39P_4IO_L43N_4
IO_L38N_4IO_L38P_4IO_L39N_4
IO_L37P_4IO_L37N_4
IO_L26P_4IO_L27N_4
IO_L27P_4/VREF_4
IO_L25P_4IO_L26N_4
IO_L25N_4
IO_L21N_4IO_L21P_4
IO_L20P_4IO_L20N_4IO_L19P_4
IO_L09P_4/VREF_4IO_L19N_4
IO_L05_4
IO_L08N_4IO_L08P_4IO_L09N_4
IO_L07N_4IO_L07P_4/VREF_4
IO_L06N_4/VRP_4
IO_L03N_4/D2IO_L03P_4/D3
IO_L01P_4/INIT_B
IO_L02P_4/D1IO_L02N_4/D0
IO_L01N_4/DOUT
VCCO_4
2V5E3
XC2VP40
IO_L44P_1
IO_L38N_1
IO_L27P_1IO_L27N_1/VREF_1
IO_L37P_1
IO_L75P_1/GCLK2S
IO_L68N_1
IO_L57N_1/VREF_1IO_L57P_1IO_L56N_1
IO_L67P_1IO_L67N_1IO_L68P_1
IO_L73P_1IO_L69N_1/VREF_1
IO_L75N_1/GCLK3P
IO_L73N_1IO_L74P_1/GCLK0SIO_L74N_1/GCLK1P
IO_L69P_1
IO_L55P_1
IO_L43N_1
IO_L45N_1/VREF_1IO_L45P_1IO_L44N_1
IO_L46P_1IO_L46N_1
IO_L48P_1IO_L47N_1IO_L47P_1
IO_L49P_1IO_L48N_1
IO_L49N_1
IO_L54N_1
IO_L56P_1IO_L55N_1
IO_L54P_1IO_L53_1IO_L50_1
IO_L43P_1
IO_L20N_1IO_L20P_1
IO_L19P_1IO_L09N_1/VREF_1
IO_L09P_1
IO_L19N_1
IO_L21N_1IO_L21P_1
IO_L25P_1IO_L25N_1IO_L26P_1IO_L26N_1
IO_L37N_1IO_L38P_1
IO_L39P_1IO_L39N_1
IO_L08N_1IO_L08P_1IO_L07N_1IO_L07P_1IO_L06N_1IO_L06P_1
IO_L03N_1/VREF_1
IO_L02P_1IO_L01N_1/VRP_1
IO_L03P_1IO_L02N_1
IO_L01P_1/VRN_1
IO_L05_1
VCCO_1
XC2VP40
IO_L44N_5IO_L53_5
IO_L48P_5IO_L48N_5
IO_L45P_5IO_L57P_5
IO_L25N_5IO_L25P_5
IO_L21P_5
IO_L38P_5IO_L21N_5
IO_L68N_5IO_L68P_5IO_L38N_5
IO_L56N_5IO_L56P_5
IO_L47N_5IO_L47P_5
IO_L05_5IO_L07P_5
IO_L46N_5IO_L44P_5
IO_L39P_5IO_L43N_5
IO_L26N_5IO_L26P_5IO_L37N_5
IO_L19N_5IO_L08N_5
IO_L49N_5IO_L49P_5
IO_L50_5IO_L54N_5IO_L54P_5IO_L55N_5IO_L55P_5IO_L67N_5IO_L69P_5IO_L67P_5
IO_L73P_5IO_L73N_5
IO_L02P_5/D7
IO_L19P_5
VCCO_5
IO_L37P_5IO_L46P_5
IO_L43P_5
IO_L03N_5/D4
IO_L39N_5IO_L03P_5/D5
IO_L27P_5IO_L09P_5
IO_L69N_5/VREF_5IO_L57N_5/VREF_5IO_L45N_5/VREF_5IO_L27N_5/VREF_5IO_L09N_5/VREF_5IO_L07N_5/VREF_5
IO_L06P_5/VRN_5
IO_L06N_5/VRP_5
IO_L20P_5IO_L08P_5
IO_L02N_5/D6
IO_L01N_5/RDWR_BIO_L01P_5/CS_B
IO_L75N_5/GCLK7S
IO_L74N_5/GCLK5SIO_L74P_5/GCLK4P
IO_L75P_5/GCLK6P
IO_L20N_5
2V5E3
2V5E3 2V5E3 2V5E3 2V5E31V25R3
XC2VP40
IO_L01N_0/VRP_0IO_L01P_0/VRN_0
IO_L03N_0
IO_L05_0
IO_L07N_0
IO_L09N_0
IO_L19P_0
IO_L21P_0
IO_L26P_0
IO_L37P_0
IO_L43N_0
IO_L45N_0
IO_L47N_0
IO_L06N_0
IO_L44N_0
IO_L45P_0/VREF_0
IO_L08P_0
VCCO_0
IO_L74P_0/GCLK6SIO_L75N_0/GCLK5PIO_L75P_0/GCLK4S
IO_L74N_0/GCLK7P
IO_L73N_0IO_L73P_0
IO_L69P_0/VREF_0IO_L69N_0IO_L68P_0
IO_L67P_0IO_L68N_0
IO_L67N_0
IO_L57N_0
IO_L53_0IO_L50_0
IO_L46P_0
IO_L44P_0
IO_L55N_0
IO_L49P_0IO_L49N_0IO_L48P_0IO_L48N_0IO_L47P_0
IO_L46N_0
IO_L54P_0IO_L54N_0
IO_L56N_0
IO_L43P_0
IO_L19N_0
IO_L39P_0
IO_L21N_0
IO_L39N_0IO_L38P_0IO_L38N_0
IO_L37N_0IO_L27P_0/VREF_0
IO_L27N_0
IO_L25P_0IO_L26N_0
IO_L20N_0IO_L20P_0
IO_L09P_0/VREF_0
IO_L08N_0IO_L07P_0
IO_L06P_0
IO_L02P_0IO_L02N_0
IO_L03P_0/VREF_0
IO_L55P_0
IO_L56P_0
IO_L57P_0/VREF_0
IO_L25N_0
18
FPGA3 BANKS 2/3Tue Dec 12 11:09:47 2006
F3RAM7_ADD<8>
51R
51RR627
R635
F3RAM7_D<3>AF4AF3
F3RAM7_D<2>F3RAM7_D<1>F3RAM7_D<0>
F3RAM7_ADD<10>
AJ4
51RR735
N9N10
100N 10N
C12
47
AB1
W2
AG3AG5
4U7
Y7
Y1
F3RAM9_D<12>P6
N8F3RAM9_UDMF3RAM9_CS*
F3RAM8_RAS*
R3
F3RAM8_D<14>
F3RAM7_LDQS
F3RAM8_D<15>
F3RAM8_D<13>F3RAM8_D<12>F3RAM8_D<11>F3RAM8_D<10>
F3RAM9_D<15>
F3RAM9_D<13>
F3RAM9_D<11>F3RAM9_D<10>F3RAM9_D<9>
10N
10N
100N
100N
100N
BANK 2FPGA3
BANK 3FPGA3
F3RAM8_LDQS
F3RAM8_CAS*F3RAM8_WE*F3RAM8_CS*F3RAM8_UDMF3RAM8_LDM
F3RAM9_UDQSF3RAM9_LDQS
F3RAM9_RAS*F3RAM9_CAS*F3RAM9_WE*
F3RAM9_LDM
F3RAM7_BA1F3RAM7_BA0
F3RAM7_CAS*F3RAM7_WE*
F3RAM7_CK*
F3RAM8_BA1F3RAM8_BA0F3RAM8_CKEF3RAM8_CKF3RAM8_CK*
F3RAM9_CKEF3RAM9_BA0F3RAM9_BA1
F3RAM8_UDQS
F3RAM7_ADD<12>F3RAM7_ADD<11>
F3RAM7_UDQS
F3RAM7_ADD<5>F3RAM7_ADD<6>F3RAM7_ADD<7>
F3RAM7_D<11>F3RAM7_D<10>
F3RAM7_D<8>F3RAM7_D<9>
F3RAM8_D<9>
F3RAM9_D<14>
F3RAM9_D<8>
F3RAM7_RAS*
F3RAM7_CS*F3RAM7_UDMF3RAM7_LDMF3RAM7_CKE
F3RAM7_ADD<3>F3RAM7_ADD<2>F3RAM7_ADD<1>F3RAM7_ADD<0>
F3RAM7_D<7>F3RAM7_D<6>F3RAM7_D<5>F3RAM7_D<4>
F3RAM8_D<6>F3RAM8_D<5>F3RAM8_D<4>F3RAM8_D<3>F3RAM8_D<2>F3RAM8_D<1>F3RAM8_D<0>
F3RAM9_D<7>
F3RAM9_D<5>F3RAM9_D<4>F3RAM9_D<3>F3RAM9_D<2>F3RAM9_D<1>F3RAM9_D<0>
F3RAM8_D<7>
F3RAM7_D<12>F3RAM7_D<13>F3RAM7_D<14>F3RAM7_D<15>
F3RAM7_ADD<4>
F3RAM8_D<8>
4U7
F3RAM7_CK
F3RAM9_CKF3RAM9_CK*
FPGA_POR*
F3RAM9_D<6>
D2D1
F8F7E4
E3
E2
E1
J8J7
F5
F4G4G3
G6
G5
F2F1
L10L9
H6
H5
G2G1
J6
J5
J4
J3
K8
K7
H4H3
H2H1
M10M9
K5
K4
J2
K2
L8
L7
L6
L5
K1L1
M7
M6
L2
M2
N7
L4L3
M4M3P10P9
N6
N5
M1
N1
P8
P7
N4N3N2P2R10R9
P5
P3T11U11
R7
R6
P1R1T10T9
R4
T2
T8
T7
T6
T5
T4T3
U10U9U6U5
U2
V2
U8
U7
U4U3
AJ5
AJ7
AK3
AK4
AH5
AH6
AG7
AL1AL2
AG6
AK1AK2
AF7AF8
AJ1
AJ2
AH3AH4
AD9
AG4
AF5
AF6
AE7
AE8
AH1
AC9AC10
AG1
AG2
AE4
AE5
AD7AD8
AE2AF2
AD5
AD6
AB9AB10
AD3
AD4
AC6
AC7
AB7
AB8
AD1
AE1
AC3
AC4AA9AA10
AC2
AD2
AB5
AB6
AA7AA8
AB3AB4
AA5
AA6
Y9Y10
AC1
AA3AA4W9W10
AA2
AB2
Y6
W7
W8
Y3
Y4
W5
W6
V11W11
AA1
W3W4V9V10Y2
V5
V6
V7
V8
V3V4
U16U16
C13
97
C90
5
C10
04C
1434
C10
89
10N
C11
39C
1095
C10
17
C97
7
51R
AJ8
AH8
AD10
AH2
R715
P4R2
F3RAM7_ADD<9>
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
1V25R3
1V25R3
2V5F3
2V5F3
DGNDDGND
XC2VP40
IO_L17N_3IO_L17P_3IO_L05N_3IO_L60P_3
IO_L51P_3IO_L45P_3IO_L54N_3
IO_L54P_3IO_L42N_3IO_L24N_3IO_L18P_3
IO_L35N_3IO_L35P_3
IO_L56N_3IO_L23N_3
IO_L89N_3
IO_L88N_3
IO_L46N_3
IO_L58N_3IO_L49N_3
IO_L37N_3IO_L34P_3
IO_L04N_3IO_L22N_3
IO_L58P_3IO_L88P_3
IO_L55N_3IO_L49P_3IO_L46P_3IO_L40N_3IO_L37P_3IO_L22P_3
IO_L15P_3
IO_L04P_3
IO_L02P_3
IO_L05P_3
IO_L20N_3
IO_L03N_3/VREF_3
IO_L21N_3/VREF_3IO_L15N_3/VREF_3
IO_L33N_3/VREF_3IO_L39N_3/VREF_3IO_L45N_3/VREF_3
IO_L87N_3/VREF_3
IO_L51N_3/VREF_3IO_L57N_3/VREF_3
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
IO_L18N_3IO_L06N_3
IO_L16P_3IO_L16N_3IO_L06P_3
IO_L19N_3IO_L19P_3IO_L21P_3IO_L31N_3
IO_L39P_3IO_L34N_3IO_L31P_3
IO_L43N_3
IO_L56P_3IO_L89P_3
IO_L41N_3
IO_L47N_3IO_L47P_3
VCCO_3
IO_L02N_3
IO_L03P_3
IO_L20P_3IO_L23P_3
IO_L32N_3IO_L24P_3
IO_L32P_3
IO_L36N_3IO_L33P_3
IO_L38P_3IO_L38N_3IO_L36P_3
IO_L40P_3IO_L41P_3
IO_L43P_3IO_L42P_3
IO_L44N_3
IO_L48N_3IO_L44P_3
IO_L50P_3IO_L50N_3IO_L48P_3
IO_L52P_3IO_L52N_3
IO_L53N_3IO_L53P_3IO_L55P_3IO_L57P_3IO_L59N_3IO_L59P_3
IO_L85N_3IO_L60N_3
IO_L85P_3
IO_L86P_3IO_L86N_3
IO_L87P_3IO_L90N_3IO_L90P_3
XC2VP40
IO_L85N_2IO_L85P_2
IO_L42N_2IO_L42P_2
IO_L51P_2IO_L45P_2
IO_L59P_2
IO_L57N_2
IO_L16P_2
IO_L21P_2
IO_L18N_2
IO_L47P_2
IO_L60N_2
IO_L51N_2IO_L45N_2IO_L39P_2
IO_L54P_2
IO_L39N_2IO_L89P_2IO_L41P_2
IO_L48P_2IO_L48N_2IO_L46P_2IO_L44P_2IO_L44N_2IO_L43P_2
IO_L87P_2IO_L88P_2
IO_L47N_2
IO_L89N_2
IO_L86N_2
IO_L87N_2IO_L86P_2
IO_L60P_2
IO_L55P_2IO_L56N_2
IO_L55N_2
IO_L53N_2IO_L53P_2
IO_L50N_2
IO_L52P_2IO_L50P_2
IO_L49N_2IO_L49P_2
IO_L40P_2IO_L43N_2
IO_L38N_2IO_L38P_2
IO_L37P_2IO_L37N_2IO_L35P_2
IO_L32N_2IO_L23P_2
IO_L32P_2
IO_L18P_2
IO_L52N_2/VREF_2
IO_L34N_2/VREF_2
VCCO_2
IO_L58N_2/VREF_2
IO_L40N_2/VREF_2IO_L46N_2/VREF_2
IO_L22N_2/VREF_2IO_L16N_2/VREF_2IO_L04N_2/VREF_2
IO_L36P_2IO_L33N_2
IO_L19P_2
IO_L57P_2
IO_L06P_2IO_L15N_2IO_L15P_2
IO_L22P_2IO_L33P_2IO_L34P_2
IO_L03P_2IO_L04P_2IO_L17N_2IO_L17P_2IO_L20N_2IO_L20P_2IO_L31N_2IO_L31P_2
IO_L01N_2/VRP_2IO_L01P_2/VRN_2
IO_L88N_2/VREF_2
IO_L24P_2IO_L24N_2
IO_L58P_2IO_L56P_2
IO_L06N_2
IO_L59N_2
IO_L35N_2
IO_L23N_2IO_L41N_2
IO_L02N_2IO_L02P_2IO_L03N_2IO_L05N_2IO_L05P_2
IO_L21N_2IO_L36N_2
IO_L19N_2
IO_L90P_2IO_L90N_2
IO_L54N_2
2V5F32V5F3
2V5F3
DGND
7 X 10NF
19
FPGA3 BANKS 6/7 (DDR SDRAM)
Tue Dec 12 11:16:40 2006
F3RAM1_D<15..0>
F3RAM2_D<15..0>
F3RAM3_D<15..0>
F3RAM4_D<15..0>
F3RAM6_D<15..0>
F3RAM5_D<15..0>
51R
51RR741
R723
10N
10N
C14
39
C10
44C
1192
C14
21C
965
10N
10N
10N
10N
10N
C78
3C
1459
C12
19C
1146
C10
33C
1132
C11
16
C75
9
R639
R643 51R
51R
C99
1
C10
03C
1037
C10
82C
1199
C12
28
C94
5
U16 U16
E33
F3RAM1_ADD<12>F3RAM1_ADD<11>F3RAM1_ADD<10>F3RAM1_ADD<9>F3RAM1_ADD<8>F3RAM1_ADD<7>F3RAM1_ADD<6>
F3RAM1_ADD<4>
F3RAM1_ADD<0>
F3RAM1_CKE
F3RAM1_LDM
F3RAM1_D<15>
U32
U31
U28
U27
V33
U33
U30
U29U26
U25
T32T31T30
T29
T28
T27
T33
R33
R32R31
T26
T25
R34P34
R29
R28
U24
T24
P32
P31
P30
P29
R26
R25
P33
N33
N32
N31
P28
P27
N34
M34
N30
N29
P26
P25
M32M31
L32
L31
N28
N27
M33
L33
M29
M28
N26
N25
L34K34
L30
L29
L28
L27
K33
J33
K31
K30
M26
M25
H34H33
H32H31
K28
K27
J32
J31
J30
J29
G34
G33
H30
H29
L26
L25
F34F33
G30
G29
G32G31
F31
F30
J28
J27
E34
E32E31
F28F27
D34
D33
V31
V32
V27
V28
V29
V30
Y33
W33
V25
V26
W31
W32
AA34
Y34
W24
V24
W29W30
Y31
Y32
W27W28
Y28
Y29
AB33
AA33
W25
W26
AA31AA32
AC34
AB34
Y25
Y26
AA29
AA30
AB31
AB32
AA27
AA28
AB29
AB30
AD33
AC33
AA25
AA26
AC31AC32
AE34
AD34
AB27
AB28AC28
AC29
AD31
AD32
AB25AB26
AD29
AD30
AF33AE33
AD27
AD28
AE30
AE31
AG33
AG34
AC25
AC26
AF31AF32
AH33AH34
AE27AE28
AF29AF30
AG31
AG32
AD25AD26
AH31
AH32
AJ33AJ34
AF27AF28
AK33AK34
AG29
AG30
AL33AL34
AH27
AG28
AH29AH30
AK31
AK32
AJ27AJ28
AJ30
AJ31
F3RAM3_D<15>
F3RAM2_UDM
F3RAM2_BA1F3RAM2_D<0>
F3RAM4_ADD<12..0>
F3RAM2_D<9>F3RAM2_D<10>
F3RAM2_D<14>F3RAM2_D<15>
F3RAM1_D<1>F3RAM1_D<2>
F3RAM1_D<5>
F3RAM1_D<7>F3RAM1_D<8>F3RAM1_D<9>F3RAM1_D<10>
F3RAM1_D<12>F3RAM1_D<13>
F3RAM2_LDMF3RAM2_CK*
F3RAM3_CK
F3RAM3_LDMF3RAM3_CK*
F3RAM2_CKF3RAM2_CKE
F3RAM6_CK*F3RAM6_CK
F3RAM4_ADD<3>
100N
100N
100N
100N
F3RAM2_D<5>
F3RAM2_D<8>
F3RAM5_D<2>
F3RAM3_CKEF3RAM3_BA0F3RAM3_BA1
F3RAM3_D<8>F3RAM3_D<0>
F3RAM3_D<0>
F3RAM4_D<0>
F3RAM4_UDM
F3RAM3_D<14>
F3RAM3_D<12>
F3RAM3_D<10>F3RAM3_D<9>F3RAM3_D<7>F3RAM3_D<6>F3RAM3_D<5>F3RAM3_D<4>F3RAM3_D<3>F3RAM3_D<2>F3RAM3_D<1>
F3RAM3_UDM
F3RAM4_D<15>F3RAM4_D<14>F3RAM4_D<7>F3RAM4_D<6>F3RAM4_D<5>F3RAM4_D<4>
F3RAM4_D<0>F3RAM4_D<1>
F3RAM4_D<8>F3RAM4_D<9>F3RAM4_D<10>F3RAM4_D<11>F3RAM4_D<12>F3RAM4_D<13>
F3RAM6_D<5>F3RAM6_D<6>F3RAM6_D<7>
F3RAM4_D<2>F3RAM4_D<3>
F3RAM3_D<8>
F3RAM3_D<11>
F3RAM2_D<1>F3RAM2_D<2>F3RAM2_D<3>
F3RAM1_D<0>
F3RAM1_D<3>F3RAM1_D<4>
F3RAM1_D<6>
F3RAM1_D<11>
F3RAM1_D<14>
F3RAM1_ADD<2>F3RAM1_ADD<3>
F3RAM1_ADD<5>
F3RAM1_ADD<1>
F3RAM4_D<1>F3RAM4_D<8>F3RAM4_D<9>F3RAM4_D<10>F3RAM4_D<11>F3RAM4_D<12>F3RAM4_D<13>
F3RAM6_D<11>
F3RAM6_D<0>F3RAM6_D<1>F3RAM6_D<2>F3RAM6_D<3>F3RAM6_D<4>F3RAM6_D<8>F3RAM6_D<9>F3RAM6_D<10>
F3RAM6_D<12>F3RAM6_D<13>F3RAM6_D<14>F3RAM6_D<15>
F3RAM6_BA0F3RAM6_BA1
F3RAM5_D<0>F3RAM5_D<1>
F3RAM5_D<3>F3RAM5_D<4>F3RAM5_D<5>F3RAM5_D<6>F3RAM5_D<7>F3RAM5_D<8>F3RAM5_D<9>F3RAM5_D<10>F3RAM5_D<11>F3RAM5_D<12>F3RAM5_D<13>F3RAM5_D<14>F3RAM5_D<15>
F3RAM5_CK
F3RAM4_ADD<0>F3RAM4_ADD<1>F3RAM4_ADD<2>
F3RAM4_ADD<4>F3RAM4_ADD<5>F3RAM4_ADD<6>F3RAM4_ADD<7>F3RAM4_ADD<8>F3RAM4_ADD<9>F3RAM4_ADD<10>F3RAM4_ADD<11>F3RAM4_ADD<12>
F3RAM4_WE*F3RAM4_CS*F3RAM4_CKEF3RAM4_CKF3RAM4_CK*F3RAM4_LDM
F3RAM5_CKE
F3RAM5_LDM
4U7
BANK 7FPGA3
F3RAM2_BA0
BANK 6FPGA3
F3RAM6_CKE
F3RAM5_UDMF3RAM5_CK*
F3RAM4_BA1
F3RAM1_ADD<12..0>
F3RAM4_CAS*
F3RAM1_BA0
F3RAM4_RAS*F3RAM4_BA0
4U7
F3RAM2_D<6>F3RAM2_D<7>
F3RAM2_D<4>
F3RAM2_D<11>F3RAM2_D<12>F3RAM2_D<13>
F3RAM1_CK
F3RAM1_CS*
F3RAM1_CAS*
F3RAM1_BA1
F3RAM1_RAS*
F3RAM3_D<13>
F3RAM1_CK*
F3RAM1_WE*
F3RAM1_UDM
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGNDDGND
DGND
DGND
2V5A32V5A32V5A3
2V5A32V5A3
2V5A3
1V25R3 1V25R3
XC2VP40
IO_L48P_7
IO_L42P_7
IO_L50N_7IO_L56N_7IO_L86N_7IO_L53P_7
IO_L87N_7
IO_L05N_7
IO_L44N_7
IO_L89N_7
IO_L32P_7
IO_L60N_7IO_L51N_7
IO_L18P_7
IO_L32N_7IO_L38N_7
IO_L18N_7IO_L23N_7
IO_L87P_7IO_L90N_7
IO_L59N_7
IO_L35N_7
IO_L45N_7
IO_L19N_7
IO_L33P_7
IO_L86P_7
IO_L20N_7IO_L31N_7
IO_L34P_7IO_L40P_7IO_L37P_7IO_L37N_7
IO_L43P_7IO_L43N_7IO_L16P_7
IO_L17P_7IO_L17N_7IO_L04P_7
IO_L31P_7
IO_L49P_7IO_L20P_7
IO_L44P_7
IO_L23P_7
IO_L03P_7
IO_L24P_7
IO_L22P_7IO_L24N_7
IO_L15P_7IO_L15N_7
IO_L03N_7IO_L06N_7
IO_L38P_7
IO_L85N_7
IO_L57P_7IO_L52P_7IO_L48N_7
IO_L50P_7IO_L47N_7IO_L41N_7
IO_L54N_7
IO_L89P_7IO_L59P_7
IO_L41P_7IO_L47P_7
IO_L39N_7IO_L35P_7
IO_L51P_7IO_L54P_7
IO_L45P_7IO_L42N_7IO_L36P_7
IO_L21P_7IO_L33N_7
IO_L19P_7
IO_L90P_7IO_L88P_7
IO_L58P_7IO_L55P_7
IO_L46P_7
IO_L34N_7/VREF_7IO_L22N_7/VREF_7
IO_L46N_7/VREF_7IO_L40N_7/VREF_7
IO_L52N_7/VREF_7
IO_L88N_7/VREF_7IO_L58N_7/VREF_7
IO_L49N_7
IO_L55N_7
IO_L01N_7/VRP_7
IO_L01P_7/VRN_7
IO_L04N_7/VREF_7IO_L16N_7/VREF_7
VCCO_7
IO_L56P_7
IO_L02P_7
IO_L39P_7IO_L36N_7
IO_L57N_7IO_L85P_7
IO_L06P_7
IO_L21N_7
IO_L02N_7IO_L05P_7
IO_L53N_7
IO_L60P_7
XC2VP40
IO_L90N_6
IO_L90P_6
IO_L88N_6
IO_L59P_6
IO_L56N_6IO_L47P_6
IO_L56P_6
IO_L48N_6IO_L44N_6
IO_L89N_6
IO_L86N_6IO_L87P_6
IO_L34P_6
IO_L22N_6IO_L49P_6
IO_L22P_6IO_L32N_6
IO_L19N_6IO_L21P_6
IO_L31N_6IO_L31P_6
IO_L34N_6IO_L39P_6IO_L43P_6
IO_L04N_6IO_L43N_6
IO_L04P_6IO_L17N_6IO_L17P_6IO_L37P_6IO_L40N_6IO_L46P_6IO_L57P_6
IO_L42P_6IO_L33P_6
IO_L41P_6IO_L36N_6IO_L36P_6
IO_L52N_6
IO_L16P_6
VCCO_6
IO_L06P_6
IO_L52P_6
IO_L60N_6
IO_L85N_6
IO_L54P_6IO_L60P_6IO_L54N_6
IO_L16N_6
IO_L18N_6
IO_L24P_6IO_L24N_6
IO_L01P_6/VRN_6
IO_L87N_6/VREF_6IO_L57N_6/VREF_6IO_L51N_6/VREF_6
IO_L39N_6/VREF_6IO_L33N_6/VREF_6IO_L21N_6/VREF_6IO_L15N_6/VREF_6IO_L03N_6/VREF_6
IO_L42N_6
IO_L06N_6
IO_L01N_6/VRP_6
IO_L45N_6/VREF_6
IO_L51P_6
IO_L18P_6
IO_L45P_6
IO_L15P_6IO_L05P_6IO_L03P_6
IO_L19P_6
IO_L55P_6IO_L47N_6IO_L41N_6IO_L40P_6
IO_L23N_6IO_L35N_6
IO_L86P_6IO_L05N_6IO_L23P_6
IO_L50P_6IO_L53N_6
IO_L44P_6IO_L32P_6
IO_L02P_6IO_L02N_6
IO_L20N_6IO_L20P_6IO_L35P_6
IO_L50N_6IO_L58P_6IO_L58N_6IO_L88P_6
IO_L53P_6
IO_L38P_6IO_L38N_6
IO_L89P_6IO_L59N_6
IO_L85P_6IO_L55N_6
IO_L48P_6IO_L46N_6IO_L49N_6
IO_L37N_6
FPGA4 BANKS 0/1/4/5
20
Tue Dec 12 11:28:02 2006
F4_BREFCLKBOT+
D5
10N
F4_CLKTOP+
BANK 1
80.44MHZ
10N
F4_BREFCLKTOP-
RED26*
RED25*RED24*
RED23*
RED22*
RED21*
BANK 5
10N
10N
80.157MHZ
F4_BREFCLKBOT-80.157MHZ
100N
F4_BREFCLKTOP+
F4RAM6_LDQSF4RAM6_UDQSF4RAM5_LDQSF4RAM5_UDQSF4RAM4_LDQSF4RAM4_UDQSF4RAM3_LDQSF4RAM3_UDQSF4RAM2_LDQSF4RAM2_UDQSF4RAM1_LDQSF4RAM1_UDQS
F4RAM6_LDMF4RAM6_UDM
F4RAM2_CS*
F4RAM3_WE*F4RAM3_RAS*
F4RAM3_CS*
F4RAM2_RAS*
F4RAM3_CAS*
F4RAM2_WE*
F4RAM6_WE*
80.157MHZ
FPGA4
BANK 4
F4_CLKBOT-F4_CLKBOT+ 80.44MHZ
100N
PROM4_D0INIT4
10N
FPGA4FPGA4FPGA4
10N
100N
100N
BANK 0
RED19*
RED18*
4U7
10N
F1F4_B
F1F4_A
80.44MHZ
F4RAM2_CAS*
F4RAM5_BA1F4RAM5_BA0
F4RAM6_RAS*F4RAM6_CAS*
F4RAM5_CS*
F4RAM5_RAS*F4RAM5_CAS*
F4RAM5_WE*
F4RAM6_CS*
E29E28H26G26H25G25J25K24J24F26E26D30D29K23J23F24E24D28C28H24G24G23F23E27D27K22J22H22G22D26C26K21J21F22E22E25D25H21G21D22D23D24C24K20J20F21E21C21C22L19K19G20F20D21D20J19H19G19F19E19D19L18K18G18F18E18D18J18H18
E7E6
G9H9
J10
J11K11
E9F9
D6
J12K12
E11
C7D7
G11H11
F12G12
D8E8
J13K13
G13H13
C9D9
K14
F13
D10E10
G14H14
D12D13
C11D11
J15K15
E14F14
C14C13
K16L16
F15
D15D14
H16J16
F16G16
D16E16
K17L17
F17G17
D17E17
H17J17
AL5AL6AG9AH9AK6AK7AF10AL7AM7AE11AF11AG10AH10AK8AL8AE12AF12AJ9AK9AL9AM9AG11
AH12AJ12AK10AL10AE13AF13AG13AH13AJ11AK11AE14AF14AJ13AK13AL11AM11AE15AF15AG14AH14AL13AL12AD16AE16AJ14AK14AM14AM13AF16AG16AH15AJ15AL14
AD17AE17AH16AJ16AK16AL16AF17AG17AH17AJ17AK17AL17
C78
5
C86
4C
898
C95
9C
960
C95
8
AL29AL30
AH26AG26
AK28AK29
AF25
AM28
AL28
AF24
AE24AH25
AG25
AL27
AK27
AF23
AE23
AK26
AJ26
AM26AL26AH24AG24
AJ23AH23
AL25
AK25
AF22
AE22
AH22AG22
AK24
AJ24AF21
AE21
AK22
AJ22
AM24
AL24
AF20
AE20
AH21AG21
AL23AL22
AE19AD19AJ21
AK21
AM22AM21AG19AF19
AJ20AH20
AL20
AL21
AE18
AD18
AJ19AH19
AL19
AK19
AG18AF18
AJ18AH18
AL18AK18
F4_CLKTOP- 80.44MHZ
G15
100N
U17U17U17U17
R616
R620 51R
51R
C11
24C
1108
C10
48
C12
59C
1096
C12
72C
1258
100N
C79
6
E13
J14
H10G10
AL15
AH11
C76
14U
7
RED20*
80.157MHZ
F11
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
XC2VP40
IO_L06P_4/VRN_4
IO_L75N_4/GCLK1S
IO_L74N_4/GCLK3S
IO_L75P_4/GCLK0P
IO_L74P_4/GCLK2P
IO_L73N_4IO_L73P_4
IO_L69P_4/VREF_4
IO_L68P_4IO_L69N_4
IO_L68N_4IO_L67P_4IO_L67N_4
IO_L57N_4IO_L57P_4/VREF_4
IO_L53_4IO_L50_4
IO_L48N_4IO_L48P_4IO_L49N_4IO_L49P_4
IO_L54N_4
IO_L56N_4IO_L56P_4
IO_L55P_4
IO_L54P_4IO_L55N_4
IO_L47P_4
IO_L46P_4IO_L47N_4
IO_L46N_4IO_L45P_4/VREF_4
IO_L45N_4
IO_L44N_4IO_L44P_4
IO_L43P_4
IO_L39P_4IO_L43N_4
IO_L38N_4IO_L38P_4IO_L39N_4
IO_L37P_4IO_L37N_4
IO_L26P_4IO_L27N_4
IO_L27P_4/VREF_4
IO_L25P_4IO_L26N_4
IO_L25N_4
IO_L21N_4IO_L21P_4
IO_L20P_4IO_L20N_4IO_L19P_4
IO_L09P_4/VREF_4IO_L19N_4
IO_L05_4
IO_L08N_4IO_L08P_4IO_L09N_4
IO_L07N_4IO_L07P_4/VREF_4
IO_L06N_4/VRP_4
IO_L03N_4/D2IO_L03P_4/D3
IO_L01P_4/INIT_B
IO_L02P_4/D1IO_L02N_4/D0
IO_L01N_4/DOUT
VCCO_4
XC2VP40
IO_L44P_1
IO_L38N_1
IO_L27P_1IO_L27N_1/VREF_1
IO_L37P_1
IO_L75P_1/GCLK2S
IO_L68N_1
IO_L57N_1/VREF_1IO_L57P_1IO_L56N_1
IO_L67P_1IO_L67N_1IO_L68P_1
IO_L73P_1IO_L69N_1/VREF_1
IO_L75N_1/GCLK3P
IO_L73N_1IO_L74P_1/GCLK0SIO_L74N_1/GCLK1P
IO_L69P_1
IO_L55P_1
IO_L43N_1
IO_L45N_1/VREF_1IO_L45P_1IO_L44N_1
IO_L46P_1IO_L46N_1
IO_L48P_1IO_L47N_1IO_L47P_1
IO_L49P_1IO_L48N_1
IO_L49N_1
IO_L54N_1
IO_L56P_1IO_L55N_1
IO_L54P_1IO_L53_1IO_L50_1
IO_L43P_1
IO_L20N_1IO_L20P_1
IO_L19P_1IO_L09N_1/VREF_1
IO_L09P_1
IO_L19N_1
IO_L21N_1IO_L21P_1
IO_L25P_1IO_L25N_1IO_L26P_1IO_L26N_1
IO_L37N_1IO_L38P_1
IO_L39P_1IO_L39N_1
IO_L08N_1IO_L08P_1IO_L07N_1IO_L07P_1IO_L06N_1IO_L06P_1
IO_L03N_1/VREF_1
IO_L02P_1IO_L01N_1/VRP_1
IO_L03P_1IO_L02N_1
IO_L01P_1/VRN_1
IO_L05_1
VCCO_1
2V5E4
XC2VP40
IO_L44N_5IO_L53_5
IO_L48P_5IO_L48N_5
IO_L45P_5IO_L57P_5
IO_L25N_5IO_L25P_5
IO_L21P_5
IO_L38P_5IO_L21N_5
IO_L68N_5IO_L68P_5IO_L38N_5
IO_L56N_5IO_L56P_5
IO_L47N_5IO_L47P_5
IO_L05_5IO_L07P_5
IO_L46N_5IO_L44P_5
IO_L39P_5IO_L43N_5
IO_L26N_5IO_L26P_5IO_L37N_5
IO_L19N_5IO_L08N_5
IO_L49N_5IO_L49P_5
IO_L50_5IO_L54N_5IO_L54P_5IO_L55N_5IO_L55P_5IO_L67N_5IO_L69P_5IO_L67P_5
IO_L73P_5IO_L73N_5
IO_L02P_5/D7
IO_L19P_5
VCCO_5
IO_L37P_5IO_L46P_5
IO_L43P_5
IO_L03N_5/D4
IO_L39N_5IO_L03P_5/D5
IO_L27P_5IO_L09P_5
IO_L69N_5/VREF_5IO_L57N_5/VREF_5IO_L45N_5/VREF_5IO_L27N_5/VREF_5IO_L09N_5/VREF_5IO_L07N_5/VREF_5
IO_L06P_5/VRN_5
IO_L06N_5/VRP_5
IO_L20P_5IO_L08P_5
IO_L02N_5/D6
IO_L01N_5/RDWR_BIO_L01P_5/CS_B
IO_L75N_5/GCLK7S
IO_L74N_5/GCLK5SIO_L74P_5/GCLK4P
IO_L75P_5/GCLK6P
IO_L20N_5
2V5E4
2V5E4
2V5E4 2V5E4 2V5E41V25R4
XC2VP40
IO_L01N_0/VRP_0IO_L01P_0/VRN_0
IO_L03N_0
IO_L05_0
IO_L07N_0
IO_L09N_0
IO_L19P_0
IO_L21P_0
IO_L26P_0
IO_L37P_0
IO_L43N_0
IO_L45N_0
IO_L47N_0
IO_L06N_0
IO_L44N_0
IO_L45P_0/VREF_0
IO_L08P_0
VCCO_0
IO_L74P_0/GCLK6SIO_L75N_0/GCLK5PIO_L75P_0/GCLK4S
IO_L74N_0/GCLK7P
IO_L73N_0IO_L73P_0
IO_L69P_0/VREF_0IO_L69N_0IO_L68P_0
IO_L67P_0IO_L68N_0
IO_L67N_0
IO_L57N_0
IO_L53_0IO_L50_0
IO_L46P_0
IO_L44P_0
IO_L55N_0
IO_L49P_0IO_L49N_0IO_L48P_0IO_L48N_0IO_L47P_0
IO_L46N_0
IO_L54P_0IO_L54N_0
IO_L56N_0
IO_L43P_0
IO_L19N_0
IO_L39P_0
IO_L21N_0
IO_L39N_0IO_L38P_0IO_L38N_0
IO_L37N_0IO_L27P_0/VREF_0
IO_L27N_0
IO_L25P_0IO_L26N_0
IO_L20N_0IO_L20P_0
IO_L09P_0/VREF_0
IO_L08N_0IO_L07P_0
IO_L06P_0
IO_L02P_0IO_L02N_0
IO_L03P_0/VREF_0
IO_L55P_0
IO_L56P_0
IO_L57P_0/VREF_0
IO_L25N_0
21
FPGA4 BANKS 2/3
Tue Dec 12 11:41:46 2006
F4RAM7_ADD<9>
51R
51RR736
R716
V4V3Y2
V9V10
W4
Y1W3
W11V11Y4Y7W10W9
AA3AA4
AB4Y9Y10
AA10AB3
AA9
AE1AC4
AB8AC7
AF2AB9AB10
AG2AE2
AC10
AH2AC9
AE8AD10
AK4
AJ7
AA8AA7
AB7
V8W8
AC3
AF4AE4AD4
AF3AG4AH4AH3
AL2AK1AK2
AL1AJ1
AJ5
AJ4
Y3AB1
W2
AC2AD3AG1
AG5AG3
AK3
AD9
AH8
AJ8
AH6
AG6
AF6AD6AC6AB6AA6Y6
V6W6
AF5AH5
AE5AD5
AA5W5
AB5
V5
V7
AE7W7
AD8AD7
AJ2AH1AD1AB2
AA2AD2AC1
AA1AG7AF8AF7
R7
U4U3
H6
L6J6
J7J8E4F7F8
N8K8
L8
T8
F5
T9T2
H4H3
U2
D1D2
H1H2G1G2F1F2E1E3
K2K4J3
G3G4F4
R3
H5
K5L5
E2G6J4
M1L2
R2
J2
P4
L9
M9
K7M10
L7K1L1
N9N10
M4M2
P2N2
R9P3
R10
U11T11
P1
T10R1
T5
U9U6
U10
U8
P8
V2U5
M3P10P9N1N4N3
N7U7M7
R6
M6N6P6
T6
P7
L10
J5
G5
R4
T7
N5P5
L3L4
T3T4
C90
7
C13
99
C14
25C
1006
C10
90
C10
97
C97
8C
1140
C12
48C
1018
51R
51R
R628
R636
U17U17
F4RAM9_D<3>
FPGA_POR*
F4RAM9_CK*
F4RAM9_D<2>
F4RAM8_D<15>
F4RAM9_D<4>
F4RAM9_D<0>F4RAM9_D<1>
F4RAM9_D<5>F4RAM9_D<6>F4RAM9_D<7>
F4RAM8_D<0>F4RAM8_D<1>F4RAM8_D<2>F4RAM8_D<3>F4RAM8_D<4>F4RAM8_D<5>F4RAM8_D<6>F4RAM8_D<7>
F4RAM7_D<0>F4RAM7_D<1>F4RAM7_D<2>F4RAM7_D<3>F4RAM7_D<4>F4RAM7_D<5>F4RAM7_D<6>F4RAM7_D<7>
F4RAM7_CK*
F4RAM7_ADD<0>F4RAM7_ADD<1>F4RAM7_ADD<2>F4RAM7_ADD<3>F4RAM7_ADD<10>
F4RAM9_D<10>
F4RAM9_D<8>F4RAM9_D<9>
F4RAM9_D<11>F4RAM9_D<12>F4RAM9_D<13>F4RAM9_D<14>F4RAM9_D<15>
F4RAM8_D<8>F4RAM8_D<9>F4RAM8_D<10>F4RAM8_D<11>F4RAM8_D<12>F4RAM8_D<13>F4RAM8_D<14>
F4RAM7_D<8>F4RAM7_D<9>F4RAM7_D<10>F4RAM7_D<11>F4RAM7_D<12>F4RAM7_D<13>F4RAM7_D<14>F4RAM7_D<15>
F4RAM7_ADD<4>F4RAM7_ADD<5>F4RAM7_ADD<6>F4RAM7_ADD<7>F4RAM7_ADD<8>
F4RAM7_ADD<11>F4RAM7_ADD<12>
F4RAM8_UDQS
F4RAM7_BA1
F4RAM9_CKF4RAM9_CKEF4RAM9_BA0F4RAM9_BA1
F4RAM8_CK*F4RAM8_CKF4RAM8_CKEF4RAM8_BA0F4RAM8_BA1
F4RAM7_CKF4RAM7_CKEF4RAM7_LDMF4RAM7_UDMF4RAM7_CS*F4RAM7_WE*F4RAM7_CAS*F4RAM7_RAS*F4RAM7_BA0
10N
10N
F4RAM9_LDMF4RAM9_UDMF4RAM9_CS*F4RAM9_WE*F4RAM9_CAS*F4RAM9_RAS*
F4RAM9_LDQSF4RAM9_UDQS
F4RAM8_LDMF4RAM8_UDMF4RAM8_CS*F4RAM8_WE*F4RAM8_CAS*F4RAM8_RAS*
F4RAM8_LDQS
F4RAM7_LDQSF4RAM7_UDQS
FPGA4BANK 3
4U7
100N
100N
100N
100N 10N
10N
4U7
FPGA4BANK 2
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
2V5F4
2V5F4
1V25R4
DGND
DGND
XC2VP40
IO_L17N_3IO_L17P_3IO_L05N_3IO_L60P_3
IO_L51P_3IO_L45P_3IO_L54N_3
IO_L54P_3IO_L42N_3IO_L24N_3IO_L18P_3
IO_L35N_3IO_L35P_3
IO_L56N_3IO_L23N_3
IO_L89N_3
IO_L88N_3
IO_L46N_3
IO_L58N_3IO_L49N_3
IO_L37N_3IO_L34P_3
IO_L04N_3IO_L22N_3
IO_L58P_3IO_L88P_3
IO_L55N_3IO_L49P_3IO_L46P_3IO_L40N_3IO_L37P_3IO_L22P_3
IO_L15P_3
IO_L04P_3
IO_L02P_3
IO_L05P_3
IO_L20N_3
IO_L03N_3/VREF_3
IO_L21N_3/VREF_3IO_L15N_3/VREF_3
IO_L33N_3/VREF_3IO_L39N_3/VREF_3IO_L45N_3/VREF_3
IO_L87N_3/VREF_3
IO_L51N_3/VREF_3IO_L57N_3/VREF_3
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
IO_L18N_3IO_L06N_3
IO_L16P_3IO_L16N_3IO_L06P_3
IO_L19N_3IO_L19P_3IO_L21P_3IO_L31N_3
IO_L39P_3IO_L34N_3IO_L31P_3
IO_L43N_3
IO_L56P_3IO_L89P_3
IO_L41N_3
IO_L47N_3IO_L47P_3
VCCO_3
IO_L02N_3
IO_L03P_3
IO_L20P_3IO_L23P_3
IO_L32N_3IO_L24P_3
IO_L32P_3
IO_L36N_3IO_L33P_3
IO_L38P_3IO_L38N_3IO_L36P_3
IO_L40P_3IO_L41P_3
IO_L43P_3IO_L42P_3
IO_L44N_3
IO_L48N_3IO_L44P_3
IO_L50P_3IO_L50N_3IO_L48P_3
IO_L52P_3IO_L52N_3
IO_L53N_3IO_L53P_3IO_L55P_3IO_L57P_3IO_L59N_3IO_L59P_3
IO_L85N_3IO_L60N_3
IO_L85P_3
IO_L86P_3IO_L86N_3
IO_L87P_3IO_L90N_3IO_L90P_3
XC2VP40
IO_L85N_2IO_L85P_2
IO_L42N_2IO_L42P_2
IO_L51P_2IO_L45P_2
IO_L59P_2
IO_L57N_2
IO_L16P_2
IO_L21P_2
IO_L18N_2
IO_L47P_2
IO_L60N_2
IO_L51N_2IO_L45N_2IO_L39P_2
IO_L54P_2
IO_L39N_2IO_L89P_2IO_L41P_2
IO_L48P_2IO_L48N_2IO_L46P_2IO_L44P_2IO_L44N_2IO_L43P_2
IO_L87P_2IO_L88P_2
IO_L47N_2
IO_L89N_2
IO_L86N_2
IO_L87N_2IO_L86P_2
IO_L60P_2
IO_L55P_2IO_L56N_2
IO_L55N_2
IO_L53N_2IO_L53P_2
IO_L50N_2
IO_L52P_2IO_L50P_2
IO_L49N_2IO_L49P_2
IO_L40P_2IO_L43N_2
IO_L38N_2IO_L38P_2
IO_L37P_2IO_L37N_2IO_L35P_2
IO_L32N_2IO_L23P_2
IO_L32P_2
IO_L18P_2
IO_L52N_2/VREF_2
IO_L34N_2/VREF_2
VCCO_2
IO_L58N_2/VREF_2
IO_L40N_2/VREF_2IO_L46N_2/VREF_2
IO_L22N_2/VREF_2IO_L16N_2/VREF_2IO_L04N_2/VREF_2
IO_L36P_2IO_L33N_2
IO_L19P_2
IO_L57P_2
IO_L06P_2IO_L15N_2IO_L15P_2
IO_L22P_2IO_L33P_2IO_L34P_2
IO_L03P_2IO_L04P_2IO_L17N_2IO_L17P_2IO_L20N_2IO_L20P_2IO_L31N_2IO_L31P_2
IO_L01N_2/VRP_2IO_L01P_2/VRN_2
IO_L88N_2/VREF_2
IO_L24P_2IO_L24N_2
IO_L58P_2IO_L56P_2
IO_L06N_2
IO_L59N_2
IO_L35N_2
IO_L23N_2IO_L41N_2
IO_L02N_2IO_L02P_2IO_L03N_2IO_L05N_2IO_L05P_2
IO_L21N_2IO_L36N_2
IO_L19N_2
IO_L90P_2IO_L90N_2
IO_L54N_2
2V5F4
2V5F42V5F4
1V25R4
DGND
22
7 X 10NF
FPGA4 BANKS 6/7 (DDR SDRAM)
Tue Dec 12 11:51:36 2006
C14
41
100N
100N
10N
10N
AJ33
F4RAM4_ADD<4>
F4RAM4_ADD<2>
C96
6C
786
100N
C11
49C
1118
C76
2
J33L33
E34
F34
F4RAM1_WE*
F4RAM1_D<15>
F4RAM4_D<14>
F4RAM4_D<3>
F4RAM4_UDMT30
4U7
F4RAM6_D<11>
10N
10N
F4RAM1_BA1F4RAM1_BA0F4RAM1_RAS*
F4RAM1_CS*
4U7
F4RAM1_ADD<12..0>
F4RAM5_CK*F4RAM5_UDM
F4RAM5_CKF4RAM5_CKE
F4RAM4_RAS*F4RAM4_CAS*
F4RAM4_CS*F4RAM4_WE*
F4RAM4_BA1F4RAM4_BA0
F4RAM5_LDM
F4RAM6_BA0F4RAM6_BA1
F4RAM6_CK*F4RAM6_CKF4RAM6_CKE
F4RAM2_CKF4RAM2_CK*F4RAM2_LDM
F4RAM3_LDM
F4RAM3_CKF4RAM3_CK*
FPGA4BANK 6
F4RAM2_CKE
F4RAM1_CK*
F4RAM1_LDMF4RAM1_UDM
F4RAM1_CKF4RAM1_CKE
F4RAM3_BA0F4RAM3_BA1
F4RAM3_UDMF4RAM3_CKE
FPGA4
F4RAM2_BA1
BANK 7
F4RAM4_LDMF4RAM4_CK*F4RAM4_CKF4RAM4_CKE
F4RAM4_ADD<12>F4RAM4_ADD<11>
F4RAM4_ADD<8>F4RAM4_ADD<7>F4RAM4_ADD<6>F4RAM4_ADD<5>
F4RAM4_ADD<1>F4RAM4_ADD<0>
F4RAM4_ADD<3>
F4RAM5_D<15>F4RAM5_D<14>F4RAM5_D<13>
F4RAM5_D<11>F4RAM5_D<10>F4RAM5_D<9>
F4RAM5_D<7>F4RAM5_D<6>F4RAM5_D<5>F4RAM5_D<4>F4RAM5_D<3>F4RAM5_D<2>F4RAM5_D<1>F4RAM5_D<0>
F4RAM5_D<8>
F4RAM6_D<15>F4RAM6_D<14>
F4RAM6_D<12>
F4RAM6_D<10>
F4RAM6_D<4>F4RAM6_D<3>F4RAM6_D<2>F4RAM6_D<1>F4RAM6_D<0>
F4RAM4_D<13>F4RAM4_D<12>F4RAM4_D<11>F4RAM4_D<10>
F4RAM4_D<8>F4RAM4_D<1>F4RAM4_D<0>
F4RAM4_D<9>
F4RAM3_D<0>F4RAM3_D<8>
F4RAM1_CAS*
F4RAM1_ADD<12>F4RAM1_ADD<11>F4RAM1_ADD<10>F4RAM1_ADD<9>F4RAM1_ADD<8>F4RAM1_ADD<7>F4RAM1_ADD<6>F4RAM1_ADD<5>F4RAM1_ADD<4>F4RAM1_ADD<3>F4RAM1_ADD<2>F4RAM1_ADD<1>F4RAM1_ADD<0>
F4RAM1_D<13>F4RAM1_D<12>F4RAM1_D<11>F4RAM1_D<10>F4RAM1_D<9>F4RAM1_D<8>
F4RAM1_D<6>F4RAM1_D<5>F4RAM1_D<4>F4RAM1_D<3>F4RAM1_D<2>F4RAM1_D<1>F4RAM1_D<0>
F4RAM1_D<7>
F4RAM2_D<15>F4RAM2_D<14>F4RAM2_D<13>F4RAM2_D<12>F4RAM2_D<11>F4RAM2_D<10>F4RAM2_D<9>F4RAM2_D<8>F4RAM2_D<7>F4RAM2_D<6>F4RAM2_D<5>
F4RAM2_D<3>F4RAM2_D<2>F4RAM2_D<1>F4RAM2_D<0>
F4RAM2_D<4>
F4RAM3_D<14>F4RAM3_D<13>F4RAM3_D<12>F4RAM3_D<11>
F4RAM3_D<9>F4RAM3_D<7>F4RAM3_D<6>F4RAM3_D<5>F4RAM3_D<4>F4RAM3_D<3>F4RAM3_D<2>F4RAM3_D<1>
F4RAM3_D<10>
F4RAM4_D<7>F4RAM4_D<6>
F4RAM6_D<5>F4RAM6_D<6>F4RAM6_D<7>
F4RAM4_D<2>
F4RAM4_D<4>F4RAM4_D<5>
F4RAM2_BA0F4RAM2_UDM
F4RAM3_D<15>
F4RAM4_D<13>
F4RAM4_D<9>F4RAM4_D<8>
F4RAM4_D<1>F4RAM4_D<0>
F4RAM3_D<0>
F4RAM3_D<8>
F4RAM4_D<10>F4RAM4_D<11>F4RAM4_D<12>
F4RAM5_D<12>
F4RAM1_D<14>
100N
F4RAM4_ADD<9>
F4RAM6_D<8>F4RAM6_D<9>
F4RAM6_D<13>
F4RAM4_D<15>
U17 U17
C14
60
C12
20C
1194
C10
47C
1034
C11
34
10N
10N
10N
C99
4C
1230
C12
00C
1083
C10
38C
1005
C94
6
R644
R640 51R
51R 51R
51R
R726
R743
F4RAM1_D<15..0>
F4RAM2_D<15..0>
F4RAM3_D<15..0>
F4RAM4_D<15..0>
F4RAM6_D<15..0>
F4RAM5_D<15..0>
V32
V31
V30
W24
W28AA27
W27
AB32AA26
V28
V26Y33
AE30
AF30AA29
AF29AC26
AH32AG31
AF32AF31
AE31AD31AC31
AH30AC32
AH29AF28AF27AD29AC29AB29Y31
AE34AG33
AB27AE33AF33
AA32
AK33
AL33
AA31
Y34
W32
AB33AA34AA33
AK34
AJ34
AH33AH34
AJ30
W33Y32AB34
AD32AG34AG32AG30AK32
AD34
AL34
AC33
AC34
AD33
AG29AH27AK31
AH31
Y28AA28AB28AC28
AE28AD28
V25AG28AE27
Y25W26
AA25AC25
AJ27AJ28
AD26AD25AD27
Y26W29W30V29
W25
AB25AB26
V27V24
W31Y29
AB31AB30AA30
AD30
N32
L32
R25T25U25U24
U29
J27
P25
U27
M26
T29P29
L26
M25N25
L25K27
U30U31
T27
L27
N29
H29
K31
U26
G33H33
K33M33L34K34
M32M31G30
F33
H34
P33G34
P26
K28
E32
H32
J32H31
G32G31
E31F30
N26
T31
R32P32N31
R26P27N27
R28
U28T28
N28P28
M28L28
P30R29
N30L31L30
J30K30
H30
U32V33
T33R34
N34
J31
M34P31
U33R33
N33
P34
D33
D34
E33G29
T26
F28
M29L29
R31T32
F31
J29
F27J28
T24
F4RAM4_ADD<12..0>
F4RAM4_ADD<10>
AJ31
C14
23
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
2V5A4
2V5A4 2V5A42V5A4
2V5A4 2V5A41V25R4 1V25R4
XC2VP40
IO_L48P_7
IO_L42P_7
IO_L50N_7IO_L56N_7IO_L86N_7IO_L53P_7
IO_L87N_7
IO_L05N_7
IO_L44N_7
IO_L89N_7
IO_L32P_7
IO_L60N_7IO_L51N_7
IO_L18P_7
IO_L32N_7IO_L38N_7
IO_L18N_7IO_L23N_7
IO_L87P_7IO_L90N_7
IO_L59N_7
IO_L35N_7
IO_L45N_7
IO_L19N_7
IO_L33P_7
IO_L86P_7
IO_L20N_7IO_L31N_7
IO_L34P_7IO_L40P_7IO_L37P_7IO_L37N_7
IO_L43P_7IO_L43N_7IO_L16P_7
IO_L17P_7IO_L17N_7IO_L04P_7
IO_L31P_7
IO_L49P_7IO_L20P_7
IO_L44P_7
IO_L23P_7
IO_L03P_7
IO_L24P_7
IO_L22P_7IO_L24N_7
IO_L15P_7IO_L15N_7
IO_L03N_7IO_L06N_7
IO_L38P_7
IO_L85N_7
IO_L57P_7IO_L52P_7IO_L48N_7
IO_L50P_7IO_L47N_7IO_L41N_7
IO_L54N_7
IO_L89P_7IO_L59P_7
IO_L41P_7IO_L47P_7
IO_L39N_7IO_L35P_7
IO_L51P_7IO_L54P_7
IO_L45P_7IO_L42N_7IO_L36P_7
IO_L21P_7IO_L33N_7
IO_L19P_7
IO_L90P_7IO_L88P_7
IO_L58P_7IO_L55P_7
IO_L46P_7
IO_L34N_7/VREF_7IO_L22N_7/VREF_7
IO_L46N_7/VREF_7IO_L40N_7/VREF_7
IO_L52N_7/VREF_7
IO_L88N_7/VREF_7IO_L58N_7/VREF_7
IO_L49N_7
IO_L55N_7
IO_L01N_7/VRP_7
IO_L01P_7/VRN_7
IO_L04N_7/VREF_7IO_L16N_7/VREF_7
VCCO_7
IO_L56P_7
IO_L02P_7
IO_L39P_7IO_L36N_7
IO_L57N_7IO_L85P_7
IO_L06P_7
IO_L21N_7
IO_L02N_7IO_L05P_7
IO_L53N_7
IO_L60P_7
XC2VP40
IO_L90N_6
IO_L90P_6
IO_L88N_6
IO_L59P_6
IO_L56N_6IO_L47P_6
IO_L56P_6
IO_L48N_6IO_L44N_6
IO_L89N_6
IO_L86N_6IO_L87P_6
IO_L34P_6
IO_L22N_6IO_L49P_6
IO_L22P_6IO_L32N_6
IO_L19N_6IO_L21P_6
IO_L31N_6IO_L31P_6
IO_L34N_6IO_L39P_6IO_L43P_6
IO_L04N_6IO_L43N_6
IO_L04P_6IO_L17N_6IO_L17P_6IO_L37P_6IO_L40N_6IO_L46P_6IO_L57P_6
IO_L42P_6IO_L33P_6
IO_L41P_6IO_L36N_6IO_L36P_6
IO_L52N_6
IO_L16P_6
VCCO_6
IO_L06P_6
IO_L52P_6
IO_L60N_6
IO_L85N_6
IO_L54P_6IO_L60P_6IO_L54N_6
IO_L16N_6
IO_L18N_6
IO_L24P_6IO_L24N_6
IO_L01P_6/VRN_6
IO_L87N_6/VREF_6IO_L57N_6/VREF_6IO_L51N_6/VREF_6
IO_L39N_6/VREF_6IO_L33N_6/VREF_6IO_L21N_6/VREF_6IO_L15N_6/VREF_6IO_L03N_6/VREF_6
IO_L42N_6
IO_L06N_6
IO_L01N_6/VRP_6
IO_L45N_6/VREF_6
IO_L51P_6
IO_L18P_6
IO_L45P_6
IO_L15P_6IO_L05P_6IO_L03P_6
IO_L19P_6
IO_L55P_6IO_L47N_6IO_L41N_6IO_L40P_6
IO_L23N_6IO_L35N_6
IO_L86P_6IO_L05N_6IO_L23P_6
IO_L50P_6IO_L53N_6
IO_L44P_6IO_L32P_6
IO_L02P_6IO_L02N_6
IO_L20N_6IO_L20P_6IO_L35P_6
IO_L50N_6IO_L58P_6IO_L58N_6IO_L88P_6
IO_L53P_6
IO_L38P_6IO_L38N_6
IO_L89P_6IO_L59N_6
IO_L85P_6IO_L55N_6
IO_L48P_6IO_L46N_6IO_L49N_6
IO_L37N_6
DGNDDGND
DGND
DGND
DGND
23
FPGA5 BANKS 0/1/4/5
Tue Dec 12 11:59:17 2006
E24
K16L16C13
D9C9
C96
3
FPGA5
U18
D14
AJ17
AE12
AK9
AM9AG11AH11
F5_CLKBOT+
AK26
AK18
AH18AJ18
AL18AL30AL29
AH26AG25AJ26
AM28
AL28
AF24AL27AL25AM24AL20AL19
AK27AK25
AK29AK24
AK28
AE21
AE20AE22
AE23
AG26
AG18AF18
AD18AK19AE18AF19AG19AM21AM22AJ21AD19AE19
AH25AF23
AF22AH23AJ23
AF21AJ24
AJ22AF20
AE24AF25
AG21AH21
AH20AJ20
AH22AH19AJ19
AM26AG22
AL26
AG24AH24
AL21AL24
AL23AL22
AK21AK22
AL5
AG9AH9
AL6
AK7AK6
AL7
AF11AE11
AK8AH10AG10
AF10
AL8
AF12AJ9
AL9
AH12
AL10AK10AJ12
AE13AF13
AJ11AH13AG13
AE14AK11
AF14
AK13AJ13
AL11AM11AE15
AG14AF15
AH14
AF16AM13
AG16
AJ15AH15
AM14
AE16AD16AL12AL13
AJ14AK14
AL15AL14
AD17AE17AH16
AK16AJ16
AL16
AG17AF17
AL17
AH17
AK17
AM7
J10
E6
G9H10
E7H9
G10
K11J11F9E9D5D6
J14K14
G13
D8E8F12G12
H11G11
E11
K12J12F11
D7C7
F13
C14
F15
E14
J15F14
D11C11K15
D12D13
D10H14G14
E13
G15
L17
D17E17F17
H17
K17G17
E16F16G16
D15J16H16
D16
J17
H13J13K13
E10
G23
H19
D20
F20
G25
H26G26
J24
E26D30
J23
C28D28
E27F23
K22J22H22
D26C26K21
H24
J21
F24
E22
D21
L19K19
D22
C24K20J20F21E21
G20
D25
D23
C21C22
J19
G19
E19F19
D19L18K18
F18G18
E18
H18J18D18
D29
G21
E25
K24
D24
H21
F22
G22
D27
G24
K23
F26
J25
H25
E28E29
C78
8
C10
31C
998
C12
73C
1168
C10
98C
901
C12
25
C14
35
C11
09C
1051
C11
89C
1285
C76
4
U18 U18 U18
51R
R621
R617
FPGA5
FPGA5BANK 4
10N
10N
BANK 1
10N
10N
10N
10N
100N
80.157MHZ
80.44MHZ
80.44MHZF5_BREFCLKTOP-
INIT5
F5_BREFCLKTOP+
F5_CLKBOT-
BANK 5
80.157MHZF5_BREFCLKBOT-F5_BREFCLKBOT+
F5RAM5_BA0
F5RAM3_RAS*F5RAM3_WE*
F5RAM3_CAS*
F5RAM4_UDQSF5RAM4_LDQS
F5RAM5_LDQSF5RAM6_UDQSF5RAM6_LDQS
10N
F5RAM5_UDQS
FPGA5BANK 0
80.44MHZ
80.157MHZ
4U7
RED27*
RED28*
RED29*
RED30*
RED31*
RED32*
RED33*RED34*
RED35*
100N
100N
100N
100N
80.157MHZ
80.44MHZF5_CLKTOP-F5_CLKTOP+
F1F5_A
PROM5_D0
100N4U
7
51R
F5RAM3_CS*
F5RAM5_BA1
F5RAM5_CAS*
F5RAM3_LDQSF5RAM3_UDQSF5RAM2_LDQSF5RAM2_UDQSF5RAM1_LDQSF5RAM1_UDQS
F5RAM6_LDMF5RAM6_UDMF5RAM6_CS*F5RAM6_WE*
F5RAM6_CAS*
F5RAM5_RAS*
F5RAM5_CS*
F1F5_B
F5RAM6_RAS*
F5RAM2_CS*F5RAM2_WE*F5RAM2_RAS*F5RAM2_CAS*
F5RAM5_WE*
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
XC2VP40
IO_L06P_4/VRN_4
IO_L75N_4/GCLK1S
IO_L74N_4/GCLK3S
IO_L75P_4/GCLK0P
IO_L74P_4/GCLK2P
IO_L73N_4IO_L73P_4
IO_L69P_4/VREF_4
IO_L68P_4IO_L69N_4
IO_L68N_4IO_L67P_4IO_L67N_4
IO_L57N_4IO_L57P_4/VREF_4
IO_L53_4IO_L50_4
IO_L48N_4IO_L48P_4IO_L49N_4IO_L49P_4
IO_L54N_4
IO_L56N_4IO_L56P_4
IO_L55P_4
IO_L54P_4IO_L55N_4
IO_L47P_4
IO_L46P_4IO_L47N_4
IO_L46N_4IO_L45P_4/VREF_4
IO_L45N_4
IO_L44N_4IO_L44P_4
IO_L43P_4
IO_L39P_4IO_L43N_4
IO_L38N_4IO_L38P_4IO_L39N_4
IO_L37P_4IO_L37N_4
IO_L26P_4IO_L27N_4
IO_L27P_4/VREF_4
IO_L25P_4IO_L26N_4
IO_L25N_4
IO_L21N_4IO_L21P_4
IO_L20P_4IO_L20N_4IO_L19P_4
IO_L09P_4/VREF_4IO_L19N_4
IO_L05_4
IO_L08N_4IO_L08P_4IO_L09N_4
IO_L07N_4IO_L07P_4/VREF_4
IO_L06N_4/VRP_4
IO_L03N_4/D2IO_L03P_4/D3
IO_L01P_4/INIT_B
IO_L02P_4/D1IO_L02N_4/D0
IO_L01N_4/DOUT
VCCO_4
XC2VP40
IO_L44P_1
IO_L38N_1
IO_L27P_1IO_L27N_1/VREF_1
IO_L37P_1
IO_L75P_1/GCLK2S
IO_L68N_1
IO_L57N_1/VREF_1IO_L57P_1IO_L56N_1
IO_L67P_1IO_L67N_1IO_L68P_1
IO_L73P_1IO_L69N_1/VREF_1
IO_L75N_1/GCLK3P
IO_L73N_1IO_L74P_1/GCLK0SIO_L74N_1/GCLK1P
IO_L69P_1
IO_L55P_1
IO_L43N_1
IO_L45N_1/VREF_1IO_L45P_1IO_L44N_1
IO_L46P_1IO_L46N_1
IO_L48P_1IO_L47N_1IO_L47P_1
IO_L49P_1IO_L48N_1
IO_L49N_1
IO_L54N_1
IO_L56P_1IO_L55N_1
IO_L54P_1IO_L53_1IO_L50_1
IO_L43P_1
IO_L20N_1IO_L20P_1
IO_L19P_1IO_L09N_1/VREF_1
IO_L09P_1
IO_L19N_1
IO_L21N_1IO_L21P_1
IO_L25P_1IO_L25N_1IO_L26P_1IO_L26N_1
IO_L37N_1IO_L38P_1
IO_L39P_1IO_L39N_1
IO_L08N_1IO_L08P_1IO_L07N_1IO_L07P_1IO_L06N_1IO_L06P_1
IO_L03N_1/VREF_1
IO_L02P_1IO_L01N_1/VRP_1
IO_L03P_1IO_L02N_1
IO_L01P_1/VRN_1
IO_L05_1
VCCO_1
2V5E5
XC2VP40
IO_L44N_5IO_L53_5
IO_L48P_5IO_L48N_5
IO_L45P_5IO_L57P_5
IO_L25N_5IO_L25P_5
IO_L21P_5
IO_L38P_5IO_L21N_5
IO_L68N_5IO_L68P_5IO_L38N_5
IO_L56N_5IO_L56P_5
IO_L47N_5IO_L47P_5
IO_L05_5IO_L07P_5
IO_L46N_5IO_L44P_5
IO_L39P_5IO_L43N_5
IO_L26N_5IO_L26P_5IO_L37N_5
IO_L19N_5IO_L08N_5
IO_L49N_5IO_L49P_5
IO_L50_5IO_L54N_5IO_L54P_5IO_L55N_5IO_L55P_5IO_L67N_5IO_L69P_5IO_L67P_5
IO_L73P_5IO_L73N_5
IO_L02P_5/D7
IO_L19P_5
VCCO_5
IO_L37P_5IO_L46P_5
IO_L43P_5
IO_L03N_5/D4
IO_L39N_5IO_L03P_5/D5
IO_L27P_5IO_L09P_5
IO_L69N_5/VREF_5IO_L57N_5/VREF_5IO_L45N_5/VREF_5IO_L27N_5/VREF_5IO_L09N_5/VREF_5IO_L07N_5/VREF_5
IO_L06P_5/VRN_5
IO_L06N_5/VRP_5
IO_L20P_5IO_L08P_5
IO_L02N_5/D6
IO_L01N_5/RDWR_BIO_L01P_5/CS_B
IO_L75N_5/GCLK7S
IO_L74N_5/GCLK5SIO_L74P_5/GCLK4P
IO_L75P_5/GCLK6P
IO_L20N_5
2V5E5
2V5E5 2V5E5 2V5E5 2V5E51V25R5
XC2VP40
IO_L01N_0/VRP_0IO_L01P_0/VRN_0
IO_L03N_0
IO_L05_0
IO_L07N_0
IO_L09N_0
IO_L19P_0
IO_L21P_0
IO_L26P_0
IO_L37P_0
IO_L43N_0
IO_L45N_0
IO_L47N_0
IO_L06N_0
IO_L44N_0
IO_L45P_0/VREF_0
IO_L08P_0
VCCO_0
IO_L74P_0/GCLK6SIO_L75N_0/GCLK5PIO_L75P_0/GCLK4S
IO_L74N_0/GCLK7P
IO_L73N_0IO_L73P_0
IO_L69P_0/VREF_0IO_L69N_0IO_L68P_0
IO_L67P_0IO_L68N_0
IO_L67N_0
IO_L57N_0
IO_L53_0IO_L50_0
IO_L46P_0
IO_L44P_0
IO_L55N_0
IO_L49P_0IO_L49N_0IO_L48P_0IO_L48N_0IO_L47P_0
IO_L46N_0
IO_L54P_0IO_L54N_0
IO_L56N_0
IO_L43P_0
IO_L19N_0
IO_L39P_0
IO_L21N_0
IO_L39N_0IO_L38P_0IO_L38N_0
IO_L37N_0IO_L27P_0/VREF_0
IO_L27N_0
IO_L25P_0IO_L26N_0
IO_L20N_0IO_L20P_0
IO_L09P_0/VREF_0
IO_L08N_0IO_L07P_0
IO_L06P_0
IO_L02P_0IO_L02N_0
IO_L03P_0/VREF_0
IO_L55P_0
IO_L56P_0
IO_L57P_0/VREF_0
IO_L25N_0
FPGA5 BANKS 2/3
24
Tue Dec 12 12:03:49 2006
F5RAM8_D<8>
F5RAM8_D<10>
F5RAM8_UDM
Y9Y10
W10
R737
D1
F5RAM8_RAS*
51R
V4V3Y2
V9V10
W4
Y1W3
W11V11Y4Y7
W9
AA3AA4
AB4
AA10AB3
AA9
AE1AC4
AB8AC7
AF2AB9AB10
AG2AE2
AC10
AH2AC9
AE8AD10
AK4
AJ7
AA8AA7
AB7
V8W8
AC3
AF4AE4AD4
AF3AG4AH4AH3
AL2AK1AK2
AL1AJ1
AJ5
AJ4
Y3AB1
W2
AC2AD3AG1
AG5AG3
AK3
AD9
AH8
AJ8
AH6
AG6
AF6AD6AC6AB6AA6Y6
V6W6
AF5AH5
AE5AD5
AA5W5
AB5
V5
V7
AE7W7
AD8AD7
AJ2AH1AD1AB2
AA2AD2AC1
AA1AG7AF8AF7
R7
U4U3
H6
L6J6
J7J8E4F7F8
N8K8
L8
T8
F5
T9T2
H4H3
U2
D2
H1H2G1G2F1F2E1E3
K2K4J3
G3G4F4
R3
H5
K5L5
E2G6J4
M1L2
R2
J2
P4
L9
M9
K7M10
L7K1L1
N9N10
M4M2
P2N2
R9P3
R10
U11T11
P1
T10R1
T5
U9U6
U10
U8
P8
V2U5
M3P10P9N1N4N3
N7U7M7
R6
M6N6P6
T6
P7
L10
J5
G5
R4
T7
N5P5
L3L4
T3T4
51R
51R
R629
R637
51R
R717
U18U18
C90
9
C14
01
C14
36C
1008
C10
91
C10
99
C97
9C
1141
C12
49C
1019
4U7
10N
10N
10N
100N
100N
100N
100N
4U7
BANK 2FPGA5 FPGA5
BANK 3
F5RAM8_CAS*
F5RAM8_CS*
F5RAM9_UDQSF5RAM9_LDQS
F5RAM9_RAS*F5RAM9_CAS*F5RAM9_WE*F5RAM9_CS*F5RAM9_UDMF5RAM9_LDM
F5RAM7_CKF5RAM7_CK*
F5RAM8_BA1F5RAM8_BA0
F5RAM8_CK*
F5RAM8_LDM
F5RAM8_WE*
F5RAM7_ADD<12>F5RAM7_ADD<11>
F5RAM7_D<14>
F5RAM7_D<11>F5RAM7_D<10>F5RAM7_D<9>F5RAM7_D<8>
F5RAM7_D<12>F5RAM7_D<13>
F5RAM7_D<15>
F5RAM8_D<15>F5RAM8_D<14>
F5RAM8_D<12>F5RAM8_D<13>
F5RAM9_D<15>
F5RAM9_D<13>F5RAM9_D<12>F5RAM9_D<11>F5RAM9_D<10>F5RAM9_D<9>F5RAM9_D<8>
F5RAM9_D<14>
F5RAM8_D<11>
F5RAM8_D<9>
F5RAM8_UDQSF5RAM8_LDQS
F5RAM7_ADD<9>
F5RAM8_CKF5RAM8_CKE
F5RAM7_ADD<10>F5RAM7_ADD<3>F5RAM7_ADD<2>F5RAM7_ADD<1>F5RAM7_ADD<0>
F5RAM7_BA1F5RAM7_BA0F5RAM7_RAS*
F5RAM7_D<7>F5RAM7_D<6>F5RAM7_D<5>F5RAM7_D<4>F5RAM7_D<3>F5RAM7_D<2>F5RAM7_D<1>F5RAM7_D<0>
F5RAM8_D<7>F5RAM8_D<6>F5RAM8_D<5>F5RAM8_D<4>F5RAM8_D<3>F5RAM8_D<2>F5RAM8_D<1>F5RAM8_D<0>
F5RAM9_D<6>
F5RAM9_D<2>F5RAM9_D<3>
F5RAM7_CKEF5RAM7_LDMF5RAM7_UDMF5RAM7_CS*F5RAM7_WE*F5RAM7_CAS*F5RAM7_LDQS
F5RAM7_UDQS
F5RAM7_ADD<4>F5RAM7_ADD<5>F5RAM7_ADD<6>F5RAM7_ADD<7>F5RAM7_ADD<8>
10N
F5RAM9_D<7>
F5RAM9_D<4>
F5RAM9_CKF5RAM9_CKEF5RAM9_BA0F5RAM9_BA1
F5RAM9_D<0>F5RAM9_D<1>
F5RAM9_D<5>
F5RAM9_CK*
FPGA_POR*
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
2V5F52V5F5
DGND
DGND
XC2VP40
IO_L17N_3IO_L17P_3IO_L05N_3IO_L60P_3
IO_L51P_3IO_L45P_3IO_L54N_3
IO_L54P_3IO_L42N_3IO_L24N_3IO_L18P_3
IO_L35N_3IO_L35P_3
IO_L56N_3IO_L23N_3
IO_L89N_3
IO_L88N_3
IO_L46N_3
IO_L58N_3IO_L49N_3
IO_L37N_3IO_L34P_3
IO_L04N_3IO_L22N_3
IO_L58P_3IO_L88P_3
IO_L55N_3IO_L49P_3IO_L46P_3IO_L40N_3IO_L37P_3IO_L22P_3
IO_L15P_3
IO_L04P_3
IO_L02P_3
IO_L05P_3
IO_L20N_3
IO_L03N_3/VREF_3
IO_L21N_3/VREF_3IO_L15N_3/VREF_3
IO_L33N_3/VREF_3IO_L39N_3/VREF_3IO_L45N_3/VREF_3
IO_L87N_3/VREF_3
IO_L51N_3/VREF_3IO_L57N_3/VREF_3
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
IO_L18N_3IO_L06N_3
IO_L16P_3IO_L16N_3IO_L06P_3
IO_L19N_3IO_L19P_3IO_L21P_3IO_L31N_3
IO_L39P_3IO_L34N_3IO_L31P_3
IO_L43N_3
IO_L56P_3IO_L89P_3
IO_L41N_3
IO_L47N_3IO_L47P_3
VCCO_3
IO_L02N_3
IO_L03P_3
IO_L20P_3IO_L23P_3
IO_L32N_3IO_L24P_3
IO_L32P_3
IO_L36N_3IO_L33P_3
IO_L38P_3IO_L38N_3IO_L36P_3
IO_L40P_3IO_L41P_3
IO_L43P_3IO_L42P_3
IO_L44N_3
IO_L48N_3IO_L44P_3
IO_L50P_3IO_L50N_3IO_L48P_3
IO_L52P_3IO_L52N_3
IO_L53N_3IO_L53P_3IO_L55P_3IO_L57P_3IO_L59N_3IO_L59P_3
IO_L85N_3IO_L60N_3
IO_L85P_3
IO_L86P_3IO_L86N_3
IO_L87P_3IO_L90N_3IO_L90P_3
XC2VP40
IO_L85N_2IO_L85P_2
IO_L42N_2IO_L42P_2
IO_L51P_2IO_L45P_2
IO_L59P_2
IO_L57N_2
IO_L16P_2
IO_L21P_2
IO_L18N_2
IO_L47P_2
IO_L60N_2
IO_L51N_2IO_L45N_2IO_L39P_2
IO_L54P_2
IO_L39N_2IO_L89P_2IO_L41P_2
IO_L48P_2IO_L48N_2IO_L46P_2IO_L44P_2IO_L44N_2IO_L43P_2
IO_L87P_2IO_L88P_2
IO_L47N_2
IO_L89N_2
IO_L86N_2
IO_L87N_2IO_L86P_2
IO_L60P_2
IO_L55P_2IO_L56N_2
IO_L55N_2
IO_L53N_2IO_L53P_2
IO_L50N_2
IO_L52P_2IO_L50P_2
IO_L49N_2IO_L49P_2
IO_L40P_2IO_L43N_2
IO_L38N_2IO_L38P_2
IO_L37P_2IO_L37N_2IO_L35P_2
IO_L32N_2IO_L23P_2
IO_L32P_2
IO_L18P_2
IO_L52N_2/VREF_2
IO_L34N_2/VREF_2
VCCO_2
IO_L58N_2/VREF_2
IO_L40N_2/VREF_2IO_L46N_2/VREF_2
IO_L22N_2/VREF_2IO_L16N_2/VREF_2IO_L04N_2/VREF_2
IO_L36P_2IO_L33N_2
IO_L19P_2
IO_L57P_2
IO_L06P_2IO_L15N_2IO_L15P_2
IO_L22P_2IO_L33P_2IO_L34P_2
IO_L03P_2IO_L04P_2IO_L17N_2IO_L17P_2IO_L20N_2IO_L20P_2IO_L31N_2IO_L31P_2
IO_L01N_2/VRP_2IO_L01P_2/VRN_2
IO_L88N_2/VREF_2
IO_L24P_2IO_L24N_2
IO_L58P_2IO_L56P_2
IO_L06N_2
IO_L59N_2
IO_L35N_2
IO_L23N_2IO_L41N_2
IO_L02N_2IO_L02P_2IO_L03N_2IO_L05N_2IO_L05P_2
IO_L21N_2IO_L36N_2
IO_L19N_2
IO_L90P_2IO_L90N_2
IO_L54N_2
2V5F52V5F52V5F5
1V25R5 1V25R5
DGND
7 X 10NF
25
FPGA5 BANKS 6/7 (DDR SDRAM)
Tue Dec 12 12:14:28 2006
AC26
F5RAM5_UDM
N25
N27
F5RAM6_D<15..0>
F5RAM5_D<15..0>
T30
T24
J28F27
J29
F31
T32R31
L29M29
F28
T26
G29E33
D34
D33
P34
N33
R33U33
P31
L33M34
J31J33
N34
R34T33
V33U32
H30
K30J30
L30L31N30
R29P30
L28M28
P28N28
T28U28
R28
P27R26
N31P32R32
T31
N26
F30E31
G31G32
H31J32
H32
E32
K28
P26
G34P33
H34
E34F33F34
G30M31M32
K34L34M33K33
H33G33
U26
K31
H29
N29
L27
T27
U31U30
K27L25
M25
L26
P29T29
M26
U27
P25
J27
U29
U24U25T25R25
L32
N32
AD30
AA30AB30AB31
Y29W31
V24V27
AB26AB25
W25
V29W30W29Y26
AD27AD25AD26
AJ28AJ27
AC25AA25
W26Y25
AE27AG28V25
AD28AE28
AC28AB28AA28Y28
AH31
AK31AH27AG29
AD33
AJ33
AC34
AC33
AJ31
AL34
AD34
AK32AG30AG32AG34AD32
AB34Y32W33
AJ30
AH34AH33
AJ34
AK34
AA33AA34AB33
W32
Y34
AA31
AL33
AK33
AA32
AF33AE33AB27
AG33AE34
Y31AB29AC29AD29AF27AF28AH29
AC32AH30
AC31AD31AE31
AF31AF32
AG31AH32
AF29
AA29AF30
AE30
Y33V26
V28
AA26AB32
W27
AA27W28
W24
V30
V31
V32
U18U18
F5RAM4_D<15..0>
F5RAM3_D<15..0>
F5RAM2_D<15..0>
F5RAM1_D<15..0>
51R
51RR745
R729
C14
43
C11
96C
1221
C78
9C
967
C10
07
C10
39C
1084
C12
32C
1201
C94
7C
997
51R
51RR641
R645
C76
5
C11
52C
1035
C11
20C
1136
C10
50C
1461
C14
26
10N
F5RAM4_ADD<10>
F5RAM4_ADD<8>
F5RAM4_ADD<3>F5RAM4_ADD<2>F5RAM4_ADD<1>F5RAM4_ADD<0>
F5RAM4_D<6>
F5RAM4_D<15>
F5RAM3_CKE
F5RAM5_D<2>F5RAM5_D<1>
F5RAM5_CKEF5RAM5_CKF5RAM5_CK*
F5RAM2_CK
F5RAM2_LDMF5RAM2_CK*
100N
100N
100N
100N
10N
F5RAM1_D<1>F5RAM1_D<2>
F5RAM3_D<5>
F5RAM3_D<13>
F5RAM5_D<8>
F5RAM3_D<0>F5RAM3_D<8>
F5RAM4_D<2>
F5RAM4_D<0>F5RAM4_D<1>
F5RAM4_D<8>F5RAM4_D<9>F5RAM4_D<10>F5RAM4_D<11>F5RAM4_D<12>F5RAM4_D<13>
F5RAM3_D<0>
F5RAM3_D<8>
F5RAM6_D<5>F5RAM6_D<6>F5RAM6_D<7>
F5RAM4_D<2>F5RAM4_D<3>F5RAM4_D<4>F5RAM4_D<5>
F5RAM4_D<7>F5RAM4_D<14>
F5RAM4_UDM
F5RAM3_D<1>
F5RAM3_D<10>
F5RAM3_D<2>F5RAM3_D<3>F5RAM3_D<4>
F5RAM3_D<6>F5RAM3_D<7>F5RAM3_D<9>
F5RAM3_D<11>F5RAM3_D<12>
F5RAM3_D<14>F5RAM3_D<15>
F5RAM2_D<10>
F5RAM2_D<1>F5RAM2_D<0>
F5RAM2_D<2>F5RAM2_D<3>F5RAM2_D<4>F5RAM2_D<5>F5RAM2_D<6>F5RAM2_D<7>F5RAM2_D<8>F5RAM2_D<9>
F5RAM2_D<11>F5RAM2_D<12>F5RAM2_D<13>F5RAM2_D<14>F5RAM2_D<15>
F5RAM1_D<5>
F5RAM1_D<0>
F5RAM1_D<3>F5RAM1_D<4>
F5RAM1_D<6>F5RAM1_D<7>F5RAM1_D<8>F5RAM1_D<9>F5RAM1_D<10>F5RAM1_D<11>F5RAM1_D<12>F5RAM1_D<13>F5RAM1_D<14>
F5RAM1_ADD<11>F5RAM1_ADD<12>
F5RAM1_ADD<0>F5RAM1_ADD<1>
F5RAM1_CKEF5RAM1_CS*F5RAM1_WE*F5RAM1_CAS*F5RAM1_RAS*F5RAM1_BA0F5RAM1_BA1
F5RAM1_ADD<12..0>
F5RAM4_D<8>
F5RAM4_D<0>F5RAM4_D<1>
F5RAM4_D<9>F5RAM4_D<10>F5RAM4_D<11>F5RAM4_D<12>F5RAM4_D<13>
F5RAM6_D<11>
F5RAM6_D<1>
F5RAM6_D<8>
F5RAM6_D<0>
F5RAM6_D<2>F5RAM6_D<3>F5RAM6_D<4>
F5RAM6_D<9>F5RAM6_D<10>
F5RAM6_D<12>F5RAM6_D<13>F5RAM6_D<14>F5RAM6_D<15>
F5RAM5_D<4>
F5RAM5_D<0>
F5RAM5_D<3>
F5RAM5_D<5>F5RAM5_D<6>F5RAM5_D<7>
F5RAM5_D<9>F5RAM5_D<10>F5RAM5_D<11>F5RAM5_D<12>F5RAM5_D<13>F5RAM5_D<14>F5RAM5_D<15>
F5RAM4_ADD<4>
F5RAM4_ADD<7>
F5RAM4_ADD<5>F5RAM4_ADD<6>
F5RAM4_ADD<9>
F5RAM4_ADD<11>F5RAM4_ADD<12>
F5RAM4_ADD<12..0>
F5RAM3_UDM
F5RAM3_BA1
FPGA5BANK 7
F5RAM3_BA0
F5RAM2_UDM
F5RAM2_BA1F5RAM2_BA0
F5RAM1_CK
BANK 6FPGA5
F5RAM3_CK*F5RAM3_CK
F5RAM3_LDM
F5RAM2_CKE
F5RAM6_CKEF5RAM6_CKF5RAM6_CK*
F5RAM6_BA1F5RAM6_BA0
F5RAM5_LDM
F5RAM4_BA0F5RAM4_BA1
F5RAM4_LDM
F5RAM4_CKF5RAM4_CK*
F5RAM4_WE*F5RAM4_CS*F5RAM4_CKE
F5RAM4_CAS*F5RAM4_RAS*
10N
10N
10N4U
7 10N4U
7
10N
F5RAM1_D<15>
F5RAM1_LDMF5RAM1_UDMF5RAM1_CK*
F5RAM1_ADD<2>F5RAM1_ADD<3>F5RAM1_ADD<4>F5RAM1_ADD<5>F5RAM1_ADD<6>F5RAM1_ADD<7>F5RAM1_ADD<8>F5RAM1_ADD<9>F5RAM1_ADD<10>
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
2V5A52V5A52V5A5
2V5A52V5A5
2V5A5
1V25R5 1V25R5
XC2VP40
IO_L48P_7
IO_L42P_7
IO_L50N_7IO_L56N_7IO_L86N_7IO_L53P_7
IO_L87N_7
IO_L05N_7
IO_L44N_7
IO_L89N_7
IO_L32P_7
IO_L60N_7IO_L51N_7
IO_L18P_7
IO_L32N_7IO_L38N_7
IO_L18N_7IO_L23N_7
IO_L87P_7IO_L90N_7
IO_L59N_7
IO_L35N_7
IO_L45N_7
IO_L19N_7
IO_L33P_7
IO_L86P_7
IO_L20N_7IO_L31N_7
IO_L34P_7IO_L40P_7IO_L37P_7IO_L37N_7
IO_L43P_7IO_L43N_7IO_L16P_7
IO_L17P_7IO_L17N_7IO_L04P_7
IO_L31P_7
IO_L49P_7IO_L20P_7
IO_L44P_7
IO_L23P_7
IO_L03P_7
IO_L24P_7
IO_L22P_7IO_L24N_7
IO_L15P_7IO_L15N_7
IO_L03N_7IO_L06N_7
IO_L38P_7
IO_L85N_7
IO_L57P_7IO_L52P_7IO_L48N_7
IO_L50P_7IO_L47N_7IO_L41N_7
IO_L54N_7
IO_L89P_7IO_L59P_7
IO_L41P_7IO_L47P_7
IO_L39N_7IO_L35P_7
IO_L51P_7IO_L54P_7
IO_L45P_7IO_L42N_7IO_L36P_7
IO_L21P_7IO_L33N_7
IO_L19P_7
IO_L90P_7IO_L88P_7
IO_L58P_7IO_L55P_7
IO_L46P_7
IO_L34N_7/VREF_7IO_L22N_7/VREF_7
IO_L46N_7/VREF_7IO_L40N_7/VREF_7
IO_L52N_7/VREF_7
IO_L88N_7/VREF_7IO_L58N_7/VREF_7
IO_L49N_7
IO_L55N_7
IO_L01N_7/VRP_7
IO_L01P_7/VRN_7
IO_L04N_7/VREF_7IO_L16N_7/VREF_7
VCCO_7
IO_L56P_7
IO_L02P_7
IO_L39P_7IO_L36N_7
IO_L57N_7IO_L85P_7
IO_L06P_7
IO_L21N_7
IO_L02N_7IO_L05P_7
IO_L53N_7
IO_L60P_7
XC2VP40
IO_L90N_6
IO_L90P_6
IO_L88N_6
IO_L59P_6
IO_L56N_6IO_L47P_6
IO_L56P_6
IO_L48N_6IO_L44N_6
IO_L89N_6
IO_L86N_6IO_L87P_6
IO_L34P_6
IO_L22N_6IO_L49P_6
IO_L22P_6IO_L32N_6
IO_L19N_6IO_L21P_6
IO_L31N_6IO_L31P_6
IO_L34N_6IO_L39P_6IO_L43P_6
IO_L04N_6IO_L43N_6
IO_L04P_6IO_L17N_6IO_L17P_6IO_L37P_6IO_L40N_6IO_L46P_6IO_L57P_6
IO_L42P_6IO_L33P_6
IO_L41P_6IO_L36N_6IO_L36P_6
IO_L52N_6
IO_L16P_6
VCCO_6
IO_L06P_6
IO_L52P_6
IO_L60N_6
IO_L85N_6
IO_L54P_6IO_L60P_6IO_L54N_6
IO_L16N_6
IO_L18N_6
IO_L24P_6IO_L24N_6
IO_L01P_6/VRN_6
IO_L87N_6/VREF_6IO_L57N_6/VREF_6IO_L51N_6/VREF_6
IO_L39N_6/VREF_6IO_L33N_6/VREF_6IO_L21N_6/VREF_6IO_L15N_6/VREF_6IO_L03N_6/VREF_6
IO_L42N_6
IO_L06N_6
IO_L01N_6/VRP_6
IO_L45N_6/VREF_6
IO_L51P_6
IO_L18P_6
IO_L45P_6
IO_L15P_6IO_L05P_6IO_L03P_6
IO_L19P_6
IO_L55P_6IO_L47N_6IO_L41N_6IO_L40P_6
IO_L23N_6IO_L35N_6
IO_L86P_6IO_L05N_6IO_L23P_6
IO_L50P_6IO_L53N_6
IO_L44P_6IO_L32P_6
IO_L02P_6IO_L02N_6
IO_L20N_6IO_L20P_6IO_L35P_6
IO_L50N_6IO_L58P_6IO_L58N_6IO_L88P_6
IO_L53P_6
IO_L38P_6IO_L38N_6
IO_L89P_6IO_L59N_6
IO_L85P_6IO_L55N_6
IO_L48P_6IO_L46N_6IO_L49N_6
IO_L37N_6
DGNDDGND
DGND
DGND
DGND
7 X100NF
7 X100NF
7 X100NF
25R
X 9
1V25
5F1R
FPGA1 RAMS 1 - 4
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
26
Tue Dec 12 12:28:07 2006
C50
6
J7
RP6
F1RAM1_UDQS
F1RAM1_CK*
R141R140
51R51R
F1RAM2_D<15..0>
F1RAM1_LDMF1RAM1_UDM
F1RAM2_UDM
R388
R407
R398R400
51R
F1RAM4_CK
R35151R51R
F1RAM4_CKE
F1RAM4_CS*
F1RAM4_CAS*F1RAM4_WE*
F1RAM4_RAS*
F1RAM4_CK*
F1RAM4_BA0F1RAM4_BA1
F1RAM3_RAS*
F1RAM3_CS*F1RAM3_WE*
F1RAM3_CKE
F1RAM3_CAS*
F1RAM3_CK*F1RAM3_CKF1RAM3_BA0F1RAM3_BA1
F1RAM4_LDMF1RAM4_UDMF1RAM3_LDMF1RAM3_UDM
F1RAM4_CS*
F1RAM4_RAS*
F1RAM4_WE*F1RAM4_CAS*
F1RAM4_CKF1RAM4_CK*F1RAM4_CKE
F1RAM4_BA0F1RAM4_BA1
F1RAM4_UDMF1RAM4_LDM
F1RAM4_LDQS
F1RAM4_D<15..0>
F1RAM3_CS*F1RAM3_WE*F1RAM3_CAS*F1RAM3_RAS*
F1RAM3_CK*F1RAM3_CKE
F1RAM3_CK
F1RAM3_BA0F1RAM3_BA1
F1RAM3_UDM
F1RAM3_LDM
F1RAM4_UDQS
F1RAM3_LDQS
F1RAM3_ADD<12..0>
F1RAM3_UDQS
F1RAM3_D<15..0>
51RR270
51RR177
51RR28851RR178
51RR176
51RR26251RR26151RR27351RR272
51RR359
51RR36051RR361
51RR346
51RR362
51RR34151RR340
R352
51RR182
51RR18051RR179
51RR28751RR18751RR188
51R R27151R R26651R R34751R R345
51RR19051RR189
51RR19151RR19251RR181
51RR19451RR193
RAM40
F1
E1
K8
E9D7D9C7C9B7B9A8
E3E7
F3F7
H3
K7L8L7M8M2
L2K3K2
D3D1C3C1
G2
J2
F9
G8G7H8
H7
H2
L3
J3
G3
J7J8
B3B1A2
F1RAM4 TER
MP
K9
RP2
C36
4
C38
3
C38
2
C35
9
C35
7
C37
4
C37
0
4U7
C36
3
100N
C36
2
RAM39
F1
E1
K8
E9D7D9C7C9B7B9A8
E3E7
F3F7
H3
K7L8L7M8M2
L2K3K2
D3D1C3C1
G2
J2
F9
G8G7H8
H7
H2
L3
J3
G3
J7J8
B3B1A2
F1RAM3
TER
MP
K9
RP1
4U7
C37
5
C36
1
C36
8TE
RM
PK
9
RP4
C45
9
C40
3
C43
9
C43
4
C44
5
C40
2
C46
1
4U7
C43
3
100N
C43
2
TER
MP
K9
RP3
C43
7
4U7
C44
9
C45
3
C38
0C
454
C37
9
C36
9
C37
8
C37
3
C43
6
C42
7
C45
1
C44
4
C50
3
C51
1
RAM37
RAM38
TER
MP
K9
F1RAM2_CKE
F1RAM2_CS*
F1RAM2_CK*F1RAM2_CK
F1RAM2_BA0F1RAM2_BA1
F1RAM2_RAS*F1RAM2_CAS*F1RAM2_WE*
F1
F1RAM1_CKE
F1RAM1_CK
F1RAM1_BA1
F1RAM1_CS*F1RAM1_WE*F1RAM1_CAS*F1RAM1_RAS*
F1RAM1_CK*
F1RAM1_BA0
K7
E3 F1RAM1_LDQS
F1
C52
0
4U7
C50
5
C53
2
C49
04U7
TER
MP
K9
E1
C9B7
RP5
E9
F1RAM1B9
C51
6
C3
F1RAM1_UDMF1RAM1_LDM
C57
5
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1
D1D3
K2K3L2
M2M8L7L8
H3
F7F3
E7
A8
C7D9D7
K8
C57
9
C48
9
C53
3
C50
4
RP7
RP8
R387
R130
R403R406
R381R378
R124R125R411
R404
R409
R389R390
R377R379
R376R385R382
R128R139R138R137R136R135R134R410R127R126R129
C56
9
C56
7
C57
8
C58
5
C58
6
C58
7
C57
6
C57
7
C58
9
C56
2
C56
4
C57
3
C58
8
C58
1
C57
0
C51
2
C52
4
C52
5
C52
1
C51
5
C51
3
4U7
4U7
100N
100N
51R
51R51R51R51R51R51R51R51R51R
51R
51R51R51R
51R51R
51R51R51R
51R51R51R51R
51R51R51R
51R51R
51R51R
51R
51R
TER
MP
K9
TER
MP
K9
F1RAM2
F1RAM1_CAS*
F1RAM2_CAS*F1RAM2_RAS*
F1RAM1_BA1
F1RAM2_LDM
F1RAM2_LDM
F1RAM1_D<15..0>
F1RAM2_UDM
F1RAM2_LDQS
F1RAM2_UDQS
F1RAM2_CS*F1RAM2_WE*
F1RAM2_CKE
F1RAM2_BA1
F1RAM1_WE*F1RAM1_CS*
F1RAM2_BA0F1RAM2_CKF1RAM2_CK*
F1RAM1_RAS*
F1RAM1_ADD<12..0>
F1RAM1_BA0F1RAM1_CK
F1RAM1_CKE
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
1V25B1
1V25B1
1V25A1
1V25A12V5B1
2V5B12V5B1
2V5B1
1V25R11V25R1
1V25R1 1V25R1
DGND
DGNDDGND
DGND
LSB
MSB
DGND
DGND
LSB
MSB
DGND
LSB
MSB
DGND
LSB
MSB
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
1V25B1
1V25B1
V7
H1
D1
C1
E1
F1
G1
B1
J1
A1
H2
F2
E2
G2
C2
D2
B2
J2
A2VTT
V7
H1
D1
C1
E1
F1
G1
B1
J1
A1
H2
F2
E2
G2
C2
D2
B2
J2
A2VTT
V7
H1
D1
C1
E1
F1
G1
B1
J1
A1
H2
F2
E2
G2
C2
D2
B2
J2
A2VTT
V7
H1
D1
C1
E1
F1
G1
B1
J1
A1
H2
F2
E2
G2
C2
D2
B2
J2
A2VTT
V6
A1
H1
F1
G1
J1
E1
C1
B1
D1
A2
H2
J2
G2
F2
E2
D2
C2
B2
VTT
V6
A1
H1
F1
G1
J1
E1
C1
B1
D1
A2
H2
J2
G2
F2
E2
D2
C2
B2
VTT
V6
A1
H1
F1
G1
J1
E1
C1
B1
D1
A2
H2
J2
G2
F2
E2
D2
C2
B2
VTT
V6
A1
H1
F1
G1
J1
E1
C1
B1
D1
A2
H2
J2
G2
F2
E2
D2
C2
B2
VTT
1V25B1
1V25B1
1V25A1
1V25A1
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
1V25A1
1V25A1
DGND
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
7 X100NF
8 X100NF
7 X100NF
8 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
X 9
7 X100NF
7 X100NF
27
7 X100NF
FPGA2 RAMS 1 - 9
1V25
8 X100NF
7 X100NF
7 X100NF 7 X100NF
7 X100NF
Tue Dec 12 12:42:19 2006
C15
02
F2RAM3_LDQS
F9
J2
F7
D3
F2RAM7_LDQS
F2RAM7_UDQSRP41
4U7
J2
F2RAM4_UDQS
D1
L7
F2RAM1_D<15..0>
F2RAM1_LDQS
F2RAM2_UDQS
F2RAM2_D<15..0>
L3
C71
1
C71
9
G3
F2RAM4_WE*F2RAM4_CS*
F2RAM4_BA1
F2RAM4_RAS*
F2RAM4_CKF2RAM4_CK*F2RAM4_CKE
F2RAM4_CAS*
F2RAM4_BA0
K7
F2RAM5_CKE
F2RAM5_BA0
F2RAM5_RAS*
F2RAM5_CS*
F2RAM5_BA1
F2RAM5_CK*F2RAM5_CK
F2RAM5_WE*F2RAM5_CAS*
F2RAM3_CK*F2RAM3_CKE
F2RAM3_BA1F2RAM3_BA0
F2RAM3_CK
F2RAM3_RAS*F2RAM3_CAS*F2RAM3_WE*F2RAM3_CS*
F2RAM1_CS*F2RAM1_WE*F2RAM1_CAS*F2RAM1_RAS*
F2RAM1_CKE
F2RAM1_CKF2RAM1_CK*
F2RAM1_BA1F2RAM1_BA0
F2RAM2_CKE
F2RAM2_BA1F2RAM2_BA0
F2RAM2_CKF2RAM2_CK*
F2RAM2_RAS*F2RAM2_CAS*F2RAM2_WE*F2RAM2_CS*
J8J7
G2G3
C11
58
C12
14
C12
42
C12
66
C11
82
C12
06
F1
RAM17
G7
C16
58
G7
F2RAM6_D<15..0>
F1
F1
F1F1
F1
F1F1
F1
C3C1B3
C13
30
C13
10
C11
42
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
G2
C1C3D1
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8
G8
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3
D3
K2K3L2
M2M8
L8
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1
J3
L3
H2
H7
H8
G8
F9
J2
D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
F2RAM1
4U7
RP65
C74
7
RAM5
RAM13
RAM21RAM25
RAM29
RAM33RAM1
RAM9
F2RAM4
F2RAM4_ADD<12..0>
F2RAM5_D<15..0>
F2RAM5_UDQS
C12
38
C12
02
C15
78
100N
C12
86
C12
87
F2RAM2_LDQS
4U7
C94
0
4U7
F2RAM1_ADD<12..0>
4U7
F2RAM5_LDM
C15
94
RP61
RP73
C16
30
C16
47
C15
74
C15
26
C15
06
C15
66
C16
18
C15
95
C16
62
C16
02
C16
10
C15
70
RP45
C15
58
C15
46
C15
47
C15
82
C15
90
C14
66
C14
11
C14
76
C12
78
C12
62
C13
20
C13
86
C14
62
C14
28
RP57
C14
02
C14
38
C13
34
RP29
C10
09
C11
91
C99
0
C10
85
C12
07
C11
31
C11
10C
1178
C11
44
C11
54
C10
10
C11
01
C13
14C
1077
C12
95
C12
96
C13
90
C14
06
C10
52
C10
53
C11
15
C11
26
C61
3C
703
C92
4
C16
38C
1475
C64
3
C63
4
C60
5
C66
3
C61
7
C59
5
C65
9
C59
9
C67
1
C61
8
C63
0
C60
9
C63
8
C64
7
C65
1
C65
2
C62
5
C73
1
C67
9
C75
1
C68
3
C70
7
C72
3
C68
7
C72
7
C73
5
C69
1
C73
9
C74
0
C71
5
C10
40
C10
21
C79
9
C88
7
C92
8
C96
8
C89
1
C10
20
C91
9
C93
6
C97
2
C98
0
C94
8
C93
2
C98
1
C16
46
C16
34
C16
54
C16
82
C16
83
C16
66
C16
78
C16
42
C17
00
C16
96
C16
70
C16
14
C16
26
C16
06
C16
74
C14
94
C15
30
C15
31
C14
90
C15
22
C15
10
C14
70
C15
54
C14
47
C15
18
C14
86
C14
46
C15
62
C15
38
C14
45
C12
74
C12
50
C12
34
C13
06
RP9
RP13RP77
RP69
RP17
RP21
RP25
RP33
RP53
RP49
RP37
F2RAM4_LDM
100N
F2RAM5_UDM
F2RAM6_CS*
F2RAM7_BA1
4U7
F2RAM9_LDMF2RAM9_UDM
F2RAM9_CS*F2RAM9_WE*F2RAM9_CAS*F2RAM9_RAS*
F2RAM9_CK*F2RAM9_CK
F2RAM9_BA0F2RAM9_BA1
F2RAM8_LDMF2RAM8_UDM
F2RAM8_WE*
F2RAM8_RAS*
F2RAM8_CK
F2RAM8_BA0
100N
F2RAM7_LDM
F2RAM7_UDM
F2RAM7_CS*F2RAM7_WE*F2RAM7_CAS*
F2RAM6_LDMF2RAM6_UDM
F2RAM6_WE*F2RAM6_CAS*
F2RAM6_CK
F2RAM6_BA0F2RAM6_BA1
F2RAM2_LDMF2RAM2_UDM
100N
F2RAM5_LDQS
4U7
100N
F2RAM3_D<15..0>
4U7
4U7
4U7
4U7
100N
4U7
4U7
4U7
4U7
100N
4U7
F2RAM7_ADD<12..0>
F2RAM7_D<15..0>
F2RAM9_LDQS
4U7
100N
F2RAM9F2RAM3
F2RAM2
F2RAM6_CKE
F2RAM7_CKE
F2RAM8_CKE
F2RAM9_CKE
F2RAM9_D<15..0>
F2RAM1_UDQS
F2RAM4_D<15..0>
F2RAM4_LDQS
F2RAM1_LDMF2RAM1_UDM
F2RAM9_UDQS
4U7
F2RAM6_CK*
F2RAM6_RAS*
F2RAM6
F2RAM6_UDQS
F2RAM6_LDQS
F2RAM3_UDQS
F2RAM3_UDMF2RAM3_LDM
F2RAM4_UDM
F2RAM8_LDQS
F2RAM8_UDQS
F2RAM5
F2RAM8_CS*
F2RAM8_CAS*
F2RAM8_CK*
F2RAM8_BA1
F2RAM8_D<15..0>
F2RAM7_BA0
F2RAM7_CKF2RAM7_CK*
F2RAM7_RAS*
100N
F2RAM8
F2RAM7
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
DGND
DGNDDGND
DGND
LSB
MSB
DGND
DGNDDGND
DGND
LSB
MSB
LSB
MSB
DGND
DGND
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
LSB
MSB
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
2V5F2
2V5F2
2V5F2
1V25R2
1V25C2
1V25C2
1V25R2
1V25C2
1V25C2
1V25C2
1V25R21V25C2
2V5B21V25R2
1V25B2
1V25B2
2V5B21V25R2
1V25B2
1V25B2
1V25B2
1V25R2 2V5B21V25B2
2V5B21V25R2
1V25A2
1V25A2
2V5B21V25R2
1V25A2
1V25A2
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
1V25A2
2V5B21V25R21V25A2
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
DGND V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
LSB
MSB
DGND
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V2TE
RM
PK
9
A1
J1
H1
E1
D1
F1
G1
C1
B1
A2
J2
H2
F2
G2
E2
D2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
DGND
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
7 X100NF
7 X100NF 7 X100NF
7 X100NF
FPGA3 RAMS 1 - 9
7 X100NF
7 X100NF
8 X100NF
7 X100NF
7 X100NF
8 X100NF8 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
X 9
1V25
28
7 X100NF
Tue Dec 12 15:10:31 2006
C11
45
C12
43
C13
07
100N
F3RAM1_UDM
C14
95
F3RAM2_UDQS
F3RAM8_CKE
F3RAM8_BA1F3RAM8_BA0
F3RAM8_CKF3RAM8_CK*
F3RAM8_CS*F3RAM8_WE*F3RAM8_CAS*F3RAM8_RAS*
F3RAM7_CKE
F3RAM7_BA1F3RAM7_BA0
F3RAM7_CKF3RAM7_CK*
F3RAM7_RAS*F3RAM7_CAS*F3RAM7_WE*F3RAM7_CS*
F3RAM4_D<15..0>
F3RAM4_CKE
F3RAM4_CS*
F3RAM4_BA0
F3RAM4_CK*
F3RAM4_WE*
F3RAM4_CK
F3RAM4_CAS*
F3RAM4_BA1
F3RAM4_RAS*
F3RAM5_BA0
F3RAM5_CK
F3RAM5_CKE
F3RAM5_WE*F3RAM5_CAS*F3RAM5_RAS*
F3RAM5_CK*
F3RAM5_BA1
F3RAM5_CS*
F3RAM2_CKE
F3RAM2_BA1F3RAM2_BA0
F3RAM2_CKF3RAM2_CK*
F3RAM2_RAS*F3RAM2_CAS*F3RAM2_WE*F3RAM2_CS*
F3RAM1_CS*F3RAM1_WE*F3RAM1_CAS*F3RAM1_RAS*
F3RAM1_CKEF3RAM1_CK*F3RAM1_CK
F3RAM1_BA0F3RAM1_BA1
C15
19
L2
RAM18F3RAM1
C14
48
C15
23
C15
11
C14
71
C14
91
C15
32
L8
C16
19
C15
27
F1
F1
F1F1
F1F1
F1
F1
RP38
100N
F1
100N
RAM30
H24U7
C73
2
C75
2
C74
8
C68
4
C68
0
C72
4
C70
8
C68
8
K2
F3RAM5
K7L8L7M8M2L3L2K3
J3K8J2H2
J8J7
G8
G2G3H3
H8
F9
A8B9B7C9C7D9D7E9
E1D3D1C3C1B3B1A2
F7
E7
H7F3
E3
G7
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3
M2M8L7
K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
C14
50
RP50
F3RAM1_LDM
C15
33C
1235
C12
08
C73
6
RP18
RAM26
C96
9
C12
03
F3RAM2_D<15..0>
F3RAM2_LDQS
F3RAM3_D<15..0>
F3RAM3_LDQSF3RAM3RAM2
F3RAM3_UDQS
F3RAM6_RAS*F3RAM6_UDM
F3RAM6_D<15..0>
F3RAM8_LDQS
F3RAM7_D<15..0>
C10
12
C10
78
C11
02
C11
55
C11
27
C10
55
RP42
F3RAM8_UDM
F3RAM9_UDQS
RP62
F3RAM5_LDQS
4U7
4U7
RP54
C10
22
C98
2
C98
3
4U7
C92
5
C89
4C
800
C92
9
C94
1
C10
23
C10
43
C13
11
RAM6F3RAM9
RAM14
RAM22
RAM34
RAM10
C97
3
F3RAM5_LDM
C61
0
C62
6
F3RAM6_UDQS
C15
39
F3RAM1_UDQS
RP74
C15
07
C16
31
C16
49
C15
67
C15
75
C15
97
C16
63
C16
03
C15
96
C15
48
C15
59
RP46
C15
71
C16
11
C15
91
C15
83
C15
49
C12
79
C12
63
C14
78
C14
67
C13
23
C14
13
C13
87
C14
63
C14
29
RP58
C14
03
C12
98
C13
15
RP30
C12
09
C11
93
C99
3
C11
11
C10
11
C11
33
C10
86C
1179
C11
47
C11
17
C13
35
C14
07
C14
40
C13
91
C12
99C
1054
C61
4C
704
C16
39C
1477
C60
0
C59
6
C63
5
C60
6
C61
9
C64
4
C66
0
C66
4
C67
2
C62
0
C63
1
C65
3
C65
4
C64
8
C63
9
C74
1
C71
2
C74
2
C72
8
C69
2
C72
0
C71
6
C88
8
C92
0
C94
9
C93
7
C93
3
C16
55
C16
84
C16
85
C16
79
C16
67
C16
35
C16
48
C16
43
C16
97
C17
01
C16
07
C16
15
C16
59
C16
71
C16
27
C16
75
C15
79
C15
63
C15
03
C14
87
C14
49
C15
55
C12
39
C12
88
C12
89
C12
75
C12
51
C11
59
C13
31
C12
67
C11
83
C12
15
RP10
RP14RP78
RP70
RP22
RP26
RP34
RP66
F3RAM9_UDM
F3RAM4_UDQS
F3RAM4_LDQS
F3RAM6_CK*
F3RAM6_BA1
F3RAM5_UDM
F3RAM1_D<15..0>
F3RAM4_ADD<12..0>
F3RAM4
4U7
4U7
4U7
4U7
4U7
4U7
4U7
4U7
100N
100N
100N
4U7
100N
4U7
4U7
100N
4U7
100N
4U7
F3RAM7_ADD<12..0>
F3RAM5_D<15..0>
F3RAM9_LDQS
F3RAM7_UDQS
F3RAM5_UDQS
F3RAM9_D<15..0>
F3RAM6
F3RAM7F3RAM1_LDQS F3RAM7_LDQS
4U7
F3RAM3_CS* F3RAM6_CS* F3RAM9_CS*F3RAM3_WE* F3RAM6_WE* F3RAM6_LDM F3RAM9_WE* F3RAM9_LDMF3RAM3_CAS* F3RAM3_UDM F3RAM6_CAS* F3RAM9_CAS*F3RAM3_RAS* F3RAM9_RAS*
F3RAM3_CK* F3RAM9_CK*F3RAM3_CK F3RAM6_CK F3RAM9_CK
F3RAM3_BA0 F3RAM6_BA0 F3RAM9_BA0F3RAM3_BA1 F3RAM9_BA1
F3RAM2_LDM F3RAM8_LDMF3RAM2_UDM
F3RAM4_LDM F3RAM7_LDM
F3RAM4_UDM F3RAM7_UDM
F3RAM2
F3RAM6_LDQS
F3RAM1_ADD<12..0>
F3RAM3_CKE F3RAM6_CKE F3RAM9_CKE
F3RAM8_UDQS
F3RAM8_D<15..0>
F3RAM8
F3RAM3_LDM
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
DGND
DGNDDGND
DGND
LSB
MSB
DGND
DGNDDGND
DGND
LSB
MSB
LSB
MSB
DGND
DGND
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
LSB
MSB
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
2V5F3
2V5F3
2V5F3
1V25R3
1V25C3
1V25C3
1V25R3
1V25C3
1V25C3
1V25R3
1V25C3
1V25C3
2V5B31V25R3
1V25B3
1V25B3
2V5B31V25R3
1V25B3
1V25B3
2V5B31V25R3
1V25B3
1V25B3
2V5B31V25R3
1V25A3
1V25A3
2V5B31V25R3
1V25A3
1V25A3
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
1V25A3
2V5B31V25R31V25A3
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
DGND V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
LSB
MSB
DGND
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V2TE
RM
PK
9
A1
J1
H1
E1
D1
F1
G1
C1
B1
A2
J2
H2
F2
G2
E2
D2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
DGND
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
8 X100NF
7 X100NF
7 X100NF
8 X100NF
29
1V25
X 9
7 X100NF 7 X100NF
7 X100NF
FPGA4 RAMS 1 - 9
7 X100NF
7 X100NF
8 X100NF
Tue Dec 12 15:07:32 2006
F4RAM8_BA1
F4RAM8_CK
F7F4RAM8_UDM
RP47
F4RAM8_D<15..0>
F4RAM8_UDQS
RP31F4RAM7_LDQS
C10
13
C99
6
C11
95
J2A2
C11
12
F4RAM4_UDQS
C69
3
F4RAM6_CKE
F4RAM2_D<15..0>
C15
68
F4RAM9_CK*
F4RAM9_RAS*
F4RAM9_WE*
F4RAM8_CK*
F4RAM8_CS*F4RAM8_WE*F4RAM8_CAS*F4RAM8_RAS*
F4RAM8_BA0
F4RAM8_CKE
F4RAM7_CS*F4RAM7_WE*F4RAM7_CAS*F4RAM7_RAS*
F4RAM7_CK*F4RAM7_CK
F4RAM7_BA0F4RAM7_BA1
F4RAM7_CKE
F4RAM4_CS*
F4RAM4_RAS*
F4RAM4_CKE
F4RAM4_CK
F4RAM4_BA0
F4RAM4_CK*
F4RAM4_BA1
F4RAM4_WE*F4RAM4_CAS*
F4RAM5_CK*F4RAM5_CKE
F4RAM5_CAS*
F4RAM5_CS*F4RAM5_WE*
F4RAM5_RAS*
F4RAM5_BA1F4RAM5_BA0
F4RAM5_CK
F4RAM2_CAS*
F4RAM2_CS*F4RAM2_WE*
F4RAM2_RAS*
F4RAM2_CK*F4RAM2_CK
F4RAM2_CKE
F4RAM2_BA0F4RAM2_BA1
F4RAM1_CAS*
F4RAM1_CS*F4RAM1_WE*
F4RAM1_RAS*
F4RAM1_CK*F4RAM1_CK
F4RAM1_BA0F4RAM1_BA1
F4RAM1_CKE
G8G7H8
F4RAM1_ADD<12..0>L3L2K3
C7
D7E9
C12
44
C11
60
C12
68
C13
08
C12
10
F4RAM1_UDQS
F4RAM1_D<15..0>
B3
F4RAM4_LDQS
C72
1
F4RAM4_UDM
D7
K8
C10
25
F1
F1
F1F1
F1
F1F1
F1
F1
E1
K8
E9D7D9C7C9B7B9A8
E3E7
F3F7
H3
K7L8L7M8M2
L2K3K2
D3D1C3C1
G2
J2
F9
G8G7H8
H7
H2
L3
J3
G3
J7J8
B3B1A2
RAM3F4RAM3
C93
4
C92
1
C95
0
C97
4
C98
5
C10
24
C12
36
C12
76
100N
RP23
F4RAM6_UDM
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9
E9
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
H2
H7
F9
J2
G2
C1C3D1D3
K2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9
D9
K8
E1
4U7
RAM27F4RAM4
RP51
RAM31
F4RAM5_D<15..0>
C59
7
C66
1C
685
F4RAM7_ADD<12..0>
C11
50
C10
76
C12
11
RAM7
C15
64
C15
56
C15
04
F4RAM1RAM19
4U7
C14
52
C15
20
100N
C13
32
C13
12
C11
48
RP39
F4RAM9_UDMF4RAM9_LDM
RAM15
RAM23
RAM35
RAM11
C15
24
C15
34
C15
35
F4RAM2_UDQS
F4RAM6
F4RAM6_BA1
F4RAM9_CAS*
F4RAM1_LDQS
RP63
RP75
C16
32
C16
51
C16
20
C15
76
C15
99
C15
08
C15
28
C16
64
C16
04
C15
98
C16
12
C15
72
C15
60
C15
50
C15
51
C15
92
C15
84
C12
80
C12
64
C14
68
C14
80
C13
88
C13
26
C14
15
C14
64
C14
30
RP59
C14
04
C14
42
C13
36
C11
35
C11
80
RP43
C11
56
C10
00
C11
04
C13
16C
1079
C14
08
C13
01
C13
02
C13
92
C11
28
C10
56
C10
57
C11
19
C61
5C
705
C92
6
C16
40C
1479
C66
5
C60
7
C60
1
C64
5
C63
6
C62
1
C67
3
C62
2
C61
1
C64
1
C65
5
C65
6
C63
2
C62
7
C64
9
C68
1
C75
3
C74
9
C73
3
C72
5
C70
9
C68
9
C74
3
C71
3
C73
7
C74
4
C72
9
C71
7
C80
1
C88
9
C10
46
C94
2
C93
0
C97
0C
897
C98
4
C93
8
C16
56
C16
86
C16
87
C16
50
C16
80
C16
68
C16
36
C16
44
C16
08
C16
16
C17
02
C16
98
C16
28
C16
72
C16
60
C16
76
C15
80
C14
96
C14
92
C14
72
C15
12
C14
53
C14
88
C14
51
C15
40
C12
90
C12
91
C12
52
C12
04
C12
40
C12
16
C11
84
RP11
RP15RP79
RP71
RP19
RP27
RP35
RP67
RP55
F4RAM9
F4RAM5
F4RAM9_CKEF4RAM3_CKE
F4RAM7_D<15..0>
F4RAM7_UDM
F4RAM7_LDMF4RAM4_LDM
F4RAM5_UDMF4RAM8_LDMF4RAM5_LDMF4RAM2_LDM
F4RAM9_BA1F4RAM3_BA1F4RAM9_BA0F4RAM6_BA0F4RAM3_BA0
F4RAM9_CKF4RAM6_CKF4RAM3_CKF4RAM6_CK*F4RAM3_CK*
F4RAM6_RAS*F4RAM3_RAS*F4RAM6_CAS*F4RAM3_UDMF4RAM3_CAS*
F4RAM6_LDMF4RAM6_WE*F4RAM3_LDMF4RAM3_WE*F4RAM9_CS*F4RAM6_CS*F4RAM3_CS*
F4RAM7
F4RAM2
F4RAM3_UDQS
F4RAM3_LDQS
F4RAM5_UDQS
F4RAM7_UDQS
F4RAM9_UDQS
F4RAM9_LDQS
F4RAM3_D<15..0>
4U7
100N
4U7
100N
4U7
4U7
100N
4U7
100N
100N
100N
4U7
4U7
4U7
4U7
4U7
4U7
4U7
4U7
4U7
F4RAM2_UDM
4U7
F4RAM9_D<15..0>
4U7
F4RAM4_ADD<12..0>
F4RAM1_UDMF4RAM1_LDM
100N
F4RAM2_LDQS
F4RAM4_D<15..0>
F4RAM5_LDQS
F4RAM6_UDQS
F4RAM6_LDQS
F4RAM6_D<15..0>
F4RAM8 F4RAM8_LDQS
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
DGND
DGNDDGND
DGND
LSB
MSB
DGND
DGNDDGND
DGND
LSB
MSB
LSB
MSB
DGND
DGND
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
LSB
MSB
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
2V5F4
2V5F4
2V5F4
1V25R4
1V25C4
1V25C4
1V25R4
1V25C4
1V25C4
1V25C4
1V25R41V25C4
2V5B41V25R4
1V25B4
1V25B4
2V5B41V25R4
1V25B4
1V25B4
2V5B41V25R4
1V25B4
1V25B4
2V5B41V25R4
1V25A4
1V25A4
2V5B41V25R4
1V25A4
1V25A4
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
1V25A4
2V5B41V25R41V25A4
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
DGND V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
LSB
MSB
DGND
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V2TE
RM
PK
9
A1
J1
H1
E1
D1
F1
G1
C1
B1
A2
J2
H2
F2
G2
E2
D2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
DGND
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
7 X100NF
X 9
1V25
7 X100NF
7 X100NF
7 X100NF
7 X100NF
7 X100NF
8 X100NF
7 X100NF
7 X100NF
7 X100NF
8 X100NF
30
7 X100NF
7 X100NF
8 X100NF
7 X100NF
FPGA5 RAMS 1 - 9
7 X100NF
7 X100NF
7 X100NF
Tue Dec 12 15:41:46 2006
F5RAM4_CKE
C68
6
J3
RP28
C95
1
C66
2
F5RAM6_BA1F5RAM6_BA0
F5RAM6_D<15..0>
F5RAM6_UDQS
F5RAM5_UDQS
F5RAM4_LDQS
H2
RAM16F5RAM8
F1
F1
F1F1
F1
F1F1
F1
F1
L2
M2L3
K3K2J3K8J2
4U7
C94
3
C93
1
C12
37
C12
92
C12
93
C12
77
C12
05
C92
2
C93
5
C98
6
C10
26
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
H2
H7
H8G7G8
F9
G2
C1C3D1D3
M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
A2B1B3
J8J7
G3
J3
L3
H2
H7
H8G7G8
F9
J2
G2
C1C3D1D3
K2K3L2
M2M8L7L8K7
H3
F7F3
E7E3
A8B9B7C9C7D9D7E9
K8
E1
C16
61
C16
45
C16
41
F5RAM2_UDM
RP68
F5RAM2_D<15..0>
C99
9
C10
14
100N
RP40
4U7
F5RAM1_LDQS
F5RAM8_RAS*
F5RAM8_CKEF5RAM8_CK*F5RAM8_CK
F5RAM8_BA1
F5RAM8_CAS*F5RAM8_WE*F5RAM8_CS*
F5RAM8_BA0
F5RAM7_CK
F5RAM7_CKE
F5RAM7_BA1F5RAM7_BA0
F5RAM7_CK*
F5RAM7_RAS*F5RAM7_CAS*F5RAM7_WE*F5RAM7_CS*
F5RAM4_WE*
F5RAM4_RAS*
F5RAM4_CS*
F5RAM4_BA1F5RAM4_BA0
F5RAM4_CAS*
F5RAM4_CKF5RAM4_CK*
F5RAM5_CK*F5RAM5_CK
F5RAM5_BA0F5RAM5_BA1
F5RAM5_CAS*F5RAM5_RAS*
F5RAM5_CKE
F5RAM5_WE*F5RAM5_CS*
F5RAM2_CKE
F5RAM2_BA1F5RAM2_BA0
F5RAM2_CKF5RAM2_CK*
F5RAM2_RAS*F5RAM2_CAS*F5RAM2_WE*F5RAM2_CS*
F5RAM1_BA1F5RAM1_BA0
F5RAM1_CK*F5RAM1_CK
F5RAM1_CKE
F5RAM1_RAS*F5RAM1_CAS*F5RAM1_WE*F5RAM1_CS*
F5RAM1_ADD<12..0>
C13
33
C13
13
C11
51
C11
61
F5RAM6
F5RAM5RAM32
C75
0
RAM8
RAM24RAM28
RAM36RAM4
RAM12
RAM20
C15
65
C15
57
C12
17
C12
69
C12
45
C13
09
C12
12
C72
6
F5RAM5_D<15..0>
RP64
RP76
C16
53
C16
33
C15
77
C16
01
C16
21
C15
69
C15
29
C15
09
C16
65
C16
05
C16
00
C16
13
C15
73
RP48
C15
61
C15
93
C15
52
C15
53
C15
85
C12
81
C12
65
C13
89
C14
69
C14
82
C13
29
C14
17
C14
65
C14
31
RP60
C14
05
C14
44
C13
37
RP32
C11
97
C11
13
C12
13
C11
37
C10
87C
1181
C11
53
RP44
C11
21
C10
15
C10
58
C13
17C
1059
C14
09
C13
04
C13
05
C13
93
C11
29
C10
80
C11
05
C11
57
C61
6C
706
C92
7
C14
81
C59
8
C60
2
C60
8
C63
7
C64
6
C66
6
C62
3
C67
4
C62
4
C63
3
C62
8
C61
2
C64
2
C65
8
C65
0
C65
7
C68
2
C71
0
C73
4
C75
4
C69
0
C72
2
C71
4
C74
5
C71
8
C74
6
C73
8
C73
0
C69
4
C80
2
C89
0
C97
1
C10
49
C10
27C
900
C93
9
C98
7
C97
5
C16
57
C16
52
C16
88
C16
89
C16
81
C16
69
C16
37
C16
09
C16
17
C17
03
C16
99
C16
73
C16
29
C16
77
C15
81
C14
97
C14
93
C15
36
C15
37
C15
25
C15
13
C14
73
C14
55
C14
56
C14
89
C15
21
C15
05
C14
54
C15
41
C12
41
C12
53
C11
85
RP12
RP16RP80
RP72
RP20
RP24
RP36
RP56
RP52
F5RAM9_LDM
4U7
4U7
4U7
4U7
4U7
4U7
4U7
100N
100N
100N
4U7
100N
4U7
100N
4U7
F5RAM3_UDQS
F5RAM6_LDQS
F5RAM5_LDQS
F5RAM4_UDQS F5RAM7_UDQS
F5RAM8_UDQS
F5RAM8_LDQS
F5RAM9_UDQS
F5RAM9_D<15..0>
F5RAM9_LDQS
F5RAM2
F5RAM3
F5RAM4
F5RAM9
F5RAM7
F5RAM8_D<15..0>
F5RAM3_CS* F5RAM6_CS*F5RAM3_WE* F5RAM3_LDM F5RAM6_WE* F5RAM6_LDM F5RAM9_WE*F5RAM3_CAS* F5RAM3_UDM F5RAM6_CAS* F5RAM6_UDM F5RAM9_CAS*F5RAM3_RAS* F5RAM6_RAS*
F5RAM3_CK* F5RAM6_CK*F5RAM3_CK F5RAM6_CK F5RAM9_CK
F5RAM3_BA0F5RAM3_BA1
F5RAM2_LDM F5RAM8_LDMF5RAM8_UDM
F5RAM4_LDM F5RAM7_LDMF5RAM1_UDM F5RAM4_UDM F5RAM7_UDM
4U7
F5RAM2_LDQS
4U7
4U7
F5RAM3_CKE F5RAM6_CKE F5RAM9_CKEF5RAM9_CK*
F5RAM1_UDQS
F5RAM3_LDQS
F5RAM3_D<15..0>
F5RAM2_UDQS
F5RAM1
F5RAM1_LDM
F5RAM1_D<15..0>
100N
100N
F5RAM9_UDM
4U7
4U7
100N
F5RAM9_CS*
F5RAM9_RAS*
F5RAM9_BA0F5RAM9_BA1
F5RAM7_LDQS
F5RAM7_D<15..0>F5RAM4_D<15..0>
F5RAM7_ADD<12..0>F5RAM4_ADD<12..0>
4U7
F5RAM5_LDMF5RAM5_UDM
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
DGND
DGND
DGNDDGND
DGND
LSB
MSB
DGND
DGNDDGND
DGND
LSB
MSB
LSB
MSB
DGND
DGND
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
LSB
MSB
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
2V5F5
2V5F5
2V5F5
1V25R5
1V25C5
1V25C5
1V25R5
1V25C5
1V25C5
1V25R5
1V25C5
1V25C5
2V5B51V25R5
1V25B5
1V25B5
2V5B51V25R5
1V25B5
1V25B5
2V5B51V25R5
1V25B5
1V25B5
2V5B51V25R5
1V25A5
1V25A5
2V5B51V25R5
1V25A5
1V25A5
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
1V25A5
2V5B51V25R51V25A5
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
LSB
MSB
DGND
LSB
MSB
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
DGND V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
LSB
MSB
DGND
V3TE
RM
PK
9
F1
G1
H1
B1
A1
D1
C1
E1
G2
F2
H2
D2
C2
E2
B2
A2
J1 J2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V2TE
RM
PK
9
A1
J1
H1
E1
D1
F1
G1
C1
B1
A2
J2
H2
F2
G2
E2
D2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
TER
MP
K9
V5
A1
J1
E1
D1
F1
G1
H1
C1
B1
A2
J2
G2
F2
H2
D2
E2
C2
B2
VTT
V4TE
RM
PK
9
E1
D1
F1
G1
H1
C1
B1
G2
F2
H2
D2
E2
C2
B2
A2
J2
A1
J1
VTT
DGND
DGND
DGND
MT46V16M16
D8
A10
D7D6D5D4D3D2D1D0
USTRLSTR
UMLM
EN
A0A1A2A3A4
A6A7A8
VDD VDDQ
D9D10D11D12
CLK+
A11
DNU GND
CAS*WE*CS*
RAS*
A12
A5
GNDQ
A9
CLK-
B1B0
VREF
D13D14D15
31
4 X GB-TX/RXTue Dec 12 15:54:48 2006
C296
C266
4U7
C282
100N 9
10
8
6
7
3
4
5
2 GB2
GB2_SD
GB2_RX3V3
GB2IN-
GB2IN+
GB2_TX3V3
GB2_TDIS
GB2OUT-
GB2OUT+
1
U66
9
10
8
6
7
3
4
5
2
1
5
4
3
8
10
9
6
7
2
1
3
4
5
9
8
10
6
7
GB1_TX3V3
GB1OUT+
C294C277
C278
C280
C279
12
C290C273
C274
C276
C292C275
C284C267
C268 C272
C271 C288
C286C269
C270
100N
L195
1UH
GB1_TDIS
10N100N100N
100N
GB1IN+
U65
C283
GB1_RX3V3
L197
L198U67
C289
C291
L199
C293
L200
C295
U68
C285
L196
C287
L193
L194
C281
1UH
4U7
100N
1UH
100N
4U7
100N
1UH
100N
10N
10N
4U7
100N 10N
4U7
1UH
100N 10N
100N
1UH
4U7
10N
1UH
100N
100N
1UH
GB1
GB4
GB1IN-
GB1_SD
GB3
GB3_TX3V3
GB3OUT+
GB3OUT-
GB3_TDIS
GB3_RX3V3
GB3IN+
GB4OUT-
GB4_TDIS
GB4_RX3V3
GB4IN-
GB4_SDGB3_SD
GB3IN-
4U7
100N 10N
4U7
GB1OUT-
GB4IN+
GB4OUT+
GB4_TX3V3
10N100NC265
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
D3V3
D3V3D3V3
D3V3
AGND
HFBR5911L
SD
VCC
HLGND
+
VCC
TDIS
+
GND MS
AGND
AGND AGND
AGND
HFBR5911L
SD
VCC
HLGND
+
VCC
TDIS
+
GND MS
AGND
AGND AGND
AGND
HFBR5911L
SD
VCC
HLGND
+
VCC
TDIS
+
GND MS
AGND
AGND AGNDAGND
AGND
AGND
AGND
HFBR5911L
SD
VCC
HLGND
+
VCC
TDIS
+
GND MS
RS
=33R
AT
FPG
A1
3V3
32
33R
QUAD GIGABIT ETHERNET (4XGBE)
RS=33R AT FPGA1
RS
=33R
MOUNT CLOSE TO QTS CONNECTOR
16 X 22PF
GLUECARD VIA BUFFER
BYPASS = FIT R161 - NO FIT R156/R162NORMAL OPERATION = FIT R156/R162 - NO FIT R161
RS=33R AT GLUECARD (EXT)
RS
=33R
AT
FPG
A1
Tue Dec 12 16:11:13 2006
U47
4XGBE_TX<15>4XGBE_TX<14>4XGBE_TX<13>4XGBE_TX<12>4XGBE_TX<11>4XGBE_TX<10>4XGBE_TX<9>4XGBE_TX<8>4XGBE_TX<7>
33R
U49
FPGA1_TFCLKFPGA1_TSXKFPGA1_TSOPFPGA1_TPRTY
R329R284
R158
R159
12
FPGA1_TX<1>FPGA1_TX<2>FPGA1_TX<3>FPGA1_TX<4>FPGA1_TX<5>
33R
932
100N
100N
2U2
C24
8
18
R160
R150
R149
R148
33R
R157
R147
33R
FPGA1_TX<0>
4XGBE_TPRTY
4XGBE_TMOD14XGBE_TMOD0
4XGBE_LA<13..2>
GLUECARD
4XGBE_TEOP
4XG
BE
3V3\
G
U1U24_1
4XGBE_RFCLK4XGBE_RENB4XGBE_RPRTY
4XGBE_REOP4XGBE_RVAL4XGBE_RMOD14XGBE_RMOD04XGBE_RSOP
6V3
100N
4XGBE_RSX
FPGA1_TX<21>FPGA1_TX<20>
JTAG_RST*
33R
100U
4XGBE_TADR1
FPGA1_TMOD1
FPGA1_TENB
FPGA1_TX<22>FPGA1_TX<23>
FPGA1_TX<18>FPGA1_TX<19>
FPGA1_TX<14>
4XGBE_TX<1>4XGBE_TX<2>4XGBE_TX<3>
4XGBE_TX<5>
FPGA1_TX<17>FPGA1_TX<16>FPGA1_TX<15>
FPGA1_TX<13>
FPGA1_TX<6>FPGA1_TX<7>FPGA1_TX<8>
0R
4XGBE_TX<4>
4XGBE_TX<0>
FPGA1_TX<9>
FPGA1_TX<11>FPGA1_TX<10>
FPGA1_TX<12>
4XGBE_TENB
33R
GBE_TDO 0R
4U7
FPGA1
FPGA1
TEMP3
FPGA1FPGA1
FPGA1FPGA1
TTCTTC
FPGA1
FPGA1
FPGA1
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
FPGA1_RFCLK
FPGA1
TEMP3
GLUECARD
U1U24_2U1U24_3U1U24_4U1U24_5U1U24_6
FPGA1
FPGA1FPGA1
4XGBE_RENB4XGBE_RFCLK
FPGA1_RENB
FPGA1
4XGBE_RX<31..0>
10N
4XGBE_CONF0
4XGBE_CONF1
6V3
100U
4XGBE_TRST*
4XGBE_CS*
4XGBE_TDI
C22
7
L159
C228
R156R161
R274
R305R325R297R320R304R298R321R286R299R322R285R300R303R323R301R280R324R302R278R326R276R306
R275R307R308R296R293R328
R282R281
U63
114123125127116129131118
120145
92 134
103105104107109106111113
115117110119112121
44 95 96 97 98 9910
013
814
014
915
0
40
93
9089868488878285808378817679777475727066736864697167
5963
51
54
58
61
5557
60
53
56
52
38
101
3642
39242237352033311829271625142321121917
158
1113
6
514
124
2628
34
41
3230
132
47
128
4543
464850
49
4XGBE_RERR
4XGBE_RD*
130
126
33R
10N
100N
L192
2U21A8
C23
6
C42
6
C42
2
C42
3
C23
9
C42
4
C42
1
4U7
65
4XGBE_TX<17>
FPGA1_TX<24>FPGA1_TX<25>
FPGA1_TX<30>FPGA1_TX<31>
10
GLUECARD33R
4XGBE_TEOP
4XGBE_TERR4XGBE_TADR0
FPGA1_TMOD0
FPGA1_TADR0FPGA1_TADR1
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R4XGBE_TSOP
R279R277R283
R309
R331
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
4XGBE_TX<29>4XGBE_TX<28>4XGBE_TX<27>4XGBE_TX<26>
4XGBE_TX<31..0>
33R
4XGBE_TX<6>
4XGBE_TFCLK4XGBE_TSXK
4XGBE_TXPAUSEADD1
135133
4XGBE_TCLK4XGBE_TMS
108 51R
102
SCLSDA
94147144
148
146
4XGBE_D<15..0>
4XGBE_WP
136
142
4XGBE_TFCLK
4XGBE_TSOP4XGBE_TPRTY4XGBE_TENB
4XGBE_TMOD14XGBE_TMOD04XGBE_TERR4XGBE_TADR0
4XGBE_PTPA
4XGBE_TXPAUSEADD0
4XGBE_TXPAUSEADD2
GLUECARD
GLUECARD
0R
GLUECARD51R
GLUECARDC247
22P
100N
4
8
2
1
5
7
3
6
10
20
14
9
7
5
2
1
8
13
19
15
17
6
4GBE_TXPAUSEADD0
GBE_TXPAUSEADD1
GBE_TMS
GBE_TCK
GBE_TXPAUSEADD2
GBE_TXPAUSEFR
R330R310
33R
33R
33R
4XGBE_TADR14XGBE_STPA
4XGBE_TXPAUSEFR
141143139137122
R175
R142
R13333R
33R
51R
C441
C242
C386
C442
C244
C388
C443
C233
C385
C231
C243
C387
C232
C245
C389
C246
4XGBE_D<0>4XGBE_D<1>4XGBE_D<2>
4XGBE_D<11>4XGBE_D<10>4XGBE_D<9>4XGBE_D<8>
4XGBE_D<6>4XGBE_D<7>
4XGBE_D<5>
4XGBE_D<3>4XGBE_D<4>
4XGBE_D<12>4XGBE_D<13>
4XGBE_D<15>4XGBE_D<14>
R167
R314
R171
R316
R318
R173
R168
R174
R342
R170
R343
R315
R172
R317
R344
R169
4XGBE_RST*
4XGBE_TDO
PLX_READY*
4XGBE_WR*
7
91
62
4XGBE_TX<16>
R319
TTCTDO_GBETDI 11
100N
C223
4XGBE_TSXK
4XGBE_CI816
3
R162
R183
PLX_READY*
FPGA1_TEOP
FPGA1_TERR
16
4XGBE_TX<18>
4XGBE_TX<25>
R327R292
FPGA1_TX<26>FPGA1_TX<27>FPGA1_TX<28>FPGA1_TX<29>
33R
4XGBE_TX<31>4XGBE_TX<30>
4XGBE_TX<19>4XGBE_TX<20>4XGBE_TX<21>4XGBE_TX<22>4XGBE_TX<23>4XGBE_TX<24>
1A8
C42
5
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2DRAWING
CO
NTR
OL
QTS
EE
PR
OM
JTA
G
RX
3V3
-10
WM
AX
TXG
ND
<7-0
>
DN
C[0
]
DN
C[3
]
TDAT28<28>
TDAT30<30>TDAT31<31>
TDAT13<13>TDAT14<14>TDAT15<15>TDAT16<16>
RDY*
TRSTB*TCLKTMS
TPRTY
TDAT3<3>
TDAT12<12>
TDAT19<19>
TDAT24<24>
TDAT27<27>
TDAT29<29>
TDAT26<26>TDAT25<25>
TXPAUSEADD2<2>
AD6<6>
AD8<8>AD9<9>AD10<10>BAD1
AD2<2>AD3<3>
TSX
BAD0
WR*
AD0<0>AD1<1>
AD5<5>AD4<4>
AD7<7>
TDOTDI
TXPAUSEFR
TDAT21<21>TDAT20<20>
TDAT17<17>
PTPA
TDAT11<11>
TDAT22<22>TDAT23<23>
VC
C<3
-0>
TDAT18<18>
TDAT9<9>TDAT8<8>TDAT7<7>
TDAT5<5>
TDAT1<1>TDAT0<0>
TERR
TEOP
TDAT2<2>
TDAT6<6>
TDAT10<10>
TMOD1TMOD0
TFCLK
TSOP
TDAT4<4>
CS*RD*
STPA
TENB
TADR0TADR1
TXPAUSEADD0<0>TXPAUSEADD1<1>
CI816
SYSRES
PO
L<1-
0>
DN
C[1
0]
DN
C[7
]
DN
C[8
]
DN
C[6
]
DN
C[5
]
DN
C[4
]
DN
C[2
]
DN
C[1
]
DN
C[9
]
RDAT31<31>RDAT30<30>RDAT29<29>RDAT28<28>RDAT27<27>RDAT26<26>RDAT25<25>RDAT24<24>RDAT23<23>RDAT22<22>
RDAT20<20>RDAT21<21>
RDAT19<19>RDAT18<18>RDAT17<17>RDAT16<16>RDAT15<15>RDAT14<14>RDAT13<13>RDAT12<12>RDAT11<11>RDAT10<10>
RDAT9<9>RDAT8<8>RDAT7<7>
RDAT5<5>RDAT6<6>
RDAT4<4>
RDAT2<2>RDAT3<3>
RDAT0<0>RDAT1<1>
RMOD0RSOP
RMOD1
REOPRVAL
RSXRERR
RPRTYRENB
RFCLK
D15<15>D14<14>D13<13>D12<12>D11<11>D10<10>
D9<9>
D7<7>D8<8>
D6<6>
D4<4>D5<5>
D3<3>D2<2>D1<1>D0<0>
SCLSDA
EA1EA0
WPEA2
CONF1
CONF0
2V5E1
2V5E1
D3V3
DGND
G125
VCC
2Y
GND
1Y
OE*
2A
OE*
1A
DGND
74LVC244A
VCC
1Y2
GND
1Y1
1Y4
1Y3
2Y1
2Y2
2Y3
2Y4
1A1
1OE*
1A4
2A1
2A2
2OE*
2A3
2A4
1A3
1A2
AGND
AGND
AGND
AGND
RS232 (5V TTL/CMOS)
RS232 (+/- 10V)
33
NOT FITTED
200MS
GLUECARD
MO
UN
TC
LOS
ET
OG
LUE
CA
RD
CO
NN
EC
TO
RJ4
16 X 22PF
Wed Dec 13 09:18:55 2006
100U
R256
R255
R254
R253
R195
R196
R197
R198
C347
C348
C350
C349
C251
C252
C253
C250
C254
C255
C256
C257
C353
C351
C354
C352R258
100N
100N
B14
B21
A38C259
C262
22P
22P
R24
6
6V3 R
218
4XGBE_CS*
ECS_RESET*
C32
9
C30
0
C30
1
C30
2
C31
3
3K3
3K3
R25
23K
3
R257
4XGBE_D<9>
D16
GC_SCLGC_SDA
PL6
1K0
R21
3
TXDV1
RTSV1
3K3
C31
247
0U
B100
U64GC
CONPROM_TMSCONPROM_TDO
D36D35D34
R21
4
RXDV1
DTRV1
DSRV1
R23
43K
3
DTYPE9
3K3
3K3
3K3
3K3
3K3
D46
C260
C261
R203
51R
51R
A14
4U7
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
A1
C33
9
C33
5
C33
4
C30
3
C33
6
C33
7
C26
3
C29
9
C33
3
C34
4
C35
6
C34
2
C26
4
C34
3
C31
8
B29B30
A69
R21
1
R24
8R
250
R21
2
R24
7R
245
D49D50
CONPROM_TDI
D27
1K0
R216R241R210R249R217
R244R215R243R242R208
R251R209
4XGBE_LA<13..2>
C97C96
33R
33R
C109
100N
100N
C31
9
C33
1
100N
100N
4U7
100N
100N
100N
100N
100N
D5D6D7D8D9D11D12
C33
0
C33
2
C29
8
C29
7
D13D14
D115
4XGBE_CS*
GBERST*ECS_RESET*GC_CONFIG*
4XGBE_WR*4XGBE_RD*
GC_LINT1
20MHZ
FPGA1
B93B94B95B96
B97
B22 B22B23B24
A28
4XGBE
B54
D29
C33
PLX_READY*
CONFPGA_TDI
CONPROM_TCK
CONFPGA_TCKD32
C45C58C59
C108
PROMS VIA BUFFER
4XGBE VIA BUFFER
A61
A85
MRESET*
J3G
1J3
P2
J3G
2J3
P1
B120B119B118B117
B115B116
B114B113B112
B110B111
B109
B107B108
B106B105B104
B102B103
A120
A117
A119A118
A115A116
A112A113A114
A111A110A109A108A107A106A105A104
A102A103
B101
B99B98
B96B95B94B93B92B91B90B89
B87B88
B86B85B84
B82B81
B83
B79B80
B77B76
B78
B74B75
B73
B71B72
B69B70
B68
B66B67
B64B65
B63B62B61
A101A100A99
A97A98
A95A94
A96
A92A93
A91
A89A90
A88A87A86A85A84A83A82A81
A79A80
A77A78
A76
A74A75
A73
A71A72
A70A69A68
A66A67
A64A65
A63
A61A62
B58B59B60
B57B56
B53
B55
B52B51
B49B50
B48
B46B47
B45
B43B44
B42B41B40B39B38B37B36B35
B33B34
B32B31
B28
B26B27
B25
B20
A58A59A60
A56A57
A53A54A55
A51A52
A48A49A50
A46A47
A45
A43A44
A41A42
A40A39A38
A36A37
A35
A33A34
A30
A32A31
A29A28
A25A26A27
A23A24
A22
A20A21
B19
B17B18
B16B15
B13B14
B12B11B10
B7B8B9
B5B6
B4B3B2B1
A19A18A17
A15A16
A14
A12A13
A10A11
A7
A9A8
A5A6
A4A3A2
D18
D15
D17
D4D3D2
C60D60D59C57C56C54
C111C115
C110
C98C47C46
C43
C18C19
C17C16C15C14C13C12C10C9C8C7
C4
C6C5
C3
C119
D116D117D118D119
C118
D33
D26C117
D28
D30
C42C36C95C89C88
C31C21
C87
C22C27
C25C26C30
C32C23
C35
C40
C38C39
C37C44
C116
C53C52C51C50C49
C107C106C105
J4P1
J4G
2
J4P2
J4G
1
C94
D55D56
D52D53
D47
D62D61
D64D63
D67D66
D68D69
D98
CONFPGA_TMS
R202
R204R206
R205
R207C258
R201
R200
R199
R259
R260
R23
1R
232
R23
3
R22
8R
227
R22
6R
225
GC_CS1*
GC_CS1*GC_LW/R*
4XGBE4XGBE
FPGA1
FPGA1FPGA1FPGA1
FPGA1
FPGA1
FPGA1
GC_TMS3GC_TDO3
B113
4XGBE
A11
GC_ADS*GC_BLAST*
PLX_READY*GC_LW/R*GC_CS1*
0A30A04
A27A26A25
A59
A43
A41
3K3
1K0
CTSV1
ALLDEVICES
1K0
1K0
B43
4XGBE_D<14>51R
51R4XGBE_D<15>
51R
B62
4XGBE
FPGA1
4XGBE_D<12>
51R
51R
51R
51R
33R
51R
51R
51R
51R
22P
22P
DCDV1
RTV1
1K0
1K0
B119B118B117
B115B116
B114
B112
B110B111
B109
B107B108
B106B105B104
B102B103
A117
A119A118
A115A116
A112A113A114
A111A110A109A108A107A106
A104
A102A103
B100B101
B99
B97B98
B92
B90B89
B87B88
B86B85B84
B82B81
B83
B79B80
B77B76
B78
B75
B71B72
B69B70
B68
B66
B64B65
B63
B61
A101A100A99
A97A98
A89A90
A88A87A86
A84A83A82A81A80
A76
A74A75
A71A72
A70
A68
A66
A64A65
A63A62
B58B59B60
B57B56
B54B53
B55
B52B51
B49B50
B48B47
B45B44
B42B41B40B39B38B37B36B35
B33B34
B32
B30B31
B28B29
B26B27
B25B24
B20B21
A58
A60
A56A57
A53
A55
A51A52
A48A49A50
A44
A42
A40
A36A37
A35
A33A34
A30
A32A31
A29
A23A24
A20A21
B19
B17B18
B16B15
B13B12B11B10
B7B8
B9
B5B6
B4B3B2B1
A19A18
A15A16
A10
A8
A5
A3
A1
GC_TCK3
TTCRX
CONFPGA_TDO
GC_TDI3GC_RST3*
A47
A45
A2
51R
4XGBE_D<0>4XGBE_D<1>4XGBE_D<2>4XGBE_D<3>4XGBE_D<4>4XGBE_D<5>4XGBE_D<6>4XGBE_D<7>4XGBE_D<8>
4XGBE_D<10>4XGBE_D<11>
4XGBE_D<15..0>
4XGBE_D<13>
51R
51R
51R
51R
A54
A17
ALL DEVICESALL DEVICESALL DEVICESALL DEVICES
33R
33R
33R
33R
33R
33R
33R
B74
A77
33R
33R
A4
A9
A6A7
A13A12
22P
1K0
GC_BLAST*51R
51R
GC_ADS*
51R
A39
ALLDEVICES
B23
10V
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND DGND
D3V3D5V
DGND
3V3
3V3
GC J3 J4GC
PLX
PLX3V
33V
3
JTAG
DN
U
RS
232
I2C
RESET*
RTV1CTSV1
DSRV1RTSV1
TXDV1DTRV1
DCDV1RXDV1
SDA1SCL1
SDA2SCL2
SCL3SDA3
SCL4SDA4
GPIO0
PA
D0.
9
PA
D0.
7
RS
VNCG
ND
GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7GPIO8
BCLKBTERM*
RD*WR*
LREQLGNT
LBE0*
LBE2*LBE1*
LBE3*LINT1LINT2
ALELCLK
LRESETCS0*READY*
CS1*LW/R*
LA2
ADS*BLAST*
LA3LA4LA5LA6LA7
TRES1
TMS1TDO1
TDI1
JPWR1TCK1
TRES2TDI2
TDO2TMS2
TCK2JPWR2
TRES3TDI3TMS3
TCK3TDO3
JPWR3
LAD0
LAD2LAD3
LAD1
LAD4LAD5LAD6LAD7LAD8LAD9
LAD10LAD11LAD12LAD13
LAD15LAD14
LA8
LA10LA9
LA11LA12LA13
LA14LA15
LA17LA16
LA18LA19LA20LA21LA22LA23
LAD16LAD17
LAD20LAD19LAD18
LAD21LAD22
LAD25LAD24LAD23
LAD26LAD27
LAD30LAD29LAD28
LAD31
3V35VSTR*
AUTO*ERROR*
INIT*
PRND0SLCTIN*
PRND2PRND3
PRND1
PRND5PRND4
PRND7PRND6
ACK*
PAPENDBUSY
SELKBDATKBCLK
DCD1DSR1RXD1RTS1
CTS1TXD1
DCD2RI1DTR1
DSR2RXD2RTS2
CTS2TXD2
DTR2RI2
DRVSEL1INDEX
DSKCHG
MDATMCLK
GND
HD D1HD D0
HD D4HD D3HD D2
HD D5HD D6
HD D8HD D9
HD D7
HD D11HD D10
HD D12
HD D14HD D13
HD D15CS0*CS1*
PREQPDACK*
IOR*IRQ
IOW*
AD05V
AD3AD2AD1
AD5AD4
AD8AD7AD6
AD10AD9
AD13AD12AD11
DIRMTR1
STEPWRDATAWRGATETRK0
RDATAWRPT
DRVSEL0HDSEL
NCMTR0
IDERST*
USBP0+NC
USBP0-A0A1A2IORDYD3232IRDATXIRDARX
D34D33
D35
AD163VBAT
AD17
AD19AD18
AD20AD21
AD24
AD22AD23
AD25AD26
AD29AD28AD27
AD15AD14
BE0*
BE2*BE1*
5VBE3*
CLK1REQ0*REQ1*
REQ3*REQ2*
ACLED
TRDY*FRAME*
DEVSEL*
LILEDSERR*
NCCCRST
D24D25D26D27D28D29D30D31
ROMWRROMRD
CC3V3
LAN TX-LAN TX+
NC
LAN RX+LAN RX-
SUSAVCCSUS
SUSBGPIO2
GRN
AD30AD31PIRQA
PIRQCPIRQB
5VPIRQD
CLK2
GNT1*GNT0*
GNT3*GNT2*
5V
STOP*IRDY*
PCIRST*
PAR*LOCK*
DACK7NC
NC
USBP1+USBP1-
NCLA22LA23
NCPERR-
SMBDATSMBCLKCC3V3NCIOCHKTCKTDITDO
DDATMS
DDC
ANGNDGPIO7
REDBLU
ENAVEEGND
FLMVSD12D13D14D15D16
D19D18D17
D21D20
D23ENBK
D22
LCDV
HSYNCVSYNC
ENAVDDSHCLKLPHS
D1D0
D2
D4D3
D5D6D7
D9D8
D10D11LCDMCOREV
0.7
PA
D
0.9
PA
D
D3V3
1
2
3
4
5
6
7
8
9
AGND
AGND
DGND
34
CREDIT CARD PC
200MS
Wed Dec 13 09:24:38 2006
B87D88
A100A101
A106
B109B110
B45
D58
A42
C83
B104B103B102B101B100B99
D90
C86
A88A89
A97
100R
B66
B68
A76A77
A118
A108C109
D111
B114B113
D114
C31
1
RJ45ETHSK3
12
1413
2
C32
8
C35
5
C34
0
C33
8
C34
5
C34
1
C32
2
100N
100N
100N
100N
D46D47
B57
B61
B65
B70
B74
B78
D97
A102
B6
C93C94C95C96C97C98C99
C89C90D91C92
C105
C87C88
D35
C47
B54B53B52
B50
C13
C112C113C114C115C116C117C118
D84
D82
D79
D73D72D71D70
D45D44D43
D49D48
D42D41
C54C53C52
J2G
2J2
P1
J2G
1J2
P2
C9C10C11C12
C14C15C16C17C18C19
C21C22C23
C25C26C27C28C29C30C31C32C33C34C35C36C37C38C39C40C41C42C43C44C45C46
C48C49C50C51
C55C56
D67D68D69
D12
D7
D40D39D38D37D36
C24
D14D13
D11D10
D9C8C7C6
C2C1
C3C4C5
D8
D4
D2
A95
A97A98A99
A101A100
C70C69
C71
B82B83
B77B76B75B74
B101B100
B99
B90
A88
B81
A66
A57
B67
B65B64B63B62B61B60B59B58B57B56B55
B51
B49B48
B42
B33B32
B1B2
A1A2
A25
A27
B72
C120
C91
D33
D31
B10B11
B85
D55D54
C68
A103
A112A113A114
D120
D118D119
D112D113
D115D116
D109D110
D104D103D102
D105D106
C119
C110
C107C108
C106
C104C103C102
D101
D98D99
D93D94
D87
D89
D86
D66
D63D62D61
D65D64
C101C100
C85C84
C82C81
C76
C74C75
C72C73
C66C67
C64C65
C63C62C61
D56D57
D59D60
D52D51
D53
D50
D30
D32
D34
D27D26D25
D29D28
D22D21D20
D23D24
C60
C58C59
C57
C20
D17D16D15
D19D18
D6D5
D3
D1
J1G
1J1
P2
B120
B117B118B119
B115B116
B114
B112B113
B111
B107B108
B106B105
J1G
2J1
P1
A120A119
A117
A115A116
A111A110A109A108A107
A104
B98B97B96
B92B91
B89B88B87B86
B84
B79B80
B78
B73
B71
B69B70
A96
A94A93A92
A90A89
A87A86A85A84
A82A81
A83
A80A79A78
A75A74A73A72A71
A69A70
A68A67
A65A64A63A62A61
B47B46B45B44B43
B41B40B39B38
B35B36B37
B34
B30B31
B29B28
B25
B27
B23B24
B22B21B20
A60A59A58
A55A54A53A52A51
A49A50
A48
A46A47
A45A44A43
A41A40A39A38A37A36A35A34A33A32A31A30A29A28
A26
A24A23A22A21A20
B19B18B17B16B15B14B13B12
B9B8B7
B5B4B3
A19
A17A18
A15A16
A14A13A12A11A10A9A8A7A6A5A4A3
D85
B93B94B95
A56
B26
A91
B102
C111
D108D107
C80C79C78C77
D92
D100
B104A105
B103
D117
D83
D81D80
D78D77D76
D74D75
D96D95
CCPCC310
C31
5
C31
4
R22
3
R22
4
C326
R230
R235
11
109
8
76
54
31
RXC
T
10N
CC3V3
100U
100N
4U7
270R
270R
470U
1A MAX
A35
A39
A82A83A84
A71
A74
MRESET*
A77
A65A66
A106A107
A25
A20
A10
A6
B112
A80A81
A75A76
120R
A69
A87A86A85
A90
A70
A59
A98A99
A58
A104
B66
B68
B98
100N
B3
A12A13A14
A45A44
A23
B18
B9B10
B12
B16
B20
B22
B24
B27
A17
A40
B26
B32B33
A37
B117
A64
A47
B72
B92
A3A4
B95
B93
B119
100N
A41
A276V
3
CCTX-
B88B89
B96
B81
B83
CCYLED
B107B108
B85
B19
B15
B17
B23
B21
B28B29
B25
B34
B30
CCGLED
B86
B90
B94
B106B105
B110B111
B109
B116B115
B118
B31
B11
B13B14
B36B37B38B39B40
A43
A38
A36
A34A33A32A31A30A29A28
A26
B41B42B43B44
B79
B82
B84
B35
B97
CCTX+CCRX-CCRX+
10V
4U7
B1B2
B4B5B6B7B8
B47B48B49B50B51B52B53B54B55B56
B58B59B60
B62B63B64
B69
B71
B75B76B77
B80
A5
A7A8A9
A11
A15A16
A18A19
A21
A2A1
A42
A48A49A50A51A52A53A54A55A56A57
A60A61
A68
A72
A62A63
A112A113A114A115A116A117A118A119
A110A111
A109
A96
A103A102
A24
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
D5V
DGND
DGND
4
875
3
6
1
TX-
TERMTERMTERMTERM
2
TX+
RX+J0035
RX-
TD-
RK
RDCT
RD-
TD+
TDCT
LKLA
RA
SHIELD
CHS
RD+
DGNDDGNDDGND
CCPC J2 CCPC J1
TDITDO
STOP*IRDY*
PAR*LOCK*PCIRST*
DACK7USBP1+
NC
D10
D14
NC
MD39GND
A0
GPIO7
NC
SERR*LILEDRSTIN
NC
D0D1
D16
IDEIRQ
MD26
SD14
MD7
MD60MD59MD58
LA22
SBHE*MEMCS16*
IOCS16*IOW*IOR*
SYSCLKTC
ALESD7SD6SD5SD4
SD2SD3
SD0SD1
IOCHRDY
IRQ3IRQ4IRQ5
IRQ7IRQ10IRQ11
IRQ15COREBIOSVGABIOSLA21LA20LA19LA18LA17
AENSA19SA18SA17SA16
SA14
SA12SA11SA10
SA9SA8SA7SA6
S5SA4SA3SA2SA1SA0
CAS/DQM0CAS/DQM1CAS/DQM2CAS/DQM3CAS/DQM4
CAS/DQM6CAS/DQM5
CAS/DQM7
MD1MD0
MD2MD3MD4MD5MD6
MD8MD9
MD10
SD8SD9SD10
SD12SD11
SD15
SD13
DRQ0DRQ1
DRQ3DRQ2
14.31MHZ
DMA2*DMA1*DMA0*
DMA3*DMA5*DMA6*SPKR
REF*MEMR*SMEMR*MEMW*SMEMW*
MD11MD12MD13MD14MD15
MD16MD17
MD19MD18
MD20MD21MD22MD23
MA0MA1MA2MA3MA4MA5
MA8
MA6MA7
MA9MA10MA11MA12
MD24MD25
MD27MD28MD29
MD31
SDCE1SDCE0
SCASA
SRASA
SDCLK0
24MHZSDCLK1
MD50
MD52MD53MD54MD55
MD56MD57
MD61MD62MD63
MD36
MD38
MD40MD41MD42MD43MD44
RAS1*RAS0*
RAS2*RAS3*MWEA*MWEB*
0.7
PA
D
A1A2
WDSTR*BA0
WDEN*
XD0BA1
XD2XD1
XD3
XD5XD4
BIOSCXD7XD6
VCC
0.9
PA
D
DCD1
RXD1
TXD1CTS1
DRVSEL1DSKCHG
DTR2RI2INDEX
MCLK
AD10
AD12AD11
AD13
WRGATEWRDATA
MTR1DIRSTEP
HDSELDRVSEL0
TRK0WRPTRDATA
USBP0+
IDERST*
MTR0
AD19
AD22
AD20AD21
AD29AD28
AD26AD25
AD27
AD14AD15BE0*
BE2*BE1*
5VBE3*
ACLEDREQ3*
TRDY*FRAME*
DEVSEL*
D26
D24D25
D27D28
GPIO2GRN
PIRQBPIRQC
AD30AD31PIRQA
PIRQD
LA23
SMBDATSMBCLK
PERR-
TCKIOCHK
DDCDDA
ANGNDBLURED
ENAVEE
FLMVS
D13D12
D15
ENBK
LPHSSHCLK
VSYNCHSYNCENAVDD
D3D4
D2
D9D8D7D6D5
LCDMD11
COREV
MD47MD46MD45
MD37
CLK1
AD23AD24
MD51
IRQ14IRQ12
NC
NC
CC3V3
LCDV
SCASB
SA13
SA15
RESDRVVCC
IRQ9NC
NCNC
NC
NCNC
NC
NCNCNCNCNCNCNCNCNCNCNCNCNC
GND
GND
GND
GND
GND
GNDNCNC
SRASBNCNCNC
MD49MD48
REQ2*
REQ0*REQ1*
MD34MD35
MD33MD32
GND
MD30
SDCLK2
DSR1
RTS1
RI1
SLCTIN*INIT*
ERROR*
STR*AUTO*
PRND0PRND1PRND2
DCD2DSR2RXD2
TXD2CTS2
HD D1
A0A1A2IORDYD32
DTR1
RTS2
GNT0*CLK25V
AD9AD8
AD4AD3AD2AD1
5VIOW*IOR*
IRQPREQ
PDACK*CS1*CS0*
HD D15HD D14HD D13HD D12HD D11HD D10
HD D9HD D8HD D7HD D6HD D5HD D4HD D3HD D2
HD D0GND
MDAT
KBCLKKBDAT
SELPAPEND
BUSYACK*
PRND6PRND5PRND4PRND3
0.9
PA
D
0.7
PA
D
AD5AD6AD7
IRDATXIRDARX
AD16AD17AD18
D33D34D353VBAT
GNT1*GNT2*GNT3*5V
NC
USBP1-
NC
NC
D23D22D21D20D19D18D17
PRND7
NC
NCNCNC
AD0
USBP0-
TMS
D31D30D29
GND
LAN TX+CC3V3ROMWRROMRD
SUSBSUSA
VCCSUSNC
LAN RX-LAN RX+LAN TX-
NC
35
CLOCKSWed Dec 13 09:38:44 2006
U77
C59
210
0N
REFCLK3+
100R
100N
100N
100RREFCLK-
REFCLK+
F3_CLKBOT-
F2_CLKTOP+
F2_CLKTOP-
REFCLK2+
REFCLK1-
100N
REFCLK0-
100N
REFCLK3-
100N
SYSCLK3+
SYSCLK3-
F5_CLKBOT+
F4_CLKTOP+
F4_CLKTOP-
F4_CLKBOT+
F4_CLKBOT-
F5_CLKTOP-
F5_CLKTOP+
F5_CLKBOT-
F2_CLKBOT+
F2_CLKBOT-
F3_CLKTOP-
F5_BREFCLKTOP+
F3_BREFCLKBOT+
F2_BREFCLKTOP+
F2_BREFCLKTOP-
F2_BREFCLKBOT+
F2_BREFCLKBOT-
F3_BREFCLKTOP-
F3_BREFCLKTOP+
F3_BREFCLKBOT-
100N
100N
100N
100N
SYS
100N4U
7
100N4U
7
REF
100N
SYSCLK1-
100R
U78
U80
C36
0
C35
8
C18
0C
183
U79
U81
C62
9
C64
0
C18
1C
185
U28
C17
9C
184
C18
2C
186
C37
1
R290
F3_CLKBOT+
9
1
3
5
16
15
8
211
10
12
5
6
5
6 1
3
4
5
6
16
15
9
1
3
4
5
6
16
15
8
211
10
12
1
3
4
5
6
16
15
8
211
10
12
9
1
3
4
5
6
16
15
8
211
10
12
9
1
3
4
5
6
16
15
8
211
10
12
100N
SYSCLK-
100R
F4_BREFCLKBOT-
F4_BREFCLKBOT+
F4_BREFCLKTOP-
9
SYSCLK1+
SYSCLK0-
SYSCLK0+
C60
310
0N
1 2 3
80.440
U27
4
14 32
80.157 2
REFCLK1+
REFCLK0+
U57
15
14
13
12
R413
R412
9
124
53
6
78
F5_BREFCLKTOP-
F5_BREFCLKBOT+
F5_BREFCLKBOT-
F4_BREFCLKTOP+
F3_CLKTOP+
R291
REFCLK2-
U62
F1_CLKTOP+
F1_CLKBOT+11
10
16
4 SYSCLK2-
SYSCLK2+
6
SYSCLK+
C60
4
10
8
9
11
12
C37
2
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
DGND
XOPL81
VCC
+
GND NC
XOPL81
VCC
+
GND NC
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
D3V3
D3V3
D3V3
D3V3
90LV048
OUT3
OUT4
OUT1IN1-
IN2-
IN4-
OUT2
3V3
GND
IN2+
IN1+
ENEN*
IN4+
IN3+IN3-
DGND
DGND
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
DGND
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
SY89833L
IN-
GND
VCC
Q1+
Q2+
Q2-
Q3+
Q3-
Q0-
Q0+
EN
Q1-VT
VR
IN+
DGND
RKT I/O (TOP)VTT(RAM1/2)
VTT(RAM3/4)1A0
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
PROM VCCO
0A75
0A77RKT I/O (BOT)
2A
1A6
GND POINTS FOR 'SCOPE
FPGA VTRX
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
FPGA VCCINT1A25
= DIG
= ANA
VDD/VDDQ RAM1-4
1A0
GND1
GND2
= DIG
GND4
0A66
GND3
= ANA
LEDS
36
10MAVCCO BANKS 6/7
0MA
PROM VCCINT
VOLTAGE REGULATORS - AREA 1
= 3V3
PWR1
PWR2
PWR3
PWR4
= 2V5A1/2V5E1
= 1V7A1/2V5C1/2V5D1
FPGA VCCAUX
= 1V25A1/1V25B1/1V5A1/2V5B1
VCCO BANKS 0/1/4/5
VREF
Thu Dec 14 09:00:03 2006
4U7
C39
2
2
2V5
4U7
6
C40
1
39P
4U7
C39
0
4U7
R39
5
C53
1
4U7
4U7
100R
R386
11K8
39P
C522
4U7
C21
6
4U7
C39
7
4U7
4U7
4U7
4U7
4U7
4U7
C20
8
U53
100N
C46
9
470U
C23
0
4U7
C45
2
680U
C23
8
C42
04U
7
470U
C23
5
4U7
C43
5
470U
C20
7
C56
84U
7
R40
1 C20
968
0U
4U7
C55
3
470U
4U7
C58
0
845R
845R
2V5 1A5
887R
1V5 1A5
2V5
1V810K
22K1
C55
1
R295
R29
4
U74
C39
1
U76
C53
4
U43
C21
4
C20
6
C23
7
C23
4
G4G3 G2G9G6 G10G13 G8G5G14G15
4
C20
3
4 2
5
5
5
4
5
4
5
5
G1
6
3 6 1
1A54
5
3 6
1
2
1
1
2
3 6
3 6
1
2
2
1
1
2
3
3 6
3 6
3
5
5
R350
U56
1V7
30K
4
4
C384
R38
4
G11G12 G7
1
887R
U52
4
3
4
U381A5
21
U75
R368100R
2
R402
U37
R34
9
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
GSKTGSKT GSKT
CM3205
VTT
OUTVIN
ADJGND TAB
CM3205
VTT
OUTVIN
ADJGND TAB
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
MAX4162V+
OPV-
IP-
IP+
AGND
D3V3
D3V3TPS79401
0A25
GND TAB
IN
EN
OUT
ADJ
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
1V8A1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGNDAGND
AGND
1V5A1
1V7A1
2V5E1
2V5D1
2V5C1
1V25R1
2V5B11V25B1
2V5A11V25A1
GSKT GSKT GSKT GSKT GSKTGSKT GSKTGSKT GSKT GSKTGSKT GSKT
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
2A7
VDD/VDDQ RAM7-9
VDD/VDDQ RAM1-6
VOLTAGE REGULATORS - AREA 2
37
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
0MAFPGA VTRX
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
1A25FPGA VCCINT
VCCO BANKS 0/1/4/5
RKT I/O (TOP)0A66
0A75
2A4VTT(RAM4-6)
1A5
VREF
VCCO BANKS 6/7
1A5 VCCO BANKS 2/3
VTT(RAM1-3) 10MAPROM VCCINT
0A77
1A5
= DIG
3A
LEDSVTT(RAM7-9)
= ANAGND1
= DIG
= ANA
GND3
GND4
GND2
PROM VCCO
RKT I/O (BOT)
FPGA VCCAUX
= 3V3PWR4
PWR3
PWR2
PWR1
= 1V25A2/1V25B2/1V25C2/1V5A2
= 2V5B2/2V5E2/2V5F2
= 1V7A2/2V5A2/2V5C2/2V5D2
Thu Dec 14 09:04:44 2006
C91
2
U1
680U
470U
C16
924U
7
100N
3
4
5
887R
U7
4U7
1A5
4U7
C19
2
845R
2V5
2V5
2V5
1A5
100R
30K
100R
22K1
1V8
U23
U87U11
U30
R53
8
R4861
2
5
24
3 6 1 R903
R90
2
845R
470UC27
C15
86 4U7
4U7
C15
42
C16
224U
7
470U
C23
U82
5
24
3 6
887R C31
680U
C69
9
4U7
470U
R475
R1002
R10
03
5
24
3 6 1
845R
887R C18
768
0U
C66
74U
7
C18
C16
904U
7
C16
C16
914U
7
C17
470U
C17
547
0U
C67
54U
7
R47
4
1
C17
1
C69
5
5
4
3 6
2
1
C19
8
U19
5
4
63
2
1
C16
7
4U7
C16
3
4U7
1A5
5
4
63
2
1
C35
4U7
C39
4U7
4
5
3 6
2
1
4U7
R539
10K
C893
39P
C19
1
4U7
C75
7
4U7
C19
7
1A54
3 6
U291V5
5
2
1
4U7
C15
14
4U7
R80
6
C1483
U93
1V7 5
4
3 6
C91
1
R814
11K8
4U7
C14
98
39P
4U7
C90
4
R85
8
2
1
4U7
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
MAX4162V+
OPV-
IP-
IP+
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
1V8A2
DGND
DGND
DGNDDGND
DGND
DGND
DGND
AGNDAGND
AGND
2V5F21V25C2
CM3205
VTT
OUTVIN
ADJGND TAB
1V5A2
1V7A2
2V5E2
2V5D2
2V5C2
1V25R2
2V5B2
2V5A2
1V25B2
1V25A2
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
CM3205
VTT
OUTVIN
ADJGND TAB
CM3205
VTT
OUTVIN
ADJGND TAB
VDD/VDDQ RAM7-9VCCO BANKS 2/3
VTT(RAM4-6)1A5
VDD/VDDQ RAM1-6
VREF
FPGA VTRX
VCCO BANKS 6/7
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
10MAPROM VCCINT
0A75VCCO BANKS 0/1/4/5FPGA VCCAUXPROM VCCOLEDS
VTT(RAM7-9)1A5
2A7
VTT(RAM1-3)1A5
0MA
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
1A25FPGA VCCINT
GND1
GND2
GND4
RKT I/O (TOP)0A66
0A77
= DIGGND3
= DIG
= ANA
= ANA
3A
38
VOLTAGE REGULATORS - AREA 3
= 3V3
PWR2
PWR3
PWR4
= 1V25A3/1V25B3/1V25C3/1V5A3
= 2V5B3/2V5E3/2V5F3
= 1V7A3/2V5A3/2V5C3/2V5D3PWR1
2A4
RKT I/O (BOT)
Thu Dec 14 09:07:40 2006
U20
C15
15
4U7
U9484
5R
U83
C16
94
C20
470U
100N
C40
4U7
470U
4U7
C15
43
680U
C32
R905
1V7
887R
845R
887R
887R
1A52V5
2V5 1A5
30K
22K1
R54
0R
807
4
12
5
24
5
24
5
24
5
5
4
5
4
4
5
5
R90
4C15
874U
7
U8
3 6 147
0U
C16
23
163
3
5
C70
0
C18
868
0U
4U7
C17
647
0U
C67
64U
7
U2484
5R
470U
C17
2
R1004
R10
06
6 1
4U7 3
U24U
7
C21
470U
C16
954U
7
100RR487
1A5
U32
2
1
C59
1
4U7
2V52
1
4U7
C16
4
4U7
C16
8
3 6
3 6
4
U12
3 6
2
1
4U7
C36
4U7
1V81
2
63
4U7
C91
4
R541
10K
4U7
C91
339PC896
2
R85
910
0R
3 6
4U7
C14
99 4U7
C90
639PC1484
11K8
R8154
U88
5
U311A5
4
1V52
1
3 6
4U7
C19
9
4U7
C19
3
C76
04U
7
1
C24
R477
R47
6
C28
C69
6
C66
8C
1693
4U7
680U
C19
C59
3
4U7
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
CM3205
VTT
OUTVIN
ADJGND TAB
CM3205
VTT
OUTVIN
ADJGND TAB
DGND
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
MAX4162V+
OPV-
IP-
IP+
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
1V8A3
DGND
DGND
DGNDDGND
DGND
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
DGND
AGNDAGND
AGND
1V5A3
1V7A3
2V5E3
2V5D3
2V5C3
1V25R3
2V5F3
2V5B3
2V5A3
1V25C3
1V25B3
1V25A3
CM3205
VTT
OUTVIN
ADJGND TAB
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
FPGA VTRX
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
FPGA VCCINT1A25
10MAPROM VCCINTRKT I/O (TOP)
0A66
0A77RKT I/O (BOT)
LEDS
1A5VTT(RAM7-9)
VREF
1A5VTT(RAM1-3)
VOLTAGE REGULATORS - AREA 4
39
0MA
FPGA VCCAUX
0A75VCCO BANKS 2/3
3AVCCO BANKS 6/7
VDD/VDDQ RAM7-9
2A4VTT(RAM4-6)
1A5
= DIG
= ANAGND2
= ANA
VDD/VDDQ RAM1-6
2A7
GND1
= 3V3
PWR1
PWR3
PWR4
VCCO BANKS 0/1/4/5PROM VCCO
= 1V7A4/2V5A4/2V5C4/2V5D/2V5F4
PWR2 = 2V5B4/2V5E4/(2V5F4)
= 1V25A4/1V25B4/1V25C4/1V5A4
= DIGGND4
GND3
Thu Dec 14 09:12:20 2006
C59
0
C59
4
4U7
C76
3
C19
4
4U7
C20
0
4U7
1V5
U33U34
1
C15
16
3
2
4U7
4U7
2
63
5
4
4U7
R86
010
0R4U7
C90
8
4U7
6
1
39P
11K8
R816
U95
U89
1
2
4U7
C91
6
4U7
C91
5
39P
10K
R543
63
4
5
U132V5
4U7
C41
4U7
C37
1
2
3 6
1
2
C16
5
4U7
4U7
C16
9
63
U211A5
1
2
63
1A5
5
4U7R391163
U41
2
C49
7
470U
C21
9
C49
54U
7
680U
C21
7
470U
C21
8
C49
64U
7
R39
3
U84
1
2
100N
470U
C17
7
C67
74U
7
680U
C18
9
C66
94U
7
4U7
C69
7
470U
C17
3 C70
1
163
R47
8
R481
5
C16
244U
7
470U
C254U
7
680U
C33
C15
884U
7
470U
C29
R90
6
R907
U25
U9
163
5
4
5
4
4
4
5
4
5
4 2
5
4 2
5
845R
887R
4
3
R80
8
C1485
R54
2
C899
22K1
887R
100R
2V5
2V5
1A5
1A5
30K
1V7
887R
845R
845R
1V8
C15
00
R488
C15
44
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2DRAWING
CM3205
VTT
OUTVIN
ADJGND TAB
CM3205
VTT
OUTVIN
ADJGND TAB
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
MAX4162V+
OPV-
IP-
IP+
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
1V8A4
DGND
DGND
DGND
DGND DGND
DGND
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
DGND
AGNDAGND
AGND
1V5A4
1V7A4
2V5E4
2V5D4
2V5C4
1V25R4
2V5F4
2V5B4
2V5A4
1V25C4
1V25B4
1V25A4
CM3205
VTT
OUTVIN
ADJGND TAB
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
RKT I/O (BOT)
0A75
LEDS
2A4VTT(RAM4-6)
1A5
VCCO BANKS 6/7VTT(RAM1-3)
VDD/VDDQ RAM1-6FPGA VTRX
10MA
FPGA VCCINT
VDD/VDDQ RAM7-9VCCO BANKS 2/3
VOLTAGE REGULATORS - AREA 5
GND1
0A77
3A
= ANA
GND3
= DIG
GND2
VREF
VTT(RAM7-9)
40
GND4
= DIG
= ANA
0A66RKT I/O (TOP)
1A52A7
1A5
PROM VCCINT
VCCO BANKS 0/1/4/5FPGA VCCAUXPROM VCCO 1A25
0MA
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
HEAT SINK TAB ISOLATED FROM OTHER GND TRACKING
= 3V3
PWR1
PWR2
PWR3
PWR4
= 2V5B5/2V5E5
= 1V25A5/1V25B5/1V25C5/1V5A5
= 1V7A5/2V5A5/2V5C5/2V5D5/2V5F5
Thu Dec 14 09:14:47 2006
R80
9
U96
4U7
4U7
C19
6
C20
2
1V7100R
845R
887R
845R
887R
845R
2V5
1A51V5
1A5
C1474
R4893
4
1
2
887R
5
24
5
4
4
5
4
5
5
4
R909
R90
8
4 2
5
U10
3 6 1
C30
470U
4U7
C15
89
C34
680U
4U7
C15
45
C26
470U
C16
254U
7
5 U85
R480
R47
9
4 2
5
U26
3 6 1
C17
8
4U7
C67
8
470U
C19
0
C67
0
C17
447
0U
4U7
C69
8 100N
C70
2
680U
R392
R39
4
3 6 1
C22
147
0U
4U7
U42
4U7
C49
9
C22
0
C49
84U
7
4U7
C50
0
C22
247
0U
2V5 1A54
5
U36
2
1
3 6
4U7
U22
2
1
3 6
4U7
C16
6
C17
0
1A54
5
2V5
U14
2
1
3 6
4U7
C38
4U7
C42
U86
2
1
R545
39P
4U7
C91
8
4U7
C91
76
R817
11K8
39P
2
1
4U7
C15
17
4U7
C15
01
4U7
C91
0
R86
110
0R
3 6
U35
2
1
3 6
4U7
C20
1
4U7
C19
5
4U7
C76
6
30K
680U
3
1V8
C902
10K
22K1
R54
4
DRAWING
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2
CM3205
VTT
OUTVIN
ADJGND TAB
CM3205
VTT
OUTVIN
ADJGND TAB
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
LT1963
IN
GND TAB
SENSEEN
OUT
MAX4162V+
OPV-
IP-
IP+
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
D3V3
1V8A5
DGND
DGND
DGND
DGND DGND DGND
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
DGND
AGNDAGND
AGND
1V5A5
1V7A5
2V5E5
2V5D5
2V5C5
2V5F51V25C5
1V25R5
2V5B51V25B5
2V5A51V25A5
CM3205
VTT
OUTVIN
ADJGND TAB
TPS794010A25
GND TAB
IN
EN
OUT
ADJ
F2-F5 RAM TERMINATIONS
41
Wed Dec 13 12:46:50 2006
R457
51R
F5RAM3_LDM
F5RAM2_LDM
F5RAM1_LDMF5RAM1_UDM
F5RAM2_UDM
F5RAM3_UDM
51R51R51R51R51R51R51R
51R51R51R
R528R529R504
F5RAM4_CS*
R436
51RR80R676
F4RAM7_BA1F4RAM7_ADD<0>
51RR675F3RAM7_BA0F3RAM7_BA1
F3RAM7_CKE
F2RAM2_LDMF2RAM3_UDMF2RAM3_LDM
F2RAM2_UDMF2RAM1_LDMF2RAM1_UDM
R710R730R822R834R950
51R51R51R
51R
F2RAM1_CAS*
R810 51R
F3RAM1_ADD<3>
F3RAM1_ADD<4>
R914 51R51R
51R
51R
R22
F3RAM1_ADD<12>
R4951R
F3RAM1_CAS*
F3RAM4_ADD<4>
F3RAM4_ADD<2>
F3RAM4_ADD<0>
F3RAM4_BA1
F3RAM4_CK
F3RAM4_RAS*F3RAM4_CAS*
F3RAM4_CS*
F3RAM5_CKF3RAM5_CK*
F3RAM5_CAS*
F3RAM6_CK
F3RAM6_CKE
R934
F4RAM7_ADD<7>
R672
R696
R687
R666
51R
51R
51R51R51R51R
R444
R50851R
51R51R51R51R
51R
R526
R492
F4RAM4_ADD<3>
F4RAM4_ADD<11>
F2RAM1_ADD<12>
F2RAM1_ADD<11>
F2RAM1_ADD<9>
F2RAM1_ADD<10>
F2RAM1_ADD<8>
F2RAM1_ADD<7>
F2RAM1_ADD<6>
F2RAM1_ADD<5>
F2RAM1_ADD<4>
F2RAM1_ADD<3>
F2RAM1_ADD<2>
F2RAM1_ADD<1>
F2RAM1_ADD<0>
F2RAM1_BA1F2RAM1_BA0
F2RAM1_CKEF2RAM1_RAS*
R18
R826
R718
R84
R793
R689
R102
R608
R30
R832
R727
R79
R791
R98
R502
R606
R26
R830
R724
R74
R789
R685
R94
R500
R604
R828
R721
R69
R787
R683
R90
R498
R602
R78
R924R900R892
R852R876
R880
R757R758R884
R756
R776R804R800R790
R780
R888R896R784R796R680R692
R665
R686
R664
R700
R941
R81R82
R854
R41R939R42R940R43
R938R40
R853
R99R469R456
R448R452R428R432R440
R503
R525R524
R612R496
R600
R83
R893
R855R877
R901R925R881R885
R759
R761R760
R792R801
R777R805
R781R669R668
R688
R667
R697R701R673R677R85R87R86
R945R857
R47R944R46
R45R943
R856
R44R942
R103R473
R429R433R441
R453R449R527
R505R493
R512R652
R516R484
R568R556
R607
R653R654
R97R467
R624R632
R421R114R420
R96R466
R117R468R116R422R115
R118
R972R985R27
R956R948R928R968R964R868R869
R960R952R836
R732R824
R712
R870
R831R820R812R844R840
R770
R768R769
R725R708
R748R704
R742R25
R982
R983R24
R916R58R917R59R918R60R984
R62R61
R517R485
R655R513
R657R656
R569R557
R609
R633R625
R471R101
R470R100
R423
R424R119
R425R120
R121
R122R472
R123
R973R989R31
R949R957
R929
R965R969
R871R872R873
R833R821R813R845R841
R773
R771R772
R709R728
R749R705
R744R29R987R28R986R919R63R920R64R921
R988R65
R66R67
R889R897R785R797R681R693
R437R509
R445
R601
R497R613
R961R953R837
R733R825
R713
R73
R923R899R891
R849R875
R879
R754R755R883
R753
R775R803R799R788
R779
R887R895R783R795R679R691
R662
R684
R663
R661
R699R671
R695
R937
R76R77
R851
R75
R37R935R38R936R39
R36
R850
R95R465R455
R447R451R427R431R439
R501
R523R522R521
R491
R443R435R507
R611R495
R599
R511R649
R515R483
R567R555
R605
R650R651
R93R463
R623R631
R418R109R417
R92R462
R112R464R111R419R110
R113
R971R981R23
R955R947R927R967R963R865R866
R959R951R835
R731R823
R711
R867
R829R819R811R843R839
R767
R765R766
R722R707
R747R703
R740R21
R978
R979R20
R913R53
R54R915
R980
R57R56
R55
R874R846R68
R890R898R922R878R882R752R751
R886R894R782
R678R794
R690
R750
R786R798R802R774R778
R658
R660R659
R682R694
R670R698
R674R70
R848
R72R71
R933R35R932R34R931R33R847
R32R930
R454R461R91
R438R430R426R450R446R518R519
R442R434R506
R610R494
R598
R520
R499R490R482R514R510
R648
R646R647
R603R566
R630R554
R622R89
R458
R459R88
R414R104R415R105R416R106R460
R108R107
R954R946
R970R977
R926
R19
R966R962
R958
R862R863R864
R818R827
R842R838R762R763R764
R719R706
R746R702
R738R17R975R16
R910R974
R48R911
R976R50R912
R52R51
51R51R51R51R
51R51R51R
51R51R51R51R
51R
51R
F2RAM5_BA0
F5RAM2_CKF5RAM2_CK*F5RAM2_CKEF5RAM2_RAS*F5RAM2_CAS*
51R
F5RAM9_CAS*F5RAM9_RAS*F5RAM9_CKEF5RAM9_CK*F5RAM9_CKF5RAM9_BA0F5RAM9_BA1F5RAM8_CS*F5RAM8_WE*
51R 51R51R51R
F4RAM8_LDMF4RAM9_UDM
51R 51R51R
F3RAM8_UDMF3RAM7_LDMF3RAM7_UDM
51R51R
51R
F3RAM4_ADD<1>
F3RAM4_ADD<3>
F3RAM4_ADD<5>
F3RAM4_ADD<6>
F3RAM4_ADD<12>
F3RAM4_ADD<11>
F3RAM4_ADD<10>
F3RAM4_ADD<9>
F3RAM4_ADD<8>
F3RAM4_ADD<7>
F4RAM7_CKEF4RAM7_CK*F4RAM7_CKF4RAM7_BA0
F4RAM7_ADD<3>
F3RAM4_LDM
51R51R
51R51R51R51R51R51R51R
51R51R51R51R51R51R51R51R51R51R
51R51R51R
51R51R51R51R51R
51R51R51R
51R51R
51R51R51R
51R
F3RAM6_RAS*
F3RAM6_WE*F3RAM6_CS*
51R
51R51R
51R
F5RAM7_CAS*F5RAM7_RAS*F5RAM7_CKEF5RAM7_CK*F5RAM7_CK
51R
F2RAM4_ADD<10>
51R
F4RAM1_CK*
F4RAM1_ADD<8>
F4RAM1_ADD<7>
F4RAM1_ADD<6>
F4RAM1_ADD<5>
F3RAM3_UDMF3RAM2_LDM
51R
F3RAM2_BA051R
51R
51R
51R
F2RAM6_CKE
F2RAM2_CK
51R
F3RAM7_ADD<10>
51R
F3RAM8_LDM
F3RAM9_LDM
F4RAM8_CS*F4RAM8_WE*
51R
51R
F5RAM8_RAS*F5RAM8_CKEF5RAM8_CK*
51R
F4RAM7_CS*
F3RAM1_ADD<10>
F3RAM1_ADD<8>
51R
51R
51R
51R
F2RAM6_LDM
F3RAM9_UDM
F4RAM8_CAS*
F4RAM3_RAS*
F5RAM1_ADD<1>
F5RAM2_BA1
51R
F5RAM1_ADD<6>
F5RAM2_WE*F5RAM2_CS*F5RAM3_BA1
F5RAM3_CS*
F4RAM6_RAS*F4RAM6_CKE
F3RAM6_UDM
F3RAM8_CK*
F4RAM3_CAS*F4RAM3_WE*
F4RAM2_CKE
F4RAM2_CS*F4RAM3_BA1F4RAM3_BA0
F5RAM3_WE*
51R
51R
51R
F3RAM2_CKEF3RAM2_CK*
F3RAM1_CS*
F3RAM1_CKE
F3RAM1_ADD<0>
F3RAM2_CS*
F4RAM2_CK*
F4RAM2_RAS*F4RAM2_CAS*
F4RAM1_UDMF4RAM1_LDM
F4RAM2_LDMF4RAM3_UDM
F4RAM6_WE*
F3RAM4_BA0
F3RAM3_WE*F3RAM3_CAS*
F3RAM3_CK*F3RAM3_CKF3RAM3_BA0F3RAM3_BA1
F3RAM2_WE*
F2RAM2_RAS*F2RAM2_CKEF2RAM2_CK*
F2RAM2_BA0F2RAM2_BA1F2RAM1_CS*
51R
F3RAM2_CK
F2RAM3_RAS*F2RAM3_CKE
51R51R
51R
F2RAM2_CS*
F2RAM1_WE*
F2RAM2_CAS*F2RAM2_WE*
F2RAM3_CS*F2RAM3_WE*
F2RAM3_BA0F2RAM3_CK F4RAM3_CK
F4RAM3_CK*
F3RAM3_LDM
F3RAM1_UDM
F3RAM1_WE*
F3RAM1_CK*
51R51R51R
F2RAM3_CAS*
51R51R
51R51R
F2RAM4_ADD<2>
F2RAM4_ADD<1>
F2RAM4_ADD<12>
F2RAM4_ADD<11>
F2RAM5_CKF2RAM5_CK*F2RAM5_CKE
F2RAM6_CK*
F2RAM6_RAS*F2RAM6_CAS*F2RAM6_WE*F2RAM6_CS*
51R
F4RAM9_BA0
51R
51R
51R
51R
51R51R
51R
51R
51R
51R51R
51R
F3RAM4_CK*
F3RAM8_BA0
F3RAM8_WE*
F3RAM9_BA0
F3RAM9_CK*
F5RAM6_CK
F5RAM4_ADD<7>
F5RAM4_ADD<1>
F5RAM4_CKE
F5RAM5_CK*
F5RAM6_BA1
F2RAM4_BA1
51R
51R51R
F2RAM5_CS*F2RAM5_WE*F2RAM5_CAS*
F2RAM6_BA1F2RAM6_BA0F2RAM6_CK
51R51R51R
51R
51R
F2RAM7_LDMF2RAM8_UDM
F2RAM9_UDMF2RAM8_LDM
51R51RF2RAM7_CK
F2RAM7_BA0
51R
51R
51R51R51R
51R
51R51R
F4RAM1_ADD<10>
F4RAM1_ADD<11>
F3RAM1_LDM
F4RAM8_BA0
F4RAM3_CKE
F2RAM7_UDM
F2RAM9_LDM
51RF2RAM8_BA1F2RAM8_BA0
F2RAM7_CAS*F2RAM7_RAS*
51R51R
51R51R
51R51R
51R
51R51R
51R51R
51R51R
51R51R
51R51R
51R51R
51R51R
51R
51R51R
51R
F2RAM7_ADD<7>
F2RAM7_ADD<10>
51R
51R51R51R
F2RAM5_LDM
F3RAM7_WE*
F3RAM1_BA0
F4RAM6_CAS*
F4RAM7_ADD<1>
F5RAM4_ADD<12>
F5RAM4_ADD<11>
F5RAM4_CAS*
F5RAM3_CKF5RAM3_CK*
F5RAM3_RAS*
F4RAM5_BA1
51R
F3RAM6_LDM
F5RAM1_WE*F5RAM1_CS*
F5RAM2_BA0
F5RAM1_BA1
F5RAM1_CKF5RAM1_BA0
F5RAM1_CKE
F5RAM1_CAS*F5RAM1_RAS*
F5RAM3_BA0
F5RAM3_CKE
F5RAM3_CAS*
F5RAM4_LDMF5RAM5_UDM
F5RAM6_UDMF5RAM6_LDM
F5RAM5_LDM
F5RAM4_UDM
F5RAM4_WE*
F5RAM5_BA1F5RAM5_BA0F5RAM5_CK
F5RAM5_CKE
F5RAM4_BA0F5RAM4_BA1
F5RAM4_CKF5RAM4_CK*
F5RAM4_RAS*
F5RAM5_WE*F5RAM5_CS*
F5RAM6_CS*F5RAM6_WE*
F5RAM6_BA0
F5RAM6_CKEF5RAM6_CK*
F5RAM5_CAS*
F5RAM6_CAS*
F5RAM5_RAS*
F5RAM6_RAS*
F5RAM8_LDM
F5RAM7_UDMF5RAM7_LDMF5RAM8_UDM
F5RAM9_UDMF5RAM9_LDM
F5RAM7_WE*F5RAM7_CS*F5RAM8_BA1F5RAM8_BA0
F5RAM7_BA0F5RAM7_BA1
F5RAM9_WE*F5RAM9_CS*
F5RAM8_CK
F4RAM7_UDMF4RAM7_LDM
F4RAM9_LDM
F4RAM7_WE*F4RAM7_CAS*F4RAM7_RAS*
F4RAM8_CKE
F4RAM8_CK
F4RAM8_RAS*
F4RAM9_CK*
F4RAM9_CS*
F4RAM9_RAS*
F4RAM4_LDMF4RAM5_UDMF4RAM5_LDM
F4RAM6_LDMF4RAM6_UDM
F4RAM4_UDM
F4RAM4_WE*
F4RAM5_CKF4RAM5_CK*
F4RAM6_CKF4RAM6_BA0F4RAM6_BA1
F4RAM6_CK*
F4RAM6_CS*
F4RAM2_UDM
F4RAM1_CKE
F4RAM1_BA1
F4RAM1_CKF4RAM1_BA0
F4RAM1_RAS*
F4RAM1_CS*
F4RAM2_CKF4RAM2_BA0F4RAM2_BA1
F4RAM1_WE*
F4RAM2_WE*
F4RAM3_CS*
F3RAM2_UDM
F3RAM1_BA1
F3RAM4_UDM
F3RAM5_UDMF3RAM5_LDM
F3RAM4_CKE
F3RAM5_WE*F3RAM5_CS*
F3RAM5_RAS*
F3RAM7_CS*F3RAM8_BA1
F3RAM7_CKF3RAM7_CK*
F3RAM7_CAS*F3RAM7_RAS*
F3RAM8_CS*F3RAM9_BA1
F3RAM9_CK
F3RAM8_CK
F3RAM8_CKE
F3RAM8_CAS*F3RAM8_RAS*
F3RAM9_WE*F3RAM9_CS*
F3RAM9_CKE
F3RAM9_CAS*F3RAM9_RAS*
F2RAM7_CS*F2RAM7_WE*
F2RAM7_CKEF2RAM7_CK*
F2RAM8_WE*
F2RAM9_CS*F2RAM9_WE*
F2RAM8_CK*F2RAM8_CK
F2RAM8_CKE
F2RAM8_CS*
F2RAM9_BA0F2RAM9_BA1
F2RAM9_CK*F2RAM9_CK
F2RAM9_CKE
F2RAM8_CAS*
F2RAM9_CAS*
F2RAM8_RAS*
F2RAM9_RAS*
F2RAM4_UDMF2RAM4_LDMF2RAM5_UDM
F2RAM6_UDM
F2RAM4_CS*F2RAM4_WE*
F2RAM4_BA0
F2RAM4_CKEF2RAM4_CK*F2RAM4_CK
F2RAM5_BA1
F2RAM4_CAS*F2RAM4_RAS*
F2RAM5_RAS*
F2RAM3_CK*
F2RAM3_BA1
F2RAM4_ADD<8>
F2RAM4_ADD<5>
F2RAM4_ADD<3>
F2RAM4_ADD<9>
51R
F4RAM7_ADD<9>
51R
F5RAM1_ADD<10>
F5RAM1_ADD<8>
F5RAM1_ADD<7>
F5RAM1_ADD<4>
F5RAM1_ADD<3>
F5RAM1_ADD<2>
F5RAM1_ADD<0>
F5RAM4_ADD<8>
F5RAM4_ADD<6>
F5RAM4_ADD<5>
F5RAM4_ADD<4>
F5RAM4_ADD<3>
F5RAM4_ADD<2>
F5RAM4_ADD<0>
F5RAM7_ADD<12>
F5RAM7_ADD<11>
F5RAM7_ADD<10>
F5RAM7_ADD<9>
F5RAM7_ADD<8>
F5RAM7_ADD<7>
F5RAM7_ADD<6>
F5RAM7_ADD<5>
F5RAM7_ADD<4>
F5RAM7_ADD<3>
F5RAM7_ADD<2>
F5RAM7_ADD<1>
F5RAM7_ADD<0>
F4RAM7_ADD<12>
F4RAM7_ADD<10>
F4RAM7_ADD<6>
F4RAM7_ADD<5>
F4RAM7_ADD<4>
F4RAM7_ADD<2>
F4RAM4_ADD<10>
F4RAM4_ADD<9>
F4RAM4_ADD<8>
F4RAM4_ADD<7>
F4RAM4_ADD<6>
F4RAM4_ADD<5>
F4RAM4_ADD<4>
F4RAM4_ADD<2>
F4RAM1_ADD<9>
F4RAM1_ADD<4>
F4RAM1_ADD<3>
F4RAM1_ADD<2>
F4RAM1_ADD<1>
F4RAM1_ADD<0>
F3RAM1_ADD<11>
F3RAM1_ADD<9>
F3RAM1_ADD<7>
F3RAM1_ADD<6>
F3RAM1_ADD<2>
F3RAM1_ADD<1>
F3RAM7_ADD<8>
F3RAM7_ADD<6>
F3RAM7_ADD<4>
F3RAM7_ADD<2>
F3RAM7_ADD<1>
F2RAM7_ADD<9>
F2RAM7_ADD<8>
F2RAM7_ADD<6>
F2RAM7_ADD<5>
F2RAM7_ADD<4>
F2RAM7_ADD<3>
F2RAM7_ADD<2>
F2RAM7_ADD<1>
F2RAM7_ADD<0>
F2RAM4_ADD<7>
F2RAM4_ADD<6>
F2RAM4_ADD<4>
51R
51R
51R
51R
51R51R51R51R51R
51R
51R
51R
51R
51R
51R51R
51R
51R
51R51R
51R51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
F3RAM1_ADD<5>
51R51R51R
51R
F4RAM4_ADD<12>
F4RAM5_CAS*
F3RAM5_BA0
F3RAM5_CKE
F3RAM2_RAS*
F3RAM3_CKEF3RAM3_RAS*
F3RAM3_CS*
51R
F2RAM4_ADD<0>
51R
51R
51R51R51R
51R
F2RAM7_ADD<12>
51RF2RAM7_BA1 51R
51R
51R51R51R51R
F2RAM7_ADD<11> 51R51R
51R
51R
51R
51R
51R
51R
51R
F5RAM8_CAS*
F4RAM5_CS*
F4RAM5_RAS*
F5RAM4_ADD<9>
F5RAM4_ADD<10>
51R51R
51R
51R51R
51R
51R
51R
51R51R
51R
51R51R
51R
51R51R51R51R
51R
51R51R
51R
51R
51R
51R51R
51R
51R
51R51R51R51R
51R51R51R
51R
51R51R
51R51R51R51R
51R51R51R51R
51R51R51R
51R
51R
51R
51R51R
51R
51R
51R
51R51R
51R
51R
51R
51R51R
51R
51R
51R51R
51R
51R51R
51R
51R
51R51R
51R51R
51R
51R51R
51R51R
51R
51R51R
51R
51R
51R51R51R
51R
51R51R
51R51R
51R
51R51R
51R51R
51R51R51R51R
51R
51R
51R51R
51R
51R51R
51R
51R51R
51R51R
51R
51R51R51R51R51R
51R
51R
51R
51R51R
51R
51R
51R51R
51R
51R51R
51R
51R51R
51R
51R
51R51R
51R51R
51R
51R
51R
51R
51R
51R
51R
51R51R51R51R
51R51R
51R
51R51R
51R51R
51R51R
51R51R
51R51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R51R
51R
51R
51R51R51R51R51R51R
51R51R51R51R51R51R
51R
51R
51R51R
51R51R51R51R
51R51R
51R
51R
51R
51R
51R51R
51R
51R51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R
51R51R51R51R
51R
51R
51R
51R
51R51R
51R
51R
51R
51R
51R51R
51R51R51R
51R51R
51R51R
51R
51R
51R51R51R
51R
51R51R
51R51R
51R51R51R
51R51R
51R
51R
51R
51R
51R
51R
51R51R
51R
F4RAM4_BA0
F4RAM4_CKEF4RAM4_RAS*
F4RAM4_CS*
F4RAM5_BA0
F4RAM5_CKE
F4RAM5_WE*
F4RAM8_CK*
F4RAM9_BA1
F4RAM9_CK
F4RAM9_CKE
F4RAM9_CAS*F4RAM9_WE*
51R
51R
F3RAM6_BA1
51R
51R
F2RAM1_CK*F2RAM1_CK
F4RAM1_ADD<12>
51RF5RAM1_ADD<5>
F5RAM1_ADD<9>
F5RAM1_ADD<11>
F5RAM1_ADD<12>
F4RAM4_CAS*
F4RAM7_ADD<11>
F4RAM7_ADD<8>
F4RAM8_BA1
F4RAM8_UDM
51R
F4RAM3_LDM
51R
F4RAM4_ADD<1>
F4RAM4_ADD<0>
F4RAM4_BA1
F4RAM4_CKF4RAM4_CK*
51R
F3RAM1_RAS*
F3RAM1_CK
51R
51R
51R
51R
F3RAM4_WE*
F3RAM5_BA1
F3RAM6_BA0
F3RAM6_CK*
F3RAM6_CAS*
F3RAM7_ADD<12>
F3RAM7_ADD<11>
F3RAM7_ADD<9>
F3RAM7_ADD<7>
F3RAM7_ADD<5>
F3RAM7_ADD<3>
F3RAM7_ADD<0>
F3RAM2_CAS*
51RF3RAM2_BA1
51R
F4RAM1_CAS*
51RF5RAM1_CK*
51R
OFSHEET 41
LHCB - RICHUKL1 V2UNIVERSITY OF CAMBRIDGE HEP
PRODUCTION SERIES V2DRAWING
1V25C2
1V25C2
1V25B2
1V25B2
1V25A2
1V25A2
1V25C5
1V25C5
1V25B5
1V25B5
1V25A5
1V25A5
1V25C4
1V25C4
1V25B4
1V25B4
1V25A4
1V25A4
1V25C3
1V25C3
1V25B3
1V25B3
1V25A3
1V25A3
