UNIT IV INTRODUCTION TO 8051 MICROCONTROLLER

Difference between Microprocessor and Microcontroller

Microprocessor Micro Controller

Microprocessor is heart of Computer system. Micro Controller is a heart of embedded system.

It is just a processor. Memory and I/O components have to be connected externally

Micro controller has external processor along with internal memory and i/O components

Since memory and I/O has to be connected externally, the circuit becomes large.

Since memory and I/O are present internally, the circuit is small.

Cannot be used in compact systems and hence inefficient

Can be used in compact systems and hence it is an efficient technique

Cost of the entire system increases Cost of the entire system is low

Due to external components, the entire power consumption is high. Hence it is not suitable to used with devices running on stored power like batteries.

Since external components are low, total power consumption is less and can be used with devices running on stored power like batteries.

Most of the microprocessors do not have power saving features.

Most of the micro controllers have power saving modes like idle mode and power saving mode. This helps to reduce power consumption even further.

Since memory and I/O components are all external, each instruction will need external operation, hence it is relatively slower.

Since components are internal, most of the operations are internal instruction, hence speed is fast.

Microprocessor have less number of registers, hence more operations are memory based.

Micro controller have more number of registers, hence the programs are easier to write.

Microprocessors are based on von Neumann model/architecture where program and data are stored in same memory module

Micro controllers are based on Harvard architecture where program memory and Data memory are separate

Mainly used in personal computers Used mainly in washing machine, MP3 players

THE 8051 ARCHITECTURE

Introduction OF 8051

Salient features of 8051 microcontroller are given below.

Eight bit CPU

On chip clock oscillator

4Kbytes of internal program memory (code memory) [ROM]

128 bytes of internal data memory [RAM]

64 Kbytes of external program memory address space.

64 Kbytes of external data memory address space.

32 bi directional I/O lines

Two 16 Bit Timer/Counter :T0, T1

Full Duplex serial data receiver/transmitter

Four Register banks with 8 registers in each bank.

Sixteen bit Program counter (PC) and a data pointer (DPTR)

8 Bit Program Status Word (PSW)

8 Bit Stack Pointer

Five vector interrupt structure (RESET not considered as an interrupt.)

8051 CPU consists of 8 bit ALU with associated registers like accumulator ‘A’ , B register,

PSW, SP, 16 bit program counter, stack pointer.

ALU can perform arithmetic and logic functions on 8 bit variables.

In the following diagram, the system bus connects all the support devices to the CPU. The system bus

consists of an 8-bit data bus, a 16-bit address bus and bus control signals. All other devices like program

memory, ports, data memory, serial interface, interrupt control, timers, and the CPU are all interfaced

together through the system bus

CPU (Central Processor Unit): As you may be familiar that Central Processor Unit or CPU is the mind of

any processing machine. It scrutinizes and manages all processes that are carried out in the Microcontroller.

User has no power over the functioning of CPU. It interprets program printed in storage space (ROM) and

carries out all of them and do the projected duty. CPU manages different types of registers in 8051

microcontroller

Oscillator:

As we all make out that Microcontroller is a digital circuit piece of equipment, thus it needs timer for its

function. For this function, Microcontroller 8051 consists of an on-chip oscillator which toils as a time source

for CPU (Central Processing Unit).

Bus:

Fundamentally Bus is a group of wires which functions as a communication canal or mean for the transfer

Data. These buses comprise of 8, 16 or more cables. As a result, a bus can bear 8 bits, 16 bits all together.

There are two types of buses:

1. Address Bus: Microcontroller 8051 consists of 16 bit address bus. It is brought into play to address

memory positions. It is also utilized to transmit the address from Central Processing Unit to Memory.

2. Data Bus: Microcontroller 8051 comprise of 8 bits data bus. It is employed to cart data.

Interrupts

As its name suggests, Interrupt is a subroutine call that interrupts of the microcontrollers main operations or

work and causes it to execute any other program, which is more important at the time of operation.

The Microcontroller 8051 can be configured in such a way that it temporarily terminates or pause the main

program at the occurrence of interrupts. When a subroutine is completed, Then the execution of main program

starts. Generally five interrupt sources are there in 8051 Microcontroller. There are 5 vectored interrupts are

shown in below

INTO

TFO

INT1

TF1

R1/T1

MEMORY

The memory which is used to store the program of the microcontroller is known as code memory or

Program memory of applications. It is known as ROM memory of microcontroller also requires a memory to

store data or operands temporarily of the micro controller. The data memory of the 8051 is used to store data

temporarily for operation is known RAM memory. 8051 microcontroller has 4K of code memory or program

memory,that has 4KB ROM and also 128 bytes of data memory of RAM.

Input/Output Port

Normally microcontroller is used in embedded systems to control the operation of machines in the

microcontroller. Therefore, to connect it to other machines, devices or peripherals we require I/O interfacing

ports in the microcontroller interface. For this purpose microcontroller 8051 has 4 input, output ports to

connect it to the other peripherals

Timers/Counters

8051 microcontroller has two 16 bit timers and counters. These counters are again divided into a 8 bit register.

The timers are used for measurement of intervals to determine the pulse width of pulses.

PIN DIAGRAM

Pins 1 – 8:- recognized as Port 1. Different from other ports, this port doesn’t provide any other

purpose. Port 1 is a domestically pulled up, quasi bi directional Input/output port.

Pin 9:- As made clear previously RESET pin is utilized to set the micro-controller 8051 to its primary

values, whereas the micro-controller is functioning or at the early beginning of application. The

RESET pin has to be set elevated for two machine rotations.

Pins 10 – 17:- recognized as Port 3. This port also supplies a number of other functions such as timer

input, interrupts, serial communication indicators TxD & RxD, control indicators for outside memory

interfacing WR & RD, etc. This is a domestic pull up port with quasi bi directional port within.

Pins 18 and 19:- These are employed for interfacing an outer crystal to give system clock.

Pin 20:- Titled as Vss – it symbolizes ground (0 V) association.

Pins- 21-28:- recognized as Port 2 (P 2.0 – P 2.7) – other than serving as Input/output port, senior

order address bus indicators are multiplexed with this quasi bi directional port.

Pin- 29:- Program Store Enable or PSEN is employed to interpret sign from outer program memory.

Pin-30:- External Access or EA input is employed to permit or prohibit outer memory interfacing. If

there is no outer memory need, this pin is dragged high by linking it to Vcc.

Pin-31:- Aka Address Latch Enable or ALE is brought into play to de-multiplex the address data

indication of port 0 (for outer memory interfacing). Two ALE throbs are obtainable for every machine

rotation.

Pins 32-39: recognized as Port 0 (P0.0 to P0.7) – other than serving as Input/output port, low order

data & address bus signals are multiplexed with this port (to provide the use of outer memory

interfacing). This pin is a bi directional Input/output port (the single one in microcontroller 8051) and

outer pull up resistors are necessary to utilize this port as Input/output.

Pin-40: termed as Vcc is the chief power supply. By and large it is +5V DC.

REGISTERS IN 8051

The 8051 contains 34 general purpose or working registers.

Two of these Register A and B.

Register A(Accumulator) is a 8 bit register used by all arithmetic and logical operation. It can

store 8 bit operand before execution of an instruction. The immediate result is stored in the

accumulator register (Acc) after execution of instruction.

The B register is a register just for multiplication and division operation which requires more

register spaces for the product of multiplication and the quotient and the remainder for the

division.

Register Banks :00H to 1FH

Four register banks (Bank0, Bank1, Bank2 and Bank3) each of 8-bits (total 32 bytes) are

available. The default bank register is Bank0. The remaining Banks are selected with the help of RS0 and RS1

bits of PSW Register. Each bank consists of 8 general-purpose registers R0 through R7.

(R0,R1,R2,R3,R4,R5,R6, and R7)

SPECIAL FUNCTION REGISTER

Stack Pointer(SP):

It is 8bit register. It is byte addressable. When the data is to be place d on stack by push instruction,

the content of stack pointer is incremented by 1, and when data is retrieved from stack, content of stack of

stack pointer is decremented by 1.

Program Counter(PC):

The Program Counter (PC) is a 16bit address which tells the 8051 where the next instruction to execute is

found in memory. When the 8051 is initialized PC always starts at 0000 H and is incremented each time an

instruction is executed.

Data Pointer Register(DTPR):

It is a 16 bit register used to hold address of external or internal RAM where data is stored or result is to be

stored. It is used to store 16 bit data. It is divided into two 8bit registers, DPH data pointer higher order and

DPL-data pointer lower order.

PSW (PRGRAM STATUS WORD)

It is 8 bit register. It's address is D0H and it is bit and byte accessible. It has 4 conditional flags and 3 control

flags

Carry Flag(CY):During addition and subtraction any carry or bor row is generated then carry flag is set

otherwise carry flag resets. It is used in arithmetic, logical, jump, rotate and Boolean operations.

Auxiliary Carry Flag(AC): During addition and subtraction any carry or borrow is generated from

lower 4 bit to higher 4 bit then AC sets else it resets. It is used in BCD arithmetic operations.

F0 : User defined flag bit for general purpose.

Overflow Flag(OV):If signed arithmetic operations result exceeds more than 7 bit than OV flag sets else

resets. It is used in signed arithmetic operations only.

Parity Flag(P): If in the result even no. of ones'1' are present than it is called even parity and parity flag sets.

In the result odd no. of ones'1'are present than it is called odd parity and parity flag resets

RS1 and RS0 : REGISTER BANK SELECT

Timer Registers: These two 16 bit registers can be accessed as their lower and upper bytes. It contains two

timers. TL0 represents the lower byte of the timing register, TH0 represents the higher bytes of the timer

register 0. Similarly TL1 and TH1 represent lower and higher bytes of timing register 1.

Control Registers: The special function registers IP, OE, TMOD, TCON, SCON, and PCON contain

control and status information for interrupts, timers/counters and serial port.

Serial Data Buffer: The serial data buffer internally contains two independent registers. One of them is a

transmit buffer which is necessarily a parallel in serial out register. The other is called receive buffer which is

a serial in parallel out register. Loading a byte to the transmit buffer initiates serial transmission of that byte.

The serial buffer is identified as SBUF. If a byte is written into SBUF it initiates a serial transmission and if

the SBUF is read, it reads received serial data

P0, P1, P2, P3 (Port): This is input/output port0, port1, port2, port3. Each bit of this SFR corresponds to one

of the pins on the microcontroller. For example, bit0 of port0 is pin P0.0, bit 7 is in P0.7.Writing a value of

1 to a bit of this SFR will send a high level on the corresponding I/O pin where as a value of 0 will

bring it to a low level.

The 8051 oscillator and clock

The 8051 requires an external oscillator circuit. The oscillator circuit usually runs around

12MHz. The crystal generates 12M pulses in one second.

A machine cycle is minimum amount time must take by simplest machine instruction

An 8051 machine cycle consists of 12 crystal pulses (clock cycle).

The first 6 crystal pulses (clock cycle) is used to fetch the Opcode and the second 6 pulses are used to

perform the operation on the operands in the ALU.

This gives an effective machine cycle rate at 1MIPS (Million Instructions Per Second).

MEMORY ORGANIZATION

The 8051 has a separate memory space for code and data. It is called as Program memory and Data memory Program Memory (ROM) The executable program code is stored in this code memory. The code memory size is limited to 64Kbytes. The code memory is read only in normal operation and is programmed under special conditions. e.g. it is a PROM or a Flash RAM type of memory. When EA = 0, 64 K bytes is divided as 4K bytes of Internal Memory and 60 K bytes of external Memory. When EA = 1, 64 K bytes considered as external Memory. 8051 memory is organized so that data memory and program code memory can be two entirely different physical memory entities. Each has the same address ranges.

The internal program ROM occupies code address space 0000H to 0FFFH. The PC is normally used to address program code bytes from address 0000H to FFFFH. Program addresses higher than OFFFH which exceed the internal ROM capacity will cause the 8051 to automatically fetch code bytes from external memory, addresses 1000H to FFFFH by connecting the external access pin (EA) to ground.

Internal RAM organization(DATA MEMORY)

Register Banks: 00h to 1Fh. The 8051 uses 8 general-purpose registers R0 through R7 (R0, R1, R2, R3, R4, R5, R6, and R7). There are four such register banks. Selection of register bank can be done through RS1,RS0 bits of PSW. On reset, the default Register Bank 0 will be selected.

Bit Addressable RAM: 20h to 2Fh . The 8051 supports a special feature which allows access to bit variables. This is where individual memory bits in Internal RAM can be set or cleared. In all there are 128 bits numbered 00h to 7Fh. Being bit variables any one variable can have a value 0 or 1. A bit variable can be set with a command such as SETB and cleared with a command such as CLR. Example instructions are: SETB 25h ; sets the bit 25h (becomes 1) CLR 25h ; clears bit 25h (becomes 0) Note, bit 25h is actually bit 5 of Internal RAM location 24h. The Bit Addressable area of the RAM is just 16 bytes of Internal RAM located between 20h and 2Fh. General Purpose RAM: 30h to 7Fh. Even if 80 bytes of Internal RAM memory are available for general-purpose data storage, user should take care while using the memory location from 00 -2Fh since these locations are also the default register space, stack space, and bit addressable space. It is a good practice to use general purpose memory from 30 – 7Fh. The general purpose RAM can be accessed using direct or indirect addressing modes.

Special Function Registers (SFR)

The special function registers (SFRs)are mapped in the upper 128bytes of internal data memory address. The SFR registers are located within the Internal Memory in the address range 80H to FFH Each SFR has a very specific function. Each SFR has an address (within the range 80H to FFH) and a name which reflects the purpose of the SFR. The SFRs are accessed by direct addressing only. Some SFRs are also bit addressable as is the case for the bit area of RAM.

CPU registers: - ACC : Accumulator. - B : B register. - PSW : Program Status Word. - SP : Stack Pointer. - DPTR : Data Pointer (DPH, DPL).

Interrupt control:

-IE Interrupt Enable.

-IP: Interrupt Priority.

I/O Ports: - P0 – port 0 - P1 – port 1 - P2 - port 2 - P3 - port 3

- Timers: - - TMOD - : Timer mode.

- TCON - TH0 - TL0 - TH1 - TL1

- : Timer control. - : Timer 0 high byte. - : Timer 0 low byte. - : Timer 1 high byte. - : Timer 1 low byte.

- Serial I/O: - - SCON - : Serial port control.

- - - SBUF - : Serial data registers.

- Other: - - PCON - : Power control

I/O PORT PINS, PORTS AND CIRCUITS

8051 microcontrollers have 4 I/O ports each comprising of 8 bits which can be configured as inputs or outputs. Accordingly, total of 32 input/output pins enabling the microcontroller to be connected to peripheral devices that are available for use. Each port of 8051 has bidirectional capability. Port1, 2, 3 are called 'quasi bidirectional port' PORT 0

- Port 0 is a dual purpose port, it is located from pin 32 to pin 39 (8 pins).

- To use this port as both input/output ports each pin must be connected externally to pull-up resistor.

- As an I/O port. - Alternate functions:

As a multiplexed data bus. 8-bit instruction bus, strobed by PSEN. Low byte of address bus, strobed by ALE. 8-bit data bus, strobed by WR and RD. PORT 1

- Port 1 is a dedicated I/O port from pin 1 to pin 8.

- Upon reset it is configured as outport. - It is generally used for interfacing to external device - thus if you need to connect to switches or LEDs, you could make use of these 8 pins,

- but it doesn’t need any pull- up resistors as it is having internally - As an I/O port: Standard quasi-bidirectional.

PORT 2 - Like port 0, port 2 is a dual-purpose port.(Pins 21 through 28) - It can be used for general I/O or as the high byte of the address bus for designs with external

code memory. - Like P1 ,Port2 also doesn’t require any pull-up resistors - As an I/O port:

Standard quasi-bidirectional. - Alternate functions: High byte of address bus for externalprogram and data memory accesses. PORT 3

- Port 3 is also dual purpose but designers generally avoid using this port unnecessarily for I/O because the pins have alternate functions which are related to special features of the 8051.

- Indiscriminate use of these pins may interfere with the normal operation of the 8051. - As an I/O port It is Standard quasi-bidirectional.

- Alternate functions: Serial I/O - TXD, RXD Timer clocks T0, T1 Interrupts INT0, INT1 Data memory- RD, WR I/O Port structure

The internal circuitry for the I/O port is shown in the figure

If you want to read in from a pin, you must first give a logic ‘1’ to the port latch to turn off the FET otherwise the data read in will always be logic ‘0’.

When you write to the port you are actually writing to the latch e.g. a logic 0 given to the latch will be inverted and turn on the FET which cause the port pin to be connected to Gnd (logic 0).

ADDRESSING MODES

Various methods of accessing the data are called addressing modes. 8051 addressing modes are

classified as follows.

1. Immediate addressing.

2. Register addressing.

3. Direct addressing.

4. Indirect addressing.

5. Register specific

6. Indexed addressing.

IMMEDIATE ADDRESSING.

In this addressing mode the data is provided as a part of instruction itself. In other words

data immediately follows the instruction.

Eg.

MOV A,#30H ADD A, #83

# Symbol indicates the data is immediate.

REGISTER ADDRESSING. In this addressing mode the register will hold the data. One of the eight general registers (R0 to R7) can be used and specified as the operand.

Eg.

MOV A,R0 ADD A,R6

R0 – R7 will be selected from the current selection of register bank. The default register bank will be

bank 0.

DIRECT ADDRESSING There are two ways to access the internal memory. Using direct address and indirect address. Using direct addressing mode we can not only address the internal memory but SFRs also. In direct addressing, an 8 bit internal data memory address is specified as part of the instruction and hence, it can specify the address only in the range of 00H to FFH. In this addressing mode, data is obtained directly from the memory.

Eg.

MOV A,60h ADD A,30h

INDIRECT ADDRESSING

The indirect addressing mode uses a register to hold the actual address that will be used in data

movement. Registers R0 and R1 and DPTR are the only registers that can be used as data pointers.

Indirect addressing cannot be used to refer to SFR registers. Both R0 and R1 can hold 8 bit address and

DPTR can hold 16 bit address.

Eg. MOV A,@R0

ADD A,@R1

MOVX A,@DPTR

INDEXED ADDRESSING. In indexed addressing, either the program counter (PC), or the data pointer (DTPR)—is used to hold the base address, and the A is used to hold the offset address. Adding the value of the base address to the value of the offset address forms the effective address. Indexed addressing is used with JMP or MOVC instructions. Look up tables are easily implemented with the help of index addressing.

MOVC A, @A+DPTR

// copies the contents of memory location pointed by the sum of the accumulator A and the DPTR into accumulator A.

MOVC A, @A+PC // copies the contents of memory location pointed by the sum of the accumulator A and the program counter into accumulator A.

REGISTER SPECIFIC ADDRESSING

In this addressing mode the operand specifying one of the register. Some of the instruction always

operates only a specific register.

RL A – this instruction rotate accumulator to left

SWAP A – Swap nibbles with in ACC.

8051 INSTRUCTIONS

The instructions of 8051 can be broadly classified under the following headings.

1. Data transfer instructions

2. Arithmetic instructions

3. Logical instructions

4. Branch & loop instructions (program flow control)

5. Bit manipulation instructions

DATA TRANSFER INSTRUCTIONS.

In this group, the instructions perform data transfer operations of the following types.

a. Move the contents of a register Rn to A

i. MOV A,R2

ii. MOV A,R7

b. Move the contents of a register A to Rn

i. MOV R4,A

ii. MOV R1,A

c. Move an immediate 8 bit data to register A or to Rn or to a memory location(direct or indirect)

i. MOV A, #45H

ii. MOV R6, #51H

iii. MOV 30H, #44H

iv. MOV @R0, #0E8H

v. MOV DPTR, #0F5A2H

d. Move the contents of a memory location to A or A to a memory location using direct and indirect

addressing

i. MOV A, 65H

ii. MOV A, @R0

iii. MOV 45H, A

iv. MOV @R1, A

e. Move the contents of a memory location to Rn or Rn to a memory location using direct addressing

i. MOV R3, 65H

ii. MOV 45H, R2

f. Move the contents of memory location to another memory location using direct and indirect

addressing

i. MOV 47H, 65H

ii. MOV 45H, @R0

g. Move the contents of an external memory to A or A to an external memory

i. MOVX A,@R1

ii. MOVX @R0,A

iii. MOVX A,@DPTR

iv. MOVX@DPTR,A

h. Move the contents of program memory to A

i. MOVC A, @A+PC

ii. MOVC A, @A+DPTR

I. PUSH AND POP INSTRUCTIONS [SP]=07 //CONTENT OF SP IS 07 (DEFAULT VALUE) MOV R6, #25H [R6]=25H //CONTENT OF R6 IS 25H

MOV R1, #12H [R1]=12H //CONTENT OF R1 IS 12H

MOV R4, #0F3H [R4]=F3H //CONTENT OF R4 IS F3H

PUSH 6 PUSH 1 PUSH 4

[SP]=08 [SP]=09 [SP]=0A

[08]=[06]=25H //CONTENT OF 08 IS 25H [09]=[01]=12H //CONTENT OF 09 IS 12H [0A]=[04]=F3H //CONTENT OF 0A IS F3H

POP 6 POP 1 POP 4

[06]=[0A]=F3H [SP]=09 [01]=[09]=12H [SP]=08 [04]=[08]=25H [SP]=07

//CONTENT OF 06 IS F3H //CONTENT OF 01 IS 12H //CONTENT OF 04 IS 25H

J. EXCHANGE INSTRUCTIONS

The content of source ie., register, direct memory or indirect memory will be exchanged

with the contents of destination ie., accumulator.

i. XCH A,R3

ii. XCH A,@R1

iii. XCH A,54h

k. Exchange digit. Exchange the lower order nibble of Accumulator (A0-A3) with lower

order nibble of the internal RAM location which is indirectly addressed by the register.

i. XCHD A,@R1

ii. XCHD A,@R0

ARITHMETIC INSTRUCTIONS. The 8051 can perform addition, subtraction. Multiplication and division operations on 8 bit numbers.

ADDITION In this group, we have instructions to i. Add the contents of A with immediate data with or without carry. i. ADD A, #45H ii. ADDC A, #OB4H ii. Add the contents of A with register Rn with or without carry. i. ADD A, R5 ii. ADDC A, R2 iii. Add the contents of A with contents of memory with or without carry using direct and indirect addressing i. ADD A, 51H ii. ADDC A, 75H iii. ADD A, @R1 iv. ADDC A, @R0 CY AC and OV flags will be affected by this operation.

SUBTRACTION In this group, we have instructions to i. Subtract the contents of A with immediate data with or without carry. i. SUBB A, #45H ii. SUBB A, #OB4H ii. Subtract the contents of A with register Rn with or without carry. i. SUBB A, R5 ii. SUBB A, R2 iii. Subtract the contents of A with contents of memory with or without carry using direct and indirect addressing i. SUBB A, 51H ii. SUBB A, 75H iii. SUBB A, @R1 iv. SUBB A, @R0 CY AC and OV flags will be affected by this operation.

MULTIPLICATION MUL AB. This instruction multiplies two 8 bit unsigned numbers which are stored in A and B

register. After multiplication the lower byte of the result will be stored in accumulator and higher byte of result will be stored in B register.

Eg.

MOV A,#45H MOV B,#0F5H MUL AB

;[A]=45H ;[B]=F5H ;[A] x [B] = 45 x F5 = 4209 ;[A]=09H, [B]=42H

DIVISION

DIV AB. This instruction divides the 8 bit unsigned number which is stored in A by the 8 bit unsigned number which is stored in B register. After division the result will be stored in accumulator and remainder will be stored in B register.

Eg.

MOV A,#45H MOV B,#0F5H DIV AB

;[A]=0E8H ;[B]=1BH ;[A] / [B] = E8 /1B = 08 H with remainder 10H ;[A] = 08H, [B]=10H

DA A (Decimal Adjust After Addition). When two BCD numbers are added, the answer is a non-BCD number. To get the result in BCD, we use DA A instruction after the addition. DA A works as follows. If lower nibble is greater than 9 or auxiliary carry is 1, 6 is added to lower nibble. If upper nibble is greater than 9 or carry is 1, 6 is added to upper nibble.

Eg 1:

MOV A,#23H MOV R1,#55H ADD A,R1 DA A

// [A]=78 // [A]=78

no changes in the accumulator after DAA

Eg 2:

MOV A,#53H MOV R1,#58H ADD A,R1 DA A

// [A]=ABh // [A]=11, C=1 . ANSWER IS 111. Accumulator data is changed after DAA

INCREMENT: increments the operand by one. INC A, INC Rn, INC DIRECT, INC @Ri, INC DPTR INC increments the value of source by 1. If the initial value of register is FFh, incrementing the value will cause it to reset to 0. The Carry Flag is not set when the value "rolls over" from 255 to 0. In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If the initial value of DPTR is FFFFh, incrementing the value will cause it to reset to 0. DECREMENT: decrements the operand by one. DEC A ,DEC Rn, DEC DIRECT, DEC @Ri DEC decrements the value of source by 1. If the initial value of is 0, decrementing the value will cause it to reset to FFh. The Carry Flag is not set when the value "rolls over" from 0 to FFh. LOGICAL INSTRUCTIONS LOGICAL AND

ANL destination, source: ANL does a bitwise "AND" operation between source and destination, leaving the resulting value in destination.

ANL A,#DATA, ANL A, Rn

ANL A,DIRECT , ANL A,@Ri

ANL DIRECT,A , ANL DIRECT, #DATA

LOGICAL OR

ORL destination, source: ORL does a bitwise "OR" operation between source and destination leaving the

resulting value in destination. The value in source is not affected. " OR " instruction logically OR the bits

of source and destination.

ORL A,#DATA , ORL A, Rn

ORL A,DIRECT ,ORL A,@Ri

ORL DIRECT,A ,ORL DIRECT, #DATA

Logical Ex-OR

XRL destination, source:

XRL does a bitwise "EX-OR" operation between source and destination, leaving the resulting value in destination. The value in source is not affected. " XRL " instruction logically EX-OR the bits of source and destination.

XRL A,#DATA XRL A,Rn

XRL A,DIRECT XRL A,@Ri

XRL DIRECT,A XRL DIRECT, #DATA

LOGICAL NOT

CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the bit

will be reversed. If operand is the Accumulator then all the bits in the Accumulator will be

reversed.

CPL A, CPL C, CPL bit address

SWAP A – Swap the upper nibble and lower nibble of A.

ROTATE INSTRUCTIONS

RR A

This instruction is rotate right the accumulator. Its operation is illustrated below. Each bit is shifted one

location to the right, with bit 0 going to bit 7.

RL A

Rotate left the accumulator. Each bit is shifted one location to the left, with bit 7 going to bit 0

RRC A

Rotate right through the carry. Each bit is shifted one location to the right, with bit 0 going into the carry

bit in

the PSW, while the carry was at goes into bit 7

RLC A

Rotate left through the carry. Each bit is shifted one location to the left, with bit 7 going into the carry bit

in

the PSW, while the carry goes into bit 0.

BRANCH (JUMP & CALL) INSTRUCTIONS (program flow control instruction )

BIT JUMP INSTRUCTIONS. (CONDITIONAL)

JZ Relative Address Jump if Zero

JNZ Relative Address Jump if Not Zero

JC Relative Address Jump if C set

JNC Relative Address Jump if C not set

JB bit,Relative Address Jump if specified bit set

JNB bit,Relative Address Jump if specified bit not set

JBC bit,Relative Address if specified bit set, clear it and jump

UNCONDITIONAL JUMP

AJMP addr11 Absolute jump

LJMP addr16 Long jump

SJMP Relative Address Short jump

JMP @A+DPTR Jump indirect

CALL INSTRUCTION

ACALL addr11 Absolute subroutine call

LCALL addr16 Long subroutine call

RET Return from subroutine

BYTE JUMP

CJNE A,direct,rel Compare and Jump if Not Equal

CJNE A,#data,rel Compare and Jump if Not Equal

CJNE Rn,#data,rel Compare and Jump if Not Equal

CJNE @Ri,#data,rel Compare and Jump if Not Equal

DJNZ Rn,Relative Address Decrement and Jump if Not Zero

DJNZ direct,Relative Address Decrement and Jump if Not Zero

NOP No Operation

BIT MANIPULATION INSTRUCTIONS.

8051 has 128 bit addressable memory. Bit addressable SFRs and bit addressable PORT pins. It is

possible to

perform following bit wise operations for these bit addressable locations.

1. LOGICAL AND

a. ANL C,BIT(BIT ADDRESS) ; ‘LOGICALLY AND’ CARRY AND CONTENT OF BIT ADDRESS, STORE

RESULT IN CARRY

b. ANL C, /BIT; ; ‘LOGICALLY AND’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE

RESULT IN CARRY

2. LOGICAL OR

a. ORL C,BIT(BIT ADDRESS) ; ‘LOGICALLY OR’ CARRY AND CONTENT OF BIT ADDRESS, STORE RESULT

IN CARRY

b. ORL C, /BIT; ; ‘LOGICALLY OR’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE

RESULT IN CARRY

3. CLR bit

a. CLR bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE CLEARED.

b. CLR C ; CONTENT OF CARRY WILL BE CLEARED.

4. CPL bit

a. CPL bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE COMPLEMENTED.

b. CPL C ; CONTENT OF CARRY WILL BE COMPLEMENTED.

INTERRUPTS Of 8051

During program execution if peripheral devices needs service from microcontroller, device will

generate interrupt and gets the service from microcontroller. When peripheral device activate the interrupt

signal, the processor branches to a program called interrupt service routine. After executing the interrupt

service routine the processor returns to the main program.

INTERRUPT STRUCTURE.

8051 has five interrupts. They are maskable and vectored interrupts. Out of these five, two are external

interrupt and three are internal interrupts.

Timer 0 overflow: This is indicated by TF0 in TCON, being set

Timer 1 overflow: This is indicated by TF1 in TCON, being set

Serial port interrupts (RI and TI): Whenever a data byte is received, an interrupt bit, RI is set to 1 in

SCON register. When a data byte is transmitted an interrupt bit TI, is set in SCON. These flags must be reset

by software instruction to enable the next data communication operation.

External signal at pin INTO (P3.2): When a high-to-low edge signal is received on P3.2, the external

interrupt 0 edge flag IE0 (TCON.1) is set. This flag is cleared when the processor branches to the subroutine.

When the external interrupt signal control bit IT0 (TCON.0) is set to 1 (by program) then interrupt is triggered

by falling edge signal. If IT0 is 0, a low -level signal in INTO triggers the interrupt.

External signal at pin INT1 (P3.3): Flags IE1 (TCON.3) and IT1 (TCON.2) are similar to IE0 and IT0 in

function.

8051 makes use of two registers to deal with interrupts.

1. IE Register

This is an 8 bit register used for enabling or disabling the interrupts. The structure of IE register is

shown below.

- EA : Global interrupt enable.

- ES : Enable serial port interrupt

- ET1 : Timer 1 overflow interrupt.

- EX1 : External interrupt 1.

- ET0 : Timer 0 overflow interrupt.

- EX0 : External interrupt 0.

- 0 = Disabled.

- 1 = Enabled.

2. IP Register.

This is an 8 bit register used for setting the priority of the interrupts.

- PS : Serial interface.

- PT1 : Timer 1.

- PX1 : External interrupt 1.

- PT0 : Timer 0.

- PX0 : External interrupt 0.

- 0 = Low priority.

- 1 = High priority.

-

TIMERS AND COUNTERS

Timers/Counters are used generally for

Time reference

Creating delay

Wave form properties measurement

Periodic interrupt generation

Waveform generation

Baud rate measurement

Two 16-bit up counters, named T0 and T1, are provided for the general use of the programmer.

Each counter may be programmed to count internal clock pulses, acting as a timer, or programmed to

count external pulses as a counter.

The counters are divided into two 8-bit registers called the timer low (TL0,TL1) and high (TH0, TH1)

bytes.

All counter action is controlled by bit states in the timer mode control register (TMOD), the

timer/counter control register (TCON) and certain program instructions.

EA ---- ---- ES ET1 EX1 ET0 EX0

----- ----- ----- PS PT1 PX1 PT0 PX0

TMOD is dedicated to the two timers and can be consider two duplicate 4-bit registers, each of which

controls the action of the timers.

TCON has control bits and flags for the timers in the upper control bits and flags for the external

interrupts in the lower nibble.

TIMER/COUNTERS: BLOCK SCHEMATIC

TCON (Counter/Timer

Control Register)

TMOD

TIMER MODES

Timers can operate in four different modes. They are as follows

Timer Mode-0: In this mode, the timer is used as a 13-bit UP counter as follows.

Fig. Operation of Timer on Mode-0

The lower 5 bits of TLX and 8 bits of THX are used for the 13 bit count.Upper 3 bits of TLX are

ignored. When the counter rolls over from all 0's to all 1's, TFX flag is set and an interrupt is

generated. The input pulse is obtained from the previous stage. If TR1/0 bit is 1 and Gate bit is 0, the counter

continues counting up. If TR1/0 bit is 1 and Gate bit is 1, then the operation of the counter is

controlled by input. This mode is useful to measure the width of a given pulse fed to input.

Timer Mode-1: This mode is similar to mode-0 except for the fact that the Timer operates in 16-bit

mode.

Timer Mode-2: (Auto-Reload Mode): This is a 8 bit counter/timer operation. Counting is performed in

TLX while THX stores a constant value. In this mode when the timer overflows i.e. TLX becomes FFH, it is

fed with the value stored in THX. For example if we load THX with 50H then the timer in mode 2 will count

from 50H to FFH. After that 50H is again reloaded. This mode is useful in applications like fixed time

sampling.

Timer Mode-3: Timer 1 in mode-3 simply holds its count. The effect is same as setting TR1=0.

Timer0 in mode-3 establishes TL0 and TH0 as two separate counters. Control bits TR1 and TF1 are used by

Timer-0 (higher 8 bits) (TH0) in Mode-3 while TR0 and TF0 are available to Timer-0 lower 8 bits(TL0).

SERIAL COMMUNICATION.

DATA COMMUNICATION

The 8051 microcontroller is parallel device that transfers eight bits of data simultaneously over eight data

lines to parallel I/O devices. Parallel data transfer over a long is very expensive. Hence, a serial

communication is widely used in long distance communication. In serial data communication, 8-bit data

is converted to serial bits using a parallel in serial out shift register and then it is transmitted over a single

data line. The data byte is always transmitted with least significant bit first.

Types of Serial communication:

Serial data communication uses two types of communication.

1. Synchronous serial data communication: In this transmitter and receiver are synchronized. It uses a

common clock to synchronize the receiver and the transmitter. First the synch character is sent and then the

data is transmitted. This format is generally used for high speed transmission. In Synchronous serial data

communication a block of data is transmitted at a time.

2. Asynchronous Serial data transmission: In this, different clock sources are used for transmitter and receiver.

In this mode, data is transmitted with start and stop bits. A transmission begins with start bit, followed by data

and then stop bit. For error checking purpose parity bit is included just prior to stop bit. In Asynchronous

serial data communication a single byte is transmitted at a time.

8051 SERIAL COMMUNICATION

The 8051 supports a full duplex serial port.

Three special function registers support serial communication.

1. SBUF Register: Serial Buffer (SBUF) register is an 8-bit register. It has separate SBUF registers for

data transmission and for data reception. For a byte of data to be transferred via the TXD line, it must be

placed in SBUF register. Similarly, SBUF holds the 8-bit data received by the RXD pin and read to

accept the received data.

2. SCON register: The contents of the Serial Control (SCON) register are shown below. This register

contains mode selection bits, serial port interrupt bit (TI and RI) and also the ninth data bit for transmission and

reception (TB8 and RB8).

SCON : Serial Control Register

SM0, SM1 = Serial Mode:

00 = Mode 0 : Shift register I/O expansion.

01 = Mode 1 : 8-bit UART with variable baud rate.

10 = Mode 2 : 9-bit UART with fixed baud rate.

11 = Mode 3 : 9-bit UART with variable baud rate. - SM2 : It enables the multiprocessor communication feature in Mode 2 & Mode 3

- REN = Enables receiver.

- TB8 = Ninth bit transmitted (in modes 2 and 3).

- RB8 = Ninth bit received:

SM0 , SM1

These two bits of SCON register determine the framing of data by specifying the number of bits per

character and start bit and stop bits. There are 4 serial modes.

Mode - 0 Shift Register Mode.

In this mode, the serial port works like a shift register and the data transmission works synchronously

with a clock frequency of fosc/12. Serial data is received and transmitted through RXD and TXD. 8 bits are

transmitted/ received at any t ime. Pin TXC outputs the shift clock pulses of frequency fosc/12, which is

connected to the external circuitry for

synchronization. The shift frequency or baud rate is always 1/12 of the oscillator frequency.

Mode –1 8 bit UART .

In mode-1, the serial port functions as a standard Universal Asynchronous Receiver Transmitter

(UART) mode. 10 bits are transmitted through TXD or received through RXD. The 10 bits consist of one

start bit (which is usually '0'), 8 data bits (LSB is sent first/received first), and a stop bit (which is usually

'1'). Oncereceived, the stop bit goes into RB8 in the special function register SCON. The baud rate is

variable

Baud rate = [2smod/32] x [Oscillator Clock Frequency] / [12 x [256 – [TH1]]]

Mode - 2 Multiprocessor Mode. 9 Bit UART

11 bits are transmitted through TXD or received through RXD, a start bit (0), 8 data bits (LSB first),

a programmable 9th bit and a stop bit(1).On transmission, the 9th data bit (TB8 in SCON) can be assigned the

value 0 or 1. Or, for example, the parity bit (P in the PSN) could be moved into TB8. On receive, the 9th bit

goes into RB8 in SFR SCON, which the stop bit is ignored. The bandwidth is programmable to either

1/32 or 1/64 of oscillator frequency

Baud rate = [2smod /64 or 64] x Oscillator Clock Frequency

Mode – 3 9 Bit UART

11 bits are transmitted through TXD or received through RXD: a start bit, 8 data bits (LSB first), a

programmable 9th bit, and a stop bit (1). In fact, Mode 3 is same as Mode 2 in all respects except the band rate.

The band rate in Mode 3 is variable.

Power Mode Control Register

Register PCON controls processor power down, sleep modes and serial data baud rate. Only one bit of PCON

is used with respect to serial communication. The seventh bit (b7)(SMOD) is used to generate the baud rate of

serial communication.