Ucalgary 2015 Hossainloba Tahsina

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UNIVERSITY OF CALGARY

Improving Inverter Efficiency at Low Power Using a Reduced Switching Frequency

by

Tahsina Hossain Loba

A THESIS

SUBMITTED TO THE FACULTY OF GRADUATE STUDIES

IN PARTIAL FULFILMENT OF THE REQUIREMENTS FOR THE

DEGREE OF MASTER OF SCIENCE

GRADUATE PROGRAM IN MECHANICAL AND MANUFACTURING

ENGINEERING

CALGARY, ALBERTA

SEPTEMBER, 2015

© Tahsina Hossain Loba 2015


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Abstract

The inverter is a major component of a renewable energy system and its performance affects

the overall performance of the system. For typical household applications in rural areas, often

there is need to operate at low power conditions where inverter efficiency can drop

dramatically. Efficient operation at low power is important especially for stand-alone solar

systems in developing countries where system cost must be kept low. In this thesis, the impact

of switching frequency upon switching loss for a SPWM inverter is investigated. Results,

from mathematical modeling, simulation and experimental implementation, show the same

trend that reducing the switching frequency reduces switching loss at low power levels thus

improves inverter efficiency. This may result in a reduced PV module size requirement and

thus lower system cost. The inverter proposed in the thesis operates efficiently at low power

(e.g. 9W) as well as at rated power conditions (e.g. 200W).


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Acknowledgements

In the name of Allah, the Most Beneficent, the Most Merciful.

I am highly grateful to my supervisor, Dr. David Wood, and co-supervisor Dr. Ed Nowicki

for their kind support, invaluable advice, readiness to have meetings frequently throughout

the period I have been doing research work. I am thankful to them for believing in me and

supporting me morally and intellectually when I was struggling with my experiments.

I am also thankful to my colleagues for their continuous inspiration.

I am most thankful to Allah who helped me at every stage during the course of my research

work and life.


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Dedication

I dedicate this thesis work to my beloved husband, Wali, who constantly supported me

through the entire time I spent in this master’s program. Without his help and support, it

would not have been possible to complete the degree.


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Table of Contents

Abstract ............................................................................................................................... ii

Acknowledgements ............................................................................................................ iii

Dedication .......................................................................................................................... iv

Table of Contents ................................................................................................................. v

List of Tables .................................................................................................................... vii

List of Figures and Illustrations ....................................................................................... viii

List of Symbols, Abbreviations and Nomenclature ............................................................. x

CHAPTER ONE: INTRODUCTION .................................................................................. 1

1.1 Problem Statement ..................................................................................................... 1

1.2 Background and Motivation ...................................................................................... 2

1.3 Objective of the Thesis .............................................................................................. 4

1.4 Scope of the Thesis .................................................................................................. 5

1.5 Thesis Outline .......................................................................................................... 6

CHAPTER TWO: LITERATURE REVIEW ...................................................................... 8

2.1 DC/AC Power Inverter ............................................................................................ 8

2.2 Categorizing Power Inverters .................................................................................. 8

2.2.1 Modified Sine Wave Inverters ........................................................................... 9

2.3 Full Bridge Inverter ............................................................................................... 11

2.4 Pulse Width Modulation ........................................................................................ 12

2.4.1 SPWM Switching Techniques ......................................................................... 15

2.4.1.1 SPWM with Bipolar Switching .............................................................. 15

2.4.1.2 SPWM with Unipolar Switching ............................................................ 17

2.5 Advantages of using Unipolar SPWM ................................................................... 20 2.6 Overview of the Related Work .............................................................................. 20

2.7 Chapter Summary .................................................................................................. 24

CHAPTER THREE: INVERTER LOSS MODEL AND DESIGN CONSIDERATIONS25

3.1 Introduction ............................................................................................................ 25

3.2 Full Voltage Design and Scaled Down Design ..................................................... 26

3.3 Proposed Inverter Topology .................................................................................. 27

3.4 Inverter Loss Components based on Loss Model .................................................. 28

3.4.1 Conduction Losses ........................................................................................... 30

3.4.2 Switching Losses ............................................................................................. 34

3.4.3 IGBT Gate Drive Losses .................................................................................. 36 3.5 Inverter Efficiency Calculation .............................................................................. 37

3.6 Chapter Summary .................................................................................................. 43

CHAPTER FOUR: SIMULATION RESULTS FOR PROPOSED FULL BRIDGE

INVERTER ............................................................................................................... 44

4.1 Schematic of the Full Bridge Inverter System under Study .................................... 44


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4.2 Simulation Circuit Description ................................................................................ 45

4.2.1 SPWM Controller ............................................................................................ 45

4.2.2 Gate Drive Circuit ............................................................................................ 47

4.2.3 IGBT Switching Circuit ................................................................................... 48

4.2 Different Load Conditions ....................................................................................... 51

4.3 Simulation Results ................................................................................................... 56

4.4 Chapter Summary .................................................................................................... 60

CHAPTER FIVE: EXPERIMENTAL RESULTS ........................................................... 61

5.1 Introduction .............................................................................................................. 61

5.2 Hardware Overview ............................................................................................... 62

5.2.1 Power Supply for Transistor Drive Circuit ...................................................... 65

5.2.2 Isolation Circuit ............................................................................................... 65

5.2.3 Optocoupler Circuit Operation ........................................................................ 66

5.2.4 Full Bridge Inverter Circuit ............................................................................. 68

5.2.5 Snubber Circuit ................................................................................................ 70

5.2.6 RC Snubber ...................................................................................................... 70

5.3 Load Modeling and Load Value Calculations ....................................................... 73

5.3.1 Determination of Component values for Light Load (CFL) Model ................ 74

5.3.2 Heavy Load Model Calculations ..................................................................... 78

5.3.3 Current Sense Resistors .................................................................................. 82

5.4 Experimental Results ............................................................................................. 82

5.4.1 Measurement Approach ................................................................................... 83

5.4.2 Results and Discussion .................................................................................... 84

5.5 Chapter Summary .................................................................................................. 86

CHAPTER SIX: CONCLUSIONS ................................................................................... 88

6.1 Summary ................................................................................................................ 88

6.2 Contributions ......................................................................................................... 89 6.3 Suggestions for Future Work ................................................................................. 91

REFERENCES .................................................................................................................. 93

APPENDIX A: SCHEMATIC DIAGRAM OF FULL BRIDGE INVERTER ............... 102

APPENDIX B: COMPONENT LIST FOR EXPERIMENTAL SETUP ........................ 104

APPENDIX C: MICROCONTROLLER (MSP430G2553) OVERVIEW ..................... 107

APPENDIX D: MICROCONTROLLER CODE ............................................................ 112


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List of Tables

Table 3.1 Power Loss Calculation under Different Load Conditions for Variable

Switching Frequency (for 388.96Vdc, Rated Power 200W) .................................... 38 Table 3.2 Efficiency under Different Load Conditions for Variable Switching

Frequency (for 388.96Vdc, Rated Power 200W) ...................................................... 39 Table 3.3 Power Loss Calculation under Different Load Conditions for Variable

Switching Frequency (for 25Vdc, Rated Power 12.856W) ...................................... 41 Table 3.4 Efficiency under Different Load Conditions for Variable Switching

Frequency (for 25Vdc, Rated Power 12.856W) ........................................................ 42 Table 4.1 Unipolar SPWM Switching Logic .................................................................... 50

Table 4.2 Simulation Results Under Different Load Conditions For Variable Switching

Frequency (For 388.75Vdc) ...................................................................................... 57 Table 4.3 Simulation Results Under Different Load Conditions For Variable Switching

Frequency (For 25Vdc) ............................................................................................. 58 Table 5.1 Hardware Results of Full load and Light load .................................................. 84

Table 5.2 Comparison of the efficiencies ......................................................................... 86


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List of Figures and Illustrations

Figure 2.1 Modified Sine Wave, Sine Wave, Square Wave Inverter Output Waveforms . 9

Figure 2.2 Modified Sine Waveform ................................................................................ 10

Figure 2.3 Full Bridge Inverter Topology ........................................................................ 11

Figure 2.4 (a) Comparison of Triangular Wave and Sinusoidal Wave (total time period

= 20ms, 1ms per division (horizontally), 0.1V per devision (vertically) ) ............... 14

Figure 2.4 (b) Resultant SPWM Wave (total time period = 20ms, 1ms per division

(horizontally), 0.1V per devision (vertically) ) ......................................................... 14

Figure 2.5 Comparator Used to Generate the Bipolar SPWM Signals ............................. 16

Figure 2.6 Waveform for SPWM with Bipolar Voltage Switching (a) Comparison of

Reference and Triangular Waveform (b) Output Waveform with SinusoidalFundamental Component Shown by Dashed Line.................................................... 16

Figure 2.7 Two Comparators Generating Unipolar SPWM Signal .................................. 17

Figure 2.8 Waveform for SPWM with Unipolar Voltage Switching (a) Comparison of

Reference and Triangular Waveform (b) Gating Pulses for A and B- (c) GatingPulses for A- and B (d) Output Waveform ............................................................ 18

Figure 3.1 Block Diagram of Inverter System Including Controller ................................ 28

Figure 3.2 IGBT

Vce and

Rq where,Rq ∆Vce/∆iq at Rated Load Condition; note

that points plotted here are taken from the Device Datasheet .................................. 31

Figure 3.3 Diode Vd and Rd (where, Rd ∆Vak/∆id) at Rated Load Condition; notethat points plotted here are taken from the Device Datasheet .................................. 31

Figure 3.2 IGBT Vce and Rq where,Rq ∆Vce/∆iq at Light Load Condition; notethat points plotted here are taken from the Device Datasheet .................................. 32

Figure 3.3 Diode Vd and Rd (where, Rd ∆Vak/∆id) at Rated Load Condition; notethat points plotted here are taken from the Device Datasheet .................................. 32

Figure 4.1 Schematic of Controller for generating SPWM gating signals as used inPSpice Simulations ................................................................................................... 46

Figure 4.2 Simulated Waveforms for SPWM with Unipolar voltage switching (a)

Sinusoidal Reference waveform and Triangular Carrier waveform, (b), (c),(d),(e)

gating pulses for A , A-, B and B- respectively after Sine and Triangularcomparison ................................................................................................................ 47


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Figure 4.3 PSpice Modelling of IGBT Gate Drive Circuit. (a) PSpice Gain Circuit

which is also called an E Block. (b) Op Amp Symbol. (c) Op Amp model. ............ 48

Figure 4.4 Simulated Output Voltage Waveform of the inverter at 2.5kHz for SPWM

with the Unipolar Switching ..................................................................................... 49

Figure 4.5 Schematic of Equivalent Circuit of CFL Model connected as a load at theinverter output ........................................................................................................... 52

Figure 4.6 Simulated Current Waveform from the Equivalent Circuit of CFL Model

connected as a Load at the Inverter output (Total Time Interval = 30ms, 1ms timedivision (horizontally), 10mA current division (Vertically)) ................................... 54

Figure 4.7 Simulated Voltage Waveform from the Equivalent Circuit of CFL Model

connected as a load at the inverter output (Total Time Interval = 20ms, 1ms time

division (horizontally), 50V voltage division (Vertically)) ...................................... 54

Figure 4.8 Schematic of Equivalent Circuit of CFL Model connected as a load at theinverter output ........................................................................................................... 55

Figure 4.9 Simulated Current Waveform from the Equivalent Circuit of Heavy Load

Model connected as a load at the inverter output (Total Time Interval = 30ms, 1mstime division (horizontally), 1A current division (Vertically)) ................................ 55

Figure 4.10 Simulated Voltage Waveform from the Equivalent Circuit of Heavy Load

Model connected as a load at the inverter output (Total Time Interval = 20ms, 1ms

time division (horizontally), 50V voltage division (Vertically)) .............................. 56

Figure 5.1 Partial Schematic of the Experimental Inverter System .................................. 64

Figure 5.2 Internal Circuit of FOD3184 IC ...................................................................... 67

Figure 5.3 Block Diagram showing Optocoupler Interface .............................................. 68

Figure 5.4 Equivalent Circuit of the Snubber Circuit ....................................................... 71

Figure 5.5 Equivalent Circuit Model of CFL for Scaled Down Version .......................... 73

Figure 5.6 Equivalent Heavy Load for Scaled Down Version ......................................... 78

Figure A-1 Full Bridge Inverter Supplying Power to the Heavy Load. ......................... 102

Figure B-1 DC-DC Converter NME0515SC .................................................................. 104

Figure B-2 DC-DC Converter NME0515SC .................................................................. 105

Figure B-3 Optocoupler FOD3184 ................................................................................. 106


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List of Symbols, Abbreviations and Nomenclature

Symbol Definition

−

Bottom left switch

+ Upper left switch− Bottom right switch+ Upper right switch DC load capacitor Snubber capacitor Load capacitor Total gate capacitance Duty cycle Total energy dissipated Turn off energy loss IGBT Turn on energy loss IGBT Total energy loss IGBT Total energy dissipated

Frequency of control signal Frequency of carrier signal Switching frequency Closed circuit current Collector Current LED forward current Worst case peak current Total current through load circuit

RMS current flowing through diode

DC current for charging circuit Peak load current RMS current flowing through IGBT RMS output current Test current IGBT Output current in time domain Input current in time domain Correction factor Amplitude modulation index Frequency modulation index

Emitter power loss− Total gate driver loss Internal circuitry power loss Input power Output power− Total conduction loss IGBT


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− Total conduction loss diode− Total switching loss Total gate charge Load resistor Sense resistance Diode on state resistance Collector to emitter on state resistance Apparent power Turn on voltage of IGBT Diode forward voltage Collector to emitter voltage Diode forward voltage Collector to emitter voltage IGBT on state voltage Diode on state forward voltage

Open circuit voltage

Bus voltage LED forward voltage IGBT on state voltage Positive DC Voltage Negative DC Voltage Supply voltage Emitter Voltage Gate to emitter voltage Triangular carrier signal Reference sinusoidal signal

Input AC system

Rectified voltage RMS output voltage Total supply voltage Test voltage IGBT Output voltage in time domain Input voltage in time domain̂ Peak magnitude of control signal̂ Peak magnitude of carrier signal∆ Voltage difference between collector and emitter∆ Voltage difference of diode forward voltage Capacitive reactance Total impedance Total CFL phase angle∅ Total heavy load phase angle


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Chapter One: Introduction

Much of the world’s population is without electricity. Solar energy is a sustainable means of

providing electricity, and is especially suitable for locations where it is difficult or too expensive

to construct high voltage transmission lines. The efficiency of a solar energy system largely

depends on the efficiency of the system power inverter. This thesis addresses the inverter

efficiency issue at low power levels for rural stand-alone solar home systems. Chapter one

describes the research problem, motivation behind the research, contributions and brief outline of

the next chapters.

1.1 Problem Statement

In the case of a stand-alone rural solar home system in a developing country, the typical load

profile can vary between 0W to 200W [1]. Under optimal conditions for a rural stand-alone solar

home system, the inverter may operate at around 85%-95% efficiency while operating at its

maximum rated power. 200W is considered as the maximum rated power in the context of this

thesis. But the efficiency of the same inverter drops significantly while operating under 20% of its

maximum rated load [2]. This is a challenging problem for a stand-alone solar home system in a

developing country where the household load profile remains at low power for most of the time

during the day and at night [3]. The inverter efficiency at low power is investigated and improved

in this thesis which may improve the overall usefulness of the solar home system. Specifically,

9W (4.5% of maximum rated power 200W) is considered as an example of low power that might


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be used to operate a Compact Fluorescent Lamp (CFL). The improvement in inverter efficiency

may result in decreased cost of the overall solar home system. Previous research [3], [24], [25],

[26], [27], [28], [29], [30] does not sufficiently address the low power (i.e. 5W-10W) inverter

efficiency problem found in rural solar home systems in developing countries. To address the

problem in this thesis, a 200W inverter is simulated and a scaled down 12.856W version is

implemented experimentally. The 12.856W version was chosen for quick implementation, but

operated at RMS current level of the full voltage design. The proposed inverter has acceptable

efficiency even at low power levels with a simple control circuit and without the need of a filter

circuit at the inverter output. However, it is yet to be determined which loads can be operated

without the output filter.

1.2 Background and Motivation

Due to geographical and socio-political challenges, over 1.2 billion people or 20% of the world's

population, are without access to electrical grid power, almost all of whom live in the developing

countries. Hence, the development of micro-grids and stand-alone power systems is seen as an

economic way to raise the living standard for remote villages which are not connected to the grid.

One of the renewable sources that receives much attention is solar photovoltaic (PV) power. Every

hour the sun radiates more energy onto the earth’s surface than is consumed globally in one year

[4]. To harness the power of solar energy, improvements in the efficiency of photovoltaics and

electrical storage are required to reduce the variability and intermittency of solar power. So,

considering a scenario where there is no electric grid connection and ample sunlight, a stand-alone

solar home system is often preferable to other forms of renewable energy. The main components


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of a typical solar home system are solar module(s), charge controller, battery, DC-DC converter

and the inverter. One of the essential parts of the stand-alone solar home system is a single-phase

full-bridge inverter. An inverter is necessary because the majority of the electrical appliances run

on 220 (applicable for developing countries in general). The inverter is needed to convert theDC output of the solar module or battery into usable AC power.

In a typical developing world context, residential electrical demand is highly dynamic and stays at

low power levels for about 20 hours in a day [3]. For a rural solar home system, the load demand

remains at low power (1W to 10W) for a significant amount of time, especially at night. Improving

inverter efficiency at low power means more efficient use of the renewable energy resource.

Conversion efficiency is a prime consideration for all switch-mode power supplies (SMPSs). It is

even more critical for solar home systems, where prolonging battery life is a key goal, especially

at night and for cloudy days, when there is little or no solar energy supply from the PV modules.

In addition, if the energy input to the inverter can be efficiently converted at low power, it is

suggested in this thesis that it may also be possible to reduce the PV module area. In both cases

this may result in savings of the system capital cost.

At low power, switching loss becomes a significant portion of total power that is wasted. Thus,

the switching loss is mainly responsible for the decrease in efficiency of the inverter during low

power operations. One way to reduce switching loss at low power is to reduce the switching

frequency which also results in decreased power quality. The term “ power quality” is used in

reference to the voltage, current and frequency of the power delivered [5]. For the purposes of this

thesis, high power quality means a sinusoidal inverter output voltage of nominal RMS voltage at


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the nominal power frequency. Power quality is an issue in grid connected inverters and there are

stringent requirements to comply with standards (e.g. IEEE Std 1547 is typical of such standards).

Also, the IEEE [6] and the IEC [7] standards put limitations on the maximum allowable amount

of injected dc current into the grid [8]. However, the power quality of a stand-alone solar home

system is not subject to these constraints. In this thesis, it is suggested that a reduction in switching

frequency at low power levels, and some degradation in power quality, may result in a significant

improvement in inverter efficiency at low power levels. Another motivating factor is that higher

switching loss not only results in reduced energy efficiency but also exerts more stringent

requirements on the thermal management for the switching devices.

1.3 Objective of the Thesis

The objective of the thesis is to develop an inverter for low power applications (on the order of

50W to 500W rated power) with high efficiency operation over a wide range of power levels (i.e.

down to about 5% of the rated power). One example of a low power load is a Compact Florescent

Lamp (CFL) which may consume only 5W to 10W depending on the light output desired. As noted

above, in this thesis the inverter is rated for a power output of 200W (this is also referred to as the

maximum rated power) and low power operation of that inverter is considered to be 9W or 4.5%

of 200W. Therefore, the objective is to design an inverter that operates efficiently both at low

power and maximum rated power. Using simulation, a 200W inverter prototype is designed which

has about 85% efficiency even when operated at 9W utilizing inexpensive and reliable components

available in a developing country.


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1.4 Scope of the Thesis

In this research, inverter efficiency is improved for low power operation by reducing switching

frequency. Inverter switching loss (the dominant loss component at low power) is a function of

switching frequency and the current flowing through the switching device [3]. The choice of the

switching frequency involves a trade-off between requirements for high efficiency, sinusoidal

output power quality if a filter is employed, and low cost [8]. At rated power (200W in this context)

there are several kinds of losses that play a significant role in terms of decreasing the inverter

efficiency [5]. Low power means less current, less current means less loss but switching losses

increase in proportion to the switching frequency for a given constant load level [9], [10]. That

means, reduction of switching loss at low power is the key to improved inverter efficiency.

Therefore, to address the research problem, switching frequency is reduced to improve the inverter

efficiency at low power. In addition, inverter output characteristics and power quality are also

considered while operating at a reduced switching frequency. The reduced switching frequency

does reduce power quality, but it is expected that most household loads will tolerate this reduced

power quality. The scope of the research includes the following:

1. Inverter loss model and efficiency calculation based on mathematical analysis.

2. Inverter simulation in OrCad PSpice to observe efficiency for heavy and light load profiles.

3. Experimental implementation of the scaled down version (of rated power 12.856W) for

quick prototype development to observe inverter efficiency.


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4. Analysis of efficiency trends by comparing efficiencies found in mathematical analysis,

simulation and experimental implementation.

1.5 Thesis Outline

The remainder of the thesis is organized as follows:

Chapter 2 briefly presents the relevant literature and describes recent research to improve inverter

efficiency at low power. A classification of different kinds of inverters commonly used in a stand-

alone solar home system is presented. The detailed working principles of the modified sine wave

inverter and the reason for using this inverter is explained in detail. The full-bridge inverter

topology is also discussed in this chapter. The switching pattern of the full- bridge inverter using

the USPWM (Unipolar Sinusoidal Pulse Width Modulation) technique is presented in a table to

explain the states of each transistor while switching. The chapter also describes and critiques

previous research in the area of low power inverter efficiency improvement.

Chapter 3 details a mathematical analysis of the inverter loss components. Transistor and diode

model parameters are calculated using datasheet information. The process of obtaining the

parameters is a modification of a technique found in the literature. Based on the equations

presented in this chapter, a table has been provided showing the individual loss components and

the efficiencies for different switching frequencies. This chapter also presents the design

considerations and topology of the proposed inverter. The reason behind using a hard switched

inverter instead of using a soft switched is explained in detail.


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Chapters 4 presents the computer simulation results of the proposed inverter. The simulation

results are discussed and analyzed in terms of efficiency for different switching frequency and load

levels. Equivalent load models of the heavy load and light load conditions are implemented in

PSpice to observe the output voltage and current characteristics of the inverter. A similar table to

that in chapter 3, showing the total loss and efficiency measurements is presented in this chapter.

Chapter 5 describes experimental implementation of the scaled down version of the proposed

inverter. It begins with an overview of the overall inverter prototype and how different blocks

interact with each other to provide AC at the inverter output. The description of the selection of

the overall inverter circuit components is presented. A detailed calculation of the value of the

components used to build the equivalent heavy (12.856W) and light (0.578W) load is also provided

in this chapter. A comparative analysis of the three results (mathematical, simulation,

experimental) is also presented in a table to show the agreement among them. Based on the

operation of the scaled down inverter version (i.e. 12.856W), it is suggested that it is worthwhile

to proceed with the full voltage design (i.e. 200W) in the near future.

Chapter 6 presents conclusions based on the mathematical model, simulation model and

experimental results. Also, future work directions are suggested.


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Chapter Two: Literature Review

2.1 DC/AC Power Inverter

Power inverters are devices which convert DC to AC. The purpose of a DC/AC power inverter is

to take the DC power supplied by a battery or solar module and transform it into the standard AC

output (220 at 50Hz in the context of developing countries in general, e.g. Bangladeshresidential power). The solar modules and the batteries can store and supply only DC power but

most household appliances and other electrical equipments require AC input power to perform. To

supply the AC power to the household appliances the inverter is an essential part of the solar home

system [8].

2.2 Categorizing Power Inverters

There are three different types of power inverter output waveforms; square wave, modified sine

wave and pure sine wave as shown in Figure 2.1. These inverter output waveforms differ,

providing varying levels of distortion that can affect electronic devices in different ways. Modified

sine wave inverters have a lower Total Harmonic Distortion (THD) than a square wave inverter

but higher THD than a sine wave inverter [11]. THD measures how much the power waveform is

distorted by the harmonics. For running typical household appliances a modified sine wave

inverter is a reliable and cost-effective choice. Though the modified sine wave inverter does not

produce a true AC sine wave power, it does provide an affordable option and for many power


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applications is perfectly adequate. Modified sine wave inverters approximate a sine wave and have

low enough harmonics that they do not cause problems with typical household equipment [11].

Modified Sine WaveSine wave

Square Wave

Modified Sine wave sits at zero for a

certain time then rises or falls

Figure 2.1 Modified Sine Wave, Sine Wave, Square Wave Inverter Output Waveforms

The modified sine wave inverter costs half the price of the sine wave inverter [11]. In the context

of a rural stand-alone solar home system, where power quality is not a regulated requirement,

modified sine wave inverters provide affordable and portable AC power [12].

2.2.1 Modified Sine Wave Inverters

In the modified sine wave inverter, there are three voltage levels in the output waveform, positive,

negative, and zero as shown in Figure 2.2, with a dead zone between the positive and negative

pulses [11]. Modified sine wave inverters can be designed to satisfy the efficiency requirements

of the photovoltaic system while being less expensive than pure sine waveform inverters [12].

These inverters are capable of operating a wide variety of loads; electronic and household items

including, CFLs, filament bulbs, TV, VCR, satellite receiver, computer, refrigerator, sewing


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machine etc. [13]. Thus, most of the household appliances commonly used in a developing country

will work satisfactorily with a modified sine wave inverter [11].

Figure 2.2 Modified Sine Waveform

Since modified sine wave inverters have higher THD than pure sine wave inverters, they are not

suitable for applications where the power quality requirement is stringent (e.g. grid connected solar

systems). Grid connected power inverters must comply with the appropriate standards for THD

where modified sine wave inverters do not [6], [7]. After choosing the modified sine wave inverter

the next step is to determine suitable topologies and the control techniques for the proposed

inverter.


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2.3 Full Bridge Inverter

Figure 2.3 displays the basic inverter circuit using the full bridge topology. A full bridge inverter

is a switching configuration composed of four switching devices (e.g. IGBT switches) in an

arrangement that resembles an “H” shape (hence the alternative name H-bridge) [13]. The H-

bridge circuit may be designed for a particular modified sine wave inverter application. By

controlling the switches in the bridge by controller signals, a positive, negative, or zero potential

voltage can be placed across the bridge output i.e. between A and B, as shown in Figure 2.3. The

switching and control techniques are described in detail in section 2.3.

A+ B+

A- B-

VDCLoad

+ _

A B

Figure 2.3 Full Bridge Inverter Topology

The switches used to implement a full bridge configuration can be mechanical or built from solid

state transistors, though mechanical switches are almost no longer in use. Normally, Bipolar

Junction Transistors (BJT), Metal Oxide Semiconductor Field Effect Transistors (MOSFET) or

Insulated Gate Bipolar Transistors (IGBT) devices are used as switches, each type having its own

advantages and disadvantages. In this thesis, the IGBT has been used as a switching device due to


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its high-current handling capability and suitability for varying load, low duty cycle (ON time of a

pulse divided by the total switching period) and low frequency applications. IGBTs can operate

within a wide range of switching frequencies and are very easily configurable for varying

switching frequency applications. Generally, the IGBT has superior conduction characteristics

compared to the MOSFET. In this thesis, a low loss IGBT is chosen as the switching device as it

can operate over a wide range of switching frequencies (


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PWM is the process of modifying the width of the pulses in a pulse train in direct proportion to a

control signal (for example, the greater the control voltage, the wider the resulting pulses) [15].

When the control signal is sinusoidal the process is called Sinusoidal Pulse Width Modulation

(SPWM). By using a sinusoid at the desired frequency as the control voltage for a SPWM circuit,

it is possible to produce a high power waveform whose average voltage varies in a sinusoidal

manner suitable for driving the semiconductor devices used for switching. The analog SPWM

control approach requires the generation of both the reference and the carrier signals that feed into

a comparator which creates output signals based on the difference between the signals [14]. As

mentioned earlier, the reference signal is sinusoidal with the frequency of the desired output signal,

while the carrier signal is often either a saw tooth or triangular wave at a frequency significantly

greater than the reference frequency. The frequency of the reference signal determines the inverter

power output frequency and the reference peak amplitude controls the modulation index and the

RMS value of the output voltage [16]. This process is shown in Figure 2.4(a) with the triangular

carrier wave in green, the sinusoidal reference wave in red and the resultant SPWM pulses in blue

in 2.4(b).


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Figure 2.4 (a) Comparison of Triangular Wave and Sinusoidal Wave (Total Time Period =

20ms, 1ms per Division (Horizontally), 0.1V per Devision (Vertically) )

Figure 2.4 (b) Resultant SPWM Wave (Total Time Period = 20ms, 1ms per Division

(Horizontally), 0.1V per Devision (Vertically) )


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2.4.1 SPWM Switching Techniques

The two types of SPWM switching techniques are unipolar and bipolar switching to create either

a unipolar or bipolar output at the load. The control signals depend on comparing a reference signal

and carrier signal [19], [20]. They are now discussed in turn.

2.4.1.1 SPWM with Bipolar Switching

This technique uses a comparator as shown in Figure 2.5, to compare the reference voltage

waveform with the triangular carrier signal as shown in Figure 2.6 (a). In SPWMwith bipolar switching, the H-bridge output voltage swings between and as shown inFigure 2.6(b).

The switching scheme that will implement bipolar switching using the full bridge inverter, as

shown in Figure 2.6, is determined by comparing the instantaneous reference and carrier signals

[19]:

+ and − are on when > (2.3)+ and − are on when < ( ) (2.4)


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+

_

VControl

VCarrier

A+ and B-

A- and B+

Not

Figure 2.5 Comparator Used to Generate the Bipolar SPWM Signals

Figure 2.6 Waveform for SPWM with Bipolar Voltage Switching (a) Comparison of

Reference and Triangular Waveform (b) Output Waveform with Sinusoidal Fundamental

Component Shown by Dashed Line


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2.4.1.2 SPWM with Unipolar Switching

In this scheme, the triangular carrier waveform () is compared with two control signals() which are positive and negative signals. The basic circuit to produce SPWM withunipolar voltage switching is shown in Figure 2.7. The difference between the bipolar SPWM and

unipolar SPWM generators is that the latter uses another comparator to compare between the

inverse reference waveform shown in Figure 2.7. The comparison of these two signals produces the unipolar voltage switching signal. The output waveform is switched either from high

() to zero or from low () to zero as shown in Figure 2.8 (a). The gating pulses of thefour IGBT switches and output waveform are shown in Figure 2.8 (b), (c) and (d). The effective

switching frequency seen by the load is doubled that of gating signal. Due to this, the harmonic

content of the output voltage waveform is reduced compared to bipolar switching. In Unipolar

switching, the amplitude of the significant harmonics and its sidebands is much lower for all

modulation indexes [19].

+

_

VControl

VCarrier

Not

+

_

Not

VControl

A+

B-

A-

B+

Figure 2.7 Two Comparators Generating Unipolar SPWM Signal


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The switching scheme to implement unipolar switching using the full bridge inverter as shown in

Figure 2.8 is determined by comparing the instantaneous reference and carrier signals [20], [21]:

+ is on when > (2.5)− is on when < (2.6)+ is on when > (2.7)

− is on when < (2.8)

Figure 2.8 Waveform for SPWM with Unipolar Voltage Switching (a) Comparison of

Reference and Triangular Waveform (b) Gating Pulses for + and − (c) Gating Pulses for − and + (d) Output Waveform

The number of pulses per half-cycle depends upon the ratio of the frequency of the carrier signal

( ) to the modulating sinusoidal signal ( ). The frequency of the control signal (i.e.of the modulating signal) sets the inverter output frequency ( ) and the peak magnitude ofcontrol signal controls the modulation index (ratio of the peak magnitude of control signal,


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to the peak magnitude of carrier signal, ) which in turn controls the RMS outputvoltage. If is the width of pulse, the RMS output voltage can be determined by [19]:

∑ = / (2.9)

The amplitude modulation index is defined as:

(2.10)

where, ̂ = peak magnitude of control signal (modulating sine wave)̂ = peak magnitude of the carrier signal (triangular signal)

The frequency modulation ratio is defined as:

= (2.11)

where, = frequency of control signal (sinusoidal wave) = frequency of carrier signal (triangular wave)


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2.5 Advantages of using Unipolar SPWM

The unipolar SPWM voltage switching scheme is selected in this thesis because this method offers

the advantage of effectively doubling the switching frequency of the inverter voltage. A particular

advantage of the unipolar SPWM approach is that, this method reduces the harmonics in the single

phase inverter [22], [23]. That means, selecting unipolar SPWM as the switching scheme in the

proposed inverter is appropriate as there is no filter at the inverter output.

2.6 Overview of the Related Work

Researchers have tried to improve inverter efficiency at low power in many different ways. Five

different and typical techniques have been identified from the large number of techniques in the

literature. These techniques are:

1. Using hybrid switches (combination of MOSFET and IGBT) [3].

2. Enabling pulse skipping mode (operating the inverter at the maximum efficiency point for

shorter intervals) [26].

3. Implementing a combination of hybrid pulse width modulation (HPWM) and zero voltage

switching (ZVS) to improve the efficiency of the inverter for high switching frequency

applications [27].


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4. Resonant mode switching methods can be used such as the LLC burst mode for grid-

connected applications (where there is a slight improvement in efficiency for light load

related to a small change in switching frequency) [28], [29], [30].

5. Using variable switching frequency in discontinuous current mode (DCM) (variable

switching frequency control method allows extending the input voltage range

considerably) [31].

In [3], parallel IGBT-MOSFET switch operation is analyzed and it has been shown that light load

efficiency can be improved with hybrid switch use. The faster response of the MOSFET to

switching signal commands, compared to the IGBT, is used for minimizing IGBT turn-off losses.

This paper suggests that if such a hybrid switch is employed it is better to use the MOSFET only

for light loads. The lowest power level is 100W and the efficiency is around 78%. However,

consideration must be given to protect the light load switch (MOSFET/IGBT) from a sudden

increase in load current.

In [26] a pulse skipping control strategy is developed to improve inverter efficiency at low power.

The pulse skipping technique is preferable in grid tied inverters. When the input power drops below

a certain level, the inverter can be controlled to stop feeding power into the grid continuously.

Thus, enter the pulse-skipping operation mode. This strategy is not suitable for stand-alone inverter


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systems due to its complex control circuitry and with this control method the efficiency drops

significantly while operating under 30W (where the inverter is rated for 200W).

[27] implements hybrid pulse width modulation (HPWM), and zero voltage switching (ZVS)

together, to improve the efficiency of the inverter for high switching frequency applications. The

HPWM scheme while operating with ZVS during positive half cycle of the output frequency

reduces the switching loss to approximately one half of the loss with a standard bipolar PWM

technique. However, the efficiency reduces significantly if IGBT switches are chosen instead of

the MOSFET switches in the HPWM inverter. Because, the ZVS technique while applied in a

HPWM inverter, cannot reduce the losses due to the IGBT tailing current losses. Also, the

additional circuitry (containing: parasitic capacitor, resonant inductor, DC-link capacitor, etc.)

with an additional DC-link switch in order to implement the ZVS technique for ZVS operation

adds some power loss [27]. Efficient operation can only be achieved for a very small load range.

The HPWM prototype only works at the high end of the switching frequency range (50kHz to

180kHz) and suffers from high switching losses.

In [28] burst mode control along with synchronous rectifier (SR) is applied to improve light load

efficiency of an LLC resonant converter. The LLC resonant converter refers to a unique

combination of two inductors and one capacitor (“L-L-C”) in the integrated transformer stage

before the inverter stage [25], [29]. In this technique, LLC series resonant converter is employed

in order to achieve zero voltage switching (ZVS) low turn on and turn off current in the full bridge

inverter configuration on primary side of the transformer. While in the half bridge configuration

of the secondary side, zero current switching (ZCS) is achieved to maintain low turn on and turn


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off current. Thus, suffers from large switching loss, conduction loss and core loss at light load

because of the magnetizing current which flows reversely from secondary to primary. To address

this large losses at light load condition, later a burst mode control was applied in order to block

the switching driver signals periodically and thus limiting the power conversion only during the

time having switching driver signals. Thus, the driver loss and the switching loss were reduced at

light load. This method is only applicable for improving inverter efficiency at 10% of the rated

load condition, and the ripple voltage and burst mode losses increase significantly at around 5%

of the rated load. The LLC series resonant converter needs to be further modified while operating

at rated load conditions. In order to address, high voltage ripple at the inverter output at around

10% of the rated load and to reduce losses during burst mode operation, a Capacitor-Inductor-

Capacitor (“CLC”) output filter is applied. This technique fails to perform efficiently if the

capacitor values are not chosen to satisfy the ripple requirements at different load points. As

mentioned above, this technique also requires a resonant transformer stage before the inverter

stage, which will add to the overall loss of the system along with increased cost [29]. The switching

frequency range is maintained in a relatively narrow range and is applicable only when the

switches are controlled through a soft switching method. Further, the overall topic and analysis is

still considered complex, and is poorly understood [30].

In [31] a variable switching frequency control method is proposed to address the low input voltage

range and high conduction loss issue in a discontinuous conduction mode (“DCM”) fly-back

micro-inverter. This technique is again more preferable for grid connected inverter system, focuses

on reducing the conduction loss in order to improve the overall efficiency and the output current

is reduced significantly. Also, in this technique switching frequency is in the range of 40kHz to

100kHz and operates within a range of 260W to 80W.


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2.7 Chapter Summary

Based on the literature review, it can be concluded that the techniques investigated so far for

improving inverter efficiency at low power are mostly done at power levels higher than those of

interest here, have complex and expensive control circuitry, and are applicable for high switching

frequency applications. As the proposed inverter is not connected to the grid some techniques are

not suitable. At low power, switching losses dominate all other losses in the inverter system and it

has been demonstrated that switching loss is a function of inverter switching frequency [32].

Therefore, the technique proposed in this thesis to improve inverter efficiency at low power by

reducing switching frequency is a simple and appropriate solution for a stand-alone solar home

system with light load household appliances.


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Chapter Three: Inverter Loss Model and Design Considerations

3.1 Introduction

To reduce switching loss at low power levels for a single phase SPWM stand-alone inverter, the

switching frequency is reduced [78]. Decreasing the switching frequency to improve the overall

inverter efficiency is possibly the simplest of all the techniques. The objective of this thesis is to

design a 200W inverter which is capable of performing at about 85% efficiency even when

operated at 9W (4.5% of its rated power). The proposed design does not include a filter, to reduce

the cost and to keep the design simple. The critical design aspect considered in this context is to

allow distortion of the load current without hampering operation (such as a CFL light or cell phone

charger) at lower switching frequency.

During mathematical modelling, the switching frequency is varied from 20kHz to 200Hz to

observe the change in inverter efficiency. The maximum efficiency at low power is found by

dividing the output power by input power at 200Hz which is the minimum switching frequency in

this context. While operating at low switching frequency the load has to deal with higher total

harmonic distortion of the inverter output current and voltage waveforms which results in low

power quality at the inverter output. Hence, it is suggested here that a reduction in switching

frequency at low power levels and some degradation in power quality, may result in a significant

improvement in inverter efficiency at low power levels.


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3.2 Full Voltage Design and Scaled Down Design

In this thesis two inverter designs are considered. The full voltage design is rated for 200W power

output. The intended application is in a rural home in the developing world. Many countries have

a 220V RMS AC standard at 50Hz. This is the standard used in this thesis. For a 200W power

output, a 220V RMS sinusoidal voltage has a peak value of √2x220V=311V. For the 200W design,

an 80% modulation index is chosen (in case the DC supply drops, the modulation index can be

increased to compensate for the drop). Thus the nominal dc supply voltage is 311V/0.80 = 389V.

The next step is to find the RMS output current when the inverter is operating in the heavy load

and light load scenarios. The formula for calculating the RMS output current of the inverter is,

_ / ∗ . Thus, the RMS current output of the inverter output atheavy load is, 200W/(220V*0.8) = 1.136A, where, the output power is 200W, the RMS output

voltage is 220V and the power factor is 0.8 (corresponding to an inductive household load, e.g.

table fan, small refrigerator, sewing machine or combination of these). Similarly, the RMS current

output of the inverter output at light load is, 9W/(220V*0.65) = 62.9mA, where, the output power

is 9W, the RMS output voltage is 220V and the power factor is 0.65. The reason for choosing a

smaller power factor for light load scenario (e.g. 9W CFL) is explained in section 5.3.1 of

Chapter 5.

The experimental implementation of the inverter is based on a scaled down version of the 200W

design (for quicker implementation). This scaled down design is based on a dc supply voltage of

25V (available from a lab power supply). Thus, for a modulation index of 80%, the peak of the

sinusoidal output voltage is 25Vx0.80 = 20V, giving a RMS output voltage of 20V/√2 = 14.142V.


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The output current rating for the scaled down design is kept equal to that of the full-voltage design.

For the heavy load scenario where the rated power is 12.856W (i.e. 200W x scaling factor, where

the scaling factor is 20V/√2V / 220V = 0.0642824) and the RMS output voltage is 14.142V, given

a modulation index of 0.8, the RMS current rating is 12.856W/(14.142V*0.8) = 1.136A (as

expected, since voltage is scaled but current is not). For the light load scenario where the output

power is 0.57825W (i.e. 4.5% of 12.8566W) and the RMS output voltage is 14.142V, given a

modulation index of 0.65, the RMS current rating is 0.57825W/(14.142V*0.65) = 0.0629A or,

62.9mA (again, as expected). The detailed explanation of the reasons behind using a lower power

factor (0.65) for light load (CFL) is explained in section 5.3.1 of Chapter 5. As mentioned before,

although the RMS voltage has been scaled down from 220V to 14.142V, the RMS current values

(i.e. 1.136A for heavy load and 62.9mA for light load) and power factors (i.e. 08 for heavy load

and 0.65 for light load) are maintained to be the same for the full voltage design and the scaled

down version.

3.3

Proposed Inverter Topology

As shown in Figure 3.1 a hard switched unipolar SPWM single phase full bridge inverter was

simulated and a prototype of the proposed inverter was built. A hard switched inverter is

appropriate in this context because of its inexpensive implementation, simple control circuitry and

ease of maintenance [33]. Unipolar SPWM has been chosen as the modulation technique because

the inverter does not have any filter and unipolar SPWM can better approximate a sinusoid

compared to the case of bipolar SPWM [20]. The full bridge topology is chosen with

considerations that it must be capable of delivering high current at low voltage. This high current


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at low voltage property is important if the inverter is designed for photovoltaic applications [34].

The standard for output current THD (


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losses in the inverter, efficiency at light load and heavy load while varying the switching frequency

from 200Hz up to 20kHz can be calculated.

Typically, two thirds of the power loss in a hard switched inverter is the result of conduction and

switching losses in the inverter devices [32], [36]. Conduction losses occur due to the on-state

voltage across the device as well as the current flow through the device while it is conducting

current. More precisely, conduction losses occur between the end of the turn-on transition and the

beginning of the turn-off transition [36]. An effective model of conduction losses includes the

effect of device on-voltage and conduction resistance [37]. Switching losses arise from the

transient situation where both device voltage and current are changing as the device is turning on

or turning off [38], [39]. Evaluation of the conduction and switching losses can be done using

simplified device models described in [40], [41] and [42]. However, there are also other losses

associated with inverter operation. These include gate driver circuit loss, control circuit loss and

losses due to snubber circuits.

The gate drive circuit losses have been calculated but it is observed that they contribute a very

small amount of the total loss. The snubber circuit loss and the control circuit losses have been

ignored while developing the overall loss model given that they contribute to a very minimal

amount of loss compared to switching loss and conduction loss.


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3.4.1 Conduction Losses

To evaluate the conduction loss through a simplified model which is appropriate for both IGBT

and diodes, the device is simplified as a constant voltage drop in series with a linear resistor [42].

The on-state voltage of an IGBT and a diode can be calculated using an IGBT datasheet. During

the time that the IGBT is on, the collector to emitter voltage, , is given by

3.1

The same approximation can be used for the anti-parallel diode, giving

3.2

Here, voltage source represents the IGBT on-state zero-current collector-emitter voltage and stands for collector to emitter on-state resistance. Similarly, denotes on-state zero-instantaneouscurrent forward voltage for the antiparallel diode and stands for diode on-state resistance. and are the currents flowing through the IGBT and diode respectively. The parameters , , and can be estimated directly from the component datasheets [40].

Figure 3.2 to 3.5 show the derivation of the parameters using datasheet information. Note in [41]

that a log-log plot of current vs. voltage is used to obtain the parameters, but is it suggested here

that linear scales provide more accurate parameter estimation related to the expected operating


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conditions of the inverter transistors. As mentioned before, the rated RMS output current is 1.136A

and for a 4.5% load the corresponding output current is 62.9mA. Figure 3.2 and Figure 3.3 show

the derivation of the , , and parameters when the transistor (IGBT) is operating underrated load conditions. Figure 3.4 and Figure 3.5 show the derivation of the , , and parameters when the transistor is operating under light load conditions.

Figure 3.2 IGBT and , ∆∆ at Rated Load Condition; note that points

plotted here are taken from the Device Datasheet

Figure 3.3 Diode and (where, ∆∆ ) at Rated Load Condition; note that pointsplotted here are taken from the Device Datasheet


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Figure 3.4 IGBT and , ∆∆ at Light Load Condition; note that points

plotted here are taken from the Device Datasheet

Figure 3.5 Diode and (where, ∆∆ ) at Rated Load Condition; note that pointsplotted here are taken from the Device Datasheet


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To simplify the calculation of the device average and RMS currents, the load current is assumed

to be sinusoidal. Power dissipated in a component with a constant voltage drop is the average

current times the voltage drop [40]. The RMS current squared times the resistance signifies the

power dissipated in a resistor. The average and RMS currents of the IGBT and diode in an inverter

(given sinusoidal pulse width modulation) are [40]

̅ [ ∅ ] (3.3)

∅ (3.4)

̅ [ ∅ ] (3.5)

∅ (3.6)

Here, denotes the peak load current, ∅ denotes the load power factor angle, themodulation index, ̅, ̅ denote the average currents and , denote RMS currentsflowing through the IGBT and the antiparallel diode [40]. The conduction losses in the IGBT,

− and diode, − are obtained using [40], [41].

− ̅ (3.7)


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− ̅ (3.8)

The total conduction losses, − of the four IGBTs along with their anti-parallel diodes can be calculated from

− 4− − (3.9)

The total conduction loss associated with the inverter is found easily using equation (3.9). Equation

(3.9) shows that the conduction losses depend on the load conditions [41], [42], [43], [44].

3.4.2 Switching Losses

In power inverters, switching loss typically contributes significantly to the total system losses. The

switching loss in the IGBT depends on the IGBT and diode's dynamic characteristics [45]. Three

components of the switching losses in the hard switching inverter can be identified: IGBT turn on

losses, IGBT turn off losses, and the losses due to diode reverse recovery. During turn-on, the

semiconductor is exposed to a high current peak as a consequence of the reverse recovery of the

freewheeling diode. At the same time the collector-emitter voltage is still high, thus causing high

switching losses. During turn-off, the losses can be even higher due to the long collector current

tail [44]. So, the turn-on losses are due to the rate of current change and the stored charge in the

free wheel diode. On the other hand, the turn-off losses depend on the speed of the gate drive and

the IGBT's current tail due to the recombination of minority carriers [46]. The semiconductor is


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said to be hard switching under these conditions of simultaneous high current and high voltage

during the switching transient.

Evaluation of the switching losses, in the hard switching inverter consisting of four 15A, 600V

IGBT and ultrafast soft recovery diodes, can be done using the measured values of switching

energy from the data sheets. Generally, datasheets provide the values of turn-on and turn-off

energy ( and ) for a conventional test voltage and current ( and ). The calculatedvalues of turn-on energy comprise the losses due to diode reverse recovery and tail current losses.

The total energy loss during turn on and turn off transients of the switch, , can be calculated based on [40] using

( )

(3.10)

Equation (3.10) represents

as the bus voltage,

as the peak load current and

as the

correction factor to account for the gate drive impedance. The total switching losses, −, ofthe proposed inverter can found using

− 4 (3.11)

Here, denotes the SPWM switching frequency [43, 44]. Evidently, the switching losses in thehard switching inverter are directly proportional to the switching frequency. Further, from equation

(3.11) the switching energy is proportional to the voltage across the device during switching, so


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the losses can be eliminated if the voltage across the device is zero during the switching. This kind

of switching technique is called soft-switching or zero voltage switching (described in section 2.6)

but the added components will result in cost and reliability penalties [47].

3.4.3 IGBT Gate Drive Losses

IGBTs are voltage controlled devices and require a gate voltage to establish conduction between

collector and emitter. To provide the gate voltage, the FOD3184-ND is used as the gate drive

optocoupler. The total gate driver power loss can be derived from the summation of the total power

dissipated for the emitter (), internal circuitry () and the output ( ) of theIGBT driver IC [48]:

− (3.12)

IGBT total gate capacitance, , is the total gate charge divided by the gate drive supplyvoltage [48].

(3.13)

This means that the charging and discharging the IGBT gate is equivalent to the charging and

discharging a capacitor. Hence the power dissipated for the output of the IGBT driver IC can be

defined by


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(3.14)

Where, is the switching frequency. The power dissipated in the IGBT driver emitter can bederived from the diode forward current , maximum diode duty cycle D and diode forward voltage [48]:

(3.15)

Finally, the power dissipated in the IGBT driver internal circuitry depends on , the collectorcurrent, and the collector to emitter voltage . Note the collector to emitter voltage can be any value between a minimum of -0.5V and a maximum of the device peak forward rating.

Thus

(3.16)

3.5 Inverter Efficiency Calculation

Using equation (3.9) for conduction loss, equation (3.11) for switching loss and equation (3.12)

for gate drive loss, the different loss components of the proposed inverter at different load and

switching frequency conditions are calculated. Shown in Table 3.1 are the results for the

proposed inverter system (the topology is shown in Figure 3.1, and system details are provided in

Chapter 4). The table shows a decrease in switching and drive circuit loss for each load condition


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when the switching frequency is decreased. Whereas, as shown in Table 3.2 the improvement in

the inverter efficiency in relation to the decrease in the switching frequency suggests that

reduction of switching frequency results in significant inverter efficiency improvement

especially at low power. The results of the proposed inverter loss model is presented for the full

voltage design and also for the low voltage scaled down design.

Table 3.1 Power Loss Calculation under Different Load Conditions for Variable Switching

Frequency (for 388.96, Rated Power 200W)

ℎ

(kHz)

ℎ

Full Load

(200W)

20 2.376 12.478 0.120

10 2.376 6.238 0.114

2.5 2.376 1.560 0.110

0.20 2.376 0.124 0.108

Light Load

(9W)

20 0.075 2.159 0.120

10 0.075 1.079 0.114

2.5 0.075 0.269 0.109

0.20 0.075 0.216 0.108


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Table 3.2 Efficiency under Different Load Conditions for Variable Switching Frequency

(for 388.96, Rated Power 200W)

ℎ

(kHz)

Efficiency

(%)

Full Load

(200W)

20 200 14.974 214.974 93.03

10 200 8.728 208.728 95.82

2.5 200 4.046 204.046 98.02

0.20 200 2.608 202.608 98.71

Light

Load

(9W)

20 9 2.354 11.354 79.27

10 9 1.268 10.268 87.65

2.5 9 0.453 9.453 95.21

0.20 9 0.399 9.399 95.75

The efficiency () calculated above is the reference for simulation and experimentalimplementation of the proposed inverter. Ideally, inverter output power should be equal to the

inverter input power given that there is no loss in the ideal inverter system. Practically, there are

always some losses in the inverter system and input power can be expressed as sum of output

power and total loss. The basic formula for calculating inverter efficiency is, = / . Considering inverter loss explicitly, the formula can be re-writtenas, / . For example for 2.5kHz, the output


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power is 200W, the total losses are 4.046W so the input power is now, 204.046W, thus the

efficiency is, 200/ 200 4.046 98.02%. The efficiency calculations in Table 3.4 in thelast column is also done in the same way as with the sample calculation for 2.5kHz.

The trend of an increase in inverter efficiency with decreasing switching frequency is evident from

the efficiency calculations (Table 3.2). For example, inverter efficiency for 9W is 79.27% when

operated at 20kHz and 95.75% when operated at 200Hz. Interestingly the inverter efficiency does

not change dramatically as the switching frequency changes from 2.5kHz to 200HZ (i.e. 95.21%

to 95.75% for 200W in Table 3.2). The inverter loss model analysis based on different loss

components is done for an inverter circuit operating with a sinusoidal output current (i.e. no

harmonic distortion). Harmonic distortion, spikes, and controller losses are circuit specific

characteristics and cannot be modeled accurately without observing implemented inverter circuit

characteristics. To obtain the values of the equation parameters (, , , in Equation. 3.1,3.2), the datasheet graphs (log-log scale) have been linearized (Figure 3.2, 3.3, 3.4, 3.5) to

approximate required parameters.

Since a scaled down version (12.856W) of the full voltage design (200W) was implemented

experimentally, a similar kind of loss model analysis and efficiency calculation is performed for

the scaled down version as shown in Table 3.3 and Table 3.4.


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Table 3.3 Power Loss Calculation under Different Load Conditions for Variable Switching

Frequency (for 25, Rated Power 12.856W)

ℎ

ℎ

Full Load

(12.856W)

20 2.375 1.248 0.120

10 2.375 0.624 0.114

5 2.375 0.312 0.111

2.5 2.375 0.156 0.110

0.20 2.375 0.013 0.108

(0.578W)

20 0.074 0.889 0.120

10 0.074 0.444 0.114

5 0.074 0.223 0.111

2.5 0.074 0.111 0.110

0.20 0.074 0.009 0.108


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Table 3.4 Efficiency under Different Load Conditions for Variable Switching Frequency

(for 25, Rated Power 12.856W)

ℎ

Efficiency

%

Full Load

(12.856W)

20 12.856 3.741 16.597 77.46

10 12.856 3.111 15.967 80.52

5 12.856 2.796 15.652 82.14

2.5 12.856 2.639 15.495 82.97

0.20 12.856 2.494 15.350 83.75

Light Load

(0.578W)

20 0.578 1.083 1.661 34.80

10 0.578 0.632 1.210 47.77

5 0.578 0.408 0.986 58.62

2.5 0.578 0.295 0.873 66.20

0.20 0.578 0.191 0.769 75.16

Similar to the full voltage design, Table 3.4 shows an increase in efficiency as the switching

frequency is decreased for the scaled down design. For example, inverter efficiency for 0.578W is

34.80% when operated at 20kHz and 75.16% when operated at 200Hz.


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The results found from the mathematical analysis above, show that as the switching frequency

decreases, the losses in the inverter circuit decrease. As seen, this can be attributed to the change

in switching losses, unlike conduction and drive losses that remain nearly constant for a given load

condition.

3.6 Chapter Summary

A detailed mathematical analysis of the losses in the inverter circuit is presented in this chapter.

An inverter loss model is applied to show how reducing switching frequency improves the inverter

efficiency. The loss model gives information about how the transistor switching losses impact

inverter efficiency when the power level drops.


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Chapter Four: Simulation Results for Proposed Full Bridge Inverter

4.1 Schematic of the Full Bridge Inverter System under Study

Before going to a practical circuit implementation, the simulation of the inverter circuit is

performed in OrCAD PSpice. PSpice is a computer simulation program that models the behavior

of an electrical circuit containing analog devices. PSpice is often chosen by design engineers for

its ability to simulate practical load characteristics. It is essentially a computer based breadboard

which allows prediction of AC and DC steady state waveforms and to perform transient analysis.

The simulation results from the PSpice inverter circuit model can be compared with the

mathematical model and with the experimental data. By verifying the PSpice model against

experimental data and the mathematical model, parametric studies of the inverter efficiency at

reduced switching frequency at low power may be conducted confidently. In PSpice, the practical

model of the IGBT can be used for the hardware circuit analysis and sinusoidal pulse width

modulation (SPWM) can be simulated in the control. Using the practical model of IGBT

(IRG4BC20UD) is useful and significant to observe the impact of switching loss associated with

switching frequency on the inverter efficiency. Also, the equivalent simplified PSpice models of

the heavy load and light load conditions help to predict the overall efficiency outcome of the

simulated inverter before going to hardware circuit analysis. To observe the impact of decreasing

switching frequency on the inverter efficiency, switching frequency is varied over a range of

20kHz to as low as 200Hz. This wide frequency range is useful to observe the change in inverter

efficiency as one goes from higher to lower frequency for heavy load and light load conditions.

The inverter system under study is shown in Figure 3.1 in Chapter 3 and also in Appendix A.


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4.2 Simulation Circuit Description

The inverter circuit simulated in PSpice is a Voltage Source SPWM inverter. The simplest dc

voltage source for Voltage Source Inverter (VSI) consists of a battery bank [49]. The battery bank

usually consists of several batteries in series and/or parallel combination. Solar Photovoltaic cells

can also be employed to create the dc voltage source [50]. The proposed inverter is simulated in

PSpice for the full voltage design and also simulated for the low voltage scaled down design.

4.2.1 SPWM Controller

The number of pulses per half cycle is typically on the order of 100 pulses. As discussed earlier in

section 2.5, because of the advantages specific to the proposed inverter, unipolar SPWM is selected

as the suitable switching technique. Choosing the optimum switching technique for the IGBT

switching is an important design consideration for the proposed inverter.

The PSpice schematic shown in Figure 4.1 generates SPWM control signals. The sinusoidal signal

generator produces, a sinusoidal pulse signal at a frequency of . The controlfrequency, is equal to the output frequency (i.e. 50HZ) of the output voltage [39].The modulation index

is set to be 0.8. The control signal,

is then rectified through a

precision rectifier in order to implement unipolar SPWM topology (discussed in detail in section

2.4.1.2).


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A B S

g3

Vcontrol

+

_

Vcarrier

IF(V(%IN1)-V(%IN2)>0, 1, 0)

Vx Vy

0

+

_

+

_

g2

g4

Comparator 1-V(%IN)

Inverter

1-V(%IN)

Inverter 1-V(%IN)

Inverter

g1

Figure 4.1 Schematic of Controller for Generating SPWM Gating Signals as used in PSpice

Simulations

The triangular wave generator generates the carrier signal at the switching frequency of . The switching frequency, 2 , where N is the number of switching angles per quartercycle [50]. The switching frequency controls the speed at which the inverter switches areturned on and turned off. In this thesis, the switching frequency is varied in a range of 20kHz to

200Hz. The change in switching frequency is made by changing the value of N as the output

frequency, is fixed at 50Hz.

Once the two signals are generated ( and ) the four gating pulses are generated bycomparing the triangular signal, with the absolute of the sinusoidal signal, [51].The four gating signals as shown in Figure 4.2 is then applied to the four IGBT gates of the full

bridge inverter in order to create desired AC signal at the inverter output.


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Figure 4.2 Simulated Waveforms for SPWM with Unipolar voltage switching (a) Sinusoidal

Reference waveform and Triangular Carrier waveform, (b), (c),(d),(e) gating pulses for

+, −, +and − respectively after Sine and Triangular comparison (Total Time Interval= 20ms, 1ms time division (horizontally), 5V voltage division (Vertically))

4.2.2 Gate Drive Circuit

It is customary to protect the IGBTs power devices used in the inverter so that they can continue

to function despite somewhat unpredictable conditions that characterize the renewable energy

scenarios. In particular, designers build in protection to avoid damage resulting from conditions

such as under voltage, over voltage, short circuits etc. [52].

An optocoupler is often used in IGBT gate drive circuitry to isolate the controller part from the

rest of the circuit. The optocoupler output diode is connected to a totem-pole pair of BJT devices

as shown in Figure B-3 (Appendix B) to provide fast switching of the IGBT (note that an isolated


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supply is needed for the totem-pole pair). In a PSpice simulation the optocoupler and totem-pole

arrangement is modelled using a Gain Circuit, also called an E Block, as shown in Figure 4.3 (a).

Within the PSpice Gain Circuit is an isolation op-amp circuit, illustrated in Figure 4.3 (b). Shown

in Figure 4.3 (c) is a model of the internal op-amp structure. The main characteristics of an op amp

are very high input resistance (), very low output resistance () and very high gain (A is onthe order of 105). Note that a gate drive circuit must be able to provide a voltage of 15V to 20V

between gate and source of the IGBT, to ensure that the IGBT is fully on and in a state of low

conductance [53].

+

_

Vn

Vp

Vo

(a)

| +

Vn

Vp

Ro

A(Vp-Vn)Vo

R1

(b)

+

_

+

_

+

_

Vn

V p

R 2

A(V p-Vn)

R oE

Vo

(c)

Figure 4.3 PSpice Modelling of IGBT Gate Drive Circuit. (a) PSpice Gain Circuit which is

also called an E Block (b) Op Amp Symbol (c) Op Amp model.

4.2.3 IGBT Switching Circuit

In order to generate a modified sine wave at the inverter output requires both a positive andnegative voltage across the load, for the positive and negative parts of the wave respectively [54].

A modified sine wave as shown in Figure 4.4 at the output of the inverter can be achieved from a


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single source through the use of four IGBT switches arranged in an H-Bridge configuration as

shown in Figure 4.1. In order to minimize power loss and utilize higher switching speeds, N-

Channel IGBTs were chosen as switches in the H-bridge inverter circuit.

Figure 4.4 Simulated Output Voltage Waveform of the Inverter at 2.5kHz for SPWM with

the Unipolar Switching (Total Time Interval = 20ms, 1ms Time Division (Horizontally),

50V Voltage Division (Vertically))

The top two IGBT switches (IRG4BC20UD) are + and − while the bottom switches are + and− (shown in Figure 3.1) each co-packaged with HEXFREDTM ultrafast, ultra- soft-recoveryanti-parallel diodes for the use in H-bridge configurations [Appendix B]. The anti-parallel diodes

provide an alternate path for the load current if any of the power switches are turned off. For

example, if the lower IGBT (

− ) in the left leg is conducting and carrying current towards the

negative dc bus, this current would regulate or commutate into the diode across the upper IGBT (

+) of the left. In order to avoid a short circuit of the DC bus, both IGBTs of the same leg cannever be conducting at the same time. In the unipolar SPWM switching scheme the output voltage


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of the inverter swings from 0 to and 0 to as shown in Figure 4.5. In the proposedinverter switching scheme, when the switches + and −are kept on, the output voltage across theload is equal to (311V). When − and + are turned on, then at that time the output voltageis equal to – (-311V) [19]. The logic behind the switching of the devices in the leg connectedto ‘ ’ and ‘’ is given in Table 4.1,

Table 4.1 Unipolar SPWM Switching Logic

Switching Logic Switch ‘On’

State

Voltage

> + = < − = -(

> − = +(

<

+

= -(

)

Here, is denoted as the voltage of the reference signal in negative half cycle [19].

The operating principle of th

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