COMP108 ● Introduction to Computer Architecture

Department : Faculty of Information & Communication TechnologyProgram Name : INT, Associate Degree in Information Technology

BSIT, BSc (Hons) in Information TechnologyBSBT, BSc (Hons) in Business Information TechnologyINT, Associate Degree in Information TechnologyBSIT, BSc (Hons) in Information TechnologyINT, Associate Degree in Information TechnologyBSIT, BSc (Hons) in Information Technology

Semester : 2Date : 3rd, March 2014

1. Consider having a program that runs in 50s on computer A, which has a 500MHz clock. We would like to run the same program on another machine, B, in 20s. If machine B requires 2.5 times as many clock cycles as machine A for the same program, what clock rate must machine B have in MHz?

2. Suppose that we have two implementations of the same instruction set architecture. Machine A has a clock cycle time of 50ns and a CPI of 4.0 for some program, and machine B has a clock cycle of 65ns and a CPI of 2.5 for the same program. Which machine is faster and by how much?

3. A compiler designer is trying to decide between two code sequences for a particular machine. The hardware designers have supplied the following facts:

For a particular high-level language, the compiler writer is considering two sequences that require the following instruction counts:

What is the CPI for each sequence? Which code sequence is faster ? By how much?

4. Consider a machine with three instruction classes and CPI measurements as follows:

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Tutorial 1Chapter I

Instructionclass

CPI of theinstruction class

A 1B 3C 4

Instructionclass

Instruction count (in millions)

A B C1 2 1 22 4 3 1

Suppose that we measured the code for a given program in two different compilers and obtained the following data :

Assume that the machine’s clock rate is 500MHz. Which code sequence will execute faster according to MIPS? And according to execution time?

5. Three enhancements with the following speedups are proposed for a new machin e: Speedup (a) = 30, Speedup (b) = 20, and Speedup (c) =15. Assume that for some set of programs, the fraction of use is 25% for enhancement (a), 30% for enhancement (b), and 45% for enhancement (c). If only one enhancement can be implemented, which should be chosen to maximize the speedup? If two enhancements can be implemented , which should be chosen, to maximize the speed up?

6. A benchmark program is run on a 40MHz processor. The object code consists of 100,000 instructions with the following instruction mix and clock cycle count :

Determine the effective CPI, MIPS rate and time for this progam.

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Instructionclass

CPI of theinstruction class

A 2B 5C 7

Code Sequence Instruction count (in millions)

A B CCompiler 1 15 5 3Compiler 2 25 2 2

InstructionType

Instruction Count

Clock Cycle Count

Integer Arithmetic 45000 1Data Transfer 32000 2Floating Point 15000 2Control Transter 8000 2