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7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Circuits
Dr DC Hendry
October 2007
Dr DC Hendry Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Outline I
1 Pass Transistor Circuits
2 The CMOS Transmission Gate
3 Design Example
4 Transmission Gate Design Methodology
Dr DC Hendry Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Circuits
We can view the complementary CMOS gate as switching theoutput pin to one of power or ground.
Dr DC Hendry Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Circuits
We can view the complementary CMOS gate as switching theoutput pin to one of power or ground.
A slightly more general gate is obtained if we switch theoutput to one of power; ground; or any of the input signals.
Dr DC Hendry Pass Transistor Circuits
P T i Ci i
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Circuits
We can view the complementary CMOS gate as switching theoutput pin to one of power or ground.
A slightly more general gate is obtained if we switch theoutput to one of power; ground; or any of the input signals.
In such designs the MOSFET is considered to be a passtransistor.
Dr DC Hendry Pass Transistor Circuits
P T i t Ci it
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Circuits
We can view the complementary CMOS gate as switching theoutput pin to one of power or ground.
A slightly more general gate is obtained if we switch theoutput to one of power; ground; or any of the input signals.
In such designs the MOSFET is considered to be a passtransistor.
When used as a pass transistor the device may conductcurrent in either direction.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Truth Table
XA
B
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Truth Table
XA
B
A B X
0 0 Z
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Truth Table
XA
B
A B X
0 0 Z0 1 0
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pass Transistor Truth Table
XA
B
A B X
0 0 Z0 1 01 0 Z
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Pass Transistor Truth Table
XA
B
A B X
0 0 Z0 1 01 0 Z1 1 1
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Properties of Pass Transistors
For the n-channel pass transistor circuit note that:
1 Z in the truth table implies a floating node.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Properties of Pass Transistors
For the n-channel pass transistor circuit note that:
1 Z in the truth table implies a floating node.
2 For the n-channel pass transistor, when A = B = 1, theoutput voltage at X is:
Vx = min(VB Vt,VA)
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsC OS G
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Properties of Pass Transistors
For the n-channel pass transistor circuit note that:
1 Z in the truth table implies a floating node.
2 For the n-channel pass transistor, when A = B = 1, theoutput voltage at X is:
Vx = min(VB Vt,VA)
3 This ifVA = VB = 3.3V and Vt = 0.6V then Vx = 2.7V.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsTh CMOS T i i G
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Properties of Pass Transistors
For the n-channel pass transistor circuit note that:
1 Z in the truth table implies a floating node.
2 For the n-channel pass transistor, when A = B = 1, theoutput voltage at X is:
Vx = min(VB Vt,VA)
3 This ifVA = VB = 3.3V and Vt = 0.6V then Vx = 2.7V.4 This reduction in output voltage makes cascading of pass
transistor circuits difficult.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsTh CMOS T s issi G t
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Cascaded Pass Transistors
Vdd 3Vt
Vdd
Vdd 2Vt
Vdd
Vdd
Vdd
Vdd Vt
Figure: Cascaded pass transistors
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Cascaded Pass Transistors - 2
1 With an n-channel transistor high voltages are degraded byone Vt.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Cascaded Pass Transistors - 2
1 With an n-channel transistor high voltages are degraded byone Vt.
2 Similar circuits with a p-channel device degrade (byincreasing) a logic zero by one Vt.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Cascaded Pass Transistors - 2
1 With an n-channel transistor high voltages are degraded byone Vt.
2 Similar circuits with a p-channel device degrade (byincreasing) a logic zero by one Vt.
3 So such circuits are normally confined to the internal circuitryof a gate.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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The CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
Cascaded Pass Transistors - 2
1 With an n-channel transistor high voltages are degraded byone Vt.
2 Similar circuits with a p-channel device degrade (byincreasing) a logic zero by one Vt.
3 So such circuits are normally confined to the internal circuitryof a gate.
4
Full logic levels can be regenerated with an inverter at theoutput of the gate.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Two-to-One Mux
ZS
S
B
A
Figure: Two-to-one Mux
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Two-to-One Mux - 2
When S = 1 the output Z is connected to B
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Two-to-One Mux - 2
When S = 1 the output Z is connected to BWhen S = 0 the output Z is connected to A
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
D i E l
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Two-to-One Mux - 2
When S = 1 the output Z is connected to BWhen S = 0 the output Z is connected to A
Note that the connection made is bidirectional
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
D i E l
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
The CMOS Transmission Gate
The CMOS transmission gate consists of two MOSFETs, onen-channel responsible for correct transmission of logic zeros,
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
The CMOS Transmission Gate
The CMOS transmission gate consists of two MOSFETs, onen-channel responsible for correct transmission of logic zeros, andone p-channel, responsible for correct transmission of logic ones.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
The CMOS Transmission Gate
The CMOS transmission gate consists of two MOSFETs, onen-channel responsible for correct transmission of logic zeros, andone p-channel, responsible for correct transmission of logic ones.
B
C
C
A
Figure: CMOS Transmission Gate Circuit
When C = 1, A and B are connected, both logic zero and logic oneare passed without degradation.Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://goforward/http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Transmission Gate Symbols
Transmission gates are widely used and shorthand symbols areused.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design ExampleTransmission Gate Design Methodology
Transmission Gate Symbols
Transmission gates are widely used and shorthand symbols areused.
The standard symbol (not used often) is:
C
A B
C
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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g pTransmission Gate Design Methodology
Transmission Gate Symbols
Transmission gates are widely used and shorthand symbols areused.
The standard symbol (not used often) is:
C
A B
C
The most commonly used symbol is simply:A B
C
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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g pTransmission Gate Design Methodology
Design Example:
A common design technique used with transmission gate structuresis the use of multiplexor based architectures. Consider the Booleanfunction
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design Example
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Transmission Gate Design Methodology
Design Example:
A common design technique used with transmission gate structuresis the use of multiplexor based architectures. Consider the Booleanfunction
f= AS2S1 + BS2.S1 + S2S1
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleT i i G D i M h d l
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Transmission Gate Design Methodology
Design Example:
A common design technique used with transmission gate structuresis the use of multiplexor based architectures. Consider the Booleanfunction
f= AS2S1 + BS2.S1 + S2S1
This may be rewritten as (the reason will become clear later):
f= AS2S1 + BS2.S1 + 1.S2S1 + 0.S2S1
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleT i i G t D i M th d l
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Transmission Gate Design Methodology
Transmission Gate Implementation:
f
S1 S1 S2 S2
A
B
1
0
Figure: Implementation with Transmission Gates
Dr DC Hendry Pass Transistor Circuits
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
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Transmission Gate Design Methodology
Transmission Gate Implementation - 2
1 Note the need for the term 0.S1S2. If not present then whenS1 = S2 = 1 the output f would float.
2 Each transmission gate may now be replaced with two
transistors.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Transmission Gate Design Methodology
Transmission Gate Implementation - 2
1 Note the need for the term 0.S1S2. If not present then whenS1 = S2 = 1 the output f would float.
2 Each transmission gate may now be replaced with two
transistors.3 Where lines connect only to logic 1 the nMOS devices may be
omitted.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Transmission Gate Design Methodology
Transmission Gate Implementation - 2
1 Note the need for the term 0.S1S2. If not present then whenS1 = S2 = 1 the output f would float.
2 Each transmission gate may now be replaced with two
transistors.3 Where lines connect only to logic 1 the nMOS devices may be
omitted.
4 Where lines connect only to logic 0 the pMOS devices may be
omitted.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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a s ss o Gate es g et odo ogy
Transmission Gate Implementation - 2
1 Note the need for the term 0.S1S2. If not present then whenS1 = S2 = 1 the output f would float.
2 Each transmission gate may now be replaced with two
transistors.3 Where lines connect only to logic 1 the nMOS devices may be
omitted.
4 Where lines connect only to logic 0 the pMOS devices may beomitted.
5 nMOS and pMOS devices may be grouped to minimise thenumber of wells required.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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g gy
Transistor Schematic
Vdd
A
B
S2 S2 S1 S1
f
Figure: Transistor Level Schematic for Design
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design Methodology
A suitable design methodology, in addition to the correct logicoutput, must ensure:
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design Methodology
A suitable design methodology, in addition to the correct logicoutput, must ensure:
The output is always driven to logic 1 or logic 0.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Design Methodology
A suitable design methodology, in addition to the correct logicoutput, must ensure:
The output is always driven to logic 1 or logic 0.There are no sneak paths, such as:
B
f
1
0
A
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Viable Approaches
Viable design approaches are:
Choose a number of inputs as mux select inputs and proceedas above.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Viable Approaches
Viable design approaches are:
Choose a number of inputs as mux select inputs and proceedas above.
Plot variables on K-maps.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission GateDesign Example
Transmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Viable Approaches
Viable design approaches are:
Choose a number of inputs as mux select inputs and proceedas above.
Plot variables on K-maps.
Tabular methods such as modifications of Quine-McCluskey -
not covered here.
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting Variables
f= ab+ bcd+ acd
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
http://goforward/http://find/http://goback/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting Variables
f= ab+ bcd+ acd
and we will look for a network using d and d as inputs. Plottingthe function on a K-Map gives:
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting Variables
f= ab+ bcd+ acd
and we will look for a network using d and d as inputs. Plottingthe function on a K-Map gives:
f ab
cd
00 01 11 10
10
11
0100 1 1 1 0
1 0 0 0
1 0 1 1
1 0 0 0Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting again with d as input
Now plot the K-Map using d as an input, giving:
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting again with d as input
Now plot the K-Map using d as an input, giving:
f ab
c
00 01 11 10
1
0 1 d d 0
1 0 d d
Dr DC Hendry Pass Transistor Circuits
Pass Transistor CircuitsThe CMOS Transmission Gate
Design ExampleTransmission Gate Design Methodology
Pl i i i h d i
http://find/7/27/2019 transmission gate and pass transistor logic.pdf
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Plotting again with d as input
Now plot the K-Map using d as an input, giving:
f ab
c
00 01 11 10
1
0 1 d d 0
1 0 d d
Giving the Boolean expression for f as:
f= 1.ab+ bcd+ ac.d+ abc.0 + abc.0
Dr DC Hendry Pass Transistor Circuits
http://find/