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Toshitaka Fukushima, Ph.D
Fujitsu
International Technology
Roadmap for Semiconductors
2001
ISS Korea 2002, March 22, T. Fukushima
1992NTRS
Transition of ITRSUS DomesticUS Domestic InternationalInternational
1991 Micro Tech 2000Workshop Report
1994NTRS
1997NTRS
2000 ITRSUpdate
2001 2001 ITRSITRS
1999 1999 ITRSITRS
1998 ITRSUpdate19981998
World Semiconductor CouncilWorld Semiconductor Council
http://public.itrs.net
ISS Korea 2002, March 22, T. Fukushima
Mission of ITRS
ITWGITWG
•Policy•Goal•Schedule•Coordination among ITWGs
•Coordination among Associations
IRC
Technology Needs Potential Solutions
innear & long terms
TWG
TWG
TWG
TWG
TWG
ESIA
KSIA
SIA
TSIA
JEITA( STRJ)
DesignTest
FEP
etc
ISS Korea 2002, March 22, T. Fukushima
Scope of ITRSScope of ITRS
Environment Safety &
HealthMetrology
YieldEnhanceme
nt
Modeling &
Simulation
Design
Front End Processes
InterconnectLithography
Process IntegrationAssembly &
PackagingFactory
Integration
Test
IRC Crosscut ITWGs
Focus ITWG
ISS Korea 2002, March 22, T. Fukushima
Device Makes
Equipment/
Material
Suppliers
Research
institute /
Consortium
College /
university
Government /
National
research lab.
Others
(Design /
Assembly /
Test)
Total
ESIA (EU) 38 5 25 68
J EITA (J PN) 141 42 22 10 7 222
KSIA (ROK) 32 11 5 9 7 64
TSIA(TWN) 88 17 14 13 29 161
SIA(USA) 146 91 36 24 12 4 313
Total 445 166 102 56 26 33 828
Composition of ITRS Members
ESIA (Europe)8%
JEITA (Japan)27%
KSIA (S.Korea)8%TSIA
(Taiwan)19%
SIA (US)38%
DeviceMakers
54%Equipment / Materials Suppliers
20%
Others(Design / Assembly / Test)
4%Research Inst. /College, Univ./National lab. / Consortia
22%
ISS Korea 2002, March 22, T. Fukushima
Chapters of ITRS 2001Glossary
ORTC
12 ITWGs : Design to Modeling & Simulation
- Scope- Difficult Challenges- Technology Requirement- Potential Solutions
System Drivers
Difficult Challenges
Grand Challenges
Introduction
ISS Korea 2002, March 22, T. Fukushima
Technology Node TimingV
olu
me o
f P
rod
ucti
on
(P
art
s/M
on
th)
Months-24
1K
10K
100K
0
1M
10M
100M
AlphaTool
12 24-12
Development Production
BetaTool
ProductionTool
Top-Runner CompanyProduction Followed by Succeeding Companies within Three Months
Conf.Papers
Year of Production
ISS Korea 2002, March 22, T. Fukushima
0.01
0.1
1
10
1995 2000 2005YearYear
W.P.C. (Total Worldwide Wafer Production Capacity ( Relative Value)
Sources:1995 to 1999: SICAS, 2000: Yano Research Institute& SIRIJ
>0.7 um
0.4-0.7
<0.4
>0.8 um
0.5-0.8
0.35-0.5
0.25- 0.35
0.2 - 0.25
0.18 - 0.2
<0.18
Year 1995-1999
Year 2000
Tech
nolo
gy N
od
e (
um
)Technology Node vs. Actual Wafer
Production
ITRS Technology Node
ISS Korea 2002, March 22, T. Fukushima
2001 ITRS1999 ITRS
130 0.7 91 90
90 0.7 64 65
65 0.7 45 45
45 0.7 31 32
32 0.7 22 22
100
70
50
35
25
x
x
x
x
x
(nm)
Technology Node
130 130
ISS Korea 2002, March 22, T. Fukushima
Half Pitch
MPU/ASICDRAM
Poly Pitch
Metal Pitch
ISS Korea 2002, March 22, T. Fukushima
FEP Grand Challenges
Starting Material
Wells
Capacitor Stack / Trench
Gate Stack
Source / Drain - ExtensionIsolation
ChannelContacts
Near Term (2001-2007)Enhancing Performance ■ New Gate Stack and Materials :
● Oxynitride gate dielectric / high performance MOSFETs ● High gate stack / low operating and low standby power MOSFETs
■ CMOS Integration of New Memory Materials and Processes : ● High k DRAM capacitor
● MIM capacitor structures Long Term (2008-2016)Cost-effective Manufacturing ■ Starting Materials alternate beyond 300 mm :
● Productivity enhancement ● e.g., 450 mm
ISS Korea 2002, March 22, T. Fukushima
Interconnect Grand Challenges
Near Term (2001-2007)Enhancing Performance
■ Introduction of New Materials : ● High Conductivity and Low k Dielectric
■ Integration of New Processes and Structures : ● High Complexity
Long Term (2008-2016)Enhancing Performance
■ Identify Solutions which address Global Wiring Scaling: ● Beyond Copper and Low k ● Material Innovation to accelerate Design, Package and Interconnect
ISS Korea 2002, March 22, T. Fukushima
Near Term (2001-2007)Cost-effective Manufacturing
■ Coordinated Design Tools and Simulators :
● Mix Signal Co-design and Simulation
● Transient Thermal Analysis Tool
● Thermal Mechanical Analysis Tool
● Electrical Analysis Tool - Power Disturbs - EMI - High Frequency / Current
and Lower Voltage Switching
Assembly & PKG Grand Challenges
QFP PGABGA
Chip
Package
Printed Wiring Board
ISS Korea 2002, March 22, T. Fukushima
System Drivers Chapter1999 ITRS ■ Major concerns are DRAM, MPU and ASIC though SOC and AMS (analog / mixed-signa) are slightly mentioned ■ Each devices are assumed to be developed synchronously along the
technology node.
2001 ITRS ■ Instead, the Market demands different Technology / Development
Timing depending on the Product Line; ■ Technology Development Trends per Market Segment are analized
(1) Portable and Wireless (2) Broadband(3) Internet Switching (4) Mass Storage(5) Consumer (6) Computer(7) Automotive
■ Technology / Development Timing Demands by Market Segment are extracted
(a) SOC : Multi-technology, High performance, Low cost, Low power(b) AMS : Low-noise amplifier, Power amplifier, VCO, ADC(c) MPU : high-volume custom
ISS Korea 2002, March 22, T. Fukushima
Emerging Research Devices Section
1999 ITRS ■ Beyond CMOS / Novel Devices
2001 ITRS ■ Technologies to accelerate the performance on the extension of classical Roadmap
・ Non-Classical CMOS
・ New memory device
■ New Technology and Concept beyond classical Roadmap
・ New logic device
・ New architecture
ISS Korea 2002, March 22, T. Fukushima
Non-Classical CMOS Tr
Memory Devices
Emerging Research Technologies
ULTRA-THIN BODY SOI
BAND-ENGINEERED Tr
VERTICAL Tr
Fin FET DOUBLE-GATE Tr
WORD
BIT
W
R
n
+
n
+
memory node
Engineered barrier
Si
Gate
DRAM
2002
Magnetic RAM
~2004
Phase Change Memory
~2004
Nano Floating Gate Memory
>2005
Single/Few Electron
Memories >2007
Molecular Memories
>2010
< Near Future >
ISS Korea 2002, March 22, T. Fukushima
Plate
S. Node
Plug
Stack
Storage Node
Ferro. FilmPlate
Planar
Plate
Plug
S. Node
3D
Capacitor Structure
FeRAM
1.00E-01
1.00E+00
1.00E+01
1.00E+02
1.00E+03
1.00E+04
1.00E+05
1.00E+06
2000 2005 2010 2015 2020
FeRAM
DRAM64G
16G
1M
512M
2001 2002 2003 2004 2005 2006 2007 2010 2013 2016
T. Node (nm) 130 115 100 90 80 70 65 45 32 22
DRAM (bit) 4G 8G 32G 64G
FeRAM (bit) 1M 4M 16M 64M 64M 128M 256M 1G 4G 16G
Access time (ns) 80 65 55 40 30 30 20 16 12 10
Capacitor planar planar stack stack stack stack 3D 3D 3D 3D
T2C or 1T1C 2T2C 1T1C 1T1C 1T1C 1T1C 1T1C 1T1C 1T1C 1T1C 1T1C
512M 2G1G
ISS Korea 2002, March 22, T. Fukushima
DRAM, MPU/ASIC Half Pitch
Year of Production
Tech
nolo
gy N
od
e -
DR
AM
Half
-Pit
ch
(n
m)
10
100
1000
1995 1998 2001 2004 2007 2010 2013 2016
DRAM ½ Pitch
MPU/ASIC ½ Pitch
3-year Cycle
2-year Cycle
2-year Cycle
130nm
22nm
150nm
90nm
ISS Korea 2002, March 22, T. Fukushima
MPU Gate Length
Year of Production
1000
1995 1998 2001 2004 2007 2010 2013 2016Tech
nolo
gy N
od
e -
DR
AM
Half
-Pit
ch
(n
m)
10
100
MPU Printed Gate Length
MPU Physical Gate Length
2-year Cycle 3-year Cycle( 2005
@ITRS’99 )
65nm
90nm
45nm
13nm
32nm
9nm
LP-ASIC : 2 years behind to MPU
ISS Korea 2002, March 22, T. Fukushima
2001 2002 2003 2004 2005 2006 2007 2008 2010 2011 2013 2014 2016130 115 100 90 80 70 65 70 45 32 22
1999 EditionEOT(nm)
MPU 1.5–1.9 1.5–1.9 1.5–1.9 1.2–1.5 1.0–1.5 0.8–1.2 0.6–0.8 0.5–0.6
2001 EditionMPU/ASIC 1.3–16 1.2–1.5 1.1–1.6 0.9–1.4 0.8–1.3 0.7–1.2 0.6–1.1 0.5–0.8 0.4–0.6 0.4–0.5
LOP 2.0-24 1.8-2.2 1.6-2.0 1.4-1.8 1.2-1.6 1.1-1.5 1.0-1.4 0.8-1.2 0.7-1.1 0.6-1.0
LSTP 2.4-2.8 2.2-2.6 2.0-2.4 1.8-2.2 1.6-2.0 1.4-1.8 1.2-1.6 0.9-1.3 0.8-1.2 07-1.1
DRAM 5 4.5 4.1 3.6 3.3 3 2.7 1.55 1.05 0.55
YearT. Node (nm)
EOT(nm)
■ High-k needs to be introduced for LSTP ASIC in 2005:Ig<1pA/um, EOT=1.8nm
Gate Dielectrics / EOT nm (High-k)
■ MPU / HP-ASIC in 2007
ISS Korea 2002, March 22, T. Fukushima
Effective Dielectric Constant (Low-k)
2001 2002 2003 2004 2005 2006 2007 2008 2010 2011 2013 2014 2016130 115 100 90 80 70 65 70 45 32 22
1999 EditionMPU 2.7– 3.5 2.7– 3.5 2.2– 2.7 2.2– 2.7 1.6– 2.2 1.5 <1.5 <1.5
DRAM 4.1 3.0–4.1 3.0–4.1 3.0–4.1 2.5–3.0 2.5–3.0 2.0–2.5 2.0–2.3
2001 EditionMPU/ASIC <2.7 <2.7 <2.7 <2.4 <2.4 <2.4 <2.1 <1.9 <1.7 <1.6
DRAM 4.1 3.0–4.1 3.0–4.1 3.0–4.1 3.0-4.1 2.6–3.1 2.6–3.1 2.3–2.7 2.3–2.7 2.1
k
k
YearT. Node (nm)
ISS Korea 2002, March 22, T. Fukushima
Lithography
■ Push Optical Lithography to its Limits : 65 nm Node ● Requires very tight Control
Resist Mask CD Control
■ Introduction of Next Generation Lithography (NGL)
● Requires New Infrastructure ● Could’nt reach the Consensus ; in a state of Chaos
ISS Korea 2002, March 22, T. Fukushima
PEL
IPL
157nm
PXL
Lithography Potential Solutions
2000 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 2016
Node 130 90 65 45 32 22 nm
EUV(13nm)
ML2
KrF(248nm)
ArF(193nm)
EPL
NGL
ISS Korea 2002, March 22, T. Fukushima
Design / Test / Assembly & PKG
■ Design ● Design Cost Model added
- Rapid Increasement of Design Cost threatens the future
■ Test
● Reliability Evaluation added- A lot of difficulties pointed out in ITRS99 eliminated by DFT - Development of New Method for acceleration of Potential Defects needed urgently
■ Assembly and Packaging
● Scope expanded- MEMS , Optoelectronics, Discrete (Passive Component)- Passive Component embeded PCB
ISS Korea 2002, March 22, T. Fukushima
FI / YE
Wafer Mfg.FEOLBEOL
Chip Mfg.Probe/Test
Singulation
Product Mfg.Packaging
Test
1999 ITRS
2001 ITRS
■ Factory Integration ● Scope expanded
■ Yield Enhancement (former Defect Reduction)
● Scope expanded━ Defect Detection and Characterization━ Yield Learning
ISS Korea 2002, March 22, T. Fukushima
■ System Drivers Chapter •Technologyn Development Trends per Market Segment are analized •Technology / Development Timing Demands by Market Segment are extracted
■ Emerging Research Devices Section•Non-Classical CMOS, new memory device, new logic device and new architecture are proposed
■ DRAM half pitch•3-year Cycle Scaling after 2001(90nm in 2004, 65nm in 2007, 32nm in 2010)
■ MPU / ASIC-HP half pitch•2-year Cycle Scaling until 2004, then 3-year Cycle Scaling
■ MPU / ASIC-HP Gate Length•2-year Cycle Scaling until 2005. LP-ASIC is 2 years behind to MPU
■ High-k•Introduction is needed in 2005 for LSTP-ASIC, in 2007 for MPU / HP-ASIC
■ Low-k: decelerated
■ Push Optical Lithography to its Limits •No consensus was reached
Summary