1

IEEE TOPOLOGY REVIEW OFDC/DC CONVERTERS

Louis Diana - MGTS

2

IEEE TOPOLOGY REVIEW

Buck converter theory of operationDiscontinuous vs. Continuous mode of operationVoltage mode feedback and Current mode feedbackDesign considerations

Boost converter theory of operationDesign considerations

Flyback converter theory of operationDesign considerations

SEPIC Converter theory of operationDesign considerations

3

Synchronous Buck

SR

PWM

VCC

COMP

GND

Z

Z

Z

Output

SynchronousRectifier

SW Node

Switch

Control Circuit

DC Input

Averaging Circuit

+

4

Synchronous Buck WaveformsContinuous Conduction Mode

Verror amp

CLK RAMP

FET SOURCE

PWM

FET CURRENT

RECT. CURRENT

I OUT

Inductor current

5

Synchronous Buck WaveformsContinuous Conduction Mode

Verror ampCLK RAMP

FET SOURCE

As the load current goes down the converter becomes less continuous but D is still equal to Vout /Vin

I OUT

IND CURRENTI

I OUT

0A

Verror ampCLK RAMP

FET SOURCE

I OUTIND CURRENT

I

0A

FET CURRENT

RECT. CURRENT

FET CURRENT

RECT. CURRENT

6

Synchronous Buck WaveformsDiscontinuous Conduction Mode

Verror amp

CLK RAMP

FET SOURCE

I OUT

IND CURRENT

I

I OUT

0A

The load current has gone down the the point where the converter becomes discontinuous D no longer equals Vout /Vin

FET CURRENT

RECT. CURRENT

7

Basic Relationships

outin2

in

outO

outinout

in

outon

VVVV

TsI2LD

LTsD)V(V∆I

VV

TstD

⋅−⋅

⋅=

⋅⋅−=

==

Continuous Conduction Mode (CCM)

Discontinuous Conduction Mode (DCM)

8

Inductor ConsiderationsBenefits of low L values

Lower DCRHigher IsatHigher di/dt

Transient response improvesLess output capacitance required for given transient performance

Benefits of high L valuesLower ripple current

Lower AC losses (skin effect, hysteresis)Lower RMS current in FETsLower RMS capacitor current (mainly output)Continuous inductor current over broader load rangeLess C required for equivalent output ripple

BVrms 10 8

⋅

4.44 Ae⋅ N⋅ f⋅:=

9

General Inductor Guidelines

Size for ∆IL to be 10% to 30% of full load current

Winding losses usually dominate

12IL

IIL whereRLILPL2

pp2out

2RMS

2RMSAVG

∆+=⋅=

10

Inductor and FETs

IRIPPLE/ILOAD (%)

0 10 20 30 40 50 60 70 80 90 1000.80

0.85

0.90

0.95

1.00

1.05

1.10

1.15

1.20

1.25

Nor

mal

ized

Sw

itch

and

SR P

ower

Los

s (W

)

Increasing ripple increases losses

Similar effect for capacitor ESR loss

11

MOSFETsBoth main switch and synchronous rectifier should be N-type for best efficiency

Many interrelated issuesOutput capacitance vs. switching lossGate capacitance vs. switching speedGate capacitance vs. driver power loss

Primary TradeoffsPackagePower lossCost

12

Switch FETLosses vs. Frequency

0.00

0.05

0.15

0.20

0.25

0.35

100 k

0.10

0.30

10 M

Switc

h Lo

sses

(W)

fSW - Switching Frequency - Hz

ConductionGateSwitchingOutput

Losses

Data for Si4866DY switch, Si4836DY rectifier, 2A ripple current and 10A load

13

Rectifier FETLosses vs. Frequency

0.00

0.05

0.15

0.20

0.25

0.35

100 k

0.10

0.30

10 M

Switc

h Lo

sses

(W)

fSW - Switching Frequency - Hz

Channel ConductionGateDiode Conduction

Losses

Note rise in diode conduction loss as Fs rises.Data assumes 20-ns of diode conduction time per SW edge

14

FET Selection

Compare different FETs in both positions

In general higher F and higher input voltage mean Higher switching losses therefore use lower Qg switch FET to cut switching losses

For rectifier FET, low RDS(on) is most important, but don’t ignore gate power

15

SW Node Ringing

Can affect converter operation

Worst on rising edge of SW (highest di/dt transition)

Caused by parasitic L and C

L in the FET from the SW node to Vin or GNDC from SW node to GNDHigh layout dependence

Bottom Gate (1 V/div)

SW (1 V/div)

dV/dt Bump

t - Time - 50 ns/div

16

SW Node Ringing Remedies

Improve layoutMinimize loop areasMinimize trace inductanceKeep SW node area low (secondary effect, conflicts with cooling rectifier FET)

Slow down SW node edge transitionsSeries gate resistor in switch FET gate lead

Add a snubber

17

Power CapacitorsSelection Considerations

Power DissipationESR

Ripple PerformanceESR

Transient PerformanceESRCapacitanceESL

CostSizeReliability

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Relative Capacitors Characteristics

Standard Al ElectrolyticHigh ESRLow costLow current capabilityNot really suited to DC/DC converters

OSCONLow ESRMedium costHigh current capability

19

Relative Capacitors Characteristics

Solid PolymerLow ESRVery high costMedium current capability

POSCAPLow ESRHigh costMedium current capability

20

Relative Capacitors Characteristics

TantalumMedium ESRMedium costMedium low current capability

CeramicVery low ESRVery high costHigh current capability in bulk

21

Capacitor Impedance

0.1 100001 10 100 10000.001

0.01

0.1

1

10

RC

AP

- Im

peda

nce

- Ω

f - Frequency - kHz

470 µF Tantalum1000 µF OSCON

180 µF Solid Polymer10 µF Ceramic

22

Choosing Capacitor Size

Input FilterSized for AC current handling

Output FilterTransient events on loadOutput voltage ripple

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Input Capacitor Current

+ Cin

Ic(sw OFF)

Ic(sw ON) SW1

SW2

Lout

Cout

Iin

Iload

Isw = Ic + Iin

∆ISWpp

Io

Io

( )D1ID12

∆I)I(II

ESRIP

2avgin

2ppSW2

avginpkSWRMScap

cap2

RMScapcap

−⋅+⋅

+−=

⋅=

24

Input Ripple Voltage

Cin current

Switch current

ESR Voltage

C

ESL Voltage

Cin Ripple Voltage

Usually a secondary considerationContribution from ESR, ESL and capacitance value

25

Output Capacitor CriteriaSelection Considerations

Transient performanceBulk capacitanceESRESL

Output RippleESRBulk valueESL has minor effect

26

Transient Performance

OutputCurrents

VoutAC

Coupled

Iload

0 A

ESLESR

Cout &ESR

Cout &ESRESL

ESR

Iinductor

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Output CapacitorSelection Considerations

2A to 10A load step @ 15A/µsUse 470µF SP: 15mΩ, 3nHTo help reduce spikes, add two 10µF ceramicsYields

24.5mV undershoot39mV overshoot8mV spikes21mV of ripple

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AC VMC Model for Buck Converter

RTN

PWMand

Drivers

VREG

OscillatorRamp

Generator

+

VREF

PVCC

KPWM

VDD

VCFB

DIFFO

VOUT

GSNS

+

KFBKEA

COMP

PGND

LDRV

BOOT

SW

HDRV

C RLOAD

VIN

RTN

VOUT

XLC

SW

VCXLC VOUT

KFB

KEA

VREFKPWM

VIN

SW

TV(s)

+-

VOUT

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AC CMC Model for Buck ConverterPeak CMC PWM is the result of a comparison between a control signal, a signal proportional to the inductor current, and a fixed saw tooth (for slope compensation)Whether it is:

Current feedback and sawtooth vs. control signalCurrent feedback and control signal vs. sawtoothControl signal and sawtooth vs. current feedback

From a small signal standpoint, the resulting modulation is the same!

Sawtooth

ControlCurrent

+Modulator Output

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AC CMC Model for Buck Converter

Vout

VIN

RTN

RTN

HDRV

SW

LDRV

PGND

COMP

FB

DIFFO

VOUT

GSNS

PVCC

VDDCS-

CS+

BOOT+

+

+

+

OscillatorRamp

Generator

PWMand

Drivers

VREG

RloadC

LSW

VREF

RsCs

XLC

KFBKE

A

KPWM

VCKCS

+Vout

•V•C•X•LC •V•OUT

•K•FB

•K•EA

•V•REF•K•PWM

•H•e•(s)

•K•CS •X•I

•V•IN

•SW

•T•V•(s)

•T•I•(s)•I•L

•+•-

•+

•-

•V•C•X•LC •V•OUT

•K•FB

•K•EA

•V•REF•K•PWM

•H•e•(s)

•K•CS •X•I

•V•C•X•LC •V•OUT

•K•FB

•K•EA

•V•REF•K•PWM

•H•e•(s)

•K•CS •X•I

•V•IN

•SW

•T•V•(s)

•T•I•(s)•I•L

•+•-

•+

•-

31

DC/DC Boost ConverterTPS40210 controller operating ~700 kHz9- to 18-V input (12-V nominal)24-V output with 1-A capability

32

Assumptions in Steady-State Operation1. V•s balance across the inductor

Energy “in” during a period equals energy “out” during the same periodNet change of charge in a period is zero

2. Charge balance in the output capacitorEnergy “in” during a period equals energy “out” during the same periodNet change of charge in a period is zero

3. Ripple voltage across the capacitor is small compared to the output DC voltage

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Basics of Operation

No switching: VOUT ~ VIN

SW turns ON:

Voltage across the inductor approaches ~ VIN

Energy is stored as function of input voltage, L, tON

D is biased OFF, blocking discharge of the output capacitor

SW turns OFF:

Stored energy is released through D to the output

Non-pulsating input current – Pulsating output current

Level of ripple determined by CCM or DCM operation……

COUTLoad

Input OutputL

SW

D

+ -Current

- +

34

Basics of Operation

No Switching: VOUT ~ VIN

SW turns ON:Voltage across the inductor approaches ~ VIN

Energy is stored as function of input voltage, L, tON

D is biased OFF, blocking discharge of the output capacitor

SW turns OFF:Stored energy is released through D to the output

Non-pulsating input current – Pulsating output currentLevel of ripple determined by CCM or DCM operation……

COUT Load

Input OutputL

SW

D

+ -- +

Current

35

Right-Half-Plane ZeroThe effect of any control action during the ON time is delayed until the switch is turned OFFOutput response is initially in the opposite direction of the desired correction⇒ RHP Zero

COUTLoad

Input OutputL

SW

D

1 k 100 k10 k0

10 –100

20 0

30 100

40

Frequency (Hz)

Gai

n ( d

B)

10010

Gain

Phase LHP Zero

Phase RHP Zero

Pha

se ( D

egre

es)

36

Continuous-Conduction Mode (CCM)Switching cycle is composed of two intervals

1. When the switch is ON, stored energy builds in the inductor

2. When the switch turns OFF, energy transfers to the output through the rectifier

♦ Inductor current ON-time slope:

♦ The inductor current OFF-time slope:

♦ The switch duty cycle:

≈ INIL(ON)

Vm

L

−≈ IN OUT

IL(OFF)V V

mL

= − INCCM(ideal)

OUT

VD 1

V

Inductor Current

Rectifier Current

Switch Current

Switch- Node

Voltage

Switch OnSwitch

Off

∆IL(OFF)

∆IL(ON)

IOUT_AVG

mIL(ON) mIL(OFF)

VOUT

37

Loss Elements in CCM“ON” losses

Inductor DCRMOSFET RDS(ON)

Current sense resistor

“OFF” lossesRectifier voltage dropInductor DCR

COUT Load

OutputVoltage

LInput

Voltage

RL

ON Losses OFF LossesD1

RISENSE

RDS(ON)

CCM

2V I (R R ) V I (R R ) 4I (R R R ) (V V )IN OUT DS(ON) ISENSE IN OUT DS(ON) ISENSE OUT L DS(ON) ISENSE OUT d

2(V V )OUT d

D 1+ × + + + × + − × + + × +

+= −

INCCM(ideal)

OUT

VV

= − If losses => zero D 1Reduces to

38

Discontinuous Conduction Mode (DCM)Switching cycle is composed of three intervals

1. Energy is stored in the inductor during the ON time of the switch

2. When the switch turns OFF, energy transfers to the output through the rectifier

3. A third interval during which the energy in the inductor is zero

Inductor Current

Rectifier Current

Switch Current

Switch- Node

Voltage

Switch OnSwitch

Off

Idle period

VOUT

IOUT_AVG

VIN

tfall

∆IL(OFF)

∆IL(ON)

mIL(ON) mIL(OFF)

There is essentially no current flowing in the power stage during the third interval

39

Designing for CCM or DCMGiven fixed-frequency operation, the only parameter to adjust is the inductance

For a given L, this is the CCM/DCM boundary current

IN sOUT _ DCM CCM CCM

V TI D (1 D )

2L×

= × × −

5V (V)IN

I (A

)O

UT_

DC

M

5 10 15 20 250

0.03

0.06

0.09

0.12

0.15CCM

Operation

DCMOperation

40

Current in CCM

Continuous current flow in inductor

Some “pedestal” in diode and switch current

Diode switching and recovery losses significant in CCM

COUTLoad

Input OutputL

SW

D

6

4

2

0Indu

ctor

Cur

rent

( A)

6

4

2

0Dio

d eC

urr e

nt(A

)

6

4

2

0Switc

hC

urre

nt(A

)

CCMIInductor

CCMRMS =2.1 A

CCMIDiode

CCMAVG =1.0 A

CCMISwitch

CCMRMS =1.5 A

0 2 4 6Time (µs)

41

Current in DCM

Large peaks in all currents

RMS current is higher

No reverse recovery losses in the rectifier

COUTLoad

Input OutputL

SW

D

6

4

2

0Indu

ctor

Cur

rent

( A)

6

4

2

0Switc

hC

urre

nt(A

)6

4

2

0Dio

d eC

urr e

nt(A

)

DCMIInductor

DCMRMS =3.0 A

DCMIDiode

DCMAVG =1.0 A

DCMISwitch

DCMRMS =2.2 A

0 2 4 6Time (µs)

42

CCM/DCM - Differences in Current

Peak and RMS currents are larger in DCM

Conduction losses will be higher

Diode-switching and recovery losses will be higher in CCM

MOSFET turn-OFF losses higher in DCM

For the diode rectifier, the average current is the same

COUTLoad

Input OutputL

SW

D

0 2 4 6

6

4

2

0Indu

ctor

Cur

rent

( A)

CCMIInductor

DCMIInductor

DCMRMS =3.0 A

CCMRMS =2.1 A

6

4

2

0Dio

deC

urr e

nt(A

)CCMIDiode

DCMIDiode

DCMAVG =1.0 A

CCMAVG =1.0 A

6

4

2

0Switc

hC

urre

nt(A

)

CCMISwitch

DCMISwitch

DCMRMS =2.2 A

CCMRMS =1.5 A

Time (µs)

43

VMC CCM Small-Signal ModelSimplified small-signal block diagram Fm Gvd(s) VOUT

VC D

VIN

KEAVREF+

–

KFB

T (s)v

Modulator gain, Fm

ma s

1Fm T

=×

OscillatorSawtooth

ResultingPWM

ma

Control Voltage

PWM

Oscillator Sawtooth

Control Voltage +

–

44

Peak-Current-Mode ControlModulator gain

mn s

1Fm T

=×

n IL(ON) ISENSE CSm m R A= × ×

Where

Switch Current

Resulting PWM

Ts

mn

PWM

Switch Current

ErrorAmplifier

RISENSE

ACS

Control Voltage

++

––

Control Voltage

Fm Gvd(s) VOUTVCVREF

D++

––

VIN VIN

KEA

TI(s)

Tv(s)

A RCS ISENSE×

KFB

He(s)

Gid(s)

45

FLYBACK CONVERTER

+

+

46

FLYBACK CONVERTER

Verror amp

CLK RAMP

FET SOURCE

Discontinuous Waveforms

PRIMARY CURRENT

SECONDARY CURRENT

47

FLYBACK CONVERTER

Verror amp

CLK RAMP

FET DRAIN

PWM

PRIMARY CURRENT

SECONDARY CURRENT

CONTINUOUS WAVEFORMS

48

FLYBACK CONVERTER

FET DRAIN

PRIMARY CURRENT

SECONDARY CURRENT

A ring appears on the drain that is caused by the leakage inductance resonating with the Coss of the switch FET the other ring is caused by the dead time when the transformer is reset and

waiting for the next on time .

49

FLYBACK CONVERTERDiscontinuous Continuous

Volt seconds in equals volt seconds out

Volt seconds in equals volt seconds out

tonmaxVout 1+( ) Tr( ) .9⋅ T⋅

Vinmin 1−( ) Vout 1+( ) Tr⋅+tonmax

Vout 1+( ) Tr( ) T⋅Vinmin 1−( ) Vout 1+( ) Tr⋅+

V LdIdT

⋅ V LdIdT

⋅

dIVl Ton⋅

L dIVl Ton⋅

L

LpVinmin tonmax⋅( ) 2

2.5 T⋅ Pomax⋅Lp

Vinmin 1−( ) Vinmin⋅ tonmax 2⋅

2.5 Polow⋅ T⋅

Ipri_pVinmin tonmax⋅

LpIpri_ramp

Vinmin tonmax⋅

Lp

IcprPin

Vinminton

Tmax⋅Pin

12

Lp⋅ Ip 2⋅

T

Ipri_peak .5 Ipri_ramp⋅ Icpr+

Ipri_step Ipri_peak Ipri_ramp−

50

SEPIC CONVERTER

51

SEPIC CONVERTER

52

SEPIC CONVERTER

53

SEPIC CONVERTERDesign Equations

IL1avg1Vout Ioutmax⋅

η Vinmin⋅:=Duty

VoutVout Vin+

:=

IL1pk1 IL1avg1Vinmin dmax⋅

2 Lact1⋅ fs⋅+:=

To find an inductor which will keep the converter in the continuous conduction mode this value is used for both inductors

LVin D⋅

fs Io⋅VoVin

1+

⋅

>

54

4 SWITCH BUCK BOOST

BoostGateDrive

BuckGateDrive

PWM RampWaveform

Boost

BuckVin Max

Vin Min

Vin = Vout