www.edn.com November 11, 2004 | edn 85

TOP-RATE PERFORMANCE MEANS UNDERSTANDING

CLOCKING, POWER SUPPLIES, AND TRANSISTOR-

SWITCHING CHARACTERISTICS.

Class D amplifiers have evolved to the point atwhich they are a viable alternative in most au-dio applications. However, because their prin-

ciples of operation differ from those for linear am-plifiers, it’s worth examining a new set of factors toget the best possible performance from this ampli-fier class. Clocking, power supplies, and the switch-ing characteristics of the output transistor are areasof concern as problems and potential solutions inClass D performance optimization.

All Class D amplifiers use a square waveform, usu-ally a PWM (pulse-width modulated) signal, to drivethe output stage. Passive LC filtering then convertsthis signal into an analog waveform suitable for aloudspeaker. However, there are different ways toproduce the PWM signal in the first place. SomeClass D amplifiers compare an analog input signalagainst a high-frequency sawtooth waveform; otherstransform digital audio data to PWM in the digital

domain. With native digital audio sources, such asDVDs, CDs, and digital broadcasting, the second, all-digital architecture has the advantage of eliminatingfrom the signal path two potential sources of noise:a DAC and an analog comparator (Figure 1).

However, digital PWM modulators present theirown design challenges. They derive their output sig-nals from a high-frequency internal clock runningat a multiple of the master clock rate. Depending onthe digital input, the PWM outputs are periodicallyheld high for fewer or more clock cycles before re-turning to their low state. It’s crucial to keep the in-ternal clock clean, because any jitter would causerandom variations in the timing of the PWM signaledges, which appear as noise in the analog output.It is therefore preferable to generate it from the sys-tem master clock using an on-chip, low-jitter PLL(phase-locked loop).

This method filters out most jitter, as long as the

Getting the most from Class Dmultichannel audio amplifiers

DIGITAL-AUDIO

SOURCE

MCLK

I2SDATA

WM8608CONVERSION OF 5.1/7.1 TO 6.1 CHANNELSBASS MANAGEMENTFOUR-BAND GRAPHICS EQUALIZERDIGITAL VOLUME CONTROLDYNAMIC PEAK COMPRESSIONNOISE SHAPING/LINEARIZATIONCONVERSION TO PWM SUBWOOFER

OUTPUT STAGELOWPASSLC FILTER

OUTPUTSTAGE 1

LOWPASSLC FILTER

AS MANY AS6.1 CHANNELS

PWM SIGNALLVDS/CMOSSIGNALING

VS

REGULATEDPOWER SUPPLYLC FILTER

AVDD

DVDD,BVDD

MCLK CRYSTAL27 MHz (MPEG MODE)

24.576 MHz (48-kHz SAMPLING)22.5792 MHz (44.1-kHz SAMPLING)

NOTES:AVDD: ANALOG SUPPLY—FEEDS ANALOG SUBCIRCUITS OF THE MODULATOR IC.DVDD: DIGITAL SUPPLY—FEEDS DIGITAL CORE OF THE MODULATOR IC.BVDD: BUFFER SUPPLY—FEEDS OUTPUT BUFFERS OF THE MODULATOR IC.

The Class D amplifier architecture for native digital inputs can have a different architecture from the older design for analog inputs.

F igure 1

designfeature By Julian Hayes, Wolfson Microelectronics

designfeature Class D amplifiers

86 edn | November 11, 2004 www.edn.com

master clock is reasonably clean. Ideally,the master clock should itself be pro-duced on-chip to prevent interferencefrom the switching output stages or toprevent other sources from corrupting it,because the connection between oscilla-tor and PLL remains on-chip. It alsoeliminates external PLL-filter compo-nents, reducing sensitivity to the pc-board layout. Finally, inserting a decou-pling filter close to the supply pin that ispowering the PLL helps prevent supplynoise from affecting it.

OUTPUT-STAGE DESIGN HAS ITS TWISTS

Much like analog amplifiers, Class Doutput stages can be single-ended withtwo transistors per channel (half bridge)or of the four-transistor type BTL(bridge-tied load). Designers usually pre-fer the BTL configuration, because it of-fers single-supply operation without a dcblocking capacitor (Figure 2).

Single-ended output stages require ei-ther a large capacitor to remove dc biasfrom the output or more expensive splitsupplies. Another advantage of the BTLconfiguration is that it doubles the out-put swing (V

PP) from V

S(the supply volt-

age) to 2VS, quadrupling the theoretical

maximum power P,MAX

, that can be de-livered for a given supply voltage:

In practice, the PWM controller’s dutycycle, �, usually spans about 5 to 95%,constraining the output swing from 2V

S

to around 1.8VS, and resistive losses fur-

ther reduce power output. You can cal-culate these values as:

where RPARASITIC

includes the on-resistanceof one NMOS and one PMOS device aswell as the supply’s internal resistance, theseries resistance of the filter inductors,and pc-board track resistances.

An easy way to maximize output pow-er is to use low-impedance speakers. Forexample, a 4� load can draw twice asmuch power as an 8� speaker for thesame supply voltage. However, thismethod slightly decreases power effi-ciency, because parasitic resistances be-come more significant compared withthe load itself.

Dynamic peak compression makes au-dio signals sound louder without resort-ing to a more powerful output stage. Es-sentially, it amplifies the signal in thedigital domain, dynamically adjustingthe gain to prevent clipping. However,rapid gain changes can audibly distortlow-frequency signals. Recently intro-duced PWM modulators are overcomingthis issue by making the peak compres-sor’s decay time frequency-dependent.This step allows the gain to change rap-idly for high-frequency signals and slowsit for the lower part of the audio range.

Selecting appropriate components forthe output stage is critical, because theircharacteristics have a strong effect on sys-tem performance. First, the power MOS-FETs need to withstand the voltage andcurrent they are expected to handle. Be-cause the rapidly switching PWM signalcan induce a back-EMF (electromotiveforce) in the output-filter inductors, themaximum rated drain-source voltage

should be at least 25 to 50% higher thanthe supply voltage. Second, the on-re-sistance of the power MOSFETs causesheating and lowers power efficiency, soit should be as low as possible. Com-monly used speakers with impedances of4 or 8� require on-resistance to be wellbelow 0.2� to keep resistive losses rea-sonably small.

Switching delays are another impor-tant parameter for selecting output de-vices. PWM pulse widths usually rangefrom hundreds of nanoseconds to a fewmicroseconds. To preserve signal integri-ty, the switching delay of the output stage(power MOSFETs plus level shifters)should be smaller than the minimumPWM pulse width. A less obvious poten-tial issue is the matching of switchingcharacteristics between transistors. If, forexample, an NMOS device turns on sig-nificantly faster than its PMOS counter-part switches off, the on-times of bothdevices may overlap for a short time onsignal edges. With both devices conduct-ing, the power supply essentially short-circuits, leading to reduced power effi-ciency, increased heat dissipation, and apossible supply-voltage dip, which woulddistort the audio signal.

Finally, designers should pay attentionto the MOSFET gate capacitance. A largecapacitance causes RC delays that slowthe switching of the transistors. More-over, it also increases power dissipationand heating in the level shifter driving theMOSFET. For the same reasons, the lev-el shifter’s input capacitance should alsobe small.

Several manufacturers offer integratedoutput stages that you can connect di-rectly to a PWM modulator. These ICs,

The H-bridge output has the virtue of single-supply operation without a dc blocking capacitor.

PWMSIGNAL

LOW-ESRRESERVOIRCAPACITOR

LEVELSHIFTER

PMOS PMOS

NMOS NMOS

LC LOWPASS FILTER

INVERSE OFPWM SIGNAL

LEVELSHIFTER

SUPPLYVS

F igure 2

designfeature Class D amplifiers

88 edn | November 11, 2004 www.edn.com

which generally include four matched-power MOSFETs, also manage the levelshifting of the PWM signal from themodulator output levels to higher volt-ages that can correctly switch the powerdevices. In addition, they usually providebuilt-in short-circuit and overload pro-tection.

PROVIDING POWER IS ALSO CRITICAL

In many ways, the increasing use ofswitching power supplies over tradition-al linear supplies mirrors the rise of ClassD in amplifiers. Both owe their growingpopularity to their high power efficiency,compactness, and reduced cooling re-quirements. Using a switching supply,therefore, helps designers reap the fullbenefits of Class D technology. Never-theless, when cost is the overriding con-sideration, regulated linear supplies canpower Class D amplifiers.

One potential concern with switchedsupplies is EMI (electromagnetic inter-ference) due to the rapid switching oflarge currents. This problem is exacer-bated when switching frequencies in thesupply and the amplifier intermodulate,producing tones that may be audible inthe output. Some PWM controllers offerthe ability to synchronize an externalpower supply with the on-chip PWMmodulator, eliminating intermodula-tion. However, most power supplies onthe market today do not yet allow forsynchronization. Closer cooperation be-tween audio-IC and of power-supply

vendors is necessary to bring power-sup-ply synchronization into the main-stream.

No matter what type of supply youuse, Class D amplifiers are much moresensitive to the quality of the power sup-ply than their linear counterparts. So, al-though Class D technology will almostcertainly reduce power requirements by50% or more, the actual design of thesupply tends to be rather more intricate.The reason is simple: With nothing butswitches (power MOSFETs turned fullyon or fully off) between the supply andthe output, any mains or audio-band rip-ple on the supply rails will modulate theoutput signal. In other words, all-digitalClass D amplifiers have a PSRR (power-supply-rejection ratio) of 0 dB; they es-sentially use the supply as a voltage ref-erence.

Good load regulation—not just at dc,but across the entire audio band—istherefore indispensable; poorly regulat-ed supplies cause harmonic distortion. Anumber of manufacturers provide float-ing regulators that you can add to sup-plies to improve load regulation. Using aseparate regulator for each amplifier out-put can also reduce crosstalk between au-dio channels.

Another key criterion for the powersupply is its ability to handle transients.For the output stage to accurately re-produce the PWM signal, the supplymust be able to rapidly increase or de-crease its current output and without

ringing or a drop in the output voltage.Linear amplifiers are less demanding inthis respect, because the bandwidth ofthe output stage is limited to the audiorange. Thus, a supply that performs wellin a linear system may be unsuitable forClass D.

Reservoir capacitors are the most crit-ical components determining the sup-ply’s transient behavior. First, they needto hold enough charge to prevent a cur-rent surge from causing the supply volt-age to drop until the regulator kicks in.(A fast regulator helps keep the capacitorreasonably small.) Second, because anyparasitic resistance or inductance im-pedes a rapid delivery of the storedcharge, you must use low-ESR (effective-series-resistance) capacitors. But addinga small, low-ESR capacitor in parallelwith a larger, conventional electrolyticcapacitor is insufficient. Because all theoutput power is delivered in short bursts,all of the capacitance needs to have lowESR. Parasitic resistances and induc-tances in pc-board copper tracks areequally detrimental, and you shouldminimize them by placing the reservoircapacitors as close as possible to the out-put stage.

Alleviate demands on the transient be-havior of the supply by arranging for theMOSFETs in the output stages to switchat different times. To this end, recently in-troduced PWM controllers feature aPWM phase-shift function that intro-duces a fixed delay between the PWM

A multichannel Class D amplifier (a) can minimize transient current demand from the power supply if you introduce phase shift in the PWM signal (b).

L

R

LS

RS

C

SW

ONE PWM CYCLE

L

R

LS

RS

C

SW

TOTAL TOTAL

PHASE SHIFTING

(a) (b)

F igure 3

www.edn.com November 11, 2004 | edn 91

designfeature Class D amplifiers

signals for each output channel (Figure3). At a fraction of a PWM cycle, this de-lay is far too short to make an audible dif-ference to the output, but it spreadsswitching transients around the PWMcycle. In a system with six channels, thistechnique significantly diminishes themaximum instantaneous load currentand reduces crosstalk.

THEN THERE’S THE LAYOUT

EMI is invariably a concern in Class D-amplifier design. Wires carrying high-power PWM signals emit electromagnet-ic radiation at the PWM frequency andits harmonics, well into the radio bands.Long, unshielded speaker cables, in par-ticular, behave essen-tially like antennas. Thereconstruction filterstherefore play an im-portant role in achiev-ing compliance withrelevant regulations.Designers often face atrade-off whereby a fil-ter with a low cutofffrequency both sup-presses EMI and atten-uates the high end ofthe audio spectrum, but a high cutoffpreserves a flat frequency response at thecost of increased EMI. High-order filterscan do both but are more expensive andreduce power efficiency. Digital-speak-er equalizers offer a way out. When pro-grammed as a treble boost, they make itpossible to use low-order reconstructionfilters with a low cutoff and still keep thefrequency response flat across the audiorange. You can also use different equal-izer settings to match the system tospeakers with different impedances.

Inside the amplifier, reduce EMI bykeeping the supply rails and the connec-tions between output stages and filters asshort as practicable. If possible, thesecomponents should be on the same pcboard as the power supply. Short, widecopper tracks also make the amplifiermore efficient by cutting resistive losses.In multichannel systems in which thepower MOSFETs make it difficult to placethem all close to the supply, a star con-nection with a low-ESR reservoir capac-itor at each end is ideal for preventingcrosstalk.

The only part of the system that you

can place at some distance from the oth-er circuitry is the PWM controller. Toprevent interference from other systemcomponents from inducing jitter in thePWM signals, some PWM controllers of-fer LVDS (low-voltage differential signal-ing), in which each line terminates witha 100� load. LVDS also reduces electro-magnetic emissions and RC delays due tothe long signal runs.

Three key metrics for consumer-audioamplifiers are THD (total harmonic dis-tortion), SNR (signal-to-noise ratio), andpower efficiency, in which Class D tech-nology indisputably has the edge overanalog. Regarding noise, Class D today ison a par with most analog amplifiers in

the consumer market.Moreover, the SNR bot-tleneck is often not theamplifier but the en-coding of the sourcedata. For example, fortraditional CDs with16-bit data words,quantization noise lim-its SNR to a theoreticalmaximum of 96 dB.With faster PWMswitching, the SNR of

Class D amplifiers may improve furtherin future. The key issue is whether thepower supply and switching transistorscan keep up with the switching speed.THD remains the most critical metric, al-though manufacturers have made muchprogress in this area. With the latest gen-eration of PWM controllers and stable,well-regulated supplies, mass-market de-vices at low output powers have demon-strated THD levels to as low as �80 dB(0.1%). Most likely, future improvementswill hinge on power supplies and outputstages. These two components togetherdominate THD and should ideally be co-designed as one unit.�

Author’s biographyJulian Hayes is the vice president of mar-keting at Wolfson Microelectronics plc,(www.wolfson.com), Edinburgh, UK. Hehas an honors degree in physics fromSouthampton University (UK).

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SHORT, WIDE COPPER

TRACKS MAKE THE

AMPLIFIER MORE

EFFICIENT BY CUTTING

RESISTIVE LOSSES.