Upload
asis
View
69
Download
0
Tags:
Embed Size (px)
DESCRIPTION
Software rev: 2005.1.0 Doc. rev: 22Apr05. Top-down Design. System Description Freehand Approach (recommended) Build system with Platform Creator Build software manually Build and run simulation in System Verifier Lab 15 – Building a Top-down System Guided Approach (optional) - PowerPoint PPT Presentation
Citation preview
Top-down Design
System Description
Freehand Approach (recommended)
– Build system with Platform Creator
– Build software manually
– Build and run simulation in System Verifier
Lab 15 – Building a Top-down System
Guided Approach (optional)
– Build system with Platform Creator Top Down Flow Wizard
– Use automated software build
– Build and run simulation from Platform Creator
Lab 16 – Building a Design with the Top-down Flow Wizard
Software rev: 2005.1.0Doc. rev: 22Apr05
To illustrate top down design, we will build a small system. This is the block diagram.
Instruction
i_AHB
Processor
Data
ROM
RAM
i_Clock
A simple system to perform shift operations on unsigned int data
20 / 32
32 / 32
32 / 32
20 / 32
0x0(0x100000)
0x400 0000(0x100000)
AddrBits / DataBits
i_Reset
Hardware PlatformSystem Specification
(Application UT Description)
appHW1
Software Block Hardware Block
port_inSlave
Memory Location(Size)
Tube1 / 8 0x8000 0000(0x2)
port_outMaster
port_inMaster
port_outMaster
port_inSlave
port_outSlave
appSW1
Top
You are provided libraries, scripts and files for building the system
Working directory
Software/
ARM_IPE_sw_driver.h
boot.s
ARM_IPE_sw_driver.cpp
Makefile
The executable software image
trainClass/
peripherals/
library/ topdown/
BuildAuxLib.tcl
AuxiliaryLib.xml
Scripts for building the components
Software source to run on the platform
Top/Scripts/
Auxiliary/
include/
src/
BuildPeriphLib.tcl
PeripheralsLib.xml
include/
src/
BuildPlatform.tcl
BuildApplication.tcl
IPE/ Boot/
Platform/
Auxiliary and Peripheral block libraries -
clock, memory, display
BuildTopDownSystem.tcl
build/
Application/
sim
Makefile
Two alternative approaches will be shown to build and simulate the system
Build system with TopDown Wizard
Make use ofAutomated Software
build
Build and run simulation
In Platform Creator
Guided approach
Build system without TopDown Wizard
Build Softwaremanually
Build and run simulation
In SV
Free-hand approach
Two approaches can be mixed.
To build the system, you will perform these steps in Free-hand Approach
Platform Creator:
1. Open the Platform2. Open or Import the System Specification3. Open the Scenario Library4. Partition blocks to software on the core5. Resolve abstract channels6. Create the Memory Map7. Check the design8. Export the design9. Save a project file
System Software:
10. Make the System Software
Simulation:
11. Build and run simulation
1. Open the platform project file.
a. Select File->Open…
b. Navigate to topdown/Platform directory
c. Select the platform_ARM926.xml project file
d. The platform blocks appear in the library drawer
2. Open and merge the system specification
a. Select File->Open…
b. Navigate to topdown/Application directory
d. Set checkbox to merge with current system
c. Select the application.xml project file
e. The system blocks appear in the library drawer
For convenience, flatten the system specification by moving the blocks to the hardware top level
h. Position the system specification blocks
appSW1 appHW1
top1 – Delete if you wish
f. Select the blocks
top1
platform
g. Drag and drop under HARDWARE
3. Open the Scenario Library in preparation for interface synthesis
a. Select Library->Open…
b. Navigate to scenario library location
c. Select the AMBA HWSW library d. The scenario blocks become
available in the library window
When finished, the System Diagram will look like this
a. Drag and drop the appSW1 block onto the SOFTWARE text to the right of the icon
appSW1 appHW1
4. Partition the specification by assigning the appSW1 block to the software portion of the system
As a result of the partitioning, the connections are broken and must be resolved
The unresolved ports must be connected to the software block on the processor core
The appSW1 block now appears under the SOFTWARE hierarchy
Interface Synthesis produces a HW part and a SW part.
The HW part is bus specific. The block is a bridge between a specific bus node and a CoWare handshake protocol on the SW application side.
The SW part is core specific. The block contains the SW drivers.
Two basic types of HW/SW Interface Synthesis to resolve the abstract channels:• Memory mapped (MM) SW is the master• Interrupt driven (ITR) HW is the master
A software device driver will write to this memory mapped port
These ports are masters and must cause an interrupt of the core, which in turn, will cause an interrupt service routine to read from a memory address
appHW1
a. Select the port_inSlave port on the appHW1 block
b. Pop up the menu with the right mouse button and select the Enable Handshake scenario
appHW1
5. Platform Creator will resolve the abstract channels by using scenarios available from the scenario library
The hardware interface block is instantiated and connected to the hardware port.
The software device driver is instantiated and connected to the software port.
appHW1
The result of the interface synthesis is the instantiation of a hardware interface block and the software device driver
The hardware interface blocks are instantiated and connected to the port_outMaster and port_inMaster ports.
The software device drivers are instantiated and connected to the software ports.
appHW1
Interface synthesis for the master ports produces hardware and software blocks to implement an Interrupt-driven scenario
c. Select the Full Handshake Scenario for the port_outMaster and port_inMaster ports
Add an interrupt priority encoder from the scenario library
d. From the scenario library, add an Interrupt Priority Encoder(IPE) block with two inputs.
Note: In the diagram, we have repositioned the ports of the added block.
appHW1
Connect the HW interface blocks
g. Connect the HW interface blocks to their corresponding locations.
AHB port,clk port, andreset port, respectively
AHB
clk
reset
nIRQ connection is externalized from the hierarchy of the core
h. Check connections by selecting Check->Check Connections.
appHW1
Configure template arguments on the hardware driver blocks
e. Select the appHW1_port_outMaster_driver
block in the editing window and set the delay Template Argument to 100000
Parameter Editor
f. Set the delay for the appHW1_port_inMaster_driver
block to 0
appHW1
6. There are two ways to complete the Memory Map
1. Create the memory map with Platform Creator Select the “Memory Map Table” tab in the Details Window
2. Read in an existing memory map file Select Tools->Import Architecture File…
0x0
0x400 0000
0x4000 0400
RAM
ROMByte addressable
Byte addressable
AHB Map
This is the memory map for our example:
The platform comes with a memory map specifying
these addresses 0x4000 0000
0x4000 0800
0x4000 0c00
appHW1/port_inSlave
inMaster_driver/ p_AHB
outMaster_driver/ p_AHB
hw_driver_2itr / p_AHB
0x8000 0000i_Tube/p
You must add these targets and addresses to
the memory map
Click on Memory Map Table to view the platform memory map
a. Click on Memory Map Table
Initiators
Targets
Cells
InitiatorsTargets
appHW1
This target is reachable by this initiator
at the specified address
Add the application targets to the memory map table
c. Select Add to Memory Map Table. The target appears in the next row of the memory map table.
b. Select target port. Click right mouse button to pop up the menu.
appHW1
Enter addresses in the memory map table cells
e. Double click on a cell. Enter the address and press the Enter key.
d. Make these cells unreachable by the initiators. - Select the cell. - Click right mouse button to pop up the menu and select Remove Link
Note: To remove an unwanted address from a cell, select Remove Link and Set Unreachable from the pop up menu.
appHW1
The exported memory map looks like this
device HARDWARE.appHW1.port_inSlave ram rw 0x1 litend 32;device HARDWARE.appHW1_port_inMasterMY_HW_SUFFIX.p_AHB ram rw 0x4 litend 32;device HARDWARE.appHW1_port_outMasterMY_HW_SUFFIX.p_AHB ram rw 0x4 litend 32;device HARDWARE.i_AHB_IPE_hw_priority_hw_driver_2itr.p_AHB ram rw 0x4 litend 32;device HARDWARE.i_Core.i_DTCM.DATA ram rw 0x4000 litend 32;device HARDWARE.i_Core.i_ITCM.DATA ram rw 0x4000 litend 32;device HARDWARE.i_RAM.p_AHB ram rw 0x100000 litend 32;device HARDWARE.i_ROM.p_AHB ram rw 0x100000 litend 32;device HARDWARE.i_Tube.p ram rw 0x2 litend 32;core HARDWARE.i_Core.i_ARM926IAHB HARDWARE.i_ROM.p_AHB 0x0 HARDWARE.i_RAM.p_AHB 0x4000000 HARDWARE.i_Tube.p 0x80000000 HARDWARE.appHW1.port_inSlave 0x40000000 HARDWARE.appHW1_port_outMasterMY_HW_SUFFIX.p_AHB 0x40000800 HARDWARE.appHW1_port_inMasterMY_HW_SUFFIX.p_AHB 0x40000400 HARDWARE.i_AHB_IPE_hw_priority_hw_driver_2itr.p_AHB 0x40000c00,DAHB HARDWARE.i_ROM.p_AHB 0x0 HARDWARE.i_RAM.p_AHB 0x4000000 HARDWARE.i_Tube.p 0x80000000 HARDWARE.appHW1.port_inSlave 0x40000000 HARDWARE.appHW1_port_outMasterMY_HW_SUFFIX.p_AHB 0x40000800 HARDWARE.appHW1_port_inMasterMY_HW_SUFFIX.p_AHB 0x40000400 HARDWARE.i_AHB_IPE_hw_priority_hw_driver_2itr.p_AHB 0x40000c00,ITCM_DATA HARDWARE.i_Core.i_ITCM.DATA 0x0,DTCM_DATA HARDWARE.i_Core.i_DTCM.DATA 0x0;
mem_map
Initiators
Targets
instanceName type access size endianess portWidth
Core Instance Name
7. Check the System
The occurrence of warnings or errors will cause a message window to open. You may or may not need to correct warnings, but you must correct errors.
8. Export the System
Specify a directory to output the files.
mem_map
9. Save your work as a Project File
Save: creates a “System Project File” (.xml)
Export: writes out several files (SystemC source files, memory map and scripts) that will be used to build a simulation.
system.xml
Project file
sim.tcl
CwrModule_HARDWARE_i_AHB.cpp
HARDWARE.cpp
The bus model exported by the bus library handler
The top level block and sc_main function
The memory architecture file
Scripts for building the simulation
SOFTWARE_ARM926EJS_AHB_Model.cppSystem specification software blocks and drivers
10. Make the System Software
Software/
ARM_IPE_sw_driver.h
Makefile
Link to ...
topdown
SOFTWARE_ARM926EJS_AHB_Model/
Makefile.include
SOFTWARE_ARM926EJS_AHB_Model.cpp
Top/Platform/. . .
CwrModule_HARDWARE_i_AHB.cpp
HARDWARE.cpp
sim.tcl
. . .
. . .
build/
Makefile.include
SOFTWARE_ARM9…
Software exported by Platform Creator
b. Create links to exported software
a. Check that boot.s has been compiled.
If not, make
Existing ARM boot and initialization code.
Boot/IPE/
boot.s
ARM_IPE_sw_driver.cpp
Hardware exported by Platform Creator
Makefile
c. %make
The executable software image
sim
The final step is to build and run the simulation. The key files are:
.h & .cpp: design source filessim.tcl: simulation build scriptsim.fof: list of all .cpp filesmem_map: memory architecture file.scshrc: optional TCL file
SV/SD
db
Postproc
design files
mem_map
sim.tcl
sim.fof
exportedFiles.cpp
exportedFiles.h
.scshrc
List of .cpp files
memory architecture
11. Build and Run the Simulation
In UNIX:% cd ../../Top% scsh
In SV:scsh> source sim.tcl (~ 2 minutes)scsh> set_maf mem_mapscsh> run
ARM Debugger:
i_ARM926: load ../Software/build/simi_ARM926: go
… prints out data…
In SV:scsh> quit
This simulation will print-out:
Top-Down Application (SW)=========================
enabling interrupts ...
Sending: 0x11111111 Receiving: 0x44444444 Replying: 0x11111110
This output was sent by the appSW block to the Tube block. The Tube block writes the data to the output stream and to file i_Tube.log.
Compare to the data received and sent by the hardware block recorded in file appHW.log.
Before starting your lab work, here are some general comments and tips.
By default, Platform Creator displays the HARDWARE portion of the system in the editing window.
Going “Up” the hierarchy displays the three components that make up the total system.
The suffix for default HW and SW instance names can be specified in Preferences.
Default value
Click to edit
Lab Exercise 15 – Building a Top-down System
Guided Approach: To build the system, you will perform these steps
Top Down Flow Wizard:
1. Open Top Down Flow wizard2. Open the Platform3. Open the System Specification4. Partition blocks to software on the core5. Connect open clock/reset ports6. Open the Scenario Library7. Resolve abstract channels8. Connect scenario clock/reset ports9. Connect scenario memory ports 10. Set scenario memory ports addresses11. Connect scenario interrupt ports12. Select block encapsulation13. Export the design14. Exit Top Down Flow wizard
Top Down Flow wizard helps youto go through the complete process
of building the Hardware/Software system.
Simulation:
16. Build and run simulation
Simulation can be built and can be started within Platform Creator.
System Software:
15. Make the System Software
Processor Support Package must support automated SW build.
1. Open Top Down Flow Wizard.
Select Plugins > Wizards > Top Down Flow
2. Open the Platform.
b. Navigate to topdown/Platform directory
a. Push Browse…
d. The platform project file appears in the edit field
e. Push Next >> to load the platform and to get to the next stepc. Select the
platform_ARM926.xml project file
3. Open and merge the system specification.
b. Navigate to topdown/Application directory
a. Push Browse…
d. The application project file appears in the edit field
e. Push Next >> to load the application and to get to the next stepc. Select the
application.xml project file
4. Partition the specification by assigning the appSW1 block to the platform core.
a. Click and select the core
b. Push Next >> to perform partitioning and to get to the next step
5. Connect open clock/reset ports.
a. Click and select the clock/reset master
b. Push Next >> to create connections and to get to the next step
6. Open the Scenario Library.
a. Push Browse…
c. Push Open to open library
b. Select the ARM_AMBA_2_0_HWSW_LIB.xml library
7. Select the Scenario.
a. Click and select the Enable Handshake scenario
b. Select the Full Handshake Scenario for the port_outMaster and port_inMaster ports
8. Connect Scenario Clock and Reset ports.
c. Select the i_Clock/clk master port for all scenario clock ports
d. Select the i_Reset/rst master port for all scenario reset ports
9. Connect Scenario Memory ports to buses.
e. Select the i_AHB bus for all scenario memory ports
10. Set Scenario Memory ports Addresses.
f. Set address 0x40000000 for appHW1/port_inSlave 0x40000400 for appHW1/port_outMaster 0x40000800 for appHW1/por_inMaster
11. Connect Scenario Interrupt ports.
g. Select i_Core/i_ARM926/nFIQ for appHW1/port_outMasteri_Core/i_ARM926/nFIQ for appHW1/port_inMaster
h. Push Next >> to interpret scenario settings and to get to the next step
12. Select block encapsulations for simulation.
a. Click to get a list of available encapsulations.Keep default encapsulations.
13. Select export directory.
e. Push Next >> to set block encapsulations and to get to the next step
a. Push Browse…
d. Push Ok to select directory
c. Select the Top directory
b. Navigate to export directory
14. Exit Top Down Flow wizard.
a. Push Finish to keep settingsand exit the wizard.
Necessary platform modification before starting Top Down Flow wizard
c. From the scenario library, add an Interrupt Priority Encoder(IPE) block with two inputs.
a. Load Platform project file.
b. Open scenario library.
d. Connect IPE to the Core interrupt port and to bus.
e. Add the IPE memory port to memory map table and set the address.
f. Close scenario library.
g. Save Platform in project file.
Automated Software build
b. Export system (software)
a. Set SOFTWARE parameters.
In UNIX:
% cd ../Top/SOFTWARE_ARM926EJS_AHB_Model% make
c. In exported software directorycall make
Platform modification for Automated SW flow
Select core SOFTWARE
15. Make the System Software
Makefile
topdown
SOFTWARE_ARM926EJS_AHB_Model/
Makefile.include
SOFTWARE_ARM926EJS_AHB_Model.cpp
Top/
CwrModule_HARDWARE_i_AHB.cpp
HARDWARE.cpp
sim.tcl
. . .
. . .
Software exported by Platform Creator
boot.s
Hardware exported by Platform Creator
%make
The executable software image
sim
Startup code generated by Platform Creator
Makefile generated by Platform Creator
16. Build and Run the Simulation
ARM Debugger:
i_ARM926: load SOFTWARE_ARM926EJS_AHB_Model/simi_ARM926: go
Lab Exercise 16 – Building a Design with the Top-down Flow Wizard