Today Modeling, Design, and Optimizationese370/fall2015/handouts/lec...1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Lec 8: September 18, 2015 MOS

1

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems

Lec 8: September 18, 2015 MOS Transistor Operating Regions

Part 2

1 Penn ESE370 Fall2015 – Khanna

Today

!  Operating Regions (continued) "  Resistive "  Saturation "  Velocity Saturation "  Subthreshold

!  Drain Induced Barrier Lowering "  Vth


Last Time…


Channel Evolution - Increasing Vgs


Threshold

!  Voltage where strong inversion occurs # threshold voltage "  Vth ~= 2ϕF

"  Engineer by controlling doping (NA)

€

φF = φT lnNA

ni

#

$ %

&

' (


Linear Region

!  VGS>Vth and VDS small

IDS = µnCOXWL( ) VGS −Vth( )VDS −

VDS2

2"

#$

%

&'

€

COX =εOXtOX


2

!  What does voltage along the channel look like?

Voltage along Channel

x=0 x=L

x V(x)

Vs

Vd


V (x) =VS +VD −VSL

x

VG −V (x) =VG −VS +VD −VSL

x

Channel Field

!  When voltage gap VG-Vx drops below Vth, drops out of inversion "  What if VDS > VGS – Vth #VDS – VGS > Vth?

"  Upper limit on current, channel is “pinched off”


VG −V (x) =VG −VS +VD −VSL

x =VT

x = VG −VS −VTVD −VS

L = VGS −VTVDS

L

VDS >VGS −VT ⇒ x < L

Saturation

!  In saturation, VDS-effective=Vx= VGS-VT

!  Becomes:

€

IDS = µnCOXWL

"

# $

%

& ' VGS −VT( )VDS −

VDS2

2)

* +

,

- .

€

IDS = µnCOXWL

"

# $

%

& ' VGS −VT( )2 −

VGS −VT( )2

2

)

* + +

,

- . .


€

IDS =µnCOX

2WL

"

# $

%

& ' VGS −VT( )2[ ]

MOSFET – IV Characteristics

VDS

IDSVGS -Vth

VDS ≥VGS -VTH

VDS <VGS -VTH


New Stuff


Preclass 1

!  What is electrical field in channel?

!  Velocity:

!  Electron mobility: !  What is electron velocity?

Leff = 25nm,VDS =1V

Field = VDSLeff

v = F ⋅µn

µn = 500cm 2 / (V ⋅ s)


3

Moving Charge

!  I increases linearly in V

!  What’s I? "  ΔQ/Δt "  Speed at which charge

moves

!  Velocity increases linearly in V

!  What’s a moving electron?

Field = VDSLeff,v = µn ⋅F

v = µ ⋅VDSLeff

=µn

Leff

"

#$$

%

&''VDS

I = 1R!

"#

$

%&V


Short Channel

!  Model assumes carrier velocity increases with field "  Increases with voltage

!  Are there limits to how fast things (including electrons) can move?


Short Channel

!  Model assumes carrier velocity increases with field "  Increases with voltage

!  There is a limit to how fast carriers can move "  Limited by scattering effects

"  ~ 105m/s

!  How does this relate to preclass 1b calculated velocity?

!  Encounter velocity saturation when channel short "  Modern processes, L is short enough to reach this region

of operation


Velocity Saturation

!  At what voltage do we hit the speed limit? (preclass 1d) "  Vdsat = voltage at which velocity (current) saturates


Velocity Saturation

!  Once velocity saturates:

IDS = µnCOXWL

!

"#

$

%& VGS −Vth( )VDS −

VDS2

2(

)*

+

,-

VDS =VDSAT ⇒ IDS = µnVDSATL

!

"#

$

%&COXW VGS −Vth( )−VDSAT

2(

)*+

,-

VDSAT ≈LvSATµn

⇒ IDS ≈ vsatCOXW VGS −Vth( )−VDSAT2

(

)*+

,-


Velocity Saturation

!  Long Channel !  Short Channel


4

Velocity Saturation

19 Penn ESE 370 Fall 2015 - Khanna

Velocity Saturation

!  Once velocity saturates we can still increase current with parallelism "  Effectively make a wider device


Subthreshold


Below Threshold

!  Transition from insulating to conducting is non-linear, but not abrupt

!  Current does flow "  But exponentially dependent on VGS


Subthreshold

If VGS <Vth,

IDS = ISWL

!

"#

$

%&e

VGS−VthnkT /q

!

"#

$

%&

1− e−VDSkT /q!

"#

$

%&!

"

##

$

%

&&

1+λVDS( )


!  Current is from the parasitic NPN BJT transistor when gate is unbiased and there is no conducting channel

Subthreshold

!  W/L dependence follow from resistor behavior (parallel, series) "  Not shown explicitly in text

!  λ is a channel-length modulation parameter "  Defined empirically

IDS = ISWL

!

"#

$

%&e

VGS−VthnkT /q

!

"#

$

%&

1− e−VDSkT /q!

"#

$

%&!

"

##

$

%

&&1+λVDS( )


5

Steady State

!  What current flows in steady state? !  What causes (and determines)

the magnitude of current flow? !  Which device?


Leakage

!  Call this steady-state current flow leakage !  Idsleak


Subthreshold Slope

!  Exponent in VGS determines how steep the turnon is

"  Units: V/dec "  Every S Volts, IDS is scaled by factor of 10

IDS = ISWL

!

"#

$

%&e

VGS−VthnkT /q

!

"#

$

%&

1− e−VDSkT /q!

"#

$

%&!

"

##

$

%

&&1+λVDS( )

€

S = n kTq

"

# $

%

& ' ln 10( )


Subthreshold Slope

!  Exponent in VGS determines how steep the turnon is

"  Units: V/dec "  Every S Volts, IDS is scaled by factor of 10

!  n – depends on electrostatics "  n=1 # S=60mV at Room Temp. (ideal) "  n=1.5 # S=90mV "  Single gate structure showing S=90-110mV

€

S = n kTq

"

# $

%

& ' ln 10( )


IDS vs. VGS

(Logscale)


IDS vs. VGS

(Logscale) S


6

Subthreshold Slope

!  If S=100mV and Vth=300mV, what is Ids(Vgs=300mV)/Ids(Vgs=0V) ?

!  What if S=60mV?

IDS = ISWL

!

"#

$

%&e

VGS−VthnkT /q

!

"#

$

%&

1− e−VDSkT /q!

"#

$

%&!

"

##

$

%

&&1+λVDS( )

€

S = n kTq

"

# $

%

& ' ln 10( )


Threshold


Threshold

!  Describe VT as a constant !  Induce enough electron collection to invert channel


VDS impact

!  In practice, VDS impacts state of channel


VDS impact

!  Increasing VDS, already depletes portions of channel


VDS impact

!  Increasing VDS, already depletes portions of channel !  Need less charge, less voltage to create inversion

layer


7

Drain-Induced Barrier Lowering (DIBL)

VT

VDS


DIBL Impact


In a Gate?

!  What does it impact most? "  Which device, has large Vds?

"  Vin=Vdd ? "  Vin=Gnd ?

"  How effect operation?

"  Speed of switching? "  Leakage?


In a Gate

!  VDS largest for output charging/discharging device "  Easier to turn on

IDS ≈ ν satCOXW VGS −Vth −VDSAT2

#

$%

&

'(


In a Gate

!  VDS largest for off device "  Easier to turn on "  Leak more

IDS = ISWL

!

"#

$

%&e

VGS−VthnkT /q

!

"#

$

%&

1− e−VDSkT /q!

"#

$

%&!

"

##

$

%

&&1+λVDS( )


PMOS

!  Analagous phenomena to NMOS !  Signs different

"  Negative Vth

!  Reason based on oppositely charged carriers


8

Big Idea

!  3 Regions of operation for MOSFET "  Subthreshold "  Linear "  Saturation

"  Pinch Off "  Velocity Saturation, DIBL

"  Short channel


Admin

!  Text 3.3.2 – highly recommend read !  Office Hours: M (Khanna), T (Giesen) !  HW4 due Wednesday

"  If you haven’t looked at it yet, you’re behind!

!  Midterm 1 Review session on Thursday "  5pm? 6pm? 7pm?

!  Midterm 1 Monday 9/28 "  No Lecture "  Midterms from 2010, 2011, 2012, 2013, 2014

"  All online with and without answers "  Suggest start without answers


Documents

Today Modeling, Design, and Optimizationese370/fall2015/handouts/lec...1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Lec 8: September 18, 2015 MOS