1

Industrial Training -II

at

ARDENT COMPUTECH PVT LTD (ISO 9001-2008)

Submitted in partial fulfillment for the award of the degree

of

BACHELOR OF TECHNOLOGY

by

TIPAM BHATTACHARJEE (1051310333)

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

FACULTY OF ENGINEERING AND TECHNOLOGY

SRM Nagar, Kattankulathur – 603 203

Kancheepuram Dist.

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ACKNOWLEDGEMENT

It is a pleasure on my part to be associated with ARDENT COMPUTECH PVT LTD in

studying Embedded Systems using Microcontrolers , as a part of training & I am also

grateful to this esteemed organization for providing me the opportunity to learn about the

mentioned topic.

At the very outset we would like to express our heartfelt thanks and sincere

gratitude to Mr.R. Desarkar(Director-Education and Training) for guiding throughout the

whole period. I would also like to thank our instructor, Mr. Aalal, for lending his precious

time in giving us knowledge about Embedded Microcontroller based projects and all the

other technical staff in helping us to complete the project as a whole.

Last but not the least I would like to thank the CDC department of SRM University for

allowing us to undergo such a training.

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TABLE OF CONTENTS

Chapter No Title Page no

ACKNOWLEDGEMENT 2

TABLE OF CONTENTS 3

LIST OF FIGURES 4

1 GENERAL INTRODUCTION 5

1.0 Introduction 5

1.1 Layout Of The Work 5

2 ABOUT THE ORGANISATION 6

2.0 Ardent 6

2.1 History 6

2.2 Project Domains 7

3 EMEDDED SYSTEMS 9

3.0 Introduction 9

3.1 Microcontroller vs Microprocessors

3.2Microntroller 8051

3.3 Important Features and Applications

3.4 Instruction Sets

10 10

11

174 PROJECT WORKS 23

4.0 Interfacing LCD 23

4.1 Programming 24

5 CONCLUSION 27

5.1 Conclusion 27

REFERENCES 27

4

LIST OF FIGURES

Figure no. Title Page no.

1 Comparison of the 8051family 11

2 i8051 microarchitecture 12

3 Intel 8031 processors 21

4 8Bit Mode LCD Interfacing 25

5 4Bit Mode LCD Interfacing 26

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CHAPTER 1

GENERAL INTRODUCTION

1.0 INTRODUCTION

In the modern world the idea of innovation and technology has been shifted from the

manufacturer based to totally consumer based products. Earlier, due to lack of knowledge

about technology and exposure among most of the commonwealth, the idea of designing,

manufacturing and innovating products lied only in the hands of a few individual who had

technical expertise or the people who were responsible for its discovery or invention.

But now, every day is a new challenge for the manufacturers because the

customers have a good technical idea and exposure of the product that they are using and that

they want to use and its quality compared to other manufactured products.

The modern technology has now reached at such a point where there is

nothing new to be discovered but continuous improvisation in the existing technologies.

Intelligent systems, artificial intelligence, neural networks, fuzzy logic, automation, swarm

robotics, etc. are some of the ideas which are focused by most of the engineers around the

world today.

Hence, as a basis of learning and acquiring knowledge about microcontrollers,

ARDENT COMPUTECH provided the opportunity to develop a microcontroller bassed

system with an LCD interfaced with it which is both simple and upgradable.

1.1 LAYOUT OF THE WORK

The course was designed to understand the architecture and instruction sets of

different microcontrollers and to design systems using them.

To study the architecture of microcontrollers like 8051.

To understand the instruction set of the above.

To know the methods of connecting them to the peripheral devices.

To use all the above in the design of microcontroller based systems

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CHAPTER 2

ABOUT THE ORGANISATION

2.0 ARDENT

ARDENT COMPUTECH PVT LTD is an ISO 9001-2008 certified Software

Development and Training Company in India. It has been operating independently

since 2003.

ARDENT TECHNOLOGIES is a Company successfully providing its services

currently in UK, USA, Canada and India. The core line of activity at ARDENT

TECHNOLOGIES is to develop customized application software covering the entire

responsibility of performing the initial system study, design, development,

implementation and training. It also deals with consultancy services and Electronic

Security systems. Its primary clientele includes educational institutes, entertainment

industries, resorts, theme parks, service industry, telecom operators, media and other

business houses working in various capacities.

ARDENT COLLABORATIONS, the Research, Training and Education Department

of ARDENT COMPUTECH PVT LTD, is a professional training Company offering

Hi - End Industrial Trainings for M-Tech, B-Tech, MCA, BCA, MSc and MBA

fresher and experienced candidates in various technologies.

2.1 History

Ardent was an initiative of a group of fresh engineering graduates aiming to transform the

higher education methodologies and quality. It started with focus on technology training and

project implementation knowledge towards engineering students and job aspirants. The group

leveraged on the technical strength and fast growing engineering education growth in India.

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2.3 PROJECT Domains in ARDENT

Manufacturing

o Inventory Monitoring with Tracker

o Supply Chain Management System

o E-Procurement with Mobile Interface

o Stock Monitoring and Administration

Networking

o Peer-to-Peer Communication

o Cache Proxy Server

o Sniffer Firewall

o Web Server for HTML hosting

o Network Monitoring and Administrating

Web Services

o XML web service connecting heterogeneous application

o XML Web Service implementing middle tier of a 3-tier application

o WCF connecting heterogeneous application (Windows Communication

Foundation)

Artificial Intelligence

o Expert Systems

Virtual Medical Diagnosis with learning

Security Analysis

o Neural Network

Character Recognition

Security Analysis

Mobile Computing

o Projects on MANET

o AODV Simulation

o Projects on Wireless Sensor Networks

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Mobile Applications

o Bluetooth Applications

o Utilities

o Games

Web Applications

o Portal Development

o E-Commerce Implementation

o Interaction with Payment Gateways

o CMS

o Web Applications with WPF (Windows Presentation Foundation)

o Exploring XAML with WPF

o Service Oriented Architecture (SOA)

o Applications on Spring Framework / Hibernate

Information Management System

o Intelligence Management System

o CMS (Customer Management System)

o SCMS (Supply Chan Management System

o Extended SCMS for JIT model (Just In Time)

o HRM Recruitment module

o HRM Payroll module

o HRM

Healthcare

o Data Repository and Data Mining

o Information systems for Vaccination Programs

o Any time information service

Microcontroller (Interfacing with C Programming Language)

o Temperature Sensor

o Automatic Factory Crane

o Infrared based Remote Controlled Device

o Design of Traffic Light System

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CHAPTER 3

Embedded Systems

3.0 INTRODUCTION

An embedded system is a computer system with a dedicated function within a larger mechanical or electrical system, often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. Embedded systems control many devices in common use today. Ninety-eight percent of all microprocessors are manufactured as components of embedded systems.

Examples of properties of typically embedded computers when compared with general-purpose counterparts are low power consumption, small size, rugged operating ranges, and low per-unit cost. This comes at the price of limited processing resources, which make them significantly more difficult to program and to interact with. However, by building intelligence mechanisms on top of the hardware, taking advantage of possible existing sensors and the existence of a network of embedded units, one can both optimally manage available resources at the unit and network levels as well as provide augmented functions, well beyond those available.[5] For example, intelligent techniques can be designed to manage power consumption of embedded systems.

Modern embedded systems are often based on microcontrollers (i.e. CPUs with integrated memory or peripheral interfaces), but ordinary microprocessors (using external chips for memory and peripheral interface circuits) are also common, especially in more-complex systems. In either case, the processor(s) used may be types ranging from general purpose to those specialised in certain class of computations, or even custom designed for the application at hand. A common standard class of dedicated processors is the digital signal processor (DSP).

Since the embedded system is dedicated to specific tasks, design engineers can optimize it to reduce the size and cost of the product and increase the reliability and performance. Some embedded systems are mass-produced, benefiting from economies of scale.

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Embedded systems range from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, and largely complex systems like hybrid vehicles, MRI, and avionics. Complexity varies from low, with a single microcontroller chip, to very high with multiple units,peripherals and networks mounted inside a large chassis or enclosure.

3.1 MICROCONTROLLER VS MICROPROCESSOR

Microprocessors are single-chip CPUs used in microcomputers

Microcontrollers and microprocessors are different in three main aspects: hardware architecture, applications, and instruction set features

Hardware architecture: A microprocessor is a single chip CPU while a microcontroller is a single IC contains a CPU and much of remaining circuitry of a complete computer (e.g., RAM, ROM, serial interface, parallel interface, timer, interrupt handling circuit)

Applications: Microprocessors are commonly used as a CPU in computers while microcontrollers are found in small, minimum component designs performing control oriented activities

3.2 MICROCONTROLLER 8051

Intel's original MCS-51 family was developed using N-type metal-oxide-

semiconductor (NMOS) technology like its predecessor Intel MCS-48, but later

versions, identified by a letter C in their name (e.g., 80C51) used complementary

metal–oxide–semiconductor (CMOS) technology and consume less power than their

NMOS predecessors. This made them more suitable for battery-powered devices.

The family was continued in 1996 with the enhanced 8-bit MCS-151 and the 8/16/32-

bit MCS-251 family of binary compatible microcontrollers. While Intel no longer

manufactures the MCS-51, MCS-151 and MCS-251 family, enhanced binary

compatible derivatives made by numerous vendors remain popular today. Some

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derivatives integrate a digital signal processor (DSP). Beyond these physical devices,

several companies also offer MCS-51 derivatives as IP cores for use in field-

programmable gate array (FPGA) or application-specific integrated circuit (ASIC)

designs. ROM of 4KB and RAM of 128 bytes

1] Comparison of the 8051family

3.3 Important features and applications

The 8051 architecture provides many functions (central processing unit (CPU), random access memory (RAM), read-only memory (ROM), input/output (I/O), interrupt logic, timer, etc.) in one package:

8-bit arithmetic logic unit (ALU) and accumulator, 8-bit registers (one 16-bit register with special move instructions), 8-bitdata bus and 2×16-bit address bus/program counter/data pointer and related 8/11/16-bit operations; hence it is mainly an 8-bit microcontroller

Boolean processor with 17 instructions, 1-bit accumulator, 32 registers (4 bit-addressable 8-bit) and up to 144 special 1 bit-addressable RAM variables (18 bit-addressable 8-bit)[3]

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Multiply, divide and compare instructions

4 fast switchable register banks with 8 registers each (memory mapped)

Fast interrupt with optional register bank switching

Interrupts and threads with selectable priority[4]

Dual 16-bit address bus – It can access 2 x 216 memory locations – 64 KB (65,536 locations) each of RAM and ROM

128 bytes of on-chip RAM (IRAM)

4 KiB of on-chip ROM, with a 16-bit (64 KiB) address space (PMEM). Not included on 803X variants

Four 8-bit bi-directional input/output port, bit addressable

UART (serial port)

Two 16-bit Counter/timers

Power saving mode (on some derivatives)

2] i8051 microarchitecture

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One feature of the 8051 core is the inclusion of a boolean processing engine which allows bit-level boolean logic operations to be carried out directly and efficiently on select internal registers, ports and select RAM locations. This feature helped cement the 8051's popularity in industrial control applications because it reduced code size by as much as 30%.[citation needed] Another feature is the inclusion of four bank selectable working register sets which greatly reduce the amount of time required to complete an interrupt service routine. With one instruction, the 8051 can switch register banks versus the time consuming task of transferring the critical registers to the stack, or designated RAM locations. These registers also allowed the 8051 to quickly perform a context switch.

Once a UART, and a timer if necessary, has been configured, the programmer needs only write a simple interrupt routine to refill the send shift register whenever the last bit is shifted out by the UART and/or empty the full receive shift register (copy the data somewhere else). The main program then performs serial reads and writes simply by reading and writing 8-bit data to stacks.

Derivate features[edit]

As of 2013, new derivates are still developed by many major chipmakers, and major compiler suppliers such as IAR Systems, Keil and Altium Tasking continuously release updates.

MCS-51 based microcontrollers typically include one or two UARTs, two or three timers, 128 or 256 bytes of internal data RAM (16 bytes of which are bit-addressable), up to 128 bytes of I/O, 512 bytes to 64 KB of internal program memory, and sometimes a quantity of extended data RAM (ERAM) located in the external data space. External RAM and ROM share the data and address buses. The original 8051 core ran at 12 clock cycles per machine cycle, with most instructions executing in one or two machine cycles. With a 12 MHz clock frequency, the 8051 could thus execute 1 million one-cycle instructions per second or 500,000 two-cycle instructions per second. Enhanced 8051 cores are now commonly used which run at six, four, two, or even one clock per machine cycle, and have clock frequencies of up to 100 MHz, and are thus capable of an even greater number of instructions per second. All Silicon Labs, some Dallas and a few Atmel devices have single cycle cores.

8051 variants may include built-in reset timers with brown-out detection, on-chip oscillators, self-programmable Flash ROM program memory, built-in external RAM, extra internal program storage, bootloader code in ROM, EEPROM non-volatile data storage, I²C, SPI, and USB host interfaces, CAN or LIN bus, ZigBee or Bluetoothradio modules, PWM generators, analog comparators, A/D and D/A converters, RTCs, extra counters and timers, in-circuit debugging facilities, more interrupt sources, extra power saving modes, more/less parallel ports etc. Intel manufactured a mask programmed version, 8052AH-BASIC, with a BASIC interpreter in ROM, capable of running user programs loaded into RAM.

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In many engineering schools the 8051 microcontroller is used in introductory microcontroller courses.[citation needed]

Family naming conventions[edit]

8051 is the original name by Intel with 4 KiB ROM and 128 byte RAM. Variants starting with 87 have a user programmable EPROM memory, sometimes UV erasable. Variants with a C as the third character are some kind of CMOS. 8031 and 8032 are ROM-less versions, with 128 and 256 bytes RAM. The last digit can indicate memory size, e.g. 8052 with 8 KiB ROM, 87C54 16 KiB EPROM, and 87C58 with 32 KiB EPROM, all with 256 RAM.

Memory architecture[edit]

The MCS-51 has four distinct types of memory – internal RAM, special function registers, program memory, and external data memory.

The 8051 is designed as a strict Harvard architecture; it can only execute code fetched from program memory, and has no instructions to write to program memory.

Most 8051 systems respect this distinction, and so are unable to download and directly execute new programs. The strict Harvard architecture has the advantage of making such systems immune to most forms of malware, except those that reuse existing program code.[5] Some 8051 systems have (or can be modified to have) some "dual-mapped" RAM, making them act somewhat more like von Neumann architecture, as external ROM and RAM share data and address buses and the mapping can be designed to allow R/W data access to program memory. This (partial) von Neumann architecture has the advantage of making it possible for a boot loader running on the 8051 to write new native code to RAM and then execute it, leading to faster incremental and interactive programming cycles than strict Harvard systems.[6][7]

Internal RAM[edit]

Internal RAM (IRAM) has an 8-bit address space, allowed addresses 0 through 0xFF. IRAM from 0x00 to 0x7F can be accessed directly. The 8052 added IRAM from 0x80 to 0xFF, which must be accessed indirectly; the address is loaded into R0 or R1, and the memory is accessed using the @R0 or @R1 syntax. Most 8051 clones also have a full 256 bytes of IRAM.

The 32 bytes from 0x00–0x1F memory-map the 8 registers R0–R7. 8 bytes are used at a time; 2 program status word bits select between four possible banks,

The 16 bytes (128 bits) at IRAM locations 0x20–0x2F are bit-addressable.

Special function registers

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Special function registers (SFR) are located in the same address space as IRAM, at addresses 0x80 to 0xFF, and are accessed directly using the same instructions as for the lower half of IRAM. They can not be accessed indirectly via @R0 or @R1; indirect access to those addresses will access the second half of IRAM.

16 of the SFRs (those whose addresses are multiples of 8) are also bit-addressable.

Program memory

Program memory (PMEM, though less common in usage than IRAM and XRAM) is up to 64 KiB of read-only memory, starting at address 0 in a separate address space. It may be on- or off-chip, depending on the particular model of chip being used. Program memory is read-only, though some variants of the 8051 use on-chip flash memory and provide a method of re-programming the memory in-system or in-application. In addition to code, it is possible to store read-only data in program memory, accessed by the MOVC A, @DPTR instruction. Data is fetched from the address specified in the 16-bit special function register DPTR.

Special jump and call instructions make access within the same 2 KiB of program memory slightly smaller.

External data memory

External data memory (XRAM) is a third address space, also starting at address 0, and allowing 16 bits of address space. It can also be on- or off-chip; what makes it "external" is that it must be accessed using the MOVX (Move eXternal) instruction. Many variants of the 8051 include the standard 256 bytes of IRAM plus a few KB of XRAM on the chip.

The first 256 bytes of XRAM may be accesses using the MOVX A,@R0, MOVX A,@R1, MOVX @R0, A, and MOVX @R1, A instructions. The full 64K may be accessed using MOVX A,@DPTR and MOVX @DPTR,A.

Registers[edit]

The only register on an 8051 that is not memory-mapped is the 16-bit program counter PC. This specifies the address of the next instruction to execute. Relative branch instructions supply an 8-bit signed offset which is added to the PC.

8 general-purpose registers R0–R7 may be accessed with instructions 1 byte shorter than others. They are mapped to IRAM between 0x00 and 0x1F. Only 8 bytes of that range are used at any given time, determined by the two bank select bits in the PSW.

The following is a partial list of the 8051's registers, which are memory-mapped into the special function register space:

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(0x81) Stack pointer SP. This is an 8-bit register used by subroutine call and return instructions. The stack grows upward; the SP is incremented before pushing, and decremented after popping a value.

(0x82–83) Data pointer DP. This is a 16-bit register that is used for accessing PMEM and XRAM.

(0xD0) Program status word PSW. This contains important status flags:

PSW.0: P Parity. Gives the parity (modulo-2 sum of the bits of) the accumulator, A.

PSW.1: UD User Defined. For general software use, not otherwise used by hardware.

PSW.2: OV Overflow flag. Set when addition produces a signed overflow.

PSW.3: RS0 Register select 0. The low-order bit of the register bank. Set when banks at 0x08 or 0x18 are in use.

PSW.4: RS1 Register select 1. The high-order bit of the register bank. Set when banks at 0x10 or 0x18 are in use.

PSW.5: F0 Flag 0. For general software use, not otherwise used by hardware.

PSW.6: AC auxiliary carry. Set when addition produces a carry from bit 3 to bit 4.

PSW.7: C Carry bit. Often used as the general register for bit computations, or the "boolean accumulator".

(0xE0) accumulator A. This register is used by most instructions.

(0xF0) B register. This is used as an extension to the accumulator for multiply and divide instructions.

256 single bits are directly addressable. These are the 16 IRAM locations from 0x20–0x2F, and the 16 special function registers 0x80, 0x88, 0x90, …, 0xF8. Any bit of these bytes may be directly accessed by a variety of logical operations and conditional branches.

Note that the PSW does not contain the common N (negative) and Z (zero) flags. Instead, because the accumulator is a bit-addressible SFR, it is possible to branch on its most significant bit directly. There is also an instruction to jump if the accumulator is zero or non-zero. There is also a "compare and jump" operation that takes two operands.

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3.4 Instruction set

Instructions are all 1 to 3 bytes long, consisting of an initial opcode byte, followed by up to 2 bytes of operands.

3/4 of the opcode bytes are assigned to 16 basic ALU instructions. One operand is flexible, while the second (if any) is specified by the operation: the accumulator, an immediate constant, or a RAM address. The most significant nibble of the opcode byte specifies the operation, and the least significant nibble specifies one of the following 12 addressing modes for the flexible operand:

x8–xF: Register direct, R0–R7

x6–x7: Register indirect, @R0 or @R1

x5: Memory direct, a following byte specifies an IRAM or SFR location

x4: Immediate, a following byte specifies an 8-bit constant. In some cases where an immediate operand is nonsensical, the accumulator is used.

The operations is as follows. Not all support all addressing modes; the immediate mode in particular is unavailable if the flexible operand is written to. Instruction mnemonics use destination, source operand order.

0y: INC operand: Increment the specified operand. Opcode 04 specifies "INC A"

1y: DEC operand: Decrement the specified operand. Opcode 14 specifies "DEC A"

2y: ADD A,operand: Add the operand to the accumulator A.

3y: ADDC A,operand: Add the operand, plus the C bit, to the accumulator.

4y: ORL A,operand: Logical OR the operand into the A register.

5y: ANL A,operand: Logical AND the operand into the A register.

6y: XRL A,operand: Logical exclusive-OR the operand into the A register.

7y: MOV operand,#data: Move immediate data to the operand. Opcode 74 specifies "MOV A,#data.

8y: MOV address,operand: Move data to an IRAM or SFR register.

9y: SUBB A,operand: Subtract the operand from the accumulator, with borrow. Note there is no subtract without borrow.

Ay: MOV operand,address: Move data from an IRAM or SFR register. Opcodes A4 and A5 are not used.

By: CJNE operand,#data,offset: Compare operand to the immediate data, and branch to PC+offset if not equal. Opcodes B4 and B5 perform CJNE A,operand,offset, for

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memory direct and immediate operands. Note there is no "compare and jump if equal" instruction.

Cy: XCH A,operand: Exchange (swap) the accumulator and the operand. Opcode C4 is not used.

Dy: DJNZ operand,offset: Decrement the operand, and branch to PC+offset if the result is non-zero. Opcodes D4, D6, and D7 are not used.

Ey: MOV A,operand: Move operand to the accumulator. Opcode E4 is not used. (Use opcode 74 instead.)

Fy: MOV operand,A: Move accumulator to the operand. Opcode F4 is not used.

Only the ADD, ADDC and SUBB instructions set PSW flags. The INC, DEC, and logical instructions do not. The CJNE instructions modify the C bit only, to the borrow that results from operand1−operand2.

The 64 opcodes x0–x3, plus the few opcodes not used in the above range, are used for other instructions with more limited operand-specification capabilities:

8051/8052 irregular instructions

Opcode

x0 x1 x2 x3 x4

0y

NOPAJMP page0

LJMP addr1

6

RR A (rotate

right)

INC A

1y

JBC bit,off

set

ACALL pag

e0

LCALL addr

16RRC A

DEC A

2y

JB bit,offs

et

AJMP page1

RETRL

A (rotate left)

(ADD A,

#data)

3y

JNB bit,off

ACALL pag

RETI RLC A (ADDC

19

set e1A,

#data)

4y

JC offset

AJMP page2

ORL addres

s,A

ORL address,#d

ata

(ORL A,

#data)

5y

JNC offset

ACALL pag

e2

ANL addres

s,A

ANL address,#d

ata

(ANL A,

#data)

6y

JZ offset

AJMP page3

XRL addres

s,A

XRL address,#d

ata

(XRL A,

#data)

7y

JNZ offset

ACALL pag

e3

ORL C,bit

JMP @A+DP

TR

MOV A,

#data

8y

SJMP offs

et

AJMP page4

ANL C,bit

MOVC A,@A+P

C

DIV AB

9y

MOV DPT

R, #

imm16

ACALL pag

e4

MOV bit,C

MOVC A,@A+DPTR

(SUBB A,

#data)

Ay

ORL C,/bit

AJMP page5

MOV C,bit

INC DPTR

MUL AB

By

ANL C,/bit

ACALL pag

e5

CPL bit

CPL C CJNE A,

20

#data,offse

t

Cy

PUSH address

AJMP page6

CLR bit

CLR CSWAP A

Dy

POP addre

ss

ACALL pag

e6

SETB bit

SETB C

DA A (decimal adjus

t)

Ey

MOVX

A,@DPT

R

AJMP page7

MOVX

A,@R0

MOVX A,@R1

CLR A

Fy

MOVX

@DPTR,A

ACALL pag

e7

MOVX

@R0,A

MOVX @R1,A

CPL A

A5 B5 D6 D7

Other

(unused)

CJNE A

,address,offs

et

XCHD

A,@R0

XCHD A,@R1

One of the reasons for the 8051's popularity is its range of operations on single bits. Bits are always specified by absolute addresses; there is no register-indirect or indexed addressing. Instructions that operate on single bits are:

SETB bit, CLR bit, CPL bit: Set, clear, or complement the specified bit

JB bit,offset: Jump if bit set

JNB bit,offset: Jump if bit clear

JBC bit,offset: Jump if bit set, and clear bit

MOV C,bit, MOV bit,C: Move the specified bit to the carry bit, or vice versa

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ORL C,bit, ORL C,/bit: OR the bit (or its complement) to the carry bit

ANL C,bit, ANL C,/bit: AND the bit (or its complement) to the carry bit

Although most instructions require that one operand is the accumulator or an immediate constant, it is possible to perform a MOV directly between two internal RAM locations.

Programming[edit]

There are various high-level programming language compilers for the 8051. Several C compilers are available for the 8051, most of which allow the programmer to specify where each variable should be stored in its six types of memory, and provide access to 8051 specific hardware features such as the multiple register banks and bit manipulation instructions. There are many commercial C compilers.[8] Small Device C Compiler (SDCC) is a popular open source C compiler.[9] Other high level languages such as C++, Forth,[6][7][10][11] BASIC, Object Pascal, Pascal, PL/M and Modula-2 are available for the 8051, but they are less widely used[citation needed] than C and assembly.

Because IRAM, XRAM, and PMEM (read only) all have an address 0, C compilers for the 8051 architecture provide compiler-specific pragmas or other extensions to indicate where a particular piece of data should be stored (i.e. constants in PMEM or variables needing fast access in IRAM). Since data could be in one of three memory spaces, a mechanism is usually provided to allow determining to which memory a pointer refers, either by constraining the pointer type to include the memory space, or by storing metadata with the pointer.

Related processors[edit]

3] Intel 8031 processors

The 8051's predecessor, the 8048, was used in the keyboard of the first IBM PC, where it converted keypresses into the serial data stream which is sent to the main unit

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of the computer. The 8048 and derivatives are still used today for basic model keyboards.

The 8031 was a cut down version of the original Intel 8051 that had no internal program memory (read-only memory (ROM)). To use this chip, external ROM had to be added containing the program that the 8031 would fetch and execute. An 8051 chip could be sold as a ROM-less 8031, as the 8051's internal ROM is disabled by the normal state of the EA pin in an 8031-based design. A vendor might sell an 8051 as an 8031 for any number of reasons, such as faulty code in the 8051's ROM, or simply an oversupply of 8051s and undersupply of 8031s.

The 8052 was an enhanced version of the original 8051 that featured 256 bytes of internal RAM instead of 128 bytes, 8 KB of ROM instead of 4 KB, and a third 16-bit timer. The 8032 had these same features except for the internal ROM program memory. Most modern 8051-compatible microcontrollers include these features.

Intel discontinued its MCS-51 product line in March 2007;[12][13] however, there are plenty of enhanced 8051 products or silicon intellectual property added regularly from other vendors.

The 80C537 and 80C517 are CMOS versions, designed for the automotive industry. Enhancements mostly include new peripheral features and expanded arithmetic instructions. The 80C517 has fail-safe mechanisms, analog signal processing facilities and timer capabilities and 8 KB on-chip program memory. Other features include:

256 byte on-chip RAM

256 directly addressable bits

External program and data memory expandable up to 64 KB

8-bit A/D converter with 12 multiplexed inputs

Arithmetic unit can make division, multiplication, shift and normalize operations

Eight data pointers instead of one for indirect addressing of program and external data memory

Extended watchdog facilities

Nine ports

Two full-duplex serial interfaces with own baud rate generators

Four priority level interrupt systems, 14 interrupt vectors

Three power saving modes

Derivate vendors[edit]

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Current vendors of MCS-51 compatible processors include more than 20 independent manufacturers including Atmel, Infineon Technologies (formerly Siemens AG),Maxim Integrated Products (via its Dallas Semiconductor subsidiary), NXP (formerly Philips Semiconductor), Microchip Technology, Nuvoton (formerly Winbond), ST Microelectronics, Silicon Laboratories (formerly Cygnal), Texas Instruments, Ramtron International, Silicon Storage Technology, Cypress Semiconductor and Analog Devices.[14]

CHAPTER 4

PROJECT WORKS

4.0 Interfacing LCD.

Liquid Crystal Display (LCD) is very commonly used electronic display module and

having a wide range of applications such as calculators, laptops, mobile phones etc.

16×2 character lcd display is very basic module which is commonly used in

electronics devices and projects. It can display 2 lines of 16 characters. Each character

is displayed using 5×7 or 5×10 pixel matrix.

Interfacing 16×2 LCD with 8051 using Keil C is bit complex because there is no

powerful libraries in Keil C.

LCD can be interfaced with microcontroller in 4 Bit or 8 Bit mode. These differs in

how data is send to LCD. In 8 bit mode to write a character, 8 bit ASCII data is send

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through the data lines D0 – D7 and data strobe is given through E of the LCD. LCD

commands which are also 8 bit are written to LCD in similar way.

But 4 Bit Mode uses only 4 data lines D4 – D7. In this mode 8 bit character ASCII

data and command data are divided into two parts and send sequentially through data

lines. The idea of 4 bit communication is used save pins of microcontroller. 4 bit

communication is a bit slower than 8 bit communication but this speed difference can

be neglected since LCDs are slow speed devices. Thus 4 bit mode data transfer is

most commonly used.

4.1 Programming.

Lcd8_Init() & Lcd4_Init() : These function will initialize the LCD module which is

connnected to pins defined by following bit addressable variables.

For 8 Bit Mode:

//LCD Module Connections

sbit RS = P0^0;

sbit EN = P0^1;

sbit D0 = P2^0;

sbit D1 = P2^1;

sbit D2 = P2^2;

sbit D3 = P2^3;

sbit D4 = P2^4;

sbit D5 = P2^5;

sbit D6 = P2^6;

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sbit D7 = P2^7;

//End LCD Module Connections

4] 8Bit Mode LCD Interfacing

For 4 Bit Mode :

//LCD Module Connections

sbit RS = P0^0;

sbit EN = P0^1;

sbit D4 = P2^4;

sbit D5 = P2^5;

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sbit D6 = P2^6;

sbit D7 = P2^7;

//End LCD Module Connections

5] 4 Bit Mode LCD Interfacing

Lcd8_Clear() & Lcd4_Clear() : These functions will clear the LCD screen when

interfaced with 8051 in 8 bit and 4 bit mode respectively.

Lcd8_Set_Cursor() & Lcd4_Set_Cursor() : These functions are used to set the cursor

position on the lcd screen. By using this function we can change the position of

character and string displayed by the following functions.

Lcd8_Write_Char() & Lcd4_Write_Char() : These functions are used to write a

character to the LCD screen.

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Lcd8_Write_String() & Lcd8_Write_String() : These functions are used to write a

string or text to the LCD screen.

Lcd8_Shift_Left() & Lcd4_Shift_Left() : These functions are used to shift display left

without changing the data in display RAM.

Lcd8_Shift_Right() & Lcd8_Shift_Right() : These functions are used to shift display

right without changing the data in display RAM.

CHAPTER 5 COCLUSION

5.0 CONCLUSION

This project has made us understand about the Embedded Microcontroller systems

and LCDs and its various applications. This is advanced level of the microcontroller which

we had previously used in our projects and is very versatile. It is also very scalable and

upgradable. The training has enabled us to learn about the software based work behind the

mechanical applications used in the industries.

REFERENCES

WEBSITES- 1. www.wikipedia.com

2. www.ardentcollaborations.com

3. www.intel.com

WRITEUPS-

1. Efficient Design of an Embedded Microcontroller for Advanced Encryption Standard

2. Building A RISC Microcontroller in an FPGA

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3. Lab Manual

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.

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