1 2

Thislectureisnotthesameaspreviousones.Iamnotteachingyouanynewconcept,architectureorcircuit.Instead,Iwillgothroughtheen9reVERILabExperimentinorderthatyouappreciatewhatIwantyoutolearnineachofthefourparts.IwillalsopointoutthevariouspiAallsthatstudentsalwaysmakeeachyear,andsomeoftheuseful“tricksofthetrade”.

3

VERIisorganisedinfoursequen9alparts,eachbuilduponthepreviousparts.Eachparthasbeendesignedwithveryclearlearningoutcomesinmind,andisintendedtotakea3-hoursupervisedlaboratorysession.YouneedtodownloadvariousfilesfromtheExperimentwebsiteinordertodothisexperiment.Thesefilescanbefoundon:hKp://www.ee.ic.ac.uk/pcheung/teaching/E2_experiment/

4

YouMUSTuseQuartus16(knownasQuartusPrime)standardedi9onandNOTQuartus13(knownasQuartusII)becauseversion13doesnotsupportCycloneVFPGAchips.Irecommendthatyoucreateashortcutonyourdesktopforconvenience.OnceyoustartedQuartusso^ware,youwilleventuallyseemanywindowpanesappearingintheQuartuswindow:

Editwindow–Youshouldusethistoeditallyoursourcefiles.Theeditorisbasic,butitissyntaxsensi9ve,soitwillhighlightVerilogkeywordsforyour.Messagewindow–Thisiswhereyoufindalltheerrorandwarningmessages.Naviga0onwindow–ThisshowsthehierarchyofyourdesignandprovidesaquickwayofexploringvariousVerilogfiles.

Statuswindow–ThistellsyouthestepsthattheQuartusso^wareistakinginordertoproducethefinaldesign.Summarywindow–Thisprovidesaquicksummaryoftheresourcesbeingusedbyyourdesign–usefultocheckforoverallerrors.Reportwindow–Thisiswhereyoufindoutdetailsofthecompila9onresultssuchas9mingandpinalloca9ons.

IPcatalog–ThisallowsyoutopickupmodulesinthecomponentlibraryprovidedbyAltera,suchasROM,mul9plier,FIFOetc.YoumustalsomakesurethatyouhavespecifiedtheexactFPGAdeviceusedontheDE1-SoCboard.Itis5CSEMA5F31C6anditisspecifiedusing>Assignments>

5

Onceyouhavefinishedcrea9ngyourdesignthroughhardwarecompila9on,weneedtosendthebit-streamtothechipviatheUSBcable.ThemethodofprogrammingisspecifiedinHardwareSetup,andwespecifyDE1-SoC[USB].Nextweuse“AutoDetect”tofindoutwhatFPGAchipisconnected,andspecifythatweexpecttofindthe5CSEMA5chipfamily.ThisisoneofmanydifferentvariantsofCycloneVFPGAs.Eachhasadifferentprotocolinprogrammingthedevice.

Then,wehavetodeletethepartofthechipthatwearenotusing–thistheARMpart,knownasSOCVHPS.IfyouweretousetheARMprocessor(e.g.loadingitwithLinux),wewouldneedthislinein.A^erthat,youmustselectthe“sof”filetosendthechip.

6

YoucanfindafulllistoffiletypesusedbyQuartusontheExperimentwebpage.

7 8

ThemaingoalofPart1istoletyougetfamiliarwiththeen9redesignprocess.ShownhereisasummaryofallthemainstepsthatyouhavetogothroughtocreateaworkingdesigntosendtotheDE1-SoC.

9

Part2oftheLabisstar9ngtogetharder.YouwillfirstlearntouseModelsimtosimulatean8-bitcounter.Ontheway,youwillalsolearnhowtocombinetheinterac9vecommandsyourtypeinthecommandwindowinModelsimintoaDO-file.Youthenwillusethisfileasthetestbenchforyourcircuit.Nextyouwillextendthe8-bitcounterto16-bitwithresetandenableinput.YouwillalsocombinethiswithwhatyouhavealreadydoneinPart1todisplaythecountervalueasdecimalnumberonthedisplays.Next,youwillfindthatthecounteriscoun9ngtoofast–youonlysee88888attheoutput.Youthenwilladdanothercircuitknownasprescaler,whichisanothercounterthatproducesaclock9ckonceeverymillisecond.Thisallowsyoutoseewhatyouseethecountvaluechanging.

ThenyouwillcreatearandomnumbergeneratorandtestthisonDE1.

10

Op9onalchallengeisquitehard,butshouldbeverysa9sfying.Dothisonlyifyouhave9me.

11

Part3andPart4ofVERIusetheanalogueI/OcardwithDE1.TheI/OcardcontainsaDACandaADC,both10-bits.Theseproduceanaudiooutputontherightchannelofa3.5mmsocket,andonechanneloftheanalogueinputfromtheothersocket.Thereisalsoalow-passfilter,whichreceivesaPWMsignalandproducesananalogueoutputonthele^channeloftheaudiosocket.A5kohmpoten9ometerprovidesadcvoltagetotheotherchanneloftheADC.TheI/Ocardispluggedintothe40-waysocketontheDE1board–thesocketistheonethatisfurthestawayfromtheboardedge.Bewarethatyoumaynothavealignedthepinscorrectly.Thiswillnodamageanything.IftheI/Oboardisinstalledcorrectly,theGREENLEDwilllightupwhentheDE1boardisturnedON.Thecommunica9onbetweentheDAC/DACandtheFPGAchipisthroughserialinterfaceknownasSPI(SerialPeripheralInterface).HowexactlySPIworkswillbecoveredinanotherlecturelater.

12

Part3willintroduceyoutomanydifferentusefuldigitalcomponents.Thisincludes:theSPIinterfacemodulespi2dac.v,thePWMmodulepwm.v,theROMgenerator,themul9plieretc.Intheend,youwillbeabletoproduceatleastafixedfrequencysinewaveonbothchanneloftheoutputsocket.

13

Thefinalpart(Part4)reallybringseverythingtogether.ThegoalistousetheFPGAtoimplementareal-9mespeechprocessingsystemthatperformechosimula9on.Tostartwith,youwillimplementaDO-NOTHINGblock.Thisjusttestsoutthesystemandtakesananalogueinputsample,thenoutputittotheearphone.Neverthelesstherearedetailsthatneedtobetakencareof.Iwillgointomoredetailsnearerthe9meinordertoexplainexactlywhat’shappening.

Finally,thepartincludessomethingthatCANNOTbedoneinfourlabsession,butifyouarereallykeeningoingfurtheritisarealchallenge.BringingeverythingyouhavelearnedinVERI,youcandesignavoicecorruptor–somethatthatmakeschangesonesspeechinawaythatisunrecognizable,butitiss9llcompletelyunderstandable.