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Thesis Defense Electrical Engineering
Drop Impact Reliability Testing
Lead-Free Chip Scale Packages
Andrew Farris
May 23, 2008
California Polytechnic State University
San Luis Obispo, CA 93407
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Agenda
Introduction Drop Impact Reliability Prior Work Thesis Research Goals
Failure Detection Systems Data Acquisition System Design Post-drop Resistance Measurement
Test Vehicle Design and Assembly
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Agenda
Drop Impact TestingAnalysis
Reliability Data Failure Mechanisms Acceleration on Test Vehicle
ConclusionsAcknowledgements
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Drop Impact Reliability
Mobile electronic devices
Are prone to being dropped (or thrown) Are important to our everyday activities Are expected to just work even after rough handling
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Drop Test Reliability (cont.)
Mobile electronic devices also Are complicated and expensive Are easily damaged by drop impacts Are designed to be lightweight and portable
Drop test reliability is: The study of how well a device or part survives
repeated drop impacts
A process to determine where design improvementsare needed for future high reliability designs
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Introduction to Drop Testing
What happens during a drop impact test The electronics test vehicle is attached to a shock
test table
The table is dropped vertically until it impacts astationary base
The impact causes an acceleration pulse by rapidlystopping the table (and test vehicle)
Test vehicle deforms due to the impact energy,causing stress and strain in the solder joints
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Introduction to Drop Testing
Lansmont MTS II Shock Tester
Typical Half-sine
Acceleration Pulse
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Drop Impact Reliability
Drop impact reliability testing evaluates thereliability of electronics when subjected to
mechanical shock
Shock causes vibration, PWB bending, andresulting mechanical stresses on solder joints
Generally focused on lead-free solder usagein consumer electronics (handheld products)
Due to governmental regulations pushing toward aworld-wide lead-free market for these products
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Introduction to Drop Testing
The drop impact test Is repeated until failure occurs Determines how many drop impacts of a specific
intensity (acceleration peak and duration) can besurvived before the device fails
Drop impact reliability data is a tool that canguide designers in developing more robust
electronic products
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Drop Impact Demo
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Why Study Lead-free Solder?
Environmental regulations and directivescurrently restrict the use of lead in consumer
electronics products within global markets
European Unions Restriction of HazardousSubstances (RoHS)
Chinas Regulation for Pollution Control ofElectronics Products (RPCEP)
And more
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Why Study Lead-free Solder?
Lead-free solder is still very new to theelectronics industry
RoHS regulations took effect in 2006Many lead-free solder alloys can be used to
replace tin-lead solder, and more information is
needed on their performance
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Prior Work
Researchers have studied Lead-free SnAgCu solder alloys and various micro-
additives in the alloys to improve reliability
Use of underfill and Corner Bonding to improvemechanical strength and reliability of components
Board and device level drop impact reliability,acceleration, stress, and strain on solder joints for
many component and solder joint sizes
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Purpose of this Thesis
Develop a high-speed data acquisition (DAQ)system for drop impact reliability research
Determine the drop impact reliability of lead-free Chip Scale Package (CSP) solder joints
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Purpose of this Thesis
Determine the effects of edge bonding on CSPdrop impact performance
Investigate the failure mechanisms of dropimpact failures in lead-free CSPs
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Agenda
Introduction Drop Impact Reliability Prior Work Thesis Research Goals
Failure Detection Systems Data Acquisition System Design Post-drop Resistance Measurement
Test Vehicle Design and Assembly
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Drop Impact Failure Detection
Goal: Develop a high-speed DAQ failuredetection system for drop impact reliability
research
System should: Detect intermittent failures by testing resistance
during the drop impact (in-situ testing)
Save all sampled data for later analysis Require minimal operator interaction so that highly
repetitious testing can be done without interruption
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Definition: Drop Impact Failure
Drop impact failure Occurs when the electrical connections in the
device are damaged so that it no longer functions as
designed Is typically detected by change in resistance or loss
of continuity in board level circuits
May be either a permanent or intermittent condition
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Drop Impact Failure Detection
Joint Electron Device Engineering Council(JEDEC) recommendations
Specified in the JESD22-B111 standard forhandheld electronics drop impact testing
Identify failure as 100 ohm change in resistance Sample resistance at a minimum frequency of
50kHz to observe intermittent failures
A rate much higher than the vibration frequencies of thetest vehicle after impact so that accurate reproduction ofthe resistance change is observed (no aliasing)
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Drop Impact Failure Detection
Visualization of a sampling frequency of50Khz during a typical drop impact
50000 samples per second, 25 samples per 0.5ms
Representation of a
1500g 0.5msacceleration pulse
sampled at 50kHz
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Data Acquisition System Design
System composed of: Multichannel voltage divider resistance
measurement circuit
National Instruments analog-to-digital converter(ADC) PCI card Desktop computer ADC control and data gathering software Cable from test vehicle to connector boxes External trigger
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Voltage Divider Circuit
Dynamic resistance measurement is achievedby using a series voltage divider circuit to
relate voltage to resistance
The ADC measures voltage divided between thestatic resistor and component resistance
RComp =VComp RStatic
VDC VComp
VComp =VDC RComp
RComp + RStatic
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Voltage Divider Circuit
RComp =VComp RStatic
VDC VComp
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Voltage Divider Circuit
The component solder joints are connectedtogether into a daisy-chain, forming a single
wire connecting many tiny resistors (solder
joints) and circuit board traces
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Voltage Divider and Connector Boxes
The voltage divider circuit is assembledwithin two National Instruments connector
boxes
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Voltage Divider and Connector Boxes
DAQ parallel cable connections were addedto the front of these boxes
Connector Box front Cable attached to Connector Boxes
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DAQ System Software
DropGather Windows console-based program written in C++ Interfaces to National Instruments DAQmx driver
libraries for ADC device control Released as open source software for others to use
as an example in building similar systems
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DAQ System Software
DropGather Windows console-based program written in C++
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Data Acquisition System Summary
DAQ system capabilities 17 channels (15 for components, power supply
voltage, trigger)
Sampling frequency of 50kHz per channel 16 bit measurement accuracy (over 0-5V range) Store entire data set for later analysis
Tab-separated-text (CSV) data value tables PDF format graphs of each measured channel
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Failure Event Graphs
Display results plot: time vs sampled voltage
Intermittent Transitional failureObserved only during PWB bending
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Failure Event Graphs
Display results plot: time vs sampled voltageFailure (temporary discontinuity)occurs during the PWB bendingRcomp => as Vcomp => 5V
This failure is not as easilydetectable after the test
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Failure Event Graphs
Display results plot: time vs sampled voltage
Complete Failure occurs when the daisy-chain
has lost continuity even after the PWBvibration stops
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Failure Detection Systems
Compare two failure detection systems High-speed DAQ dynamic resistance measurement Post-drop static resistance measurement
Commonly used in industry
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Post-Drop Testing
Uses a single resistance measurement per droptaken after the board vibration ceases
Failure when a 10 ohm static rise is detectedMonitor resistance change over multiple drop
period
LabView program which configures Keithleyequipment to collect resistance values
Outputs tabular data for resistance of all 15components once each drop
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Post-Drop Testing
Advantage:No wires soldered to the test board, fast setup Low cost system
Disadvantages: Cannot test in-situ (during board deflection and
vibration conditions)
Requires operator interaction every drop cycle Only one test per drop provides fairly poor
resolution for when failure occurs
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Agenda
Introduction Drop Impact Reliability Prior Work Thesis Research Goals
Failure Detection Systems Data Acquisition System DesignPost-drop Resistance Measurement
Test Vehicle Design and Assembly
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Test Vehicle Design
JEDEC JESD22-B111 preferred board 8-layer FR4 132 mm x 77 mm in size (roughly 5.2 x 3.0) 15 components in a 3 row by 5 column array
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SMT Assembly (cont.)
Components (Amkor) Amkor CSPs A-CTBGA228-.5mm-12mm-DC-LF 12 mm x 12 mm 228 I/Os (perimeter array, daisy-chain connected) 0.5mm pitch
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SMT Assembly (cont.)
Lead-free Solder Paste Multicore 318 LF 97SC SnAg3.0Cu0.5 alloy composition (also called SAC305) Primarily tin with 3.0% silver and 0.5% copper by
weight
Common replacement for tin-lead solder
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SE300
SMT Assembly
DEK
Stencil
Printing
CyberOptic
Solder Paste
Inspection
Siemens F5
Placement
Heller Oven
EXL1800
Dedicated lead-free SMT assembly line
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Solder Joint Integrity after Assembly
The X-Ray image shows solder balls are roundand uniform, no visible bridging is present
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Solder Joint Integrity (Cont.)
The solder balls look shiny and well collapsedComponent
Board
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Solder Joint Integrity (Cont.)
SEM image of cross-sectioned CSP shows somevoids
Component
Board
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Edge Bonding for Strength
Edge Bonding is a process that applies a gluematerial to the corners of components
Intended to increase mechanical strength of thecomponent to board connection
Relieves some stress on the solder joints Similar glues are used for full capillary underfill
and Corner Bonding
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Edge Bond Materials
Edge bond application for 12mm CSPs Acrylated Urethane-based material
Cured by UV exposure for 80s using Zeta 7411 Lamp Epoxy-based material Thermally cured for 20min in 80 C oven
EpoxyAcrylic
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Agenda
Drop Impact TestingAnalysis
Reliability Data Failure Mechanisms Acceleration on Test Vehicle
ConclusionsAcknowledgements
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Reliability Test Design
Drop tests were conducted at HenkelElectronics in Irvine, CA, during Summer 07
internship
This is a Henkel Corporation R&D facility focusedon adhesives, packaging, and bonding agents
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Drop Testing Workbench
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Reliability Test Design
Two failure detection systemsThree acceleration conditionsEdge-bonded and not edge-bonded CSPs
Failure Detection DAQ System Post-Drop System
Edge-bonding Yes No Yes No
900 G 0.7 ms 0 3 0 3
1500 G 0.5 ms 4 3 4 3
2900 G 0.3 ms 4 1 4 0
50
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Test Vehicle Orientation
The test vehicle is always mounted with the CSPs face
down (toward the drop table); this is the worst-caseorientation for reliability of the solder joints
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Component Locations
JEDEC defined component numbering Our DAQ cable attaches at component 1611 end As shown components are underneath board
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Table 2 - DAQ No Edge-bond
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Table 3 - Post-drop No Edge-bond
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Table 4 - DAQ with Edge-bond
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Table 5 - Post-drop with Edge-bond
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Agenda
Drop Impact TestingAnalysis
Reliability Data Failure Mechanisms Acceleration on Test Vehicle
ConclusionsAcknowledgements
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Failure Analysis Methods
Cross-sectioning with optical or ScanningElectron Microscopy (SEM) imaging
Cut open the solder joint, polish the surface, thenlook for cracks in the solder joint
Dye Penetrant Method with optical imaging Use red dye to stain cracked solder joints by
soaking the test vehicle in dye in vacuum chamber
Remove components from the test vehicle, look forcracked/stained failures
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Cross-sectioned solder joint is shown to becracked near the board side copper pad
Solder Fracture Failure
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Solder Fracture Failure
Cross-sectioned solder joint is shown to becracked near the board side copper pad
Copper trace failure also shown (left side)
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Cracking Under Pads (Cratering)
Epoxy on the PWB board surface cracked awayfrom the fibers within the board, allowing the
copper pad to lift away from the board
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Epoxy on the PWB board surface cracked awayfrom the fibers within the board, allowing the
copper pad to lift away from the board
Cracking Under Pads (Cratering)
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Dye penetrant testing was used to determine theextent of pad cratering problems
Six boards were soaked in dye, then all 15components were pulled off the boards
Dye stained solder cracks and pad craters werepresent before the components were pulled off
Cracking Under Pads (Cratering)
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Dye Stained Solder Fractures
Dye stained solder cracks were found Partial solder fracture (left) was not completely
fractured before the component was removed
Complete solder fracture (right) was fully fracturedbefore the component was removed
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Input/Output (I/O) traces that connect to thedaisy-chain resistor were often broken
Many components had this broken trace and noother identifiable failure
I/O Trace Failure
Board sideComponent side
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Illustration of I/O Trace Failure
I/O trace gets stretched when the copper padlifts away from the PWB
If the copper pad lifts far enough away, thenductile failure occurs in the copper trace
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I/O Trace Failure Location
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Illustration of Failure Locations
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I/O Trace and Daisy-chain Trace failures areboth caused by pad cratering
Pad cratering occurred on 88% of electricallyfailed components, and is directly responsiblefor 69% of all electrical failures
Failure Mode Comparison
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failmap-b41-noeb-10drops
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Agenda
Drop Impact TestingAnalysis
Reliability Data Failure Mechanisms Acceleration on Test Vehicle
ConclusionsAcknowledgements
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Cable Influence on PWB Loading
Results from the comparison of failuredetection methods
The DAQ system cable attached to the PWBappears to effects loading conditions
Fewer components fell off the DAQ tested boardsthan off the post-drop tested boards
The earliest component failure locations varybetween DAQ and post-drop tested boards
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PWB Loading Conditions
JEDEC drop testing causes a complex PWBstrain condition; not all solder joints
experience the same stress and strain
Reliability and failure analysis must considercomponent location, drop count, and acceleration
pulse profile
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Local Acceleration Conditions
Using two accelerometers, the accelerationprofile of the board at each component
location was tested
Eight board variations Blank PWB, Populated, with edge bond, and
without edge bond
With and without DAQ cable soldered into theboard
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Local Acceleration Conditions
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Testing the acceleration condition on the
board and table simultaneously
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Local Acceleration Conditions
Table baseplate has insignificant vibrationBoard vibrates over period longer than 10ms
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Component Locations
JEDEC defined component numbering Our DAQ cable attaches at component 1611 end As shown components are underneath board
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Blank PWB No Cable vs Cable
Apparent differences Symmetry of acceleration peaks shifted (C7 vs C9) Maximums greatly reduced by cable (C3, C13, C8)
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Populated PWB No Edge Bond
Dampening due to the cable seems less significant thanwith blank PWB (both graphs are more similar)
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Epoxy Edge Bonded CSPs
Stiffer board with edge bonding has less symmetrydisturbance
Overall accelerations are significantly reduced80
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Acrylic Edge Bonded CSPs
Stiffer board with edge bonding has less symmetrydisturbance
Overall accelerations are significantly reduced
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Cable Influence on Acceleration
Symmetry of acceleration/deflection/strain iseffected:
A cable soldered to the PWB will effect the testconditions for any test vehicle assembly
Components cannot be grouped as liberally forreliability statistics if test conditions at their
locations are not similar
Lightest possible wire gauge should be used But must provide reliable through-hole solder
joints
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Cable Influence on Acceleration
Attaching a cable to both board ends couldrestore symmetry, but will also
Add mass to the test vehicle Increase vibration dampening Decrease the effects of harmonic vibration
frequencies
Decrease total deflection (cantilever effect of thewire mass)
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Agenda
Drop Impact TestingAnalysis
Reliability Data Failure Mechanisms Acceleration on Test Vehicle
ConclusionsAcknowledgements
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Conclusions
The component location on the test vehiclehas a significant role in reliability
Components near the board center tend to fail firstHigher acceleration conditions decrease the
drops to failure, resulting in lower reliability
Edge bonding significantly increases thereliability of lead-free CSPs in drop impact
conditions
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Conclusions
Cohesive failure between the resin and theboard fiberglass leads to pad cratering
Pad cratering causes trace breakage and isthe most common electrical failure mode
Board laminate materials for this lead-freetest vehicle are the weakest link in the
assembly, rather than the solder
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Acknowledgements
Dr. John Pan (IME), Dr. Albert Liddicoat (EE), AdvisorsDr. James Harris (EE), Thesis committee memberProject Sponsors:
Office of Naval Research (ONR)Through California Central Coast Research Park (C3RP)
Society of Manufacturing Engineers Education FoundationSurface Mount Technology Association (SMTA)
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Acknowledgements
Multidisciplinary team of students: Nicholas Vickers (MATE), Kyle Rauen (MATE), and
Ronald Sloat (ME) assisted with failure analysis
Michael Krist (IE) and Micah Denecour (IE) assistedwith reliability data analysis
Edward Clements (ME) and Chi-Yeh Hsu (ME) builtand tested the first data acquisition system prototype
Keith Rothman (AERO) wrote the first version of theDAQ system control software
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Questions
How do you find an electrical engineer? Look for the Desk.http://comicstripjoint.blogspot.com
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Supplemental Slides
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SMT Assembly (stencil printing)
Stencil (DEK) 4 mils thick Electro-Polish
12 mils square aperturesStencil Printing
Front/Rear Speed: 40 mm/s Front/Rear Pressure: 12 kg Squeegee length: 300mm Separation Speed: 10 mm/s
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Solder Reflow Profile
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failmap-b44-noeb-14drops
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failmap-b41-noeb-10drops
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failmap-b36-eb3705-279drops
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