The Indispensable PC Hardware BookYour Hardware Questions
AnsweredTHIRD EDITION
Hans-Peter Messmer
UNIVERSITAT JAUME BIBLIOTECA
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ADDISON-WESLEY
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Part 1 Basics
This chapter outlines the basic components of a personal
computer and various related peripherals as an introduction to the
PC world. Though this chapter is intended for beginners, advanced
users would also be better prepared for the later and more
technically demanding parts of the book.
1 Main Components1.1 The Computer and PeripheralsPersonal
computer (PC), by definition, means that users actually work with
their own apersonaln computer. This usually means IBM-compatible
computers using the DOS, OS/2 or Windows (NT) operating system.
Mainframe users may wonder what the difference is between a PC and
a terminal: after all, a terminal also has a monitor, a keyboard
and a small case like the PC, and looks much the same as that shown
in Figure 1.1. Where there is a difference is that the PC contains
a small but complete computer, with a processor (hidden behind the
names 8086/SOSS, 80286 or i486, for example) and a floppy disk
drive. This computer carries out data processing on its own: that
is, it can process files, do mathematical calculations, and much
more besides. On the other hand, a terminal only establishes a
connection to the actual computer (the mainframe). The terminal
cant carry out data processing on its own, being more a monitor
with poor input and output capabilities that can be located up to a
few kilometres away from the actual computer. That a small PC is
less powerful than a mainframe occupying a whole building seems
obvious (although this has changed with the introduction of the
Pentium), but that is only true today. One of the first computers
(called ENIAC, developed between 1943 and 1946, which worked with
tubes instead of transistors) occupied a large building, and
consumed so much electricity that the whole data processing
institute could be heated by the dissipated power! Nevertheless,
ENIAC was far less powerful than todays PCs. Because PCs have to
serve only one user, while mainframes are usually connected to more
than 100 users (who are logged in to the mainframe), the impact of
the lack of data processing performance in the PC is thus reduced,
especially when using powerful Intel processors. Another feature of
PCs (or microcomputers in general) is their excellent graphics
capabilities, which are a necessary prerequisite for user-friendly
and graphics-oriented programs like Microsofts Windows. In this
respect, the PC is superior to its ) ((ntel)) identification value
reserved (=O) reserved (=O) feature flags level)
Olh
I bits 31 .14 reserved (=OOh) bits 13 .12 type (OOb=pnmary bits
1 I..8 bits 7. 4 Pentlum startmg with 75 MHz, 01 b=Pentium
OverDnve, lOb=dual (secondary) Pentium starting with 75 MHz, 1
lb=reserved) processor family (05h for Penturn) model (Olh for
60/66 MHz Pentum. 02h starting wth 75 MHz Pentium) (stepping)
(l=implemented. O=not Implemented) Implemented) CPU, O=others)
bits 3.. 0 rewon bit 8: bit 7. bit 61 bit 5: b i t 4. bit 3: bit
2: bit 1:
*) bits 31..9: reserved (= OOh) CMPXCHGBB reserved
model-speciftc registers (l-according to Penttum time stamp counter
(l=implemented, O=not reserved IWO dreakpolnts (l=lmplemented,
O=not Implemented) reserved on-chip FPU (l=yes, O=no) Implemented)
machine check exception (l=implemented. O=not
i
bit 0:
Table 11.7: Call nnd return vahres
of CPUID
L Exception 18 - machine check exception: this exception
indicates a hardware error of the I Pentium itself. Details are
given in Section 11.7.6.
.!I.4 The Pentium Bus,.,? three pipelines of the Pentium achieve
an instruction throughput which would completely Overload a simple
memory bus. Thus, the fentium bus is, without compromise, dedicated
to a quick second-level cache. Frequently required instructions and
data are held ready in the two on-chip caches. For the connection
to the second level cache (LZcache), the Pentiums data bus h been
widened to 64 bits, so that the on-chip caches can be reloaded and
written back with .kficient speed. \: Despite this, the Pentium can
also address individual bytes, words, or double words through _$e
byte enable signals BE7- BEO. Every bus cycle addresses memory
through A31-A3 at quad Word limits, thus in multiples of 8 (0, 8,
16, etc.). Accesses to memory objects which span such {iboundary
(so-called ~~isnligr~of nccc~~s) are split into two consecutive
accesses by the Pentium. c 2:: $he Pentium tries to carry out
memory accesses as cache line fills or write-backs as far as
POSS.$le. Only accesses to the I/O address space and non-cachable
areas in the memory address p
330
Chapter
iI
space (such as register addresses for memory-mapped I/O) are
carried out as single trans.er cycles. The single transfer cycles
described in Section 11.4.1 are more or less the exception. The
burst mode, already known from the i486, has been extended to the
writing of data (the ;186 allows only burst read accesses).
Together with the improved address pipelining, the maximum data
transfer rate has been increased to 528 million bytes (at 66 MHz).
Unlike memory accesses, accesses to the l/O address area have not
been widened to 64 bits. The maximum width here is only 32 bits as
in the i386 or i486. The reason for this is that I/O accesses, in
principle, do not pass through the on-chip data cache; instead,
they are directlv ((switched through,, from a 32-bit register to
the bus. Of course, the Pentium can also address B- or 16-bit
ports. The I/O subsystem must decode the port address bits A2-A0
from the byte enable signals BE7- BEO.
11.4.1 Single Transfer CyclesThe single transfer read and single
transfer write cycles are the two simplest memory acces3 cycles of
the Pentium. During their execution, data of 8, 16, 32 or 64 bits
in size is transferred from memory to the Pentium, or from the
Pentium to memory, respectively. Such Pentium bu5 cycles are not
very different from those in the i386 or i486, despite the larger
width of the dally bus. For a single transfer it holds CACHE on a
high level to indicate that no line fill should by carried out.
Single transfer write cycles in the Pentium are also not very
different from those in the i386 or i486. The CACHE signal is again
inactive. Additionally, the Pentium supplies write data anti the
required parity bits. In single transfer mode (read and write), a
data transfer without wait states requires at least tbx.0 CLK
cycles. With a data bus width of 64 bits, this leads to a maximum
data transfer rate (1 264 Mbytes/s. This can be doubled in
pipelined burst mode to 528 million bytes/s or 504 Mbytes/ L1
11.4.2 Burst CyclesFor the transfer of larger quantities of
data, the Pentium implements a burst mode similar to that of the
i486. Unlike the i486, the Pentium burst mode can also be used for
write-back cycles. For the write-through cache of the i486 this is
not necessary because each write access is switchcci through to the
memory subsystem. But there are other differences, too. In
principle, all cachal?ic read cycles and all write-back cycles are
carried out in burst mode. With the extension of thL data bus to 64
bits, 32 bytes are transferred in a burst cycle with four bus
cycles. They arl contiguous and are aligned to 32-byte boundaries
(this corresponds to a cache line of the t\l on-chip caches). A
burst cycle is started, as in the i486, by a normal memory access
which lasts for two clock cycles. Figure 11.16 shows the flow of
the most important signals for a burst read cycle. For a burst read
cycle, the CACHE signal from the Pentium and the KEN signal from t
memory subsystem also play an important role. The Pentium indicates
to the subsystem, throu$ an active CACHE signal with low level,
that it wants to transfer the addressed object into
Borrowing from the RISC World - The Superscalar Pentlum
331
~Figure 22.26: Burst read cycle without wait states and
piprlinitrg. In bxrst mode, the bus cycle for a 32.byte address
area is reduced from two processor clock cycles to one cycle,
starting wifh the second access. Thus, a cache line of the internal
caches can be filled very quickly. The cycle shown is a 2-1-2-2
burst.
!on-chip cache. If the KEN signal delivered by the memory
subsystem is active, then the Pentium independently and
automatically extends the single transfer to a cache line fill to
store a complete data block with the addressed object in the
on-chip cache. ;As already mentioned, a burst cycle is limited to
an address area which begins at a 32-byte $oundary. With the first
output address, therefore, the three other burst addresses are also
iirnplicitly known. The subsystem can independently calculate the
other three burst addresses $mthout needing to decode further
address signals from the Pentium. This is much faster than Ibefore,
and makes it possible to reduce the bus cycle to one clock cycle.
The Pentium only sends $he add ress and BEx signals during the
first cycle; they are not changed during the subsequent .$hree bus
cycles (the i486, however, addresses the data within the 16.byte
group further via the _address signals A3-A2 and BE3- BEO). :r_.
:,,hI the Pentium the address sequence in burst mode is fixed
dependent on the first address. This 7h necessary because the first
address given out by the Pentium need not necessarily define a
32ibyte boundary; it can lie anywhere in the address space. In the
course of the first transfer cycle, cm determines whether a single
or burst transfer should be carried out. But by then the first rina
d-word has already been transferred. The fixed address sequence
shown in Table 11.8 is not clic, but has been chosen to support
2-way interleaving of DRAM memory. er the decoding of the start
address, the external memory subsystem calculates the sequence the
addresses given, and then follows the sequence when memory is
addressed. The Pentium ves the data without sending out any more
addresses, and then distributes the data delivby the subsystem
according to the quad word entries in the applicable cache line. In
the
3
3
2
Chapter
II _
B( Tl bl cJ 4( rf T
First address output by the Pentium Oh 8h 10h 18h
Second address 8h Oh 18h 10h
Third address 10h 18h Oh 8h
last address 18h 10h 8h Oh
Table 12.8: Address sequence for burst read cycles
i486, a burst cycle is explicitly initiated by a BLAST signal
(which is not available in thePentium) during the first cycle. KEN
alone is not sufficient for a burst cycle. Moreover, a burst
transfer for the i486 always starts at a 16-byte boundary. The
write-back cache of the Pentium requires that burst mode can also
be used for write transfers. Figure 11.17 shows the signal flow for
such a write burst transfer.
Ci .:
fc
CLK [ - A3l...A3 c BE7...BEO ADS [ CACHE [ w/F? c KEN [ BRDY [i
D63...DO [
------------~---(WriteDitaXWrlteDataXWrlteDataXWrlteData)-DPT...DPO
[------------;--
10 Mbits/s l=rotatlon deviation > 0 5% (notebook)
reserved
Table H.l: cont.
; H.1.4 Optional IDE Commands s I In the following table you
will find all IDE commands, together with the hex command codes, s
which are optional according to the newest IDE interface
specification. 1 1 Command code F Commandcheck for active, Idle,
standby, sleep identify drive idle idle Immediate read sector
buffer read sector with DMA (with retry) read sector with DMA
(without retry) read multiple sectors set features set multiple
mode 98 e5 ec 97 e3 95 el e4 ca c9 c4 ef c6
I
1200
Appendix H
Command set sleep mode set standby mode standby immediate ,
write sector buffer write sector with DMA (with retry) write sector
with DMA (wtthout retry) write multtple sectors wnte same sector
write verification achnowledge medium change lock drive door unlock
drive door avallable for manufacturer reserved
Command code 99 e6 96 e2 94 e0 e8 ca cb c5 e9 3c db de df 9a.
cO-c3, 8&8f, f5-f all other codes
H.2 SCSI CommandsAll reserved fields have to be set to 0. LSB
characterizes the least significant byte, MSB the most significant
byte of a multiple byte quantity. The command codes are uniformly
6, 10 or 12 bytes long. A command is executed in the following
phases: transfer of the command code from the initiator to the
target in the command phase + transfer of the parameters and/or
data from the initiator to the target in the data-out phase -+
transfer of the result data from the target to the initiator in the
data-in phase + transfer of the status from the target to the
initiator in the status phase + transfer of messages from the
target to the initiator in the message phase. LUN indicates the
logical unit within one target or one logical unit which is
connected to the target. Examples are two hard disks (LLJNs) which
are connected to one SCSI controller (target). SCSI manages all
drives by means of so-called logicnl blocks which are contiguous
and equal in size. It is the job of the target to convert the
logical block address, for example in the case of a hard disk, into
physical cylinder, head, and sector numbers. The error codes are
provided at two levels: as a status key which indicates the error
group; and the status code with a detailed error description.
Hard Disk Drive Controllers
1201
H.2.1 Summary of Listed CommandsDetailed are only the required
and the most important optional SCSI commands for disk drives (hard
disks). An extensive discussion of all SCSI device classes would go
far beyond the scope of this book. If you are interested in
programming scanners, CD-ROMs and other devices, I have to direct
you to the (now widely available) specialized literature on these
topics. For disk drives only 6 and 10 byte commands are available.
- 6-byte commands test unit ready (OOh) rezero unit (Olh) request
sense (03h) format unit (04h) reassign blocks (07h) read (08h)
write (Oah) seek (Obh) inquiry (12h) mode select (15h) reserve
(16h) release (17h) mode sense (lab) start/stop (lbh) send
diagnostic (ldh) - IO-byte commands read capacity (25h) read (28h)
write (2ah) seek (2bh) write and verify (2eh) verify (2fh) read
defect data (37h) write buffer (3bh) read buffer (3ch) read long
(3eh) write long (3fh) change definition (40h) mode select (55h)
mode sense (5ah) The following table lists all SCSI-II commands for
the ten device classes disk drive, tape drive, printer, processor
device, WORM, CD-ROM, scanner, optical storage device, media
changer and communication device. The column with the detailed SCSI
commands is emboldened.
i
1202
Appendix H
Command Test Unit Ready RewindlRezero Unit Request Sense
Format/Format Unit Read Block Limits Reassign Blocks Read Write
Seek Read Reverse Write FilemarkGynchronize Buffer Space Inquiry
Venfy Recover Buffered Data Mode Select Reserve Release COPY Erase
Mode Sense Load/Unload/Scan/Stop/Start Receive Diagnostic Results
Send Diagnostic Present/Allow Medium Removal Set Window Get Window
Read Capacity Read Write Seek Erase Read Updated Block Write and
Verify Verify Search Data High Search Data Equal Search Data Low
Set Limits Synchronize Cache Lock/Unlock Cache Read Defect Data
Medium Scan Compare Copy and Venfy Write Buffer Read Buffer Update
Block Read Long Write Long
Length 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 10 10
10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
10
Code OOh Olh 03h 04h 05h 07h 08h Oah Obh Ofh 10h llh 12h 13h 14h
15h 16h 17h 18h 19h lah lbh lch ldh leh 24h 25h 26h 28h 2ah 2bh 2ch
2dh 2eh 2fh 30h 32h 33h 34h 35h 36h 37h 38h 39h 3ah 3bh 3ch 3dh 3eh
3fh
Class DD TD Pr PD WO CD S C OS MC Co x x x x x 0 X M- 0 x x x x
x X-O-x xx x x 0 -0 0 x xx x x --O--
M X M M M M--MO M M - 0 --OM0 X MO 0 0 - 0 M X 0 xxx0 0 -0 MX 0
- 0 - O O-OMMOMMMM--MM-_ _ _ M X O M O M X M M M M--x x x x x x x x
x x M O M M M M--MOOMMM---0 x 0 - 0 0 00 0 0 x x x - x xxxox x x -
x xxxo0 0 00 0 0 00 - M X M M M M--0 x 0 - 0 0 00 0 0 0 0 o0 0 00 -
0 0 00 0 0 00 0 0 x x x x x x x x x x 00--o 0 -0 0 M__-MMX__- - --
O_ X-_-X X-X_x - - - x x -x 0 o - - o M-_-M - _ - O O - _ - O o - -
- o 0 -0 0 -0 o - - - o 0 -0 0 -0 0 -0 0-_-0 0 0 0 0 0 0 0 00 00 00
00 0 0 0 0 0 0 x x x 0 - o x 0 -0 0 _-O__-O_ _ --O__ 0 0 0 0 0 0 0
-0 -0 -0 -0 -0 -0 -0 - O -
- - o - 0 00 - ooo-0 00 0 0 o o o -0 - 0 -0 - --(_
0 -0 o---o
Hard Disk Drive Controllers
1203
Command Change Definition .Write Same Read Sub-Channel Read Tot
Read Header Play Audio Play Audio MSF Play Audio Track index Play
Track Relative Pause/Resume Mode Select Mode Sense Move Medium/Play
Audio Exchange Medium Read Play Track Relative Write Erase Write
and Verify Verify Set Limits Request Volume Address Read Defect
Data
Length 1010 10 10 10
Code 40h 41h 42h 43h 44h 45h 47h 48h 49h 4bh 55h 5ah a5h a6h a8h
a9h aah ach aeh afh b3h b5h b7h
Class DD TD Pr PD WO CD S C OS MC Co 0 0 0 0 0 ()____ - - -_ -
-- - - -_ - - -- - -- -- 0 0 oo-- - - -0 0 0 0 0 0 0 0 0 0 0
_---o---0 -_ 0 -()---0 -_ _ () -()_-__ IJ -- 0 00 0 0 0 00 0 0 0 -x
--_ 0 o - o 0 o---- o -0 o _ _
1010 10 10 10 10 10 12 12 12 12 12 12 12 12 12 12 12
-
-
-
-
0 0 0 - - - - ---_-
- - o o - o o - o - - 0 - -0 -
) length of SCSI command in bytes (6-byte. lo-byte, or 12.byte
command) DD=disk drive, TD=tape X=requested, O=optional, drive,
Pr=printer, PD=processor dewce, WO=WORM. CD&D-ROM, Sc=Scanner,
O&optical M=manufacturer-specific storage. MC=medla changer,
Cmommunicatlon device
H.2.2 (i-byte CommandsTest Unit
Ready (OOh)
With this command you can determine whether the addressed target
drive is ready. If so, the target completes the command with the
status everything o.k. A request sense command returns only a no
status. Note that the status key is valid only after an extended
request sense command to determine the cause of a not-ready state
of the addressed drive.
1204
Appendix H
LUN:
logical unit number 0 to 7 flag l=return messages with flag, if
L=l O=messages without flag link l&inked commands O=single
commands
P: I,:
Rezero Unit (Olh) This command moves the target back to the zero
position, that is, mostly to the beginning of the drive. On a hard
disk this means that the read/write heads are moved to track 0.
Bitwe 0 1 2 3 4 0 0 LUN 0 1 0 0 0 0 1 7 6 5 4 3 211 0
I II logical flag
Reserved Reserved Resewed ReservedRPaPNaii 1 F/I
5LUN: P: IA:
unit
number
0 to 7 Ozmessages without flag
Lreturn messages with flag, if L=l link l-linked commands
O=single comnds
Request Sense (03h) This command instructs the target to return
status data about the last executed command to the initiator. The
target aborts the transfer of the status data if all available
bytes have been transmitted to the initiator, or if the allocation
length is exhausted. Note that the status data is only valid with a
message check status for the preceding command as long as the
target has not received any further command. The target transfers
status data to the initiator during the course of a data-in phase.
The status data consist of an &byte header and additional
status bytes in accordance with the preceding command and the
error. Only with a sufficient allocation length can you be sure
that all status bytes are transferred by the target (specify a
value of 255 here ). Whether and, if so, how many additional status
bytes the target transfers in an extended form depends upon the
entry ndditional stat~ts let@ in byte 7 of the status data. Table
H.2 shows an example for the status, where the physical location of
the error is indicated. The returned status information is very
extensive, so it is not detailed here.
Hard Disk Drive Controllers
LW: logical unit number 0 to 7 Allocation Length: number of
bytes which the initiator 054 status bytes (SCSI-I) 1...255: P: L:
flag l-return messages with flag, if L=l link l.linked commands
O-single cormnands O=messages without flag reserves for the
target's status data
0~0 status bytes (SCSI-I I ) number of status bytes to
transfer
Header m
VAL: Class: Error Code: Status Key: Logical Block Address:
AdditIonal Status Length:
valid l=logical block address (byte 3-6) valid &CBA not
valid error class. for extended status class equal to 7 for
extended status equal to 0 error group, see H.2.4 identification of
the block where the error occurred number of additional status
bytes
Additional Status Bytes (Example)Byte 8 9 10 11 12 13 14 15 val
16 17 16 19 20 CCdellt Command Dependent Command Dependent Command
Dependent Command Dependent Additional Status Code Extended Status
Code FRU Status Code Dependent Status Code Dependent Ftetnes
Physical Cylmder (MSB) Physical Cylinder (LSB) Physical Head
Physical Sector
1
L2
Tnble H.2: St&us
1206 Format Unit (04h)
Appendix H
This command formats the whole drive by writing all ID and
sector data fields. You must specify the block size and the
geometric drive parameters, such as sectors per track, etc., in
advance by a mode select cornman) OOh-real mode, Olh=16:16
protected mode, 02h=16:32 protected mode, 03h=00:32 protected
modexl OOh=SS provides Information about code and data in the
buffer (Get) Olh=SS provides Information about addltional data in
the buffer (Get) OZh=SS accepts an array with pointers to
addttlonal data in the buffer (Set) 4, subfunctlon=OOh:
subfunctlork03h: Buffer structure: Subfunction=OOh. Offset OOh 04h
08h Och 10h 14h Offset OOh 04h 08h number of addItIonal data areas
(Get) number of pointers to addmonal data areas (Set)
subfunctlon=Ol h: amount of information about addItIonal data areas
(Get)
Sizedword dword dword dword dword dword Size dword dword
dword
contentItnear 32.bit base address of the code segment code
segment l!mlt offset of entry point linear 32.bit base address of
the data segment data segment llmlt offset of data area content
linear 32-bit base address of the data segment data segment limit
offset of data area data segment).
SubfunctforkOlh (one entry for each addItIona/ data
segmenti-
Subfunction=OZh (one entry for each additiona/
OffsetOOh04h 08h
Sizedword dword dword
content32.btt offset selector reserved
PCMCIA Socket Services
1305
INT lah, Function alh - GetAccessOffsets In a buffer, this
function provides the offsets of an adapter-specific access routine
to PCMCIA cards which allow an access to the card memory only
through a register, that is, I/O ports (the usual method is mapping
windows into the system memory). The calling program must supply a
buffer.Register AH AL BH cx ;D, ES Carry Call value alh adapter
mode number of offset? Offset buffer Segment buffer error if 0 0
Return value error code
number of offsets41
see M 3 *I OOh=real mode, 01 h=1616 protected mode, 02h=16.32
protected mode, 03h=00:32 protected mode3) requested number of
offsets ) avalable number of offsets
INT lah, Function aeh - VendorSpecific A call of this function
leads in a defined way to a vendor-specific function. Vendors are
allowed to implement the function in any way. With the exception of
AH, AL and Carry, the use of all registers is vendor-specific,
too.Register AH AL Carry Call value aeh adapter Return value error
code error if 0 0
M.3 Error CodesCode OOh Olh 02h 03h 04h O6h 07h Name SUCCESS
BAD-ADAPTER BAD-ATTRIBUTE BAD-BASE BAD_EDC BAD_lRQ BAD-OFFSET
Description function completed successfully invalid adapter address
Invalid attnbute invalid base address of system memory invalid EDC
generator invalid IRQ level Invalid PCMCIA card offset
1306
Appendix M
Code 08h 09h Oah Obh Odh Oeh Ofh llh 12h 14h 15h 16h 17h 18h
Name BAD-PAGE READ-FAILURE BAD-SIZE BAD-SOCKET BAD-TYPE BAD_VCC
BAD_VPP BAD-WINDOW WRITE-FAILURE NO-CARD BAD_FUNCTION BAD-MODE
BAD-SPEED BUSY
Description invalid page error whrle reading invalid size
invalid socket invalid window or interface type invalid Vcc level
index invalid Vppl or Vpp2 level Index invalid window error while
wrttrng no PCMCIA card in the socket invalid function mode not
supported invalid speed socket or PCMCIA card busy
M.4 PCMCIA Card Services SummarizedThe Card Services provide a
system-near interface for PCMCIA slots; calls to the card services
are therefore system-dependent. For several processes in a system,
the card services administer PCMCIA accesses to avoid access
conflicts. For DOS in real mode (or real mode ROM BIOS), the card
services are called through INT lah, function afh ([ah] = afh).
M.4.1 Card Services FunctionsCode OOh Olh 02h 03h 04h 05h 06h
07h 08h 09h Oah Obh Och Odh Oeh Name CloseMemory CopyMemory
DeregisterClient GetClientlnfo GetConfigurationlnfo
GetFirstPartition GetFirstRegron GetFirstTuple GetNextPartitron
GetNextRegion GetNextTuple GetCardServrceslnfo GetStatus
GetTupleData GetFirstClient Description closes a memory card area
copres data of a PCMCIA card removes a clrent from the list of
registered clrents provides information about a clrent returns the
confrguratron of a socket/PCMCIA card returns informatron about the
frrst partitron of the card in a
socket
returns socket returns returns returns returns returns etc.)
returns returns returns
information about the first region of the card In the the first
tuple of the specified type information about the next partrtion of
the card information about the next region of the card the next
tuple of the specrfred type CS Information (number of logrcal
sockets, vendor the present status of a PCMCIA card and the socket
the content of the last passed tuple the first cirent handle of the
registered clrents -.-
PCMCIA Socket Services
1307 c
Code Ofh 10h llh 12h 13h 14h 15h 16h 17h 18h 19h lah lbh lch ldh
leh lfh 2Oh 2lh 22h 23h 24h 25h 26h 27h 28h 29h 2ah 2bh 2ch 2dh 2eh
2fh 30h 31h 32h 33h 34h 35h 36h
Name RegisterEraseQueue RegisterClrent ResetCard MapLogSocket
MapLogWrndow MapMemPage MapPhySocket MapPhyWtndow ModifyWrndow
OpenMemory ReadMemory RegisterMTD Release10 ReleaselRQ
ReleaseWtndow ReleaseConfrguration Request10 RequestlRQ
RequestWindow RequestSocketMask ReturnSSEntry WriteMemory
DeregisterEraseQueue CheckEraseQueue ModifyConftguratron
RegisterTImer SetRegIon GetNextClient ValidateUS RequestExclustve
ReleaseExclusive GetEventMask ReleaseSocketMask
RequestConfrguratron SetEventMask AddSocketServrces
ReplaceSocketServrces VendorSpecrfrc AdjustResourcelnfo
AccessConfrguratronRegrster
Description registers the erase queue of a client being serviced
by the card services registers a clrent for service by the card
services resets the PCMCIA card In a socket maps a logical socket
under card services to the physical adapter and socket values under
socket services maps a window handle under card servrces to the
physical adapter and window values under socket services maps a
memory area of a PCMCIA card to a page in a window maps physrcal
adapter and socket values under socket services to a logical socket
under card services maps physical adapter and window values under
socket services to a window handle under card services modifies the
attributes or access speed of a wtndow opens a memory card area
reads data from a PCMCIA card via a memory handle registers a
memory technology driver MTD releases the previously requested I/O
addresses releases previously requested IRQs releases previously
requested system memory block resets the socket configuration to
memory-only interface requests l/O addresses for a socket requests
IRQ for a socket request the mapping of a system memory block to a
memory area of a PCMCIA card requests callback upon a socket status
change (event) returns the entry pornt Into socket services wrttes
data via a memory handle onto a PCMCIA card removes a previously
registered erase queue informs about new queue entries modifies a
socket and PCMCIA card confrguration registers a trmer for issuing
a callback (Events) sets the properties of a PCMCIA card area
returns the client handle for the next registered clrent validates
the card rnformatron structure (CIS) of a PCMCIA card requests the
exclusrve use of a PCMCIA card In a socket releases the exclusive
use of a card In a socket returns the bit map mask for Issuing an
event releases the previously defined event mask for a socket
configures the PCMCIA card rn a socket changes the event mask adds
a new 55 handler below the socket servrce level replaces an
existrng socket service handler by a new one (vendor-dependent)
reads or adjusts the available resources accesses a PCMCIA
configuratton regrster
1308
Appendix M
M.4.2 EventsEvents are reported by the socket services to the
clients. Usually, events are status changes of a socket or the
inserted card.
,
Code 0th 02h 03h 04h 05h 06h 07h 08h 09h Oah Bbh Och Odh Oeh Ofh
10h llh 14h 15h 16h 17h 40h 80h 81h 82h
EventBATTERY-DEAD BATTERY-LOW CARD-LOCK CARD-READY CARD-REMOVAL
CARD-UNLOCK EJECTION_COMPLETE EJECTION-REQUEST INSERTION_COMPLETE
INSERTION_REQUESl PM-RESUME PM-SUSPEND EXCLUSIVE_COMPLETE
EXCLUSIVE_REQUEST RESET_PHYSlCAL RESET-REQUEST CARD-RESET
CLIENT-INFO TIMER-EXPIRED SS_UPDATED WRITE-PROTECT CARD_INSERTION
RESET-COMPLETE ERASE-COMPLETE REGISTRATlON_COMPLETE
Description battery dead, data lost battery low, data still o.k.
mechanical lock has locked the inserted card RDY/BSY signal has
changed from busy to ready card has been removed from a PCMCIA
socket mechanical lock has released the inserted card card has been
ejected from the socket by an automatic ejection device card should
be ejected from the socket by an automatrc ejection device card has
been inserted into the socket by an automatic insertion device card
should be inserted into the socket by an automatic insertion device
power management should power-up socket and card power management
should power-down socket and card client has been granted an
exclusrve access to a PCMCIA card client attempts to gc$ an
exclusive access to a PCMCIA card hardware reset for a PCMCIA card
in a socket client has requested a hardware reset for a PCMCIA card
in a socket hardware reset for the card in a socket completed
client should return information timer expired socket support via
socket services has been changed write-protect status for the
PCMCIA card which IS Inserted rn the socket has changed a PCMCIA
card has been inserted reset rn the background complete erase in
the background complete registration in the background complete
PCMCIA Socket Services
1309
M.4.3 Error CodesCode OOh Olh 02h 03h 04h 05h 06h 07h 08h 09h
Oah Obh Och Odh Oeh Ofh 10h llh 12h 13h ,14h ,15h J6h ;17h 18h :19h
lah 1 bh +ch ldh lleh .lfh ,2Oh 2lh
NameSUCCESS BAD-ADAPTER BAD_ATTRIBUTE BAD-BASE BAD_EDC BAD_IRQ
BAD-OFFSET BAD-PAGE READ-FAILURE BAD-SIZE BAD-SOCKET BAD_lYPE
BAD_VCC BAD_VPP BAD-WINDOW WRITE-FAILURE NO-CARD
UNSUPPORTED_FUNCTION UNSUPPORTED_MODE BAD-SPEED BUSY
GENERAL-FAILURE WRITE-PROTECTED BAD_ARG_LENGTH BAD_ARGS
CONFIGURATION_LOCKED IN-USE NO_MORE_ITEMS OUT_OF_RESOURCE
BAD-HANDLE
Description function completed successfully adapter invalid
attribute invalid system memory base invalid EDC generator Invalid
reserved IRQ level invalid PCMCIA card offset invalid page invalld
error while reading invalid size invalld socket reserved window or
interface type invalid Vcc level Index invalid Vppl or Vpp2 level
index invalid reserved wlndow invalid error while writing reserved
no PCMCIA card in socket function not supported mode not supported
speed invalid socket or PCMCIA card busy undefined error occurred
medium write-protected function argument length invalid one or more
function arguments invalid configuration already locked resource
already in use no more of the requested items no more resources
handle invalid
