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50 Everyday Practical Electronics, November 2010

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Circuit WizardA Standard or Professional version

of Circuit Wizard can be purchased from the editorial office of EPE – see CD-ROMs for Electronics page and the UK shop on our website (www.epemag.com) for a ‘special offer’.

Further information can be found on the New Wave Concepts website; www.new-wave-concepts.com. The developer also offers an evaluation copy of the software that will operate for 30 days, although it does have some limitations applied, such as only being able to simulate the included sample circuits and no ability to save your creations, this is the software that is free with EPE this month.

However, if you’re serious about electronics and want to follow our series, then a full copy of Circuit Wizard is a really sound investment.

Virtually fullydischarged

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ISP to ICP Programming Bridge: HT-ICP200In-Circuit-Programming (ICP) for P89LPC900 Series of 8051 Flash �Controllers. ICP uses a serial shift protocol that requires 5 pins to program: PCL, PDA, Reset, VDD and VSS.

ICP is different from ISP (In System Programming) because it is done completely by the microcontroller’s hardware and does not require a boot loader.

Program whole series of P89LPC900 µController from NXP Semiconductors…

USB-RS232 Interface Card: HT-MP213A compact solution for missing ports…

Thanks to a special integrated circuit from Silicon Laboratories, computer peripherals with an RS232 interface are easily connected to a USB port. This simple solution is ideal if a peripheral does not have a USB port, your notebook PC has no free RS232 port available, or none at all !

Classic P89C51 Development/Programmer Board: HT-MC-02HT-MC-02 is an ideal platform for small to medium scale embedded systems development and quick 8051 embedded design prototyping.

HT-MC-02 can be used as stand-alone 8051�CFlash programmer or as a development, prototyping, industry and educational platform.

For professional, hobbyists…

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Further information can be found on the New Wave Concepts website; www.new-wave-concepts.com. The developer also offers an evaluation copy of the software that will operate for 30 days, although it does have some limita-tions applied, such as only being able to simulate the included sample circuits and no ability to save your creations.

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By integrating the entire design process, Circuit Wizard provides you with all the tools necessary to produce an electronics project from start to finish – even including on-screen testing of the PCB prior to construction!

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� ��Circuit Wizard is a revolutionary new software system that combines circuit design, PCB design, simulation and CAD/CAM manufacture in one

complete package. Two versions are available, Standard – which is on special offer from EPE – and Professional.

Special EPE Offer ends 31 Jan, 2011

Special EPE Offer - Standard version only.

EPE is offering readers a 10% discount on Cicuit Wizard Standard software if purchased before 31 Jan, 2011. This is the software used in our Teach-In 2011 series.

Standard (EPE Special Offer) £59.99 £53.99 inc. VAT

Professional £89.99 inc. VAT

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48 Everyday Practical Electronics, March 2011

Teach-In 2011


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TEACH-IN 2011A BROAD-BASED INTRODUCTION TO ELECTRONICS

(��

Circuit Wizard to simulate a variety �� while Investigate challenges you to explain the operation of a simple ��Amaze��we shall look back at the technol-ogy that we used before integrated circuits became available.

INTEGRATED circuits (ICs) com-prise large numbers of transis-tors and other components built

on a single small slice of silicon. �� built in a package that’s smaller �� as inductors and capacitors (dif-�� circuit form) and other components that need to be externally accessi-ble are then connected as external ‘discrete’ components.

In this instalment of Teach-In 2011��the most common types of integrated �� op amp). In Build��

��Used in a huge variety of different

�� are probably the most common and versatile form of analogue integrated circuit. Fig. 5.1 shows the ubiquitous !"#�� 5.2 shows what’s inside the 8-pin dual-in-line package.

Fig.5.1. The famous 741 operational ��

Everyday Practical Electronics, March 2011 49

Teach-In 2011

You can think of an operational � ��$��%&�� '�� *

Op amp�� -

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��output and no common connection. /�� %��$0&�� %��$3&�� %��0��$3&��4��$0&��#679��

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Fig.5.2. Internal circuit of the 741 operational ��

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Teach-In 2011

is the short-circuit output current (in amps).

Example 1��

��H@��input of 4mV. Determine the value of ��

SolutionNow:

�� relative to this rail.

GainBefore we take a look at some of

the characteristics of operational � �� One of the most important of these is �� $gain’ ��%��as simple as possible we will use an $�=�� &� �� +�+��is much easier to work with than the �� +�H�

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Gain is simply the ratio of what ��:�� the ratio of output voltage to input �� P

�� output power to input power. As a �� P

where Av��Vout��Vin��voltages respectively.

: ��as the ratio of output current to input �� P

outv

in

VAV

=

outi

in

IAI

=

where Ai��Iout��Iin��current respectively.

outp

in

PAP

=

where Ap��Pout��Pin��voltages respectively.

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out out outP I V= × and in in inP I V= ×

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out outp i v

in in

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= = ×

�� power gain �� product of the current gain��voltage gain.

Input resistance�� input resistance��

��to input current:

inin

in

VRI

=

where Rin is the input resistance (in �� ;��Vin is the input voltage (in volts) ��Iin is the input current (in amps).

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50 102 10

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Teach-In 2011

that we would associate with an ‘ideal’

(a) The voltage gain should be as large as possible, so that a large output voltage will be produced by a small input voltage

(b) The input resistance should be as large as possible, so that only a small input current will be taken from the signal source

(c) The output resistance should be as low as possible, so as not to limit the output current and power delivered by

(d) Bandwidth should be as wide as possible so as not to limit the fre -

Fortunately, the characteristics of most

close to those of an ‘ideal’ operational

bandwidth of making the closed-loop gains equal to 10,000, 1,000, 100, and 10. Table 5.2 summarises these results. You should also note that the (gain × bandwidth) product for this

6Hz (ie, 1MHz). We can determine the bandwidth

voltage gain is set to a particular value by constructing a line and noting the

.evruc esnopser eht no tniop tpecretni

Please note!The product of gain and bandwidth

-stant. Thus an increase in gain can only be achieved at the expense of bandwidth, and vice versa .

Please note!When negative feedback is applied

produce a negative output voltage, and vice versa ). To preserve symmetry and minimise offset voltage, a third resis -tor is often included in series with the non-inverting input. The value of this resistor should be equivalent to the par -allel combination of R IN and R F. Hence:

Parameter Ideal TypicalVoltage gain Very high 100,000 Input resistance Very high 100MΩOutput resistance Very low 20ΩBandwidth Very wide 2MHz

Table 5.1. Ideal and typical characteristics

Gain and bandwidthIt is important to note that the

product of gain and bandwidth is a constant for any particular opera -

increase in gain can only be achieved at the expense of bandwidth, and vice versa . In practice, we control the gain (and bandwidth) of an operational

of negative feedback . Figure 5.6 shows the relationship

between voltage gain and bandwidth

(note that the axes use logarithmic, rather than linear scales). The open-loop voltage gain (ie, that obtained with no external feedback applied) is 100,000 and the bandwidth obtained in this condition is a mere 10Hz. The effect of applying increasing amounts of negative feedback (and consequent -ly reducing the gain to a more manage -able amount) is that the bandwidth increases in direct proportion.

Frequency responseThe frequency response curves

in Fig.5.6 show the effect on the

Voltage gain (AV) Bandwidth1 DC to 1MHz

10 DC to 100kHz 100 DC to 10kHz

1000 DC to 1kHz 10000 DC to 100 Hz

100000 DC to 10 Hz

Table 5.2. Relationship between voltage gain and

with a gain-bandwidth product of 1MHz

reduced and the bandwidth is in -creased. When positive feedback is

gain increases and the bandwidth is reduced. In most cases this will result in instability and oscillation.

The three basic configurations

are shown in Fig.5.7. As mentioned earlier, supply rails have been omit -ted from these diagrams for clarity but are assumed to be symmetrical about 0V.

The voltage gain for the inverting

by the expression:

Fig.5.6. Frequency response curves for

The voltage gain for the non-invert -

given by the expression:

out FV

in IN

1V RAV R

= = +

Finally, the voltage gain for the dif -

is given by the expression:VA = out F

in IN

V RV R

− = −

R F IN

F IN

R RR R

×=

+

The minus sign in the voltage gain expression is included to indicate in -version (ie, a positive input voltage will

out out FV

in 2 1 IN

V V RAV V V R

= = =−


Teach-In 2011

Where V 1 and V 2 are the voltages at the input resistance ( R IN ) connected to inverting and non-inverting inputs respectively.

Limit capacitor-

scribed previously have used direct coupling and thus have frequency response characteristics that extend to DC. This, of course, is undesirable for many applications, particularly where a wanted AC signal may be superimposed on an unwanted DC voltage level.

In such cases a capacitor of ap -propriate value may be inserted in series with the input, as shown below. The value of this capacitor should be chosen so that its reac -tance is very much smaller than the input resistance at the lower applied input frequency.

We can also use a capacitor to re -strict the upper frequency response of

is connected as part of the feedback path. Indeed, by selecting appropri -ate values of capacitor, the frequency response of an inverting operational

tailored to suit individual require -ments (see Fig.5.8 and Fig.5.9).

The lower cut-off frequency is determined by the value of the input capacitance, C1, and input resistance, R 1. The lower cut-off frequency is given by:

Provided the upper frequency re -sponse it not limited by the gain × bandwidth product, the upper cut-off frequency will be determined by the feedback capacitance, C2, and feed -back resistance, R 2, such that:

Where C2 is in Farads and R 2 is in ohms.

Example 3

is to be designed to the following

Voltage gain = 20 Input resistance (at mid-band) = 10k ?Lower cut-off frequency = 100Hz Upper cut-off frequency = 10kHz Devise a circuit to satisfy the above

SolutionTo make things a little easier, we can

break the problem down into manage -able parts. We shall base our circuit

-

lower cut-off frequencies, as shown in the Fig.5.8.

The nominal input resistance is the same as the value for R 1.

both the low and the high frequency response

11 0.159

2 1 1 1 1f

C R C Rπ= =

11 0.159

2 2 2 2 2f

C R C Rπ= =

Thus:

R1 = 10 kΩ

To determine the value of R 2 we can make use of the formula for mid-band voltage gain:

AV = R2/R1

Thus:

kΩ

sR2 = Av × R1 = 20 × 10 kΩ = 200 kΩkΩ

kΩkΩ

Where C1 is in farads and R 1 is in ohms.


Teach-In 2011

To determine the value of C1 we will use the formula for the low frequency cut-off:

10.159

1 1f

C R=

From which:

31

0.159 0.1591 0.159 10 F 159 nF

1 100 10 10 1 10C

f R= = = = × =

× × ×

66

0.1590.159 10 F 159

1 10−= = × =

×nF

Finally, to determine the value of C2 we will use the formula for high frequency cut-off:

20.159

2 2f

C R=

in Fig. 5.10.

Other applicationsAs well as their application as a

general purpose amplifying device,

of other uses. We shall conclude this month’s Learn by taking a brief look at two of these, voltage followers and comparators .

A voltage follower using an operation -

circuit is essentially a non-inverting

is fed back to the input. The result is an

‘unity’), a very high input resistance and a very high output resistance. This stage is often referred to as a buffer and is used for matching a high-impedance circuit to a low-impedance circuit.

Typical input and output waveforms for a voltage follower are shown in Fig.5.12. Notice how the input and output waveforms are both in-phase (they rise and fall together) and that they are identical in amplitude.

A comparator using an operational

no negative feedback has been ap -plied, this circuit uses the maximum

Fig.5.11. A voltage follower

Fig.5.12. Typical input and output waveforms for a voltage follower

Fig.5.13. A comparator

Fig.5.14. Typical input and output waveforms for a comparator

The output voltage produced by the

the maximum possible value (equal to the positive supply rail voltage) whenever the voltage present at the non-inverting input exceeds that present at the inverting input. Con -versely, the output voltage produced

to the minimum possible value (equal to the negative supply rail voltage) whenever the voltage present at the inverting input exceeds that present at the non-inverting input.

From which:

3 3 92

0.159 0.159 0.1592 0.159 10 F 159 pF2 10 10 100 10 1 10

Cf R

= = = = × =× × × ×2

9

0.1591 10

=×2

0.50.159= × × 910 F 1−× =80pF

80


Teach-In 2011

Typical input and output wave -forms for a comparator are shown in Fig.5.14. Notice how the output is either +15V or –15V depending on the relative polarity of the two inputs.

N OW we’ve heard the theory, let’s use Circuit W izard to try

out some practical operational am -

really neat way to explore this kind of theory because students often

prototyping boards. This might be due to needing dual

rail power supplies, or the fact that

the schematic diagram into a ‘real life’ circuit where incorrect layout can cause confusing results! Fortu -nately, we can do away with these problems when investigating these devices using Circuit W izard. So let’s look at a simple operational am -

Please note!W hen capturing

a schematic based on operational am -plifiers it is im -portant to doublecheck the orien -tation of the two signal input pins. By default, Circuit W izard will draw an operational am -plifier with the non-inverting in -put (labelled ‘+’) at the top and the non-inverting in -put (labelled ‘−‘) at the bottom. This may or may not be the same as the

circuit you are entering – so make sure that you double check!

Fortunately, it’s really easy to change this; just right-click the op amp and click ‘arrange’ then ‘mir -ror’ (see Fig.5.15). It is important to note that by ‘mirroring’ the op amp, the supply connections re -main unchanged, ie the positive supply at the top and negative at the bottom.

W ith the foregoing in mind, enter the circuit shown in Fig.5.16. In this circuit we have a 2V variable input voltage connected to our invert -ing input, with our non-inverting input connected to ground (0V). Recalling what we learned earlier,

Check –

5.1. Sketch the circuit symbol for

of the connections.

5.2. Sketch an equivalent circuit

and output resistances. Label your drawing .

5.3. List four desirable characteris -.

5.4. -put of 1.5V when an input of 7.5mV is present. Determine the value of the voltage gain.

5.5.of 50 and a current gain of 2,000. W hat power gain does the ampli -

5.6. Sketch the circuit of an invert --

and identify the components that determine the voltage gain of the

.

5.7. An inverting operational ampli -

gain of –15, an input resistance of 5k ? , and a frequency response ex -tending from 20Hz to 10kHz. Devise a circuit and specify all component values required.

you are doing?How do you think

The Circuit Wizard way

the correct orientation of inverting and non-inverting inputs

For more information, links and other resources please check out

our Teach-In website at:



Teach-In 2011

we know that the basic principle of

the difference in voltage between the two inputs.

-vided by the circuit shown in Fig. 5.16 is determined by the gain, which will depend on the arrangement and values of the resistors in the circuit. We learnt that we can calculate the gain of an

the formula:

In our circuit, R F (R2) is 2.5k ? and R IN (R1) is 500 ? . Use the formula above to prove that the gain of this circuit is –5. In simple terms, this means that we should expect our output voltage to be –5 times larger than the input voltage. Note the minus sign; the output will be inverted, as its name suggests.

Now set the input voltage to 1V and run the simulation. We would expect the output voltage to be −5 × 1V = −5V. Now experiment with changing the in -put voltage and monitoring the output voltage. You should see that the gain holds true whatever the input voltage up until the output reaches the supply voltage. At this point, the output volt -age will remain constant, even with increased input voltage. Whereas this

used in audio circuits this can cause clipping of the waveform, which can distort the sound.

Modify your circuit by replacing the variable input voltage with a function

generator and adding some probes, as shown in Fig.5.17. The waveform dis -play in Fig.5.18 shows how the signal

ComparatorIn our second circuit we’ll inves -

-

‘compares’ two input voltages and

The inverting input is a simple poten -tial divider that sets the voltage to half of the supply voltage, in this case 5V. The non-inverting input is connected

to a potentiometer; effectively a vari -able potential divider. This allows us to control the voltage to this input.

In practical circuits this might be replaced with a potential divider in -volving a resistive input device, such as a light dependent resistor (LDR) or thermistor (we’ll be lookingat a circuit using an LDR next). Some circuits even use two variable inputs to be com -pared – for example a line following robot might compare the inputs from two LDRs to determine its orientation on a line.

Enter the comparator circuit shown in Fig.5.19 and experiment with the circuit by changing the potentiometer and observing the input/output volt -

or ‘voltage level’ views to analyse the operation of the circuit. By changing the potentiometer you are changing the voltage at the non-inverting input. The inverting input is held at a constant voltage of about 5V.

When the non-inverting input volt -age is higher than the inverting input,

-back resistors the gain is very large, and therefore the output swings to the maximum voltage possible; the supply

F

IN

Voltage gainRR

= −

Fig.5.18. Waveform graph produced by the modi -

is shown in blue and the output in red

Fig.5.19. A simple circuit to demonstrate

comparator


Teach-In 2011

�� -�� !�"# $�� !��!�� -�� %$�� $�� %�� $ ��%��!��

&�� !��%��%��$�� %��-��'��"#��(��!$ �� %$ �� '��%��)�� $�� $�� $��!�� !��%�� %��

Auto Light Switch*�� $��+�� -

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�� !�� 0��12"��!�� 3%�!4�� *�� $��!��!� 5��%��!��5��

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Fig.5.20. An automatic light switch using a comparator circuit

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.� �� % �� !��!��%�� %8�� 9 0��12�� !�� :�;� !$ �� !��! �� %��'�� 5�

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6�� ! �� :�;� !��!�� 4�� )�� $ �� +�� $��+�!�� *�%�� %��!%��+��5��%�� %�� (�<��!��+ %�� !�� ! ��%��5��<(��=+�� %�� :�;� !��!��>�"�� !�� 5��%��

Investigate

�� an oscillator circuit

Fig.5.22(right). Changing simulation � ��


Teach-In 2011

If your computer is a bit on the slow side, opt for less until you get a nice looking trace (see Fig.5.22). You will also need to adjust the scale on your graph; Fig.5.23 shows some suggested values that will give you a graph like that shown in Fig.5.24. The rest is for you to investigate… so how does it do it? The blue trace/probe in Fig. 5.24 should give you some clues!

Fig.5.23(above). Suggested graph parameters

Fig.5.24(right). Typical waveforms produced by the oscillator circuit

Amaze

Answers to Questions5.1. See Fig.5.3

5.2. See Fig.5.5

5.3. See page 51

5.4. 200

5.5. 100,000 5.6. See Fig.5.7(a) 5.7. See Fig.5.8 with R1 = 5k�, R2 = 75k�, C1 = 1.59μF, C2 = 212pF

Before we could use transistors in electronic circuits, we had to use valves. These looked a bit like light bulbs. They needed lots of space, lots of power and often produced a lot of heat (they had to be heated up inter-nally before they could work). This made designing simple circuits quite complicated – not only did we need a low-voltage high-current heater sup-ply, but we also needed a high voltage supply of around 200V or more.

When transistors came along, they revolutionised electronics, making it possible to have small, complex circuits that operated from low volt-age. Today, we can make transistors so ��%�� %��of them on an area the size of your ��

The current generation of microproc-essors are manufactured using a process that’s capable of producing individual transistors 1,000 times smaller than the diameter of a human hair. That means

that the in-d i v i d u a l semicon-ductor lay-

ers might only have a few tens or hundreds of atoms. In fact, the lat-est technol-ogy is capable of producing transistors that are less than 25nm across – that’s a mere 0.000025mm!

Next month!In next month’s Teach-In we will be

investigating logic circuits.


of Circuit Wizard can be purchased from the editorial office of EPE – see CD-ROMs for Electronics page and the UK shop on our website (www.epemag.com).


Fig.5.25. Valves from the 1940s and 1950s com-pared with transistors from the 1960s and 1970s

Fig.5.26. This 1970s semiconductor memory device contains the equivalent of more than 65,000 individual transis-tors. The latest chips have more than 100 million devices in the same space!

44 Everyday Practical Electronics, April 2011

Teach-In 2011


Part 6: Logic circuits

Our Teach-In series is designed to provide you with a broad-based introduction to electronics. We have attempted to provide coverage of three of the most important electronics units that are currently studied in many schools and colleges in the UK. These include Edexcel BTEC Level 2 awards, as well as electronics

units of the new Diploma in Engineering (also at Level 2). The series will also provide the more experienced

you an opportunity to build and test simple electronic circuits. Investigate will provide you with a challenge


Digital logicLogic circuits are the basic build-

ing blocks of digital circuits and systems. Logic circuits have inputs and outputs that can only exist in one of two discrete states, variously known as ‘on’ and ‘off’, ‘high’ and ‘low’, or ‘1’ and ‘0’.

Logic circuits usually have several inputs and one or more outputs. At any instant of time, the state of the inputs will determine the state of the output, according to the logicfunction provided by the circuit.

If this is beginning to sound a little complicated, let’s look at a couple of simple logic functions that can be

IN THIS instalment of Teach-Inwe introduce the basic build-ing blocks of digital circuits.

We explain the operation of each of the most common types of logic gate and show how they can be combined together in order to solve more complex logic problems. We also introduce bistable circuits and show how they can be used to re-member a momentary event.

We shall be using Circuit Wizard to investigate each of the basic logic gates before moving on to explore some applications. Finally, in Amaze we look at how recent advances in technology have pro-vided us with digital circuits that are capable of operation at speeds that are increasingly fast.

couple of switches and a lamp and battery.

Consider the circuit shown in Fig.6.1. In this circuit, a battery is connected to a lamp via two switches, A and B. It should be obvious that the lamp will only operate when both of the switches are closed (ie, both A AND B are closed).

Let’s look at the operation of the circuit in a little more detail. Since there are two switches (A and B) and there are two possible states for each switch (open or closed), there is a total of four possible conditions for the circuit. We have summarised these states in Fig.6.2.

Note that the two states (ie, open or closed) are mutually exclusive

Learn

Everyday Practical Electronics, April 2011 45

Teach-In 2011

and that the switches cannot exist in any other state than completely open or completely closed. Because of this, we can represent the state of the switches using the binary digits, 0 and 1, where an open switch is represented by 0 and a closed switch by a 1. Furthermore, if we assume that ‘no light’ is represented by a 0 and ‘light on’ is represented by a 1, we can rewrite Fig.6.2 in the form of a truth table, as shown in Fig.6.3.

Another circuit with two switches is shown in Fig.6.4. This circuit differs from that shown in Fig.6.1 by virtue of the fact that the two switches are connected in parallel rather than in series. In this case, the lamp will operate when either of the two switches is closed (in other words, when A OR B is closed).

As before, there is a total of four possible conditions for the circuit. We can summarise these conditions in Fig.6.5. Once again, adopting the convention that an open switch can be represented by 0 and a closed switch by 1, we can rewrite the truth table in terms of the binary states, as shown in Fig.6.6.

The basic logic functions can be combined to produce circuits that satisfy a more complex logi-cal operation. For example, Fig.6.7 shows a simple switching circuit in which the lamp will operate when switch A AND either switch B OR switch C is closed. The truth table for this arrangement is shown in Fig.6.8.

Logic gatesLogic gates are building blocks

that are designed to produce the

basic logic functions, AND, OR, NOT, etc. These circuits are de-signed to be interconnected into larger, more complex, logic circuit arrangements.

Each gate type has its own symbol and we have shown both the Brit-ish Standard (BS) symbol together with the more universally accepted American Standard (MIL/ANSI) symbol. Note that, while inverters and buffers each have only one in-put, exclusive-OR gates have two inputs and the other basic gates

Fig.6.1. AND switch and lamp logic

Fig.6.4. OR switch and lamp logic

Fig.6.2. Possible states for the circuit of Fig.6.1

Fig.6.5. Possible states for the circuit of Fig. 6.4

Fig.6.3 (right). Truth table for the AND switch and lamp logic

Fig.6.6 (right). Truth table for the OR switch and lamp logic

Fig.6.7. Simple switching circuit using AND and OR logic

Fig.6.8 (right). Truth table for the simple switching circuit shown in Fig.6.7


Teach-In 2011

BuffersBuffers do not affect the logical

state of a digital signal (ie, a logic 1 input results in a logic 1 output, and a logic 0 input results in a logic 0 output). Buffers are normally used to provide extra current drive at the output, but can also be used to regu-larise the logic levels present at an interface. The Boolean expression for the output, Y, of a buffer with an input, X, is Y = X.

(eg, AND, OR, NAND and NOR) are commonly available with up to eight inputs.

Some of the logic gates shown in Fig.6.9 have inverted outputs. These gates are the NOT, NAND, NOR, and Exclusive-NOR and the small circle at the output of the gate (see Fig.6.10a) indicates this inversion. It is important to note that the output of an inverted gate (eg, NOR) is identical to that of the same (ie, non-inverted) function with its output connected to an inverter (or NOT gate) as shown in Fig.6.10b).

The logical function of a logic gate can also be described using Boolean notation. In this type of notation, the

OR function is represented by a ‘+’

sign, and the NOT function by an overscore or ‘/’. Thus the output, Y, of an OR gate with inputs A and B can be represented by the Boolean algebraic expression:

Y = A + B

Similarly, the output of an AND gate can be shown as:

the logic functions of each of the basic logic gates that we met earlier in Fig.6.9:

Fig.6.9. Logic gate symbols and truth tables

Fig.6.10. Logic gates with inverted outputs

Fig.6.11 (above). Majority vote logic circuit

Fig.6.12 (right). Truth table for the majority vote logic circuit


Teach-In 2011

InvertersInverters are used to complement

the logical state (ie, a logic 1 input results in a logic 0 output and vice versa). Inverters also provide extra current drive and, like buffers, are used in interfacing applications where they provide a means of regularising logic levels present at the input or output of a digital system. The Boolean expression for the output, Y, of an inverter with an input, X, is Y = /X.

AND gatesAND gates will only produce a

logic 1 output when all inputs are simultaneously at logic 1. Any other input combination results in a logic 0 output. The Boolean expression for the output, Y, of an AND gate

OR gatesOR gates will produce a logic 1

output whenever any one, or more inputs are at logic 1. Putting this another way, an OR gate will only produce a logic 0 output whenever all of its inputs are simultaneously at logic 0. The Boolean expression for the output, Y, of an OR gate with inputs, A and B, is Y = A + B.

NAND gatesNAND (ie, NOT-AND) gates will

only produce a logic 0 output when all inputs are simultaneously at logic 1. Any other input combina-tion will produce a logic 1 output. A NAND gate, therefore, is nothing more than an AND gate with its

output inverted! The circle shown at the output denotes this inversion. The Boolean expression for the out-put, Y, of a NAND gate with inputs,

NOR gatesNOR (ie, NOT-OR) gates will only

produce a logic 1 output when all inputs are simultaneously at logic 0. Any other input combination will produce a logic 0 output. A NOR gate, therefore, is simply an OR gate with its output inverted. A circle is again used to indicate inversion. The Boolean expression for the output, Y, of a NOR gate with inputs, A and B, is Y = A + B.

Exclusive-OR gatesExclusive-OR gates will produce a

logic 1 output whenever either one of the two inputs is at logic 1 and the other is at logic 0. Exclusive-OR gates produce a logic 0 output whenever both inputs have the same logical state (ie, when both are at logic 0 or both are at logic 1). The Boolean expression for the output, Y, of an exclusive-OR gate

Exclusive-NOR gatesExclusive-NOR gates will produce

a logic 0 output whenever either one of the two inputs is at logic 1 and the other is at logic 0. Exclusive-NOR gates produce a logic 1 output whenever both inputs have the same logical state (ie, when both are at logic 0 or both are at logic 1). The

Boolean expression for the output, Y, of an exclusive-NOR gate with inputs, A and B, is

Combinational logicThe basic logic gates can be com-

bined together to solve more complex logic functions. This is made possible by adopting a standard range of logic levels (ie, voltage levels used to repre-sent the logic 1 and logic 0 states) so that the output of one logic circuit is compatible with the input of another.

As an example, let’s assume that we require a logic circuit that will produce a logic 1 output whenever two, or more, of its three inputs are at logic 1. This circuit (shown in Fig.6.11) is often referred to as a majority vote circuit, and its truth table is shown in Fig.6.12.

Note that the outputs of the three two-input AND gates are fed to the three inputs of the OR gate, and that the output of the OR gate will become logic 1 whenever any one or more of the two-input AND gates detects a condition in which two of the inputs are simultaneously at logic 1.

As a further example, consider how we might combine several of the basic logic gates (AND, OR and NOT) in order to realise the exclusive-OR function. In order to solve this problem, consider the Boolean expression for the exclusive-OR function that we met earlier:

/A and /B can be obtained by simply inverting A and B respec-

be obtained using two two-input AND gates. Finally, these two can be applied to a two-input OR gate in order to obtain the required

The complete solution is shown in Fig.6.13.

Fig.6.13. An exclusive-OR gate produced from AND, OR and NOT gates


Teach-In 2011

BistablesBistable circuits provide us with

a means of remembering a transient logic condition. For example, the logic that controls a lift must re-member that the lift has been called in response to a push-button that only requires momentary operation.

As its name suggests, the output of a bistable (or ) circuit has two stables states (logic 0 or logic 1). Once set, the output of a bist-able will remain at logic 1 or logic

the bistable is reset. A bistable thus forms a simple form of memory, re-maining in its latched state (either set or reset) until a signal is applied to it to change its state (or until the supply is disconnected).

The simplest form of bistable is the R-S bistable. This device has two inputs, SET and RESET, and comple-mentary outputs, Q and Q. A logic 1 applied to the SET input will cause the Q output to become (or remain at) logic 1, while a logic 1 applied to the RESET input will cause the Q output

Two simple forms of R-S bistable based on cross-coupled logic gates are shown in Fig.6.14. Fig.6.14(a) is based on two cross-coupled two-input NAND gates, while Fig.6.14(b) is based on two cross-coupled two-input NOR gates.

D-type bistableUnfortunately, the simple cross-cou-

pled logic gate bistable has a number of serious shortcomings (consider what would happen if a logic 1 was simulta-neously present on both the SET and RESET inputs!) and practical forms of bistable make use of much improved purpose-designed logic circuits, such as D-type and J-K bistables.

The D-type bistable has two inputs: D (standing variously for data or delay) and CLOCK (CLK). The data input (logic 0 or logic 1) is clocked into the bistable such that the output state only changes when the clock changes state. Operation is thus said to be synchro-nous. Additional subsidiary inputs (which are invariably active low) are provided, which can be used to di-rectly set or reset the bistable. These are usually called PRESET (PR) and CLEAR (CLR). D-type bistables are used both as latches (a simple form of memory) and as binary dividers. The simple circuit arrangement in Fig.6.15, together with the timing diagram shown in Fig. 6.16 illustrate the operation of D-type bistables.

to become (or remain at) logic 0. In either case, the bistable will remain in its SET or RESET state until an input is applied in such a sense as to change the state. Note also that

the Q and Q outputs always have oppo-site logical states. Thus, when the Q output is at logic 1 the Q output will be at logic 0, and versa.


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J-K bistablesJ-K bistables (see Fig.6.17) have

two clocked inputs (J and K), two direct inputs (PRESET and CLEAR), a CLOCK (CK) input, and outputs (Q and Q). As with R-S bistables, the two outputs are complementary (ie, when one is 0 the other is 1, and vice versa). Similarly, the PRESET and CLEAR inputs are invariably both active low (ie, a 0 on the PRESET input will set the Q output to 1, whereas a 0 on the CLEAR input will set the Q output to 0). Fig.6.18 summarises the input and corresponding output states of a J-K bistable

for various input states. J-K bistables are the most so-

dividers, shift registers, and latches. The circuit arrangement of a four-stage binary coun-

ter, based on J-K bistables, is shown in Fig.6.19. The timing diagram for this circuit is shown in Fig.6.20. Each stage successively divides the clock input signal by a factor of two. Note that a logic 1 input is transferred to the respective Q-output on the falling edge of the clock pulse, and all J and K inputs must be taken to logic 1 to enable binary counting.

Practical logic circuitsYou should now have a basic grasp of the theory of logic

circuits, but what we haven’t done yet is give you an idea of what these devices look like and how they appear in practical logic circuits. So, let’s end this month’s Learn

Fig.6.19. Circuit for a four-stage binary counter using J-K bistables

Fig.6.20. Timing diagram for the four-stage binary counterof Fig.6.19

Fig.6.18. J-K bistable operation

(ie, Q is reset

(ie, Q is reset

(ie, Q is reset

(ie, Q is reset

whatever state it was before, while


Teach-In 2011

The 4013 dual D-type bistable is supplied in various packages, including the dual-in-line (DIL) package shown in Fig.6.21. This de-vice uses standard complementary metal oxide semiconductor (CMOS) technology, and its pin connections are shown in Fig.6.22. Note that pin 14 and pin 7 supply power to both of the D-type bistables.

The 74F08 quad two-input NAND gate is also available in several different packages. We have shown the small integrated circuit (SOIC) package in Fig.6.23. This package is ideal for surface mounting rather than through-hole mounting used with the DIL pack-age that we met before. The 74F08 contains four independent NAND gates and uses ‘fast’ transistor-transistor logic (TTL). The pin connection diagram for the chip is shown in Fig.6.24. As with the 4013, the supply connections (pin 14 and pin 7) are common to all four of the internal logic gates.

Please note!Some logic devices, particularly

CMOS types, are static-sensitive and special precautions are needed when handling and transporting them.




Fig.6.21. A 4013 dual D-type bistable in a plastic dual-in-line (DIL) package. This chip was manufactured in 1992

Fig.6.23. A 74F08 quad two-input NAND gate in a small surface-mount package (SOIC). This chip was manu-factured in 2001

Fig.6.22. Pin connections for the 4013dual D-type bistable IC

Fig.6.24. Pin connections for the 74F08 quad two-input NAND gate IC

Check – How do you think you are doing?6.1. Identify each of the logic symbols shown in Fig.6.25

6.2. Draw the truth table for the logic gate arrangement shown in Fig. 6.26.

6.3. Show how three two-input AND gates can be connected togeth-er to form a four-input AND gate.

Fig.6.25. See Question 1


6.4. State the Boolean logic ex-pression for the output of each of the gate arrangements shown in Fig.6.27 – opposite.

6.5. Devise a logic gate arrangement that provides an output d e s c r i b e d by the truth table shown in Fig.6.28.



Teach-In 2011


Build – The Circuit Wizard way

YOU’VE learnt the theory about logic gates, so now let’s try it

out using Circuit Wizard. Anyone who’s experimented or prototyped with discrete logic circuits before will be all too familiar with hope-lessly prodding a logic probe into an incomprehensible ‘rat’s nest’ of breadboard and link wires.

Fortunately, nowadays we can do all this and more using soft-ware packages before we commit any copper to PCB. Circuit Wizard really does have a few aces up its sleeve when it comes to working with logic.

First, you can work directly with the logic gates themselves and let it worry about the chip packages (see later on), as well as a number of dedicated in-puts/outputs and simulation schemes that bring the circuits to life and visually convey what’s

really going on in the circuit. In this instalment of Build we’ll be trying out some logic gates to see how they operate, as well as experimenting with some real life applications.

Opening the gatesCircuit Wizard includes a

large range of logic devices in both CMOS and TTL versions (note that the extent of the logic devices may depend on the

Gate numbersWhen you add a gate to the draw-

ing area you should notice that it will automatically number your gate in accordance with the cor-responding IC required. As each IC contains a number of gates, an

the chip reference (eg, IC1a) to show which has been allocated. Once the total number of gates has exceeded that of the IC, Circuit Wizard will automatically include a new chip,

and so on. You are able to change

which gate has been al-located within the chip. This can be useful when it comes to generating the

However, the automatic allocation works great for most users. Circuit Wiz-ard will also add power Fig.6.29. Changing logic families for a logic gate

connections ‘in the background’, so that these are accounted for in net lists when moving on to PCB generation.

The best way to understand the operation of the basic gates is to drop one on to the drawing area, add inputs and outputs and see how the output changes in re-sponse to changes in the inputs. Circuit Wizard has some really useful input toggles and output indicators which can be found at the top of the ‘Logic Gates’ folder (see Fig.6.30).

Switching to the ‘Logic View’ (click on the vertical tab on the left of the drawing area) is a particularly useful way to analyse any logic

version of Circuit Wizard that you are running).

The first thing that you may notice is that in the Gallery (right-hand panel) you can ac-cess standard and Schmitt varie-ties of gates in the ‘Logic Gates’ folder, as well as each family of chip separately in the ‘Integrated Circuits’ folder. We can only as-sume that this is for the purpose of providing quick access to the more common gates.

By default, 4000 series ICs will be used. However, you are able to select the family of gate by selecting the appropriate model in the properties context box; see Fig. 6.29 (double-click the component to access this). This default behaviour can also be altered in the software’s setting if required.

Fig.6.30. A simple arrangement to test an AND gate


Teach-In 2011


Logic circuits usually contain a number of different gates and can get very complicated. De-

the simplest arrangement of gates to perform the logical function that’s required.

However, with the widespread use and avail-ability of microprocessors, complex combinational logic circuits are becoming a thing of the past. Have a go at entering and testing the logic circuit shown in Fig.6.32, and produce a truth table. Could the function of this circuit have been reproduced with fewer gates?

If you think about actually producing the cir-cuit above you would need three logic ICs and two of the ICs would only have one gate used in

to do things. Fortunately, logic designers came up with a great idea; what if we could use just a single gate and wire them in such a way to act like the other gates? In this way, you would only need to buy one type of IC.

It turns out that the NAND gate is the ideal candidate for this as you can produce all of the other gates using them – we call them ‘NAND equivalents’. Fig.6.33 shows the NAND equiva-lent for an AND gate. Enter the circuit in to Circuit Wizard and verify that the combination acts just like an AND gate. In this case, the first gate is a straight forward NAND and the second

circuit. This view uses both colour coding as well as 1s and 0s at the inputs/outputs of each pin to show the logic state. This can really help you see what’s going on around the circuit.

One important thing to note about the logic indicators and the ‘Logic Level’ view is that the logic high state is indicated by red, and the logic low by green. This might seem a little counter-intuitive to some people – the author included!

Give it a tryExperiment with some of the basic gates; AND,

OR, NAND, XOR and NOT. Draw up a truth table for each gate and check that this matches what you’ve seen in Learn.

Alternatively, we’ve developed an interactive logic gate worksheet (see Fig.6.31). This can be downloaded from the Teach-In 2011 website; www.tooley.co.uk/teach-in – follow the link to Circuit Wizard downloads. Print out the worksheet and complete the truth tables by simulating them on screen.

gate acts as a NOT gate. Hence, the result is ‘NOT NAND’ or AND.

for the other gates. You can also download our NAND Gate Equivalent simulator (Fig.6.34) from the Teach-Inwebsite, which includes a number of other equivalents for you to explore.

Fig.6.31. A view of our logic gate worksheet, which can be downloaded from: www.tooley.co.uk/teach-in

Fig.6.32. A combinational logic circuit

Fig.6.33. An AND gate made using NAND gates (in other words, a ‘NAND equivalent’ of an AND gate


Teach-In 2011

Fig.6.33. Download our NAND gate equivalent simulator from: www.tooley.co.uk/teach-in

Intruder alarmNow we’ll look at a real-life ap-

plication of a simple logic circuit. Fig.6.35 shows an intruder alarm circuit. When any one of the links (simulated by push-to-break but-tons) is broken, the alarm is acti-vated. Enter the circuit and try it out for yourself! Advanced readers might like to see if they can adapt the circuit to latch the alarm on once a link has been broken.

Ripple counterAnother area of logic design is

sometimes described as sequen-tial logic. Often this involves counting and/or timing. Fig.6.36 shows what is commonly known as a ripple counter or cascade counter. It produces a binary count using a series of J-K bista-bles or ‘flip-flops’.

Enter the circuit and look closely at its operation. The ‘Logic View’ is excellent for this kind of circuit, and you should be able to see how the logic high ‘ripples’ along the flip-flops in order to generate a four-bit binary count-ing sequence.

Fig.6.35. Intruder alarm circuit. When one of the ‘links’ is broken, the alarm sounds

Fig.6.36. Four-bit ripple counter using J-K bistables

The world’s fastest microprocessor resulted from an investment of $1.5 billion, and operates at a speed of 5.2GHz (courtesy of International Business Machines Corp.)


Teach-In 2011

Decade counterA binary count could be really

useful for lots of applications. Apart from possibly a few com-puter nerds, not all that many people can easily read a binary number!

Therefore, if we need to dis-play a number to a consumer we need to convert this to a display-able number. This can be easily achieved with a 74LS47 seven-segment display decoder, a driver chip and a seven-segment LED display (common anode).

The chip decodes the four-bit lines of the binary count and outputs a number on the seven-segment LED display by turning on/off the appropriate


Fig.6.37. A decade (ie, 0-9) counter circuit using J-K bistables and a seven-segment display

lines. Amend your ripple counter circuit as shown in Fig.6.37. The NAND gate is used to reset the

flip-flops when the count reaches 9, the highest single-digit number that can be displayed.

A block schematic diagram of a logic system used in a large aircraft is shown in Fig.6.38.

InvestigateThe system is designed to alert

-ible and audible warnings that one

or more of the aircraft’s undercar-riage doors remain open when the

logic 1 signals when the respec-tive door is open and logic 0 when closed. All of the warning indicators are ‘active low’ and require a logic 0 to produce a visible or audible output.

Study the circuit carefully and then see if you can answer each of the following questions:

1. What logic level appears at points X, Y and Z with all of the doors closed?

2. What logic level appears at points X, Y and Z with the left wing door open and all other doors closed?

3. What logic level appears at points X, Y and Z with the nose door open and all other doors closed?

4. When any one or more of the doors opens, the audible warning Fig.6.38. A block schematic of a logic system used in an aircraft


Teach-In 2011

should sound and remain operat-

the alarm by means of the RESET

Answers to Check questions

6.1. (a) Three input OR gate

2. See Fig. 6.40

3. See Fig. 6.41

5. See Fig. 6.42

-

-

-

around 100 times faster than this.

Next month!Teach-In

generators.

Fig.6.40. Answer to Question 2



Amaze

signal to travel from the input(s) of a

output is usually extremely small

(ps). This time (often referred to as propagation delay) has a major im- Fig.6.39. IBM’s new zEnterprise Sys-

tem mainframe (courtesy of International

Business Machines Corporation)


CIRCUIT WIZARDCircuit Wizard is a revolutionary new software system that combines circuit design, PCB design, simulation and CAD/CAM manufacture in one complete package.

Two versions are available, Standard and Professional.

This is the software used in our Teach-In 2011 series.

Standard £61.25 inc. VAT Professional £91.90 inc. VAT

See Direct Book Service – pages 75-77 in this issue




* PCB Layout



* Gerber export

44 Everyday Practical Electronics, May 2011

Teach-In 2011


Part 7: Timer circuits





we measure time with a very high degree of accuracy.IN THIS instalment of Teach-In,

we will bring together several important ideas and concepts

that we’ve already met in the earlier parts. At the same time, we will introduce you to a highly versatile integrated circuit (IC), the 555 timer.

Using this IC, we will show you how you can quickly and easily design circuits that will produce time delays from a few hundred nanoseconds to several hundred seconds, and square wave pulses of known frequency, period and duty cycle. Build and Investigate will extend this further with a detailed look at some practical timer and pulse generator circuits. Finally, in Amaze we look at ways in which

To begin to understand how timer circuits operate, it is worth spend-ing a few moments studying the internal circuitry of the 555 timer, see Fig.7.2. Essentially, the chip comprises two operational ampli-

with an R-S bistable. In addition,

incorporated so that an appreciable current can be delivered to a load.

LearnThe 555 timerThe 555 timer is, without doubt, one of the most versatile integrated circuit chips ever produced. Not only is it a neat mixture of analogue and digital circuitry, but its applica-tions are virtually limitless in the world of digital pulse generation. The chip also makes an excellent case study for beginners because it brings together a number of impor-tant concepts and techniques. The standard 555 timer is supplied in a standard 8-pin dual-in-line (DIL) package with the pinout shown in Fig.7.1.

Fig.7.1. Pinout connections for a standard 555 timer IC

Everyday Practical Electronics, May 2011 45

Teach-In 2011

Sinking and sourcingUnlike the standard logic devices that we met last month, the 555 timer can both sink and source current. It’s worth taking a little time to explain what we mean by these two terms:

When sourcing current, the 555’s output (pin 3) is in the high state,

out of the output pin into the load and down to 0V, as shown in Fig.7.3(a).

When sinking current, the 555’s output (pin 3) is in the low state, in

the positive supply (+Vcc) through the load and into the output (pin 3), as shown in Fig.7.3(b).

Returning to Fig.7.2, the single transistor switch, TR1, is provided as a means of rapidly dis-charging an external tim-ing capacitor. Because the series chain of resistors, comprising R1, R2 and R3, all have identical values, the supply voltage (VCC)is divided equally across the three resistors.

The voltage at the non-inverting input of IC1 is one-third of the supply voltage (VCC), while that at the inverting input of IC2 is two-thirds of the supply voltage (VCC). Thus, if VCC is 9V, 3V will appear across each resistor and the upper comparator will have 6V applied to its inverting input, while the lower comparator will have 3V at its non-inverting input.

The 555 familyThe standard 555 timer is housed in an 8-pin DIL package and operates from supply rail voltages of be-tween 4.5V and 15V. This, of course, encompasses

Feature Function A A potential divider comprising R1, R2 and R3 connected in series. Since all three

resistors have the same values the input voltage (VCC) will be divided into thirds, i.e. one third of VCC will appear at the junction of R2 and R3 while two thirds of VCC will appear at the junction of R1 and R2.

B Two operational amplifiers connected as comparators. The operational amplifiers are used to examine the voltages at the threshold and trigger inputs and compare these with the fixed voltages from the potential divider (two thirds and one third of VCCrespectively).

C An R-S bistable stage. This stage can be either set or reset depending upon the output from the comparator stage. An external reset input is also provided.

D An open-collector transistor switch. This stage is used to discharge an external capacitor by effectively shorting it out whenever the base of the transistor is driven positive.

E An inverting power amplifier. This stage is capable of sourcing and sinking enough current (well over 100mA in the case of a standard 555 device) to drive a small relay or another low-resistance load connected to the output.

Table 7.1: Main features of the 555 timer IC

Fig.7.2. Internal schematic arrangement of the standard 555 timer

Fig.7.3. Loads connected to the output of a 555 timer: (a) current sourced by the timer when the output is high, (b) current sunk by the timer when the output is low


Teach-In 2011

goes low. The device then remains in the inactive state until another falling trigger pulse is received.

Output waveformThe output waveform produced by the circuit of Fig.7.4 is shown in Fig.7.5. The waveform has the fol-lowing properties:

Time for which output is high:

the normal range for TTL devices (5V ±5%) and thus the device is ideally suited for use with TTL circuitry.

The following versions of the stand-ard 555 timer are commonly available:

Low power 555The low power 555 timer is a CMOS version that is both pin and func-tion compatible with its standard counterpart. By virtue of its CMOS technology, the device operates over a somewhat wider range of supply voltages (2V to 18V) and consumes minimal operating current (120 Atypical for an 18V supply).

Note that, by virtue of the low-power CMOS technology employed, the device does not have the same output current drive as that possessed by its standard counterparts. However, it can supply up to two standard TTL loads.

556 dual timerThe 556 is a dual version of the standard 555 timer housed in a 14-pin DIL package. The two devices may be used entirely independ-ently and share the same electrical characteristics as the standard 555.

Low power 556The low power 556 is a dual version of the low power CMOS 555 timer contained in a 14-pin DIL package. The two devices may again be used entirely independently and share the same electrical characteristics as the low power CMOS 555.

Please note!Low power timers use CMOS tech-nology and should be handled using anti-static precautions.

Monostable pulse generatorFig. 7.4 shows a standard 555 timer operating as a monostable pulse generator. The term ‘monostable’ refers to the fact that the output has only one stable state, and it will always return to this state after a period of time spent in the opposite state. The monostable timing period (ie, the time for which the output is high) is initiated by a falling edge trigger pulse applied to the triggerinput (pin 2).

When this falling edge trigger pulse is received and falls below one third of the supply voltage, the output of IC2 goes high and the bistable will be placed in the setstate. The inverted Q output (ie, Q) of the bistable then goes low, the internal transistor TR1 is placed in the off (non-conducting) state and the output voltage (pin 3) goes high.

The capacitor, C, then charges through the series resistor, R, until the voltage at the threshold input reaches two thirds of the supply voltage (Vcc). At this point, the output of the upper comparator changes state and the bistable is reset. The inverted Q output (ie, Q) then goes high, TR1 is driven into

Fig.7.5. Waveforms for monostable operation

ton = 1.1 C R

Recommended trigger pulse width:

ontr

tt < 4

Where ton and ttr are in seconds, Cis in farads and R is in ohms.

The period of the 555 monostable output can be changed very easily by simply altering the values of the timing resistor, R, and/or timing capacitor, C. Doubling the value of R will double the timing period. Similarly, doubling the value of Cwill double the timing period.

Please note!The usual range of values for ca-pacitance and resistance in a mon-ostable timer are 470pF to 470 Fand 1k to 3.3M respectively. Outside this range operation is less predictable.

Example 1Now let’s work through a simple design example. For this we shall


Teach-In 2011

assume that we need a circuit that will produce a 10ms pulse when a negative-going trigger pulse is ap-plied to it. Using the circuit shown in Fig. 7.4, the value of monostable timing period can be calculated from the formula:

From which: in order to avoid making the value of R too high.

A value of 100 F should be ap-propriate and should also be easy to obtain. Making R the subject of the formula, and substituting for C = 100 F gives:

ton = 1.1 C R

We need to choose an appropriate value for C that is in the range stated earlier. Since we require a fairly modest time period, we will choose a mid-range value for C.

This should help to ensure that the value of R is neither too small nor too large. A value of 100nF should be appropriate and should also be easy to obtain. Making R the subject of the formula and substitut-ing for C = 100nF gives:

6 610R = ×10 = 0.091×10110or 9.1 k

Alternatively, the graph shown in Fig.7.6 can be used.

Example 2Next, we shall design a timer circuit that will produce a +5V output for a period of 60s when a ‘start’ button is operated. The time period is to be aborted when a ‘stop’ button is operated. For the purposes of this example we shall assume that the ‘start’ and ‘stop’ buttons both have normally-open (NO) actions. The value of monostable timing period can be calculated from the formula:

ton = 1.1 C R We need to choose an appropri-

ate value for C that is in the range stated earlier. Since we require a fairly long time period we will choose a relatively large value of C

ont 60s 60R = = = 1.1C 1.1×100 F

-660 =

110×10From which:

In practice 560k (the nearest preferred value) would be adequate.

The ‘start’ button needs to be con-nected between pin 2 and ground, while the ‘stop’ button needs to be connected between pin 4 and ground. Each of the inputs requires

Fig.7.7 (above). Circuit diagram for a 60 second timer (see Example 2)

Fig.7.6. (left) Graph for determining values of C, ton and R for a 555 operating in monostable mode. The red line shows how a 10ms pulse will be produced when C = 100nF and R = 91k(see Example 1)

ont 10 msR = = = 1.1C 1.1×100 nF

-3

-9

10×10= 110×10

msnF

k

6 660R = ×10 = 0.545×10110

or 545 kk

1


Teach-In 2011

a ‘pull-up’ resistor to ensure that the input is taken high when the switch is not being operated.

The precise value of the ‘pull-up’ resistor is unimportant, and a value of 10k will be perfectly adequate in this application. The complete circuit of the 60s timer is shown in Fig.7.7.

Astable pulse generatorHow the standard 555 can be con-

astable pulse genera-tor, is shown in Fig.7.8. In order to understand how this circuit oper-ates, assume that the output (pin 3) is initially high and that TR1 is in the non-conducting state. The capacitor, C, will begin to charge with current supplied by series resistors, R1 and R2.

Time for which output is low: When the voltage at the thresholdinput (pin 6) exceeds two thirds of the supply voltage, the output of the upper comparator, IC1, will change state and the bistable will become reset, due to the voltage transition that appears at R. This, in turn, will make the Q output go high, turning TR1 on and saturating it at the same time. Due to the inverting action of

output (pin 3) will go low.The capacitor, C, will now dis-

R2 into the collector of TR1. At a certain point, the voltage appearing at the trigger input (pin 2) will have fallen back to one third of the sup-ply voltage, at which point the lower comparator will change state and the voltage transition at S (Fig.7.2) will return the bistable to its original set condition. The inverted Q output then goes low, TR1 switches off (no longer conducting), and the output (pin 3) goes high. Thereafter, the entire charge/discharge cycle is

The output waveform produced by the circuit of Fig.7.8 is shown in Fig.7.9. The waveform has the fol-lowing properties:

Time for which output is high:

1 2

1.44p.r.f. = C R +2R

ton = 0.693 C (R1 + R2)

Period of output waveform:

toff = 0.693 C R2

Pulse repetition frequency:

t = ton + toff = 0.693 C (R1 + 2R2)

Fig.7.9. Waveforms for astable operation

2 for a 555 operating in astable mode 2 1

Mark-to-space ratio:

on 1 2

off 2

t R +R=t R

Duty cycle:

on 1 2

on off 1 2

t R +R= ×100%t +t R +2R


Teach-In 2011

Where t is in seconds, C is in farads, R1 and R2 are in ohms.

When R1 = R2, the duty cycle of the astable output from the timer can be found by letting R = R1 = R2. In this condition:

be a problem if we need to produce a precise square wave in which ton= toff.

However, by making R2 very much larger than R1, the timer can be made to produce a reasonably symmetrical square wave output. (Note, that the minimum recom-mended value for R2 is 1k – see Please note!).

If R2 >> R1, the expressions for p.r.f. and duty cycle simplify to:

the formula, and substituting for C = 1 F gives:

on 1 2

off 2

t R + R R+ R 2= = = = 2t R R 1

In this case, the duty cycle will be given by:

on 1 2

on off 1 2

t R + R= ×100% = ×100%t + t R + 2R R + 2R

R + R= ×100%R + 2R

Thus:

on

on off

t 2R 2= ×100% t +t 3R 3

2= ×100% = 67%3

The p.r.f. of the 555 astable out-put can be changed very easily by simply altering the values of R1,R2, and C. The required values of C, R1 and R2 for any required p.r.f. and duty cycle can be determined from the formulae shown earlier. Alternatively, the graph shown in Fig.7.10 can be used when R1 and R2 are equal in value (corresponding to a 67% duty cycle).

Please note!The usual range of values for capacitance and resistance in an astable timer are 10nF to 470 Ffor C, and 1k to 1M for R1 and R2. As for the monostable circuit, operation is less predictable out-side this range.

Square wave generatorsBecause the high time (ton) is always greater than the low time (toff), the mark-to-space ratio produced by a 555 timer can never be made equal to (or less than) unity. This could

2

0.72p.r.f. = CR

on 2

on off 2

t R 100%t + t 2R 2

1 100% 50%2

Example 3Let’s design a pulse generator that will produce a p.r.f. of 10Hz with a 67% duty cycle (ie, the output will be high for one third of the time and low for two thirds of the time).

Using the circuit that we met in Fig.7.8, the value of p.r.f. can be calculated from:

1 2

1.44p.r.f. = C R +2R

67%, we can make R1 equal to R2.Hence, if R = R1 = R2 we obtain the following relationship:

1.44 1.44 0.48p.r.f. = = =C R+2R 3CR CR

We need to choose an appropriate value for C that is in the range stated earlier. Since we require a fairly low value of p.r.f., we will choose a value for C of 1 F. This should help to ensure that the value of R is neither too small nor too large. A value of 1 F should also be easy to obtain. Making R the subject of

0.48R = = =p.r.f.×C

-6

0.48=p.r.f.×1×10

Hence:

33480×10R = = 4.8×10 = 4.8 k

100k

Example 4Now let’s design a 5V 50Hz square wave generator using a 555 timer.

Using the circuit shown in Fig.7.11, when R2 >> R1, the value of p.r.f. can be calculated from:

2

0.72p.r.f. = CR

We shall use the minimum recom-mended value for R1 (ie, 10k ) and ensure that the value of R2 that we calculate from the formula is at least ten times larger, in order to satisfy the criteria that R2 should be very much larger than R1.

When selecting the value for C, we need to choose a value that will keep the value of R2 relatively

Fig.7.11. Circuit for a 5V 50Hz square wave genrator (see Example 4)

104 = 48k


Teach-In 2011

large. A value of 100nF should be about right, and should also be easy to locate. Making R2 the subject of the formula and substituting for C = 100nF gives:

2 -9

0.72 0.72R = = =p.r.f.×C 50×100×10

-6

0.72=5×10

Hence:6

20.72 × 10R =

5

Alternatively, the graph shown in Fig.7.10 can be used.

The value of R2 is more than 100 times larger than the value that we are using for R1. As a consequence, the timer should produce a good square wave output. The complete circuit of our 5V 50Hz square wave generator is shown in Fig.7.11.

Check – How do you think you are doing?

7.1. Explain the difference be-tween monostable and astable timer operation.

7.2. Sketch the circuit of a mon-ostable timer and identify the components that determine the time for which the output is high.

7.3. Sketch the circuit of an asta-ble pulse generator and identify the components that determine the time for which (a) the output is high, and (b) the output is low.

7.4. Design a timer circuit that will produce a 6V 20ms pulse when a 6V negative-going trigger pulse is applied to it.

7.5. Design a timer circuit that will produce a 67% duty cycle output at 250Hz.

7.6. A 555 timer is rated for a maximum output current of 120mA. What is the minimum value of load resistance that can be used if the device is to be operated from a 6V DC supply?

For more information, links and other resources please check out our Teach-In website at:www.tooley.co.uk/

teach-in

Kitchen timer

OUR

kitchen timer, as shown in Fig.7.12. When SW1 is closed the buzzer will sound until SW2 is pressed to start the timer. The two probes help us to see the charge building in C1 and the status of the output. A sample trace is shown in Fig.7.13. This is particularly useful for testing long delays where the circuit may seem to being inactive.


Fig.7.13. Sample trace for the kitchen timer circuit Fig.7.14. Charge building on C1 in ‘Voltage Levels’ view

Similarly, in ‘Voltage Levels’ or ‘Current Flow’ we are able to visualise the charge building on the capacitor as a series of ‘+’ and ‘-’ appear on the plates (see Fig.7.14).

6= 0.144×10 = 144 k


Teach-In 2011

The amount of elapsed time before the buzzer activates can be altered by changing the value of pot VR1. Experiment with running the timer for various settings of VR1 to ascer-tain the minimum/maximum times, �� -priate formulae that was introduced in ‘Learn’ (you may have to be very patient for the maximum delay!).

A soft boiled egg is cooked for four minutes (240 seconds) – calculate the value required for VR1, then set this on your circuit and check out your theory in practice.

��In our second circuit (see Fig.7.15), we utilise the 555 in an astable �� -plications might include children’s toys, signs, alarm systems, and level crossings. Varying the value of VR1

��

��!�"��#��

��$%�� &��'�##*��

will alter the frequency ��

Circuit Wizard’s ‘Cur-rent View’ comes in to its own here for visual-ising the continuously changing state of the circuit, as shown in Fig.7.16. Apart from looking like a 70s disco, the colours clearly show how current is sinking and sourcing though the output (pin 3) as each of the LEDs is lit. You can also monitor how the capacitor charges until the threshold voltage

is reached, and is then discharged through pin 7.

� �� and trace (Fig.7.16) also help us to understand the inputs and outputs. The blue probe/line showing the voltage to pin 2 and pin 6, and the red line showing the output (pin 3).

� ��As well as using the 555 as a timer in monostable mode, it can also be used as a bistable. A neat ap-plication of this is a simple ‘on-off’ circuit, where SW1 is pressed to turn on or ‘set’ the output and SW2 is pressed to ‘reset’ or turn off the output (see Fig.7.17).

A further application of this might be a signalling circuit, where SW1 is pressed to ‘set green’ and SW2 is pressed to ‘set red’, as shown in Fig.7.18.

�� In Part 6 (�� ), we constructed a decade (ie, 0 to 9)


Teach-In 2011

counter circuit using a 4-bit ripple counter followed by a seven-seg-ment driver and display. We used Circuit Wizard’s built in clock to test the circuit.

However, in real life we would need circuitry to create this clock.


Fig.7.18 A 555 red/green signal circuit

One way of doing this would be to use a 555 configured in astable mode. Try out the circuit shown in Fig. 7.19 (if you have your 0-9 counter circuit saved from Part 6 you could amend it to include the additional components).

Fig.7.19. A 0 to 9 counter circuit, with 555 an astable clock generator

Dual timersIn some circuits we may want to use more than one timer. The 556 IC effectively contains two 555s in one physical package. Our last cir-cuit uses two timers ‘daisy-chained’ together to create a sequence of four ��

Fig.7.20. Tooltip showing pin descrip-tion and number


Teach-In 2011

To use both timers contained within the 556 in Circuit Wizard, you need to drag two separate in-stances of the 556 on to the circuit �� ‘a’ and the second ‘b’ (eg, IC1a and IC1b). As both are contained within �� "#$��

&�� '''� �� #��*�;��-�� ''<�� @�� G�JK�� -�� X ��Z��[�\]^��

Construct the circuit shown in Z��[�\_�� $�� -�� X`#_�^�� {�� ]�'J;�� output from this timer is then used �� X`#_�^�� {��\J;�

During the period when the output of timer one is high, the �� #�� second timer is not powered and �� |}~� �� perhaps changing the sequence to �� {�� timer.

�� G��K�� X�� `#_��`#_�^�� #_��#\� ��]��_�� {��

�� the output of timer one (IC1a) and the ��X`#_�^�� the effect that on the initial sequence only��|}~�� rather than four! Can you design a �� Teach-In to produce the same sequence, but without the same issues?

��+��!��;��

��++��!��;��





Teach-In 2011

The complete circuit diagram of a variable pulse generator is shown in Fig.7.23. Look at this circuit care-fully and then answer the following questions:

1. Identify the component or com-ponents that:

(a) determine the pulse repetition frequency

(b) provide variable adjustment of the pulse width

(c) provide variable adjustment of the output amplitude

(d) limit the range of variable adjustment of pulse width

(e) protect IC2 against a short- circuit connected at the output

(f) remove any unwanted signals appearing on the supply rail

(g) form the trigger pulse required by the monostable stage.

2. Sketch waveforms to a common time scale showing the signals at (a) TPA and (b) TPB ‘test points’.

3. Determine the pulse repetition frequency of the output.

day. However, with the advent of telegraph, telephone and radio in the 20th century, time signals could be broadcast internationally and made accessible to anyone that needed them.

Investigate

Fig.7.23. Practical circuit diagram for a variable pulse generator

4. Determine the maximum and minimum pulse width of the output.

5. Determine the maximum and minimum amplitude of the output.

AmazeIn last month’s Amaze we de-

�� speed at which digital logic can operate. This month, we will be looking at the way in which we ac-curately measure time:

Simple audible and visible signals were once used to inform people about the passing of time and as a means of setting their own clocks. For example, a canon could be �� K��

Fig.7.24. FOCS-1, a continuous cold caesium fountain atomic clock in Switzerland. The clock started operating in 2004 and keeps time to an accuracy of one second in 30 million years

Fig.7.25. Atomic clocks are usually large and cumbersome devices, but much effort has been directed in making them small enough to be carried around. This is NIST’s recently developed chip-scale atomic clock


Teach-In 2011

Modern atomic clocks are based on caesium and rubidium, and they offer uncertainties of better than one second in 20 million years. But, if that’s not good enough for you to set your watch by, the latest generation of quantum logic clocks, developed in 2008 at the National Institute of Standards and Technology (NIST) in the USA, offer an uncertainty of better than one second in over a billion years!

Next month!In next month’s Teach-In, we will

be looking at some applications of �� and attenuators.

Since time is the reciprocal of frequency, a time standard can be easily derived from an accurate fre-quency standard or ‘clock’. All you need to do is count the number of cycles generated by the clock and, as long as the frequency is accurately known, the number of cycles will be an accurate measure of time. To-day’s off-air broadcast time signals use oscillators that are locked to atomic clocks.

Atomic clocks�� -brations of ammonia molecules and was invented over sixty years ago. Atomic clocks use the vibrations of atoms or molecules, but because the frequency of these oscillations is so high, it is not possible to use them as a direct means of control-ling a clock. Instead, the clock is controlled by a highly stable crystal oscillator whose output is automatically multiplied and compared with the frequency of the atomic system.

If two atomic clocks are compared there is always the possibility of a difference in their readings. This ‘uncertainty’ is the difference in indicated time if both were started at the same instant and later com-pared. For the early atomic clocks, this lack of certainty was estimated to be around one second in three thousand years.

7.1. See pages 46 and 48

7.2. See Fig.7.4 and associated text

7.3. See Fig.7.8 and associated text

7.4. See Fig.7.4 with R = 182k� and C =100nF and operating from a 6V DC supply

7.5. See Fig.7.8 with R1 = 19.2k�, R2 = 19.2k� and C = 100nF

7.6. 50�.



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Circuit Wizard is a revolutionary new software system that combines circuit design, PCB design, simulation and CAD/CAM manufacture in one complete package. Two versions are available, Standard and Professional.







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46 Everyday Practical Electronics, June 2011

Teach-In 2011


Part 8: Analogue Circuit Applications





frequency response can be altered in order to modify and enhance the

We also introduce decibels (dB)

Build and Investigate extend this further with a detailed look at some

Amaze -

IN LAST month’s instalment of Teach-In 2011

you how you can quickly and easily

time delays from a few hundred nanoseconds to several hundred

some practical applications of

Learn we will show

-

produce loss or attenuation we only need a network of passive compo-

-cies are to be attenuated by the same

--networks

provide the required amount of at-tenuation) an attenuator needs to be matched to the system in which it is

characteristic impedance of the atten-

an attenuator is correctly terminated

LearnAttenuatorsAttenuators provide us with a means

refer to it as attenuation

Everyday Practical Electronics, June 2011 47

Teach-In 2011

Before we take a look at the opera-tion of two simple forms of atten-uator, it is worth pointing out that the impedances used in attenuators are always pure resistances. The reason for this is that an attenuator must provide the same attenuation at all frequencies and the inclusion of reactive components (inductors and/or capacitors) would produce a non-linear attenuation/frequency characteristic.

Balanced/unbalancedThe simple T and -networks that we’ve just met can exist in two basic forms, balanced and unbalanced.In the former case, none of the net-work’s input and output terminals are connected directly to commonor ground. The unbalanced and balanced forms of the basic T and

-networks are shown for compari-son in Fig.8.3.

The networks shown in Fig.8.3 all have two ports. One port (ie, pair of terminals) is connected to the input, while the other is connected to the output. For convenience, many two- port networks are made symmetri-cal and they perform exactly the same function and have the same characteristics, regardless of which way round they are connected.

Please note!It is conventional to express the val-ues of the resistances present in an attenuator in terms of the effective series or parallel resistance. Thus, for example, the two series resis-tors in an unbalanced T-network

on whether they are based on net-works of passive components (ie, resistors, capacitors and inductors) or active components (ie, transistors

together with resistors, capacitors and/or inductors.

The symbols used to represent -

matic diagrams are shown in Fig.8.4.

attenuation of signals below their cut-off frequency. Beyond

the cut-off frequency, they exhibit increasing amounts of attenuation, as shown in Fig.8.5.

A simple C-Rshown in Fig.8.6. The cut-off fre-

the output voltage has fallen to

attenuator are both labelled R1/2 where R1 is the effective series resistance.

Similarly, the two parallel re-sistors present in an unba lanced

-network are la-belled 2R2 where R2 is the effective resistance of the two components when connected in parallel. We will be adopting a similar convention when we label the cir-

FiltersFilters provide us with a means of passing or rejecting signals within

are used in a variety of applications, -

mitters and receivers. They also provide us with a means of reducing noise and unwanted signals that might otherwise be passed along power lines.

Filters are usually described ac-cording to the range of frequencies that they will accept or reject. The following types are possible:

Low-pass High-pass Band-pass Band-stop.

Filters can also be categorised as either passive or active, depending

Fig.8.1. Basic T and -network attenuators Fig.8.2. A matched network

Fig.8.3. Balanced and unbalanced forms of the T and -networks


Teach-In 2011

0.707 of the input value. This occurs when the reactance of the capacitor, XC, is equal to the value of resist-ance, R. Using this information we can determine the value of cut-off frequency, f, for given values of Cand R:

Since

Please note!The term ‘cut-off’ can be a bit mis-leading because it might imply that

beyond a certain point. This is not the case. The response of a practical

the cut-off frequency and one of the most important characteristics

roll-off occurs.

R = XC

or1

2R

fCfrom which:

12

fCR

where f is the cut-off frequency (in Hz), C is the capacitance (in F), and R is the resistance (in ).

attenuation of signals above their

increasing amounts of attenuation, as shown in Fig.8.7.

A simple C-Rshown in Fig.8.8. Once again, the

when the output voltage has fallen to 0.707 of the input value. This occurs when the reactance of the capacitor, XC, is equal to the value of resistance, R. Using this informa-tion we can determine the value of cut-off frequency, f, for given values of C and R:

Since

R = XC

or1

2R

fCand once again:

12

fCR

where f is the cut-off frequency (in Hz), C is the capacitance (in F), and R is the resistance (in ).


Teach-In 2011

Example 1A simple C-R C = 100nF and R = 10k

using:

-XL

f0:

12

fCR

9 4

16.28 100 10 10 10

100 15.9 Hz6.28

Example 2A simple C-R

12

RfC

3 9

16.28 1 10 47 10

610 3.39 k295.16

-

pass-band -

a lower cut-off frequency f1an upper cut-off frequency f2

f2 – f1 bandwidth

A simple L-C

an L-Cacceptor circuit.

resonantXC

XC = XL

00

1 22

f Lf C

20 2

14

fLC

01

2f

LCf0

Land C

quality factorQ-factor

R

f0L

and R

-

stop-band

-a lower cut-off frequency f1

an upper cut-off frequency f2

f2 – f1 bandwidth

0 02 1Bandwidth ff f

Q

02 f LR

Fig.8.9. Frequency response for a Fig.8.10. A simple L-C band-pass

Fig.8.11. Frequency response for a Fig.8.12. A simple L-C band-stop

Hz

k


Teach-In 2011

A simple L-C band-stop filter is shown in Fig.8.12. This circuit uses an L-C resonant circuit and is referred to as a rejector circuit.

The frequency at which the band--

mum attenuation occurs when the circuit is resonant, ie, when the re-actance of the capacitor, XC, is equal to the reactance of the inductor, XL.This information allows us to deter-mine the value of frequency at the centre of the pass-band, f0:

frequency at which minimum attenu-ation will occur.

The frequency of minimum attenu-ation will be given by:

XC = XL

00

1 22

f Lf C

thus

from which

20 2

14

fLC

and thus

01

2f

LCwhere f0 is the resonant frequency (in Hz), L is the inductance (in H) and C is the capacitance (in F).

determined by its quality factor (or Q-factor). This, in turn, is largely determined by the loss resistance, R,of the inductor (recall that a practical coil has some resistance as well as inductance). Once again, the band-width is given by:

0 02 1Bandwidth ff f

Q02 f L

R

where f0 is the resonant frequency (in Hz), L is the inductance (in H), and R is the loss resistance of the inductor (in ).

Example 3A simple acceptor circuit uses L = 2mH and C = 1nF. Determine the

Fig.8.13. The characteristic impedance (Z0) of a network is determined by the values of resistance (or impedance) within the network – see text

01

2f

LC

3 9

12 2 10 1 10

610 112.6 kHz8.88

Example 4A 15kHz rejector circuit has a Q-fac-tor of 40. Determine the bandwidth of the circuit.

The bandwidth can be found from:

30 15 10Bandwidth 375 Hz

40fQ

375 Hz

kHz

Hz

Termination, matching and characteristic impedance

an attenuator to be predictable we need to take into account the input (source) and output (load) imped-ances. These impedances are said to terminatethem into account the performance can be somewhat unpredictable!

When a filter or attenuator is correctly terminated it is said to be matched. Analogue systems are often designed so that they have a particular input/source and output/load impedance. In many audio systems the impedance chosen is 600 but in radio frequency (RF) applications impedances of 50 ,75 or 300 are common.

It is often convenient to analyse the behaviour of a signal transmis-sion path in terms of a number


Teach-In 2011

of identical series connected net-works. One important feature of any

number of identical symmetrical networks are connected in series, the resistance (or impedance) seen looking into the network will have a

as the characteristic impedance of the network

identical networks are connected in

seen looking into this arrangement will be equal to the characteristic impedance, Z0.

Now suppose that we remove the

-poses, we will still be looking into an

see an impedance equal to Z0 when we look into the network.

impedance of Z0 across the output terminals of the single network that

exactly the same way as the arrange-

by correctly terminating the network in its characteristic impedance, we have made one single network section appear the same as a series of identical networks stretching to

Z0)of a network is determined by the values of resistance (or impedance) within the network, as we shall see next.

C-R and L-Cwe have described in earlier sections have far from ideal characteristics.

are used and a selection of these (based on matched T-section and

-section networks) are shown in

these circuits are as follows:

where Z0 is the characteristic im-pedance (in ), fC is the cut-off fre-quency (in Hz), L is the inductance (in H), and C

Example 5Determine the cut-off frequency and

-

Fig.8.14. Improved T-section and

0LZC

Comparing the circuit shown in

type with L C(note that the value of C is the ef-fective series capacitance and is

-tors connected in series).

Now

and

C1

2f

LC

0

C2ZL

f

C 0

12

Cf Z

C1

2f

LC

3 9

16.28 5 10 20 10

510 1.59 kHz6.28

33

0 9

5 10 5 1020 10 20

LZC

30.5 10 500

:

Capacitance:

Characteristic impedance:

Cut-off frequency:

kHz


Teach-In 2011

The simple R-C filters that we described earlier in Fig.8.6 and Fig.8.8 require a very low source impedance and a very high load impedance in order to behave in a predictable manner (ie, to satisfy the equation for cut-off frequency that we met earlier). One way of improving the performance of these

buffer, as shown in Fig.8.16 and Fig.8.17. These circuits maintain the predicted frequency response, but the rate at which the output voltage falls above cut-off may be

Fortunately, we can easily solve this problem by exploiting the gain available from the operational am-

popular second-order Sallen and

that can be obtained with the simple

The cut-off frequency of the second-and Fig.8.17. Later, in Build you will have the opportunity to build and test these circuits.

One of the most important pa-rameters of an analogue circuit is the amount of gain or loss that it provides. Gain can be expressed in various ways, but basically it is just the ratio of output to input expressed in terms of either voltage, current or power. Since gain and loss can sometimes be quite large we

often use a logarithmic scale to express our ratios.

This measurement is based on decibels (dB), where one decibel is equivalent to one tenth of a Bel (the logarithm of the volt-age, current or power ratio). In case this is beginning to sound a little complicated we have sum-marised all of this in Table 8.1.

Table 8.1. Gain or loss expressed in decibels of voltage, current and power

Basis of measurement Gain or loss as a ratio Gain or loss expressed in decibels (dB)

Voltage out

in

VV

out10

in20log V

V

Currentout

in

II

out10

in20log I

I

Powerout

in

PP

out10

in10log P

P


Teach-In 2011

Please note!

Example 6

A

01

2 1 1 2 2f

C R C RC1 = C2 = C R1 = R2 = R

01

2f

CR

outV 10 10 10

in20log VA

V

10220log

0.02

Example 7

Now P

out10

in10log PA

P

loss


8.8.


PA10

out10

inlog P

P

1020log 100 20 2 40 dBdB

8.1.

8.2.L-C

L-C

8.3.R C

8.4.

8.5. L-C

8.6.L-C

L-C

8.7.

10 106antilog

10out

10in

antilog 0.6 PP

P out out10 10 10antilog

10A

out out10 10

in inantilog log P P

P P

out in 10antilog 0.6P P

1.6 0.25 0.4 WW

Please note!


Teach-In 2011

WE ARE now going to try out

and see how they behave when we apply different signals to them.

One of the features that Circuit

higher-end electronics packages is the ability to directly carry out AC

this would involve modelling the -

the software ‘sweep’ through the frequency range and plot the output amplitude and phase.

There are a number of useful appli-

5Spice Analysis (www.5spice.com).

to use unless you are familiar with similar SPICE analysis programmes.

it just can’t keep up in real-time.

the simulation speed in order to give the software a chance to accurately simulate.

-

-gree to get your traces looking right.

Speed trapUnder certain circumstances Circuit Wizard will warn you about accurate high speed simulation (see Fig.8.21).

present you with bizarre results with no warning. Fig.8.22 shows an

simulated in real time!

Changing the simulation speed is achieved by clicking on ‘Time:’

selecting an appropriate timing (see Fig.8.23). Note that this only appears when the simulation is running.

shown in Fig. 8.24 below. This is an ac-

the output terminals and voltage rails for the supply to the operational am-

mistake that students make.Please note that in order for our

Circuit Wizard circuits to match the circuit diagrams you have seen in Learn you will need to ‘mirror’ the

Although Circuit Wizard can’t do

still does a great job of modelling

We can then bring our results to-gether and plot our own frequency

understand what’s really going on and what happens to the signals as we vary the frequency of the input.

Circuit Wizard carries out literally thousands of mathematical calcula-tions in the background in order to show you how the circuit operates

working with higher frequency

Fig.8.21. Simulation speed warning

Fig.8.22. The bizarre result of simulating a high frequency circuit in real-time

Fig.8.23 (below). Changing simulation speed


Teach-In 2011

the inverting (‘-’) input is at the top (see Fig.8.25).

Using your new knowledge from Learn you should be able to calculate the cut-off frequency to be around 159Hz. This means that we should expect it to happily pass low fre-quency signals below this frequency and reject high frequency signals.

In order to test this out we’ll simulate the circuit with various fre-quencies and record the amplitude of the output. We can then plot this in Excel and see the characteristics

Start by simulating the circuit with a 1Hz input frequency (ie, set the frequency of the function generator to 1Hz – Circuit Wizard will do this happily in real time.

You should alter the properties of the graph as follows; maximum: 6V, minimum: 6V, time: 200ms. Your trace should look similar to Fig.8.26. You should also notice that the output (blue) and input (red) are basically identical, meaning that the signal has passed directly through

Now change the frequency of the signal generator to 100Hz. You will also need to decrease the simulation speed and graph properties. These were 5ms and 2ms in the author’s case, but you should experiment to

get the best results. The resulting waveform is show in Fig.8.27. Notice that the amplitude has been reduced or attenuated to around 4.2V, and the output waveform has been delayed and is out of phase.

Experiment with various fre-quencies between 1Hz and 200Hz, recording your results. When you have a number of results plot them on a graph with frequency along the x-axis and amplitude along the y-axis. If you are using Excel to plot the graph, make sure that you select the ‘scatter’ graph type, as this will


Teach-In 2011

correctly plot the two values against each other. Fig.8.28 shows our re-sults taking readings every 10Hz.

essentially swapping the capacitor and resistor. You should now have

in Fig.8.29.Experiment to see how the output

changes with different frequen-cies from 1Hz to 600Hz recoding your results and plotting them on

frequencies are attenuated while higher frequencies are passed un-altered. You should also notice that the lower the frequency the higher

the phase difference. Our results are shown in Fig.8.30.

Now we’re going to ramp things up a little and look at second-order fil-ters. Fig.8.31 and Fig.8.32 show a low-pass and high-pass second-order

Use your theory knowledge from Learn to calcu-late the cut-off fre-quency for each circuit and use this to help you select an appropriate

frequency range to test the circuit. Simulate the circuit and collect a series of results in order to help you produce graphs for each circuit show-ing how they respond.

Fig.8.28. Graph showing the response of the low-pass

Fig.8.30. Graph showing the response of the high-pass


Teach-In 2011

Last, we are going to produce a

and paste your two second

-

-

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website at:www.tooley.co.uk/teach-in

8.1. C-R-

8.2.

8.3.

8.4.

8.5.

8.6.

8.7

8.8










* PCB Layout



* Gerber export


Teach-In 2011

The data shown in Table 8.2 was obtained during an experiment on an active tone control. Plot the frequency response curve using the logarithmic grid shown in Fig.8.35 and use it to determine:

(a) the maximum value of voltage gain (in dB)(b) the maximum value of voltage gain (expressed as a ratio)(c) the approximate voltage gain at 50Hz and 30kHz(d) the two frequencies at which the voltage gain falls to zero(e) the range of frequencies over

-1dB of the maximum

Investigate

Frequency(Hz)

20 40 70 100 200 700 1k 2k 4k 7k 10k

Voltage gain (dB)

-3 +5 +12.5 +15 +16 +16 +16 +16 +16 +15 +12.5

20k 40k 60k

+5.5 -2 -7.5

(f) the two frequencies at which the gain has fallen by 6dB from its maximum value.

Fig.8.35. See Investigate

AmazeIn most electronic circuits, the sig-nal voltages that we have to deal with range from a few millivolts to a few volts. Similarly, the power levels present in these circuits tend also to be rather modest and usually range from a few milliwatts to a few

examples where signal voltages and power are either very much smaller or very much larger than this.

When you receive a signal on your radio or TV at home, the signal volt-age present at the input of the radio or TV receiver is often only a few tens or hundreds of microvolts. Since the impedance of the aerial, coaxial cable and input of the receiver is invariably 75 , this suggests that, for a signal of 1 mV, the actual power present at the input of your radio or TV will be in the region of:

(digital) to reach an estimated view-ing population of 11 million people.

digital power output will increase tenfold to 200kW.

If it were possible to absorb all of the currently radiated 1MW of analogue power in a single 50 ohm resistor the voltage generated across the ends of the resistor would be given by:

This 50-foot dish antenna at the North Kennedy Space Center is supplied with a power of 3kW from a C-band radar to produce an effective radiated power (ERP) of around 3MW!

232 6

R

1 10 1075 75

VPZ

0.0133 W

At the other extreme, consider the power that is delivered to the aerial of a high power transmitting station. This is very much larger. For example, the Crystal Palace TV transmitter currently radiates a power of 1MW (analogue) and 20kW

61 10 50V P R

7.07 kVIf the 1MW of radiated power from

you, the Boshakova transmitter (used until recently by the Voice of Russia)produced a staggering 2.5MW of out-put, and its output was radiated by no less than eight guyed masts, each around 250 metres tall.

Next month!

look at digital-to-analogue and analogue-to-digital conversion.

Table 8.2.

W

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…from engineers to engineers

50W Audio Power Amplifier HT-AV50W50+ watts from a 12V battery power supply !!

This integrated power output amplifier consists of little more than one integrated circuit. It is intended especially for use in motor vehicles and other battery operated applications. Although it appears simple and hardly worth looking at, the amplifier can produce an appreciable audio power output !

High power output through Class-H operation

80Wx2 Class-D Audio Power Amplifier HT-AU280With efficiencies as high as 94% - compared to around 50% for Class-AB amplifiers…The required installation space is very small thanks to the extremely compact construction. This is primarily made possible by the very high efficiency of the

PWM output stage (up to 94%), which reduces the complexity of the circuit and minimisesthe cooling footprint.

http://www.handsontec.comHandsOn Technology

46 Everyday Practical Electronics, July 2011

Teach-In 2011


Part 9: Digital-to-Analogue and Analogue-to-Digital Conversion





IN THIS instalment of Teach-In 2011, we introduce some com-bined applications of analogue

and digital circuits in the form of digital-to-analogue and analogue-to-digital converters (DAC, ADC). InLearn we explore the circuits and techniques used in DAC and ADC. Investigate extends this further with a look at a popular DAC, which is available from several semiconduc-tor manufacturers.

Build looks at some further ap-plications of digital circuits using both combinational and sequential logic techniques. Finally, in Amazewe look at the way that very large numbers are handled in digital systems.

QuantisationBecause signals in the real world exist in both digital (on/off) and analogue (continuously variable) forms, digital and computer systems need to be able to accept and generate both types of signal as inputs and outputs respec-tively. Because of this, there is a need for devices that can convert signals in analogue form to their equivalent in digital form, and vice versa.

This chapter introduces digital-to-analogue and analogue-to-digital conversion. We shall begin by look-ing at the essential characteristics of analogue and digital signals and the principle of quantisation.

In order to represent an analogue signal using digital codes, it is neces-sary to approximate (or quantise) the signal into a set of discrete voltage levels, as shown in Fig.9.1 The six-teen quantisation levels for a simple analogue-to-digital converter using a four-bit binary code are shown in Fig.9.2. Note that, in order to accom-modate analogue signals that have both positive and negative polarity we have used the two’s complement representation to indicate negative voltage levels.

Thus, any voltage represented by a digital code in which the MSB (most

-tive. Fig.9.3 shows how a typical analogue signal would be quantised

Learn

Everyday Practical Electronics, July 2011 47

Teach-In 2011

into voltage levels by sampling at regular intervals (t1, t2, t3, etc).

Digital-to-analogue conversionThe basic digital-to-analogue converter (DAC) has a number of digital inputs (often 8, 10, 12, or 16) and a single analogue output, as shown in Fig.9.4. The simplest form of DAC shown in Fig.9.5(a) uses a set of binary-weighted resis-

and a four-bit binary latch to store the binary input while it is being converted.

connected in inverting mode, the analogue output voltage will be negative rather than positive. How-

stage can be added at the output to change the polarity if required.

The voltage gain of the inputs to the operational amplifier (deter-mined by the ratio of feedback to input resistance and taking into ac-

is shown in Table 9.1. If we assume that the logic levels produced by the four-bit data latch are ‘ideal’ (such that logic 1 corresponds to +5V and logic 0 corresponds to 0V), we can

determine the output voltage corre-sponding to the eight possible input states by summing the voltages that will result from each of the four inputs taken independently.

For example, when the output of the latch takes the binary value 1010 the output voltage can be calculated from:

Fig.9.1. The process of quantising an analogue signal into its digital equivalent

Fig.9.2. Quantisation levels for a simple ADC that uses a four-bit binary code

Fig.9.3. An analogue signal quantised into voltage levels by sampling at regular intervals (t1, t2, t3, etc.)

Fig.9.4. Basic DAC representation

Similarly, when the output of the latch takes the binary value 1111 (the maximum possible) the output voltage can be determined from:

Table 9.1. Table of voltage gains for the simple DAC shown in Fig.9.5(a)

Vout = (–1 × 5) + (–0.5 × 0) + (–0.25 × 5) + (–0.125 × 0) = –6.25V

Vout = (–1 × 5) + (–0.5 × 5) + (–0.25 × 5) + (–0.125 × 5) = –9.375V

Bit Voltage gain

3 (MSB) –R/R = –1

2 –R/2R = –0.5

1 –R/4R = –0.25

0 (LSB) –R/8R = –0.125


Teach-In 2011

The complete set of voltages corre-sponding to all eight possible binary codes is given in Table 9.2.

Binary-weighted DACAn improved binary-weighted DAC is shown in Fig.9.5(b). This circuit operates on a similar principle to that shown in Fig.9.5(a), but uses four analogue switches instead of a four-bit data latch. The analogue

switches are controlled by logic inputs so that a switch’s output is connected to the reference voltage (Vref) when its respective logic input is at logic 1, and to 0V when the cor-responding logic input is at logic 0.

When compared with the previous arrangement, this circuit offers the advantage that the reference voltage is considerably more accurate and stable than using the logic level to

A further advantage arises from the fact that the reference voltage can be made negative, in which case the analogue output voltage will become positive. Typical reference voltages are –5V, –10V, +5V and +10V.

Unfortunately, by virtue of the range of resistance values required, the binary-weighted DAC becomes increasingly impractical for higher resolution applications. Taking a 10-bit circuit as an example, and assuming that the basic value of Ris 1k , the binary weighted values would become:

Bit 0 1kBit 2 2kBit 3 4kBit 4 8kBit 5 16kBit 6 32kBit 7 64kBit 8 128kBit 9 256k

Fig.9.5. Simple DAC arrangements

Bit 3 Bit 2 Bit 1 Bit 0 Output voltage

0 0 0 0 0V

0 0 0 1 –0.625V

0 0 1 0 –1.250V

0 0 1 1 –1.875V

0 1 0 0 –2.500V

0 1 0 1 –3.125V

0 1 1 0 –3.750V

0 1 1 1 –4.375V

1 0 0 0 –5.000V

1 0 0 1 –5.625V

1 0 1 0 –6.250V

1 0 1 1 –6.875V

1 1 0 0 –7.500V

1 1 0 1 –8.125V

1 1 1 0 –8.750V

1 1 1 1 –9.375V

Table 9.2. Output voltages produced by the simple DAC shown in Fig.9.5(a)


Teach-In 2011

R-2R

Accuracy and resolution Please note!The resolution

Please note!The accuracy

Filters

Analogue-to-digital conversion

Fig.9.6. Filtering the output of a DAC

Fig.9.7. Basic ADC representation


Teach-In 2011

voltage present at the inverting input

stage, the output of that stage will go to logic 1. So, assuming that the analogue input voltage is 2V, the outputs of IC1 and IC2 will go to logic 1 while the remaining outputs will be at logic 0.

The priority encoder is a logic de-vice that produces a binary output code that indicates the value of the

one of its inputs. In this case, the output of IC2 will be the most sig-

output code generated will be 010 (as shown in Fig.9.8(b).

Flash ADC are extremely fast in operation (hence the name), but they become rather impractical as the resolution increases. For example,

while a 10-bit ADC would need a staggering 1024 comparator stages!

Typical conversion times for a

1 s, so this type of ADC is ideal for ‘fast’ or rapidly changing ana-logue signals. Due to their com-plexity, flash ADC are relatively expensive.

Successive approximationA successive approximation ADC is shown in Fig.9.9. This shows an 8-bit converter that uses a DAC (usually

based on an R-2R ladder) together

comparator (IC1) and a successive approximation register (SAR).

The 8-bit output from the SAR is applied to the DAC and to an 8-bit output latch. A separate end of con-version (EOC) signal (not shown in Fig.9.9) is generated to indicate that the conversion process is complete and the data is ready for use.

When a start conversion (SC) signal is received, successive bits

within the SAR are set and reset ac-cording to the output from the com-parator. At the point at which the output from the comparator reaches zero, the analogue input voltage will be the same as the analogue output from the DAC and, at this point, the conversion is complete. The end of conversion signal is then generated and the 8-bit code from the SAR is read as a digital output code.

Successive approximation ADCs

Fig.9.9. A successive approximation ADC Fig.9.10. A ramp-type ADC


Teach-In 2011

types and typical conversion times (ie, the time between the SC and EOC signals) are in the range 10 s to 100 s.Despite this, conversion times are fast enough for most non-critical applications, and this type of ADC is rela-tively simple and available at low-cost.

Ramping it upA ramp-type ADC is shown in Fig.9.10. This type of ADC

comparator, IC1. The output of the comparator is either a 1 or a 0 depend-

ing on whether the input voltage is greater or less than the instantaneous value of the ramp voltage. The output of the comparator is used to control a logic gate (IC2) which passes a clock signal (a square wave of accurate frequency) to the input of a pulse counter whenever the input voltage is greater than the output from the ramp generator.

Fig.9.11. Waveforms for a single-ramp ADC

The pulses are counted until the voltage from the ramp generator exceeds that of the input signal, at which point the output of the compa-rator goes low and no further pulses are passed into the counter. The number of clock pulses counted will depend on the input voltage and the

representation of the analogue input. Typical waveforms for the ramp-type waveform are shown in Fig.9.11.

Dual-slope ADC-

ment of the ramp-type ADC, which

Check – How do you think you are doing?9.6. The binary codes produced by a four-bit bipolar analogue-to-digital converter (see Fig.9.2 and Fig.9.3) sampled at intervals of 1ms, have the following values:

9.1. Explain with the aid of a sketch what is meant by quantisation.

9.2. A DAC can produce 256 dif-ferent output voltages. What is the resolution of the DAC?

9.3. How many discrete voltage levels can be produced by a 10-bit DAC?

9.4. Explain the advantage of an R-2R ladder DAC compared a binary-weighted DAC.

9.5.ADC and suggest an application in which it can be used.

Fig.9.12. Waveforms for a dual-ramp ADC

If the ADC uses two’s comple-ment to represent negative val-ues (ie, 1111 represents -1, 1110 represents -2, and so on) sketch and identify the waveform of the analogue voltage.

Time (ms) Binary code 0 0101 1 0100 2 0011 3 0010 4 0001 5 0000 6 1111 7 1110

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IN this edition of Build we will try out some of the DAC circuits that

we introduced in Learn (Fig.9.5). As we have seen, these can be con-

with cleverly arranged arrays of input resistors.

Binary-weighted DACFirst enter the simple binary-weighted DAC circuit shown in Fig.9.13. This is a practical circuit based on the one shown in Learn Fig.9.5(a). We have used a series of logic input toggles to simulate standard logic level inputs, with the output voltage shown on a virtual voltmeter instrument.

Set various input bit patterns and monitor the resulting output voltage. Using your theory from Learn to calculate the expected output voltage for two different input bit patterns and then test your answers using the simulation. Take readings of the output voltage for the binary coded decimal inputs from 0 (0000) to 15 (1111) and produce a graph of your results. Fig.9.14 shows our example results plotted using Microsoft Excel.

Fig.9.13. A simple four-bit binary-weighted DAC

Fig.9.14. Graph of results for the simple four-bit binary-weightedDAC

Fig.9.16. Graph of results for

four-bit binary-weighted DAC shown in Fig. 9.15

involves a similar comparator arrange-ment, but uses an internal voltage

negative ramp which starts when the positive going ramp reaches the ana-logue input voltage. The important thing to note about this type of ADC is that, while the slope of the positive ramp depends on the input voltage,

Hence, this type of ADC can provide a very high degree of accuracy and can also be made so that it rejects noise and random variations present on the input signal. The main disadvantage,

ramping up and then ramping down requires some considerable time, and hence this type of ADC is only suitable for ‘slow’ signals (ie, those that are not rapidly changing). Typical conversion times lie in the range 500 s to 20ms.


Teach-In 2011

One of the drawbacks to the sim-ple DAC circuit is the fact that by

-put is negative. A common way of dealing with this issue is to add an

a gain of -1. This is often referred to as a unity gain inverter.

Modify your binary-weighted DAC circuit (Fig.9.13) to that shown in Fig.9.15 below, and experiment with changing the input bits. Notice that

-tude to the output voltage (Vout)but opposite in polarity. Plotting Vout against BCD input for this new arrangement should now look as shown in Fig.9.16.

binary-weighted DAC is shown in Fig.9.17. Here the output volt-age is taken across the outputs of

In this way the output voltage is effectively doubled. In fact, this method is commonly employed in many commercial DAC integrated circuit devices.

Fig.9.18. Binary-weighted DAC using analogue switches and a negative voltage reference

Fig.9.19. Four-bit DAC using an R-2R ladder arrangement

Fig.9.17. Improved binary weighted DAC with differential output

A switch in timeIn Fig.9.5(b) we described an im-proved DAC circuit using analogue

simply for simulation purposes us-ing single-pole double-throw (SPDT) switches, as shown in Fig.9.18. Note that in a real circuit these would be controlled by logic inputs.

Simulate the circuit by changing the binary input patterns by tog-gling switches SW1 to SW4. Notice that by having a negative reference voltage we achieve a positive output voltage. Experiment by changing the

reference voltage (Vref) and note how this affects the output voltage range.

On the ladderFinally, we will try out a third type of DAC circuit that utilises a so called R-2R resistor ladder arrangement, like that shown earlier in Fig.9.5(c). As we discussed in Learn, there are practical advantages to this type of

one matched pair of resistor val-ues. Construct the circuit shown in Fig.9.19 and experiment with the simulation.



Teach-In 2011

ADCs and DACs invariably take the form of integrated circuit devices. Obtain data sheets for a DAC0800 digital-to-analogue converter (these can be freely downloaded from the websites of semiconductor manu-facturers like National Semicon-ductor and Motorola) and use them to answer each of the following questions:

1. How many data bits are used?

2. What range of supply voltages can be used with this device?

3. What package styles are used for

Investigatethe device and how many connect-ing pins do the packages have?

4. What is the typical power con-sumption of the device when used with a ±10V supply?

5. What is the absolute maximum power dissipation for the device?

6. Which pins are used for (a) the LSB input and (b) the MSB input?

7. On what principle does the DAC operate?

8. What is the typical time taken for the output voltage to settle in response to a change at the input?

9.1. See page 46 and Fig.9.1

9.2. 8-bit

9.3. 1024

9.4. Only two values are needed in the resistor chain of an R-2Rladder (the ratio of the two resist-ances is more important than their absolute values). The resist-ance values in a binary-weighted DAC can become very large when a large number of bits are used

9.5. High speed of operation. A typical application would be for use with high-quality audio and video signals (ie, analogue signals at relatively high frequencies)

9.6. Falling ramp (the analogue value falls linearly)


AmazeAs you have seen, the resolution of a DAC or ADC is determined by the number of data bits that it uses. The simple four-bit DAC that you met in Build was only capable of generat-ing sixteen different voltage states. By increasing the number of bits we can gain a corresponding increase in

produce 32 different output voltages, a six-bit DAC is able to produce 64 different output levels, and so on.

In many applications, the digital output of an ADC is processed using a computer or some form of embed-ded processor (such as those used in the engine control and management systems of motor vehicles). The unit of data in a computer (ie, the number of bits that can be handled

by its processing unit as one single entity) is referred to as a word. So, ultimately, the digital output of an ADC must be converted into words that the computer or embedded system’s processor can operate on. The number of bits in a word is an important characteristic of a par-ticular processor family or computer architecture. This, in turn, has an impact on the size and range of the quantities that it can manipulate.

Early computers, such as the IBM PC and Commodore Amiga, as well as early console systems, such as the Sega Genesis, Super Nintendo, Mattel Intellivision, used a word length of 16-bits. This allowed them to manipulate integer numbers hav-ing a total of 65,536 different values.

More powerful 32-bit computers (such as the Apple Macintosh, Pentium-based PC and popular console systems, including the Sony PlayStation, Nintendo GameCube, Xbox, and Wii) have word lengths of 32-bits and this allows them to manipulate integer numbers that can represent 4,294,967,296 differ-ent values.

However, if that’s not quite enough in terms of resolution, the most recent 64-bit systems includ-ing some games consoles, such as Nintendo 64, PlayStation 2, Play-Station 3, Xbox 360, can cope with integer numbers having a staggering 18,446,744,073,709,551,616 differ-ent values!

Next month!In next month’s Teach-In we will look at practical aspects of test instruments, measurements and testing circuits (including an intro-duction to PCB layout using CircuitWizard).




This is the software used in our Teach-In 2011 series. Standard £61.25 inc. VAT Professional £91.90 inc. VAT. See Direct Book Service – pages 75-77 in this issue




* PCB Layout



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HandsOn Technology http://www.handsontec.com

1

USB-RS232 Interface Card: HT-MP213A compact solution for missing ports…Thanks to a special integrated circuit from Silicon Laboratories, computer peripherals with an RS232 interface are easily connected to a USB port. This simple solution is ideal if a peripheral does not have a USB port, your notebook PC has no free RS232 port available, or none at all !

After a slow and faltering start, the USB port has become commonplace on PCs, to the extent that the latest GHz machines have just one RS232 port left, or none at all. The compact USB-RS232 interface described in this article allows your good old RS232 peripherals (printer, programmer system, etc.) to be hooked up to a USB port. The free driver programs for Win 2000/XP, Linux and Apple Macintosh make the interface virtually transparent, enabling the USB port to behave like a regular COM interface.The driver and the conversion chip from Silicon Laboratories allow a full serial data link to be set up on a 9-way RS232 connector, including all handshaking signals.

1. THE SILICON LABORATORIES CP2103 SYSTEMS OVERVIEW

The CP2103 is a highly-integrated USB-to-UART Bridge Controller providing a simple solution for updating RS-232/RS-485 designs to USB using a minimum of components and PCB space. The simplified block diagram of the CP2103 is shown in Figure 1 and the pin assignment, in Figure 2. Royalty-free Virtual COM Port (VCP) device drivers provided by Silicon Laboratories allow a CP2103-based product to appear as a COM port to PC applications. The CP2103 UART interface implements all RS-232/RS-485 signals, including control and handshaking signals, so existing system firmware does not need to be modified. The device also features up to (4) GPIO signals that can be user-defined for status and control information. Support for I/O interface voltages down to 1.8 V is provided via a VIO pin. In many existing RS-232 designs, all that is required to update the design from RS-232 to USB is to replace the RS-232 level-translator with the CP2103. Silicon Laboratories has taken care of the PC side of things by supplying royalty-free Virtual COM Port (VCP) device drivers. If you've ever used a PC RS-232-to-USB converter, you know that it looks like a standard COM port to the PC and its applications. The VCP device driver also pretends to be a standard COM port. That means that we can use our newly acquired microcontroller USB interface to communicate with a Tera Term Pro terminal window on a computer just as if we were using RS-232 hardware on the embedded side.

2. HT-MP213 USB-to-RS232 CONVERTER BOARD

The HT-MP213 is designed to transition a piece of hardware from an RS-232/485 interface to a USB interface. We were attracted to the CP2103 because of its skinny schematic diagram. If we believe what the CP2103 datasheet schematic is telling us, it doesn't require any external resistors or crystals to bring a fully compliant USB 2.0 interface to life. The silicon encapsulates a level 2.0 full-speed function controller, transceiver, EEPROM, oscillator, and UART in a tiny QFN-28 package. The internal EEPROM is used for storing vendor-specific information in commercial applications. If we find that we need to access the EEPROM, there is easy access and programming via its USB interface.

42 Everyday Practical Electronics, August 2011

Teach-In 2011


Part 10: Electronic circuit construction and testing

Our Teach-In series aims to provide you with a broad-based introduction to electronics. We have attempt-ed to provide coverage of three of the most important electronics units that are currently studied in many

schools and colleges in the UK. These include Edexcel BTEC Level 2 awards as well as electronics units of the new Diploma in Engineering (also at Level 2). The series will also provide the more experienced reader with



THIS month, we look at the practical aspects of electronic circuit construction and testing. In Learn we introduce you to two of the most

common and versatile items of test equipment, the multimeter and oscilloscope. Build looks at techniques that can be used to design, construct and test printed circuit boards (PCB) within Circuit Wizard.

Investigate involves taking measurements and

Finally, Amaze looks at the reliability of electronic components.

LearnAt BTEC Level 1 and Level 2 you need to be able to make measurements on simple DC and AC circuits including:

Measuring voltage, current and resistance using a multi-range meter (or multimeter)

Displaying waveforms and making measurements of voltage (peak and peak-to-peak) and time using an oscilloscope.

Fig.10.1. Multimeters can be either analogue (left) or digital (right)

Everyday Practical Electronics, August 2011 43

Teach-In 2011

estimation of the pointer’s position, and then the application of some mental arithmetic based on the range switch setting (see Fig.10.2)

Unlike their analogue counter-parts, digital multimeters are usu-ally extremely easy to read and have displays that are clear, unam-biguous, and capable of providing a very high resolution. It is also possible to distinguish between

readings that are very close. This is just not possible with an analogue instrument.

Digital multimeters offer a number -

pared with their analogue counter-

multimeter usually consists of a 3½-digit seven-segment display—

digit is either blank (zero) or 1.

In all cases, you will need to ensure that you work safely and observe correct procedures (for example, switching off and disconnecting the power supply before connecting test leads). We begin this month’s Learnby introducing the test instruments that you will be using.

MultimetersOne of the most common, versatile and easy-to-use instruments is the multi-range meter, or multimeter. This instrument combines the func-tions of a voltmeter, ammeter and ohmmeter into a single instrument. Many multimeters also have addi-tional ranges, for example to check continuity, measure capacitance or to check diodes and transistors.

Most multimeters operate from internal batteries, and are thus independent of the mains supply. This allows you to easily carry them around and make measurements on electronic equipment when you are away from the laboratory or workshop.

There are two main types of mul-timeter: analogue and digital (see Fig.10.1). Analogue multimeters employ conventional moving coil

form of a pointer moving across a calibrated scale.

This arrangement is not so con-venient to use as that employed in digital instruments because the position of the pointer is rarely ex-act and may require interpolation. Analogue instruments do, however, offer some advantages, not least, is that it’s very easy to make adjust-ments to a circuit, while observing

a movement in one direction repre-senting an increase and in the other a decrease.

Despite this, the main disadvan-tage of analogue meters is the rather cramped and sometimes confusing scale calibration. To determine

Fig.10.2. A comparison of the displays provided on analogue and digital mul-timeters. Both meters indicate the same value.

Fig.10.3. The procedure for making current and voltage measurements using a digital multimeter


Teach-In 2011

Consequently, the maximum indication on the 2V range will be 1.999V. This suggests that the instrument is capable of offering a resolution of 1mV on the 2V range (in other words, the smallest incre-ment in voltage that can be measured is 1mV).

Depending on the size and calibra-tion markings on the instrument’s scale, the resolution obtained from a comparable analogue meter would typically be about 50mV, and so the digital instrument provides us with a resolution that is many times greater than its analogue counterpart.

Multimeter measurementsThe procedure for making current and voltage measurements using a digital multimeter, is shown in Fig.10.3. We’ve chosen this type of instrument for our example because you will probably be using a modern digital instrument rather than an older analogue type.

Note how it is necessary to break the circuit and insert the meter when making a current measurement. No-tice also how the voltmeter is con-nected in parallel with the circuit at the point at which you are making a measurement.

It is essential that you get these two connections right and that you select the correct ranges on the multimeter. Failure to observe these two simple precautions can result in damage to the meter and/or the circuit under test!

In Fig. 10.3, one of the meters is used to measure the supply current (note that the circuit must be broken and the meter inserted into it), while the second instrument is being used to measure the potential difference (voltage drop) across diode D1.

The initial range settings (200mA for the current measurement, and 20V for the voltage measurement) are chosen so that they are both greater than those that we would expect to

in the circuit to be (9 – 5.6)/100 amps or 34mA.

Similarly, we could assume that the voltage that we would measure should be 5.6V (the same as the Zener voltage), but in no event would we expect it to be greater than the supply voltage (9V). We have, therefore, left quite a margin for safety with the two ranges that we’ve selected!

Please note!It is essential to switch off and dis-connect the power supply before at-tempting to connect test leads. When the meter ranges have been set and the connections made, the supply can be reinstated and switched back on, so that measurements can be made.

Please note!In your school/college course you will only be working with equip-ment that uses safe low voltage sup-plies. Even so, it is essential to ob-serve Health and Safety precautions whenever you are working on live electrical and electronic circuits.

When in doubt, you should always refer to your tutor!

Please note!When the circuit on test uses large value capacitors it may be necessary to wait a few minutes in order to al-low them to discharge safely before making connec-tions to the circuit.

Please note!Make sure that you only use properly insulated test leads to make connec-tions to a circuit on test. The leads

clips and probes to make connections to a circuit.

Never use bare wires and test prods

as these can cause short-circuits to adjacent connections!

OscilloscopesOscilloscopes can be used in a variety of measuring applications, the most important of which is the display of time related voltage waveforms.

Older oscilloscopes (Fig.10.4) used cathode ray tubes (CRT) for their displays. In order to make accurate measurements, the face of the CRT

graticule that was either integral with the tube or took the form of a separate translucent sheet. Modern oscilloscopes use

monochrome, which incorporate an electronically generated meas-uring scale. Accurate voltage and time measurements are made with reference to the scale or graticule, applying a scale factor derived from the appropriate range switch.

The use of the graticule is illus-trated by the following example. An oscilloscope screen is depicted in Fig.10.5. This diagram is reproduced at a reduced size. If shown full-size, the gratical markings would be spaced

would be every 2mm along the central vertical and horizontal axes.

The oscilloscope is operated with

position. The timebase (horizontal

Fig.10.4. A typical two-channel general purpose oscil-loscope that uses a CRT display


Teach-In 2011

virtual instru-ments -

Please note!-

calibrate-

Oscilloscope measurements

-

-

-

Virtual instruments-

Fig.10.5. Using an oscilloscope scale

supply

Fig.10.7. A typical display produced by a PC-based virtual oscilloscope


Teach-In 2011

Control Adjustment Focus Provides a correctly focused display on the screenIntensity Adjusts the brightness of the displayAstigmatism Provides a uniformly defined display over the entire screen area and in both

x and y directions. The control is normally used in conjunction with the focus and intensity controls

Trace rotation Permits accurate alignment of the display with respect to the graticule (CRT displays only)

Scale illumination Controls the brightness of the graticule or scaleHorizontal deflection system Timebase (time/cm) Adjusts the timebase range and sets the horizontal time scale. Usually this

control takes the form of a multi-position rotary switch and an additional continuously variable control is often provided. The ‘CAL’ position is usually at one, or other, extreme setting of this control

Stability Adjusts the timebase so that a stable waveform display is obtainedTrigger level Selects the particular level on the triggering signal at which the timebase

sweep commencesTrigger slope This usually takes the form of a switch that determines whether triggering

occurs on the positive or negative going edge of the triggering signalTrigger source This switch allows selection of one of several waveforms for use as the

timebase trigger. The options usually include an internal signal derived from the vertical amplifier, a 50Hz signal derived from the supply mains, and a signal which may be applied to an External Trigger input

Horizontal position Positions the display along the horizontal axis (CRT displays only)Vertical deflection system Vertical attenuator (V/cm) Adjusts the magnitude of the signal attenuator (V/cm) and sets the vertical

voltage scale. This control is invariably a multi-position rotary switch; however, an additional variable gain control is sometimes also provided. Often this control is concentric with the main control and the ‘CAL’ position is usually at one, or other, extreme setting of the control

Vertical position Positions the display along the vertical axis of the displayAC-DC-ground Normally an oscilloscope employs DC coupling throughout the vertical

amplifier; hence a shift along the vertical axis will occur whenever a direct voltage is present at the input. When investigating waveforms in a circuit, one often encounters AC superimposed on DC levels; the latter may be removed by inserting a capacitor in series with the signal. With the AC- DC-ground switch in the DC position, a capacitor is inserted in the input lead, whereas in the DC position the capacitor is shorted. If ground is selected, the vertical input is taken to common (0V) and the oscilloscope input is left floating. This last facility is useful in allowing the accurate positioning of the vertical position control along the central axis. The switch may then be set to DC and the magnitude of any DC level present at the input may be easily measured by examining the shift along the vertical axis.

Chopped-alternate This control, which is only used in dual-beam CRT oscilloscopes, provides selection of the beam splitting mode. In the chopped position, the trace displays a small portion of one vertical channel waveform followed by an equally small portion of the other. The traces are, in effect, sampled at a relatively fast rate, the result being two apparently continuous displays. In the alternate position, a complete horizontal sweep is devoted to each channel alternately.

Table 10.1. Oscilloscope controls and adjustments

AC


Teach-In 2011


(b) Focus

(c) Stability

(d) Trigger source

(e) Vertical attenuator.

10.5. Explain why it is impor-tant to ensure that the variable controls of an oscilloscope are placed in the ‘CAL’ position before attempting to make an accurate measurement.

10.6. What adjustment should be made to an oscilloscope when it is to be used to display a small AC voltage superimposed on a much large DC voltage? Explain why this adjustment is necessary.

10.1. Briefly explain the dif-ference between analogue and digital multimeters. Which type of instrument offers the greatest resolution? Why is this?

10.2. What indications are dis-played on the analogue and digital multimeters shown in Fig.10.8?

10.3. What information (eg, ampli-tude, period) can be obtained from the oscilloscope displays shown in Fig.10.9?

10.4. Explain the function of each of the following oscilloscope controls:(a) Brightness

Fig.10.8. See Question 10.2

Fig.10.9. See Question 10.3

For more information, links and other resources

please check out our Teach-In website at:



CIRCUIT WIZARDCircuit Wizard is a revolutionary new software system that combines circuit design, PCB design, simulation and CAD/CAM manufacture in one complete package.

Two versions are available, Standard and Professional.




* PCB Layout



* Gerber export


1 ms/cm


Teach-In 2011

A soft touch

IN previous instalments of Build,we’ve been using Circuit Wizard

to simulate and test various circuits in order to demonstrate electronic theory. However, in this edition, we are going to look at the process of taking an electronic circuit and con-verting it to a printed circuit board (PCB) design that can be produced for real.

This is one of the real gems of the Circuit Wizard software as you’ll see later on. We will try out some of the software’s automatic conversion tools, as well as investigating some of the more advanced functionality. Once you’ve completed this tutorial you should be ready to enter, test and convert your own circuits to a PCB design.

The electronics industry is heavily reliant on software throughout the product design cycle. An example design cycle for an electronic circuit is shown in Fig.10.10.

A designer might use various tools and calculators to design the initial circuit. The circuit would then be drawn in an electronic format in a process known as schematiccapture.

The circuit may then be simulated and analysed using a Simulation Program with Integrated Circuit Emphasis (SPICE). SPICE software runs thousands of calculations on each junction point or node of a circuit, taking into account all of the components.

There are various types of analy-sis that can be carried out: informa-tion can be displayed in real time (as in Circuit Wizard) to show a virtual simulation, or gathered and presented in reports or graphs/charts to show how a circuit func-tions over time and/or with varying characteristics.

In this way a designer can be pretty sure that a circuit will operate

correctly before spending time and money producing the physical board. Once the

information from the circuit is then used to generate a PCB design ready for production and testing of the circuit.

On the boardSo, let’s get to work and see Circuit Wizard in action generating a PCB! Start off by entering the circuit shown in Fig.10.11; a basic potential divider-based automatic light circuit. Ensure that you

get all of the component values and connections correct.

Once you’ve entered the circuit, run a quick simulation to make sure that it functions correctly. Press the ‘Run’ button on the tool-bar and raise/lower the light level on the LDR (R2) to ensure that the LED (D1) lights under low light conditions).

Now we’re ready to begin the conversion process. Click on the ‘Convert to PCB Layout’ button on the toolbar (Fig.10.12), or alter-natively use the menu to navigate through ‘Project’, ‘Circuit Symbols’ then ‘Convert to PCB Layout…’. This will start a short wizard to guide you through the conversion process.

Click ‘Next’ to continue to the next screen, where you will be asked to select a board type (single or double-sided) and a track size. For most home/school low voltage DC projects, with a relatively low component count and where space and component density is not a premium, we would suggest normal tracks on a single-sided board.


for an electronic circuit

circuit ready for conversion to a PCB layout


Teach-In 2011

Therefore, select ‘Single-Sided; Normal Tracks’ and then click on ‘Next’. The next screen allows us to change the size and shape of the board. In this case, we’ll leave these as the default and click on ‘Next’.

crossed! As Circuit Wizard carries out the conversion of your circuit to a PCB, it will animate the plac-ing of the components, followed by the calculation of the optimum track layout. If all goes well, after

from yours. It should be noted that the automatic routing functionality of Circuit Wizard is a little limited, and it does struggle to route much more than the simplest circuits without a little help. However, we’ll be looking at tactics for cre-ating more complex PCBs later in this article.

Now that we have created our PCB layout, there are a number of excit-ing things that we can do with it. A superb feature of Circuit Wizard is that as well as simulating the circuit

Make sure that you select the Off-board Component variant, not a PCB Component. Wire the PP3 battery’s positive and negative connections to the two-pin screw terminal block by dragging from the ends of the battery connector wires (Fig.10.14).

Virtual testYou are now ready to virtually test your PCB; start the simulation us-ing the ‘Run’ button on the toolbar, as you would for a standard circuit, and try out the function of the circuit by changing the light level on the LDR. On the left-hand side of the screen you may select various dif-ferent views of the PCB. The default is ‘Real World’, which shows a full colour representation of what the board will actually look like when constructed. ‘Normal’ is a more tra-ditional PCB design view. As with schematic simulation, the PCB may also be simulated in a ‘Current Flow’ and ‘Logic Level’ view.

In ‘Current Flow’ view, the tracks are colour coded depending on the instantaneous voltage and ‘marching

of current (Fig. 10.16). This is par-ticularly useful for understanding the operation of the circuit, as well

a short period of time you should receive a completion message de-tailing the success of your conver-sion (Fig.10.13). Closing this should reveal your new PCB layout!

Fig.10.14 shows our example PCB layout; this may vary slightly

Fig.10.12 (above left). The ‘Convert to PCB layout’ toolbar button

Fig.10.14. Example PCB layout for the simple light-operated switch circuit in Fig.10.11, and wiring the PP3 9V battery to the PCB

schematic, you can also simulate a virtual copy of your PCB design.

attach a suitable power supply. Drag and drop across a PP3 9V battery from the Off-board Components in the Component Gallery (Fig.10.15).

Fig.10.15. Off-board Components in the Component Gallery


Teach-In 2011

Build – The Circuit Wizard wayas providing a comparison for fault

Design output

-

-

drilling.

More complex circuits-

Fig.10.16. Current Flow view of the PCB

Fig.10.17. The Circuit Wizard PCB print menu

Fig.10.18. Circuit Wizard’s CAD/CAM menu


Teach-In 2011

that you receive a routing message similar to that shown in Fig.10.20, explaining that the software was unable to completely convert your circuit automatically.

In our example, you can see that

you may be more or less successful

to completely route using the auto-matic routing feature. Inspecting the

it is impossible to wire the circuit, just that the software was unable to

we can step in here to make the job of the software a little easier.

Rats nest

However, this time select ‘Rats Nest;

Fig.10.22.The pins of the components are

mass of criss-crossing wires is often

We now have to place the com-

simply placing components at ran-

is to place the components so that

We might also require components

so that it locates in the right place

To achieve the former, it is es-sentially a case of placing the components so that there are as few cross-overs of green lines as possible. Hence, this will make the job of rout-

Fig.10.20. Automatic routing message for the circuit of Fig.10.19

Fig.10.21. The generated PCB layout showing incomplete routing Fig.10.22. Starting point for the ‘rats nest’ PCB layout


Teach-In 2011


links. As well as component position, their orientation may be altered by rotation (keyboard shortcut CTRL+R).

Notice that as you move compo-nents to a new location, the green lines will update to the nearest com-mon point for that net. This allows

rats nest prior to routing the tracks. Fig.10.23 shows an example layout which places the battery connector at the edge of the board and attempts to leave the rats nest as clean as possible.

On trackAt this point we can either start to draw our tracks manually in-line with the green nets, or instruct Circuit Wizard to attempt to auto-matically route the board now that we have prepared the component

personal preference is to have the software route the tracks automati-cally, then go in and modify the results as required to achieve a

the individual user to experiment and decide upon their favoured approach.

To initiate automatic routing, click

(Fig.10.24). Our completed auto

Fig.10.23. Improved layout using ‘rats nest’ technique

Fig.10.25. The completed auto-routed layout

Fig.10.24. Selecting auto-matic routing from the PCB Layout Tools menu

Fig.10.26. The track button

Fig.10.27. A manually add-ed PCB track

routed layout looks as shown in Fig. 10.25. The layout is now complete and ready for virtual simulation and output for production.

If you prefer to draw the tracks manually (or indeed if Circuit Wiz-ard fails to route your circuit auto-matically) select the track button from the toolbar (Fig.10.26). Tracks are started by left-clicking with ad-ditional segments added by further

right-clicking.

Previous users of PCB drafting

-tice for it to become intuitive. You

view for manual track drawing. Fig.10.27 shows a track manually added to the 555 circuit.

A number of additional PCB con-

available through the PCB wizard. On the second screen, tick ‘Allow me to customise the PCB layout con-

with many additional options as you proceed through the conversion process.

One of these additional con-

the physical component mappings. When converting to a PCB, Circuit Wizard selects the most appropriate PCB component footprint based on the component variant and values selected.

However, there may be times when you wish to specify a different model from that chosen by default. The screen shown in Fig.10.28 will be included in the wizard when the tick box is checked as described earlier, allowing you to alter the package


Teach-In 2011

used for each component (in this case showing the package selection window for the battery, B1).

On the subsequent wizard screen you are given a number of compo-nent placement options. An inter-esting option is ‘Take into account component positions’. When Circuit Wizard converts to a PCB it tries to order the components as you have set them out on your schematic.

This may be convenient for keep-ing component numbering sequen-tial. However, in practice this is not always the best way to place com-

automatically routing and/or the components are being placed in a

Fig.10.28. Specifying different component models

Fig.10.29. An example of a Quality Check Report

poor manner, try unticking this op-tion. This can have a dramatic effect on the results.

Finally, one really useful tool is Qual-ity Check. This may be accessed from the PCB Layout Tools icon on the toolbar, or by selecting ‘Project’, ‘PCB Components’ then ‘Quality Check’ from the menu.

This will analyse the PCB layout in comparison to your circuit diagram, to ensure that all of the connections have been made correctly, as well as various other checks. This is particularly useful when routing manu-ally to check the con-nectivity of your de-sign. Fig.10.29 shows an example Quality Check Report.

We’ve really only scratched the surface of the PCB conver-sion and drafting tools within Circuit Wizard. As with any

software tool, the best way to learn more is to get ‘hands on’ and use the software.

In the next edition of Build we’ll be giving you the opportunity to do just that with a range of project circuits for you to enter, test, convert and build using all of the skills you’ve learnt throughout the series.


10.1 See page 43 and page 44

10.2 (a) 83.0mA AC

(b) 180

10.3 (a) Sine wave; 5ms period (frequency = 200Hz); am-plitude 6V pk-pk

(b) Pulse wave; 8ms period (p.r.f. = 125Hz; high time = 2ms, low time 6ms; 25% duty cycle (mark-to-space ratio = 1:3; (amplitude 2.5V pk-to-pk

10.4 See page 46 and Table 10.1




Teach-In 2011

Fig. 10.30 shows a simple regulated power supply and three common items of test equipment.

1. Photocopy the diagram and add connect-ing wires to the diagram in order to show:

(a) How the collector current of transistor TR1 is measured

(b) How the base-emitter voltage of TR1 is measured.

2. For (a) and (b) above, list the initial ad-justments that should be made to the test equipment.

3. If the output voltage of the circuit is meas-ured at 0V and the input voltage as 15.1V, what measurements would you make, and in what order, to locate the fault? Explain your answer.

Amaze

Investigate

In our everyday lives we are increas-ingly reliant on highly complex electronic systems that involve large numbers of individual component parts. However, because each indi-vidual part can be prone to failure, we need to ensure that each com-ponent has a very high reliability in order to ensure that the equipment as a whole remains free from failure. Reliability (ie, the ability to operate without failure) is thus a paramount consideration for those involved with the design of electronic equipment.

To put this into context: suppose that we know that one out of every 100000 of a particular component type is likely to break down every hour. This implies that an item of equipment that makes use of 100 of these components would break down at an average interval of 1000 hours or less than 42 days operation. In many cases this would be woe-fully inadequate!

The requirement for a very high degree of reliability is crucial in many applications. In satellite com-munications, the electronics is often expected to operate for at least 20 years without failure, simply because it would be impossible to recover and repair the satellite without spending far more than the satellite was actual-ly worth. Added to this, there would be considerable loss of revenue while the satellite was out of service: in many cases this might amount to millions of pounds or dollars.

The failure rate of individual com-ponents depends on the situation and environment in which they are used. A satellite experiences extreme forces and temperatures during launch and

In consequence, the environment in which a satellite operates is con-sidered severe when compared with that in which most consumer elec-

reason, we need to ensure that only the most reliable types of electronic component are used in satellites.

But just how reliable are the elec-tronic components used in the circuits that you construct? A single low-cost metal oxide resistor operated within its rating and in a benign environment can be expected to a have working life of more than 1000 years. The same

to have a reliability that is at least ten times and preferably more than 100 times greater than this!

Next month!In next month’s Teach-In 2011 we round up the series with a brief look back at previous parts. We shall also be including some fun revision activities as well as essential refer-ence information. Our series con-cludes with a selection of electronic projects that you can build and test using Circuit Wizard.

Fig.10.30. See Investigate

HandsOn Technology http://www.handsontec.com

1

ISP to ICP Programming Bridge: HT-ICP200In-Circuit-Programming (ICP) for P89LPC900 Series of 8051 Flash μController…

…ICP uses a serial shift protocol that requires 5 pins to program: PCL, PDA, Reset, VDD and VSS. ICP is different from ISP (In System Programming) because it is done completely by the microcontroller’s hardware and does not require a bootloader…

That the 80C51-based controllers are extremely popular is nothing new, certainly when considering the large number of designs thatcan be found on the web. The reason may well be the fact that the tools (both hardware and software)that are available for this controller are very affordable and there is an enormous amount of information readily available. In addition, a very active forum provides answers to many questions. One of the most significant features of the P89LPC900 Family is that the core now requires only 2-clock Cycles Per Instruction (CPI). 8051 experts will already know that this used to be 12 or 6 cycles until now. In practice, this means that the crystal frequency can be drastically lowered to achieve the same processing speed as their classic counter parts.

ISP Programming is only available for 20, 28 and 44pin parts. IAP is only available once your IAP program has been loaded in to the LPC900 part. ICP -can be used to program all the LPC900 parts.

The LPC90x devices can only be programmed using a ICP programming method. In contrast to some of the larger LPC900 family members, the LPC90x devices do not offer other programming methods like Parallel Programming, In-System Programming (ISP) or complete In-Application Programming (IAP). HOWEVER - ICP requires hardware control/ signaling of the LPC900 to be programmed.In some high-end applications, there may be a need to replace the code in the microcontroller without replacing the IC itself. This article described in detail the operation of the In-Circuit-Programming (ICP) capability which allows these microcontrollers to be programmed while mounted in the end product.

P89LPC9xx parts (affectionately know as the LPC900 series of micro-controllers) can be programmed 4 ways...

1. ISP (In-System-Programmed) using the UART of the LPC900.2. IAP (In-Application-Programmed) .. or "self programmed" by reprogramming the flash under code execution.3. ICP (In-Circuit-Programming)... using "Synchronous Serial".... Similar to SPI signaling - each data bit is clocked

in/out under clock signal control.4. Parallel Programmer, available in expensive industry grade tools.

1. INTRODUCTION

HT-ICP200 P89LPC900 Target Application Board

To communicate between a PC (running Flash Magic) and the LPC900 Micro-Controller to be programmed an "ICP Bridge" circuit is required as shown in Figure 1.

Figure 1: Hooking up ICP to the P89LPC900 Application Board

46 Everyday Practical Electronics, September 2011

Teach-In 2011


Part 11: Summing it all up





IN THIS instalment of Teach-In 2011, we bring our series to a conclusion with a quick review

of the previous ten parts, and include a comprehensive index that will help you to locate the key topics that we’ve introduced as the series has progressed. There’s also a selec-tion of questions and fun activities, including a crossword, that will help you to check your understanding.

For good measure, we’ve also in-cluded eight additional circuits for you to investigate using the Circuit Wizard software.

We began our Teach-In series by looking at the signals that are used to convey information in electronic circuits. We discussed the units and quantities that we use when making measurements in electronic circuits, and how waveforms are used to show how the voltage and current in an electronic circuit vary with time. We also introduced batteries and power supplies that we use to provide power to electronic circuits.

Part 2 dealt with resistors, capaci-tors, timing circuits and Ohm’s Law. We also found out what happens when a capacitor is charged or dis-charged.

Part 3 provided you with an intro-duction to diodes and power sup-plies. We investigated the voltage/current characteristics for two dif-ferent types of diode, and showed how they could be used together with a transformer to produce a power supply. We also looked at light emitting diodes (LEDs) and Zener diodes.

Learn

Everyday Practical Electronics, September 2011 47

Teach-In 2011

Crossword Check – How do you think you are doing?

11.1. Solve the crossword shown in Fig.11.1.

Clues across5 Amplitude (4)7 Instrument for measuring current (7)8 Polarised capacitor (12)10 Commonly used for logarithmic ratios (7)15 Most positive connection of an

NPN transistor (9)18 Very common type of waveform (4)19 Stores electric charge (9)20 Unit of potential difference (4)21 Instrument used to display waveforms (12)22 P in PRF (5)26 Most positive connection on a conducting diode (5)27 ×0.000001 (5)29 Peak or maximum value (9)30 Unit of frequency (5)

Clues down1 Used to produce delays (5)2 Diode voltage reference (5)3 Present on the plates of a capacitor (6)4 Time for one cycle (6)6 Circuit that has no stable state (form of oscillator) (7)9 direction only (5)11 C in CRT (7)1213 Fast analogue-to-digital converter (5)

Transistors were the subject of Part 4. We described the opera-tion of NPN and PNP transistors, and explained how they are used to amplify current and operate as saturated switches.

An introduction to operational

of Part 5. We showed how opera-

in inverting, non-inverting and dif-ferential arrangements, as well as

showing how they could be used as comparators, where one voltage is compared with another.

Logic circuits were explained in Part 6. Here we met the symbols, truth tables and Boolean logic for each of the most common types of logic gate. We also introduced bist-able devices, and showed how they could be used in binary counters. The highly versatile electronic timer (555/6) was introduced in Part 7.

These versatile circuits can be used to produce accurate time delays and repetitive pulse waveforms.

Analogue circuit applications, in

were described in Part 8. We ex-plained the characteristics of low-

and showed how these could be built using simple arrangements of resis-tors, capacitors and inductors. We also introduced some simple active

The month’s Check panels provides you with an opportunity to test your understanding of the previous ten parts of our Teach-In 2011 series.

14 ×1,000,000 (4)16 Steps alternating voltage up or down (11)17 Most positive connection of a PNP transistor (7)19 Smallest indivisible part of a battery (4)23 L in LED (5)24 Unit of capacitance (5)25 ×0.001 (5)28 Unit of resistance (3)

Crossword solution – page 53


Teach-In 2011


The next question tests your ability to recognise the symbols used in circuit diagrams:

11.2. Identify each of the symbols shown in Fig.11.2.

Question11.3 and Question 11.4 test your ability to extract information from a waveform:

11.3. For the waveform shown in Fig.11.3(a):

(a) What type of waveform is shown?

(b) What is the frequency of the waveform?

(c) What is the periodic time of the waveform?

(d) What is the amplitude (peak value) of the waveform?

11.4. For the waveform shown in Fig.11.3(b):

(a) What type of waveform is shown?

(b) What is the pulse repetition frequency of the waveform?

(c) What is the periodic time of the waveform?

(d) What is the duty cycle of the waveform

(e) What is the peak-peak value of the waveform?

Fig.11.2 See Question 11.2

Fig.11.3 (right). See Question 11.3 and Question 11.4

measure, we explained how decibels are used to express gain or loss in electronic circuits.

In Part 9, we showed how an analogue signal can be converted to digital data, and vice versa. We described the process of quantisa-tion and explained how the number of data bits affects the accuracy and resolution of a DAC and ADC.

Part 10 dealt with the practical aspects of constructing and testing electronic circuits. We introduced some basic items of test equipment in the form of multimeters and oscillo-scopes, and showed how these could be used to measure voltage, current, frequency, time and waveform in an electronic circuit.


Teach-In 2011

Quantity Unit Abbreviation

Electric potential Volt

Ampere A

Electric power W

Capacitance F

Resistance Ohm

Frequency Hz

Bit rate Bps

Definition Unit

The potential that appears between two points when a current of 1 Ampere flows in a circuit having a resistance of 1 Ohm

The current that flows in an electrical conductor when electric charge is being transported at the rate of 1 Coulomb per second

1 Watt

The resistance of a circuit when a current of 1 Ampere flowing in it produces a potential difference of 1 Volt

1 Hertz

Question 11.7 tests your ability to convert multiples and sub-multiples to fundamental units:

The next two questions test your knowledge of some of the units and quantities used in electronics:

11.5. Complete the table of electrical quantities and units of measurement

11.6.

11.7. Express: (a) 250mV in V(b) 0.15mA in A

(c) 68000 in k(d) 0.235W in mW(e) 0.22M in k

(f) 885Hz in kHz(g) 1500pF in nF(h) 1.2kbps in bps

The next question tests your ability to recognise some common electronic components:

11.8.needed to build a simple astable LED

Question 11.9 checks a basic under-standing of basic digital logic:

11.9.

(a) a four-input AND gate can be built

(b) a four-input OR gate can be built

Finally, Question 11.10 tests your abil-ity to read and understand a simple electronic circuit diagram:

11.10

-ance of ±5%.

-

-

Fig.11.5. See question 11.10

Fig.11.4. See question 11.8 The answers to these questions are shown on page 54

volt

ampere

ohm

The potential that appears between two points when a current of one ampere flows in a circuit having a resistance of one ohm

The current that flows in an electrical conductor when electric charge is being transported at the rate of one coulomb per second

The resistance of a circuit when a current of one ampere flowing in it produces a potential difference of one volt

1 watt

1 hertz


Teach-In 2011

OVER the Teach-In series, our Build section has put theory

into practice using Circuit Wizard to simulate a whole range of elec-tronic circuits. We’ve shown how using simulation software is great for allowing you to really get to the bottom of how a circuit actually

operates, as well as being a crucial tool for electronic designers.

In this, the last edition we are giv-ing you the opportunity to try out your ‘wizard’ skills with a selection of practical circuits that you can en-ter and investigate. For each circuit, we’ve included a brief description,

along with some suggestions for experimentation and a few ques-tions to help test and extend your understanding of the underpinning theory. These circuits are a great starting point for your own projects and circuit designs.

COIN TOSS

DescriptionThe circuit shown in Fig.11.6 uses a J-K

speed. When switch SW1 is pressed,

at 1kHz (that’s one thousand times a second).

During this time, the LEDs will ap-

dimly lit. When the button is released,

and hence one LED will remain lit to signify either ‘heads’ or ‘tails’. The circuit is not truly random, but because the output is changing so quickly it would be hard to get a consistent output by timing the button press.

Investigate:

1. We’ve used the in-built clock de-vice – try to create your own clock generator (perhaps using a 555 asta-ble or a Schmitt oscillator circuit).

2. The coin toss circuit is not truly


random – how could we generate a real random selection?

3. How could we extend the circuit to give six outputs – ie, to create an electronic dice?

Fig.11.6. Coin toss circuit diagram

EGG TIMER

DescriptionThe egg timer circuit shown in Fig.11.7 is a classic 555 bistable circuit. Switch SW1 selects between a soft-boiled (~3 min) and hard-boiled (~5 min) egg by changing the resistor through which capacitor C1 is charged. When the circuit is powered, the buzzer (BZ1) will sound until switch SW2 is pressed to start the timer. For this reason a practical version of this circuit should include a further toggle switch to connect/disconnect the power supply.

Investigate:

1. Monitor the charge on capacitor C1 by placing a probe on pin-6/7.

2. Use the theory that you learnt in Part 2 to calculate the time period for the circuit when timing both soft- and hard-boiled eggs (note that resistor R3 is in series with either R1 or R2 when you calculate the total resistance through which C1 is charged).

3. How would you alter the circuit to give a four-minute egg? Fig.11.7. Egg timer circuit diagram


Teach-In 2011

KNIGHT RIDER LIGHTS

DescriptionIn Fig.11.8, a 4017 dec-ade counter is used to produce a ‘running lights’ sequence illumi-nating each LED in turn. Each LED is connected to two outputs, so that as the 4017 counts up further, the LEDs are lit again in reverse order. This gives the effect of the LEDs run-ning alternately forward/backwards.

Investigate:

1. The speed of the lights can be varied by ‘adjusting’ potentiometer VR1. Check that this works.

Fig.11.8. Knight Rider ‘chaser’ lights

2. The 4017 is clocked by a simple Schmitt oscillator circuit (IC1a). Use the Internet and/or other resources to

devices and how they may be used to make a simple clock signal.

3. What is the purpose of diodes D1 to D8?

INTRUDER ALARM

DescriptionThe circuit shown in Fig.11.9 uses a thyristor (or silicon controlled

particular device before, but it acts as a latch to hold the circuit in the ‘on’ state once pushswitch (push-to-break) SW1 is pressed.

The alarm will remain on until the circuit is disconnected from the battery (for example with keyswitch SW2), even if SW1 is released. Switch SW1 could be replaced with a normally closed (NC) pressure pad, a trip wire or a door contact in a real circuit.

Investigate:

1. Extend the circuit to include more than one trigger.

2. Use the Internet and/or other re-

works.

3. What would happen if (a) resis-tor R1 became open-circuit or (b) if

transistor Q1 became short-circuit between collector and emitter?

Fig.11.9. Circuit diagram for a sim-ple intruder alarm

For more information, links and other resources please

check out our Teach-In website at:


4. Why is only one series resistor (R10) required?


Teach-In 2011


PUSH-ON/PUSH-OFF CONTROL SWITCH

Description

In Fig.11.10, a J-K flip-flop is clocked on/off when pushswitch (push-to-make) SW1 is pressed. The Schmitt trigger inverter (IC2a) and capacitor C1 are used to de-

Q1, which in turn allows current

(RL1), and hence completes the mains voltage circuit and powers

the light on and off.

Investigate:

do we need to reduce it?

2. What would happen if SW1 was

3. What is the purpose of diode D1?

9V BATTERY TESTER

Description

breakdown voltage Zener diodes to control red, amber and green LEDs

on test.

Investigate:

be different values?

2. What would the effect be of chang-ing the breakdown voltage of the Zener diodes?

5V, 12V etc.?

Fig.11.10. Circuit for a push-on/push-off control switch

Fig.11.11. An LED 9V battery tester circuit








* PCB Layout



* Gerber export


Teach-In 2011

METRONOME

Description

A 555 timer is used in Fig.11.12 in an

-

Investigate:

TEMPERATURE- CONTROLLED FAN

Description

Investigate:

-

Fig.11.12. Metronome circuit using a 555 timer IC

Fig.11.13 (above). Temperature-con-trolled fan circuit

Fig.11.14 (right). Answer to

Question 11.1


Teach-In 2011


11.1. See Fig.11.14

11.2. (a) switch (SPST)

(k) preset potentiometer

sistor (BJT)

11.3. (a) sinewave

(b) 40Hz

(c) 25ms

11.4.

(b) 5ms

(c) 200Hz

11.5.

11.6.

11.7.

(b) 150 A

(c) 68k

(e) 220k

(f) 0.885kHz

(g) 1.5nF

(h) 1200bps.

11.8. (a) resistors (4)

(b) preset potentiometers (2)

(e) transistors (2)

11.9. See Fig. 11.15

11.10.

(b) PNP transistor

(h) R2.

Fig.11.15. Answer to Question 11.9

Round-upTeach-

In 2011

in a C-R

t

Mike and Richard Tooley


Teach-In 2011

555 timer 4-53, 7-44, 7-45556 timer 7-46, 7-53741 operational amplifier 5-48ADC 1-51, 9-49, 9-51AND logic 6-45, 6-47Acceptor circuit 8-49Accuracy 9-49Active filter 8-50Ampere 1-51, 2-51Amplitude 1-53Analogue meter 10-43Analogue signal 1-51, 9-47Analogue-to-digital conversion 1-51, 9-46, 9-49Anode 3-48Astable oscillator 4-55Astable pulse generator 7-48Attenuators 8-46Automatic light switch 5-56Automatic routing 10-49BJT 4-46, 4-47, 4-48,

4-49Balanced attenuator 8-47Band-gap reference 9-49Band-pass filter 8-47, 8-48, 8-57Band-stop filter 8-47, 8-48Bandwidth 5-51, 8-50Base 4-46Batteries 1-54Bias 3-48, 4-50Binary 6-49, 9-46Binary-weighted DAC 9-48, 9-52Bipolar junction transistor 4-46, 4-47Bistable 6-48Bits per second 1-51Block schematic 1-55Boolean logic 6-46Bridge rectifier 3-50Buffer 6-46C-R circuits 2-54C-R high-pass filter 8-48C-R low-pass filter 8-48CLEAR input 6-48, 6-49CMOS 6-50CRT 10-44Capacitors 2-53, 2-57, 2-58Cathode 3-48Cathode ray tube 10-44Cells 1-54Characteristic impedance 8-50Charge 2-54Circuit Wizard 1-56, 10-48Collector 4-46Collector load 4-50Colour code 2-52Combinational logic 6-47Common base 4-48Common collector 4-48Common emitter 4-48Common-emitter amplifier 4-49, 4-51Comparator 5-53, 5-55Complex waveform 1-52Counter 7-52Current 1-51Current gain 4-49, 4-53, 5-50,

8-50Current measurement 10-43, 10-44

Cut-off frequency 5-52, 8-51, 8-49D-type bistable 6-48, 6-50DAC 1-51, 9-47, 9-49DIL package 6-50Darlington transistor 4-48Decade counter 6-54Decay 2-55Decibels 8-50Depletion mode MOSFET 4-48Dielectric 2-53Differential amplifier 5-52Digital logic 6-44Digital meter 10-43Digital signal 9-47Digital-to-analogue conversion 9-47Digital-to-analogue converter 1-51Diode characteristics 3-49, 3-51Diodes 3-48, 3-52Discharge 2-54Dual timer 7-52Dual-in-line 6-50Dual-slope ADC 9-51Duty cycle 1-54Electric charge 2-54Electrolytic capacitor 2-53Emitter 4-46Energy storage 2-54Enhancement-mode MOSFET 4-48Equivalent circuit 5-50Exclusive-NOR logic 6-46, 6-47Exclusive-OR logic 6-46, 6-47Exponential decay 2-55Exponential growth 2-55FET 4-46, 4-47Feedback 4-51Field effect transistor 4-46, 4-47Filters 8-47, 8-51Fixed resistor 2-51Flash ADC 9-50Follower 5-52, 5-53Forward bias 3-48Frequency 1-53Frequency response 5-51, 5-52Full-wave rectifier 3-50Gain 4-53, 5-50, 5-51Gain-bandwidth product 5-51Gates 6-45Germanium 3-49Giga 1-52Graticule 10-44Growth 2-55Half-wave rectifier 3-50Hertz 1-51High-frequency cut-off 5-52High-frequency roll-off 5-52High-pass filter 8-47, 8-48, 8-51,

8-50, 8-56Input resistance 5-50Integrated circuits 5-48Intruder alarm 6-53Inversion 6-46Inverter 6-46, 6-47Inverting amplifier 5-52, 5-54Inverting input 5-49J-K bistable 6-48, 6-49JFET 4-48

TEACH-IN 2011 – Topic Index


Teach-In 2011Kilo 1-52Kitchen timer 7-50L-C band-pass filter 8-49L-C band-stop filter 8-49LDR 2-51LED 3-50, 3-51, 3-55LED flasher 7-51Light-dependent resistor 2-51Light-emitting diode 3-50Light-emitting diodes 3-51Load 4-48, 4-50Logic 6-44, 6-47Logic 0 6-44Logic 1 6-44Logic gates 6-45, 6-46, 6-52Low-frequency cut-off 5-52Low-frequency roll-off 5-52Low-pass filter 8-47, 8-48, 8-51, 8-50, 8-55MOSFET 4-48MSB 9-46Matching 8-50Mega 1-52Micro 1-52Mid-band 5-52Milli 1-52Monostable pulse generator 7-46Most significant bit 9-46Motor control circuit 4-53Multimeters 10-42, 10-43Multiples 1-52Music 1-52N-type material 3-48, 4-46NAND logic 6-46, 6-47NOT logic 6-46NPN transistor 4-46, 4-47Nano 1-52Negative feedback 4-51, 5-51Non-inverting amplifier 5-52Non-inverting input 5-49OR logic 6-45, 6-46, 6-47Off state 6-44Off time 1-53Ohm 1-51, 2-51Ohm’s Law 2-50, 2-56On state 6-44On time 1-53, 7-46Operating point 4-50Operational amplifier 5-48, 5-49Oscillator 4-55, 5-56Oscilloscope 10-44, 10-45Output resistance 5-50P-type material 3-48, 4-46PCB 10-48PNP transistor 4-46, 4-47PRESET input 6-48, 6-49Parallel plate capacitor 2-53Periodic time 1-53Phase shift 5-49Photodiode 3-50Pi-network 8-47Polarising voltage 2-53Potentiometer 2-51Power gain 5-50, 8-50Power supplies 1-54Pre-set resistor 2-51Printed circuit board 10-48Pulse generator 7-46, 7-48Pulse period 1-53

Pulse repetition frequency 1-53, 7-48Pulse waveform 1-52, 1-53Q-factor 8-50Quantisation 9-46, 9-47R-2R ladder DAC 9-48RESET input 6-48Ramp waveform 1-52Ramp-type ADC 9-50, 9-51Rats nest 10-51Rectifier 3-50Rectifier diode 3-49, 3-50Rejector circuit 8-49Resistor colour code 2-52Resistors 2-51Resolution 9-49Resonance 8-49Reverse bias 3-48Ripple counter 6-53Roll-off 5-52SET input 6-48Sallen and Key filter 8-50Saturated switch 4-52Sawtooth waveform 1-52Schematic diagram 1-55Second-order filter 8-56Semiconductor 3-48Signal diode 3-50Signal diodes 3-49Signals 1-51, 1-50Silicon 3-49Simulation 1-56Sinking 7-45Sourcing 7-45Speech 1-52Square wave generator 7-49Sub-multiples 1-52Successive approx. ADC 9-50T-network 8-47TTL 6-50Temp.-sensitive resistor 2-51Termination 8-50Thermistor 2-51Time constant 2-55Timer circuit 7-47Timing diagram 6-48, 6-49Tolerance 2-51Transfer characteristic 4-49Transformers 3-50Transistor amplifier 4-54Transistor switch 4-51Transistors 4-46Triangle waveform 1-52Trigger input 7-48Unbalanced attenuator 8-47Valves 5-57Variable capacitor 2-53Variable resistor 2-51Virtual instrument 10-45Virtual test 10-49Volt 1-51, 2-51Voltage follower 5-52, 5-53Voltage gain 5-50, 5-51, 8-50Voltage measurement 10-43, 10-44Watt 1-51Waveform measurement 10-45Waveforms 1-52, 1-58

Zener diode 3-50, 3-51, 3-54

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Documents

Teach-In 2011 Electronics Course