Synergy PLC Framework for CPX · The numeric version from the file name is the SSP version for which this pack file is built (not the version of the PLC Framework). To interact with

All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Technology Corp. website (http://www.renesas.com).

User’s

Manual

Synergy PLC Framework for CPX

Sample Application Quick Start Guide

Target Device Synergy S7/R9A06G037

www.renesas.comRev.1.02 August 11, 2017

(1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL(MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN).

(2) HANDLING OF UNUSED INPUT PINS: Unconnected CMOS device inputs can be cause of malfunction. If an

input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device.

(3) PRECAUTION AGAINST ESD: A strong electric field, when exposed to a MOS device, can cause destruction

of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices.

(4) STATUS BEFORE INITIALIZATION: Power-on does not necessarily define the initial status of a MOS device.

Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions.

(5) POWER ON/OFF SEQUENCE: In the case of a device that uses different power supplies for the internal

operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device.

(6) INPUT OF SIGNAL DURING POWER OFF STATE: Do not input signals or an I/O pull-up power supply while

the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device.

NOTES FOR CMOS DEVICES

Contents

1. Introduction ............................................................................................................................................ 5

2. Quick Start Guide .................................................................................................................................. 6

2.1 Hardware Setup ............................................................................................................................ 6

2.1.1 CPX3 - PMOD Board ............................................................................................................ 6

2.1.1 Synergy Board Connection ................................................................................................... 7

2.2 Software Setup ............................................................................................................................. 8

2.2.1 Toolchain Installation ............................................................................................................ 8

2.2.2 e2 studio Toolchain Setup ................................................................................................... 10

2.2.3 IAR EWSYN Toolchain Setup ............................................................................................ 16

2.2.4 Terminal Application ........................................................................................................... 19

2.2.5 Demo Application LED’s ..................................................................................................... 21

2.3 Demo Application Menu ............................................................................................................. 21

2.3.1 Change BandPlan ............................................................................................................... 23

2.3.2 Dflash Menu ........................................................................................................................ 24

2.3.3 Simple CUI .......................................................................................................................... 25

2.3.4 Auto Start Mode .................................................................................................................. 31

Revision History.......................................................................................................................................... 34

R11QS0004ED0102 Rev.1.02 Page 5 of 37 August 11, 2017

Synergy PLC Framework for CPX Sample Application Quick Start Guide

1. Introduction This quick start guide describes the basic functionality of the G3-PLC demo application running on Synergy SK-S7G2 and CPX3 PMOD Renesas evaluation board hardware.



2. Quick Start Guide 2.1 Hardware Setup

2.1.1 CPX3 - PMOD Board The CPX3 PMOD board contains a CPX modem device for PLC with built in filters for operation in different

frequency bands.

Figure 2-1 CPX3 PMOD board

The CPX modem is linked with the main microcontroller via an UART interface within PMOD connector. This interface is used to download CPX firmware and to send and receive modem commands and indications as well as power line network data.

The PMOD board is powered by a separate power supply that needs to be connected to the 12V DC power

jack to allow proper operation. The actual PLC signal is provided at the line coupler connector that needs to be connected to the line

coupler provided with the PMOD packet.



2.1.1 Synergy Board Connection The hardware setup needed is shown in Figure 2: The CPX3 PMOD board is connected to a Renesas

Synergy SK-S7G2 board and with a power line coupler and the power supply. Figure 3 shows the two USB cables which are plugged in for the demo application. These cables are

plugged into J5 (for the serial terminal interface) and J19/DEBUG_USB (for debugging through ARM J-Link debugger).

Figure 4 gives a closer view of the PMOD connection to the SK-S7G2 board.

Figure 2 Synergy board, CPX PMOD board and power line coupler

Figure 3 USB cable connections



Figure 4 PMOD connection (PMODB/J14)

2.2 Software Setup This section describes the setup of the tool chain, project import and the terminal program configuration.

2.2.1 Toolchain Installation The used version of compiler, ISDE and SSP are shown in the table below.

Software Version Download

e2 studio 5.3.1.002 https://synergygallery.renesas.com

Synergy Software Package (SSP) 1.2.0 https://synergygallery.renesas.com

GCC toolchain 4.9 2015q3 https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update

Synergy Software Configurator (SSC) 5.3.1.002 https://synergygallery.renesas.com

IAR Embedded Workbench for Synergy (IAR EWSYN)

7.71.1 https://synergygallery.renesas.com

Renesas Flash Programmer (RFP) 3.02.01 or newer

https://www.renesas.com/en-us/products/software-tools/tools/programmer/renesas-flash-programmer-programming-gui.html

Synergy PLC Framework 1.0 https://synergygallery.renesas.com

This PLC framework can be used in either e2 studio ISDE or in IAR Embedded Workbench for Synergy.

When e2 studio is used then the following software tools have to be installed: 1. GCC toolchain 2. e2 studio – shall auto detect and register the GCC installation 3. SSP



4. Synergy PLC Framework pack file 5. RFP driver When IAR EW is used then the following software tools have to be installed: 1. IAR EWSYN 2. SSC 3. SSP - must to be installed in the same folder with the SSC 4. Synergy PLC Framework pack file 5. RFP driver It is recommended to install the required tools in the order given above. Tools downloaded from

synergygallery.renesas.com have “Installation Instructions” available under Documentation page. It is recommended to check these instructions too.

The G3 PLC framework consists of two parts, one is the CMSIS pack file containing the actual PLC

framework, the other is a demo application project available for both e2 studio and IAR EWSYN development environments.

To install the PLC Framework please copy the file Renesas.SynergyCPX_PLC_Framework.1.2.0.pack into

the corresponding subfolder of your SSP installation (usually inside the e2 studio or SSC installation folder) under <SSP install folder>/internal/projectgen/arm/Packs. Please note that the name of the pack file must not be changed. The numeric version from the file name is the SSP version for which this pack file is built (not the version of the PLC Framework).

To interact with the demo application on Windows host (especially on windows 10) the USB CDC drivers

provided by RFP software package have to be installed:



2.2.2 e2 studio Toolchain Setup The demo application is located in a ZIP file:

SynergyPLCFramework_v1.0/Demo/e2Studio/demo_app_e2studio.zip file.

In e2 studio import the project using the “Import”->”Existing projects into workspace” functionality as shown below:





An evaluation SSP license file can be found in the SSP installation folder in file “<SSP installation folder>/internal/projectgen/arm/Licenses/SSP_License_Example_EvalLicense_20160205.xml”.







Project files need to be generated by the Synergy configurator before building the project:

The project with the demo application can build the application in one of the several build configurations possible, described in the table below:

Build Configuration name Description

Certification Will build an application ready to be used in an automated certification environment. There is no user interface and only minimal output on the terminal console. This build configuration also selects various settings (IP port, encryption keys, etc.) that are specifically required during certification process.

Debug Will build an application with a terminal command line interface described in section 2.3. Release

After the build is successful the project is ready to be run. A debug session can be started immediately.



After starting the debug session and download of the demo application on the Synergy microcontroller the execution is stopped at the reset vector. Please check in section 2.2.4 on how to continue with the setup of the PMOD board and terminal application.

2.2.3 IAR EWSYN Toolchain Setup IAR EWSYN requires a license in order to run. One option is to use a time limited license code that can be

obtained via e-mail from: https://register.iar.com/specialedition/RenesasSynergyBeta The license code has to be input in the “License Manager” as shown below:



After license activation unpack the demo application located in

SynergyPLCFramework_v1.0/Demo/IAR/demo_app_iar.zip/demo_app_iar and open the workspace file S7SK_GPLC_Demo_IAR.eww:



At this point the path to the SSC installation and an SSP License have to be configured:

An evaluation SSP license file can be found in the SSP installation folder in file “<SSP installation folder>/internal/projectgen/arm/Licenses/SSP_License_Example_EvalLicense_20160205.xml”.

Now the project files can be generated by the Synergy Configurator:



And the project can be built:

After the project is built, a debugging session can be started immediately:

After starting the debug session and download of the demo application on the Synergy microcontroller the execution is stopped at the main function. Please check in section 2.2.4 on how to continue with the setup of the PMOD board and terminal application.

When starting a debug session IAR EWSYN might ask for source files for ThreadX, NetXDuo or USBX

components. For accessing these files the corresponding components need to be included as source files instead of precompiled libraries. This can be changes in the Synergy Software Configurator under the ‘Components’ tab in the ‘Express Logic’ section. Please note that the SSP evaluation license does not allow to view these files in a debug session. Hence, if debugging is not needed it is recommended to ignore this dialog and to use the precompiled components.

2.2.4 Terminal Application When the debug session is started the S7 microcontroller will stop at either the reset vector or at the main

function. Ensure that the native USB connector J5 is connected to the PC. The standard input/output of the demo application is on this port.

It is important to note that the PMOD board has to be properly powered when starting the debug session otherwise firmware download will fail.

Open “Device Manager” with the Win+Pause keyboard combination, then select Device Manager, then



expand Ports section. Let the demo application run and observe what new COM port appears under “Ports (COM & LPT)” section:

The USB VID:PID pair for this new port is 045B:0238. As mentioned above this device is recognized by the RFP drivers as a COM port. In this example the new port is COM22 but it can be any other COM port number. The port can be opened via a serial interface program like TeraTerm or PuTTY:

Note that sometimes it might be necessary to disconnect and reconnect the USB cable at connector J5 to



make the corresponding COM port available in Windows environment.

There is no output on the serial port until demo application finishes the CPX firmware download successfully. The main menu of the demo application can be refreshed by pressing the ‘Enter’ key if the terminal application is launched after the CPX firmware was downloaded successfully.

2.2.5 Demo Application LED’s The demo application uses Synergy board LED’s to signal current status as follows:

• LED1 – Green – is lit when ThreadX operating system is started successfully

• LED2 – Red – is lit when there is an error and application is locked in an infinite loop

• LED3 – Yellow – is lit during firmware download to CPX. With default settings for firmware download speed this download lasts for up to 5 seconds. During normal operation firmware download succeeds from the first try but if it fails the demo application will try up to 5 times to perform firmware download.

The normal case is to start with Green and Yellow LED’s on. Then, after the firmware download is done only the Green LED remains ON. When Yellow LED turns off the demo application will print to the serial port the startup screen and the main menu.

2.3 Demo Application Menu If the CPX3 firmware was downloaded successfully then the terminal program shows a startup screen after

power-on as shown in the picture below.



There are 2 general modes of operation on the demo application. One is full interaction mode, and the

second one is automatic mode. Simple CUI is the former, and Auto start mode and certification mode is latter. If user uses Auto Start mode or certification mode, the dflash menu shall be called before the mode. The

dflash menu is therefore shown next. The features of these modes are defined as follows: [1 – Simple CUI]

• Dflash is not necessary

• Never reply for ICMP echo, UDP packet.

[2 – Auto Start mode]

• Dflash shall be set to the correct value. If the user has never set dflash, please select [dflash menu].

• Dflash is necessary for device setup and preserve some parameter like frame counter

• Reply to following packet after joining PAN or start PAN.

� ICMP Echo � UDP with dst port 0xF0B0 , 0xF0BF , 0xF0B8

• Adaptation layer initialize with EUI64 and PSK from Dflash.

• If the device type is set as Device, this mode will ensure the device is trying to join the pan infinitely.

• If the device type is set as Server, this mode will be start up pan. The PanID is used from Dflash.

[3 – Certification mode]

• The difference from Auto start mode is initial setting to IB which is based on certification procedure only.

• The certification mode allows to run the node along with the G3 alliance’s official conformance test tool. (Note that in order to pass all multicast tests, the NetXDuo stack has to be recompiled with macros NX_DISABLE_INCLUDE_SOURCE_CODE and NX_ENABLE_IPV6_MULTICAST set.)

The PIXT on Certification mode is fixed as follows.

//Non PAN-Coordinator PIXIT const octetstring p_MAC_EXTENDED := 'F8726FBA000000 01'O; const octetstring p_PSK := '7FFE8001000000000000000 000000000'O; const octetstring p_ID_S := 'F8726FBA00000000'O; //PAN-Coordinator PIXIT const octetstring p_MAC_ADDRESS := '0000'O; const octetstring p_PAN_ID := '781D'O; const octetstring p_GMK := 'AF4D6DCCF14DE7C1C4235E6 FEF6C151F'O; const integer p_GMK_INDEX := 0; const octetstring p_TESTER_MAC_EXTENDED := '0000000 000001234'O; const octetstring p_TESTER_PSK := '7FFE800100000000 0000000000000000'O; const octetstring p_ID_P := 'F8726FBA00000001'O; const integer p_IUT_UDP_PORT := 61631;



2.3.1 Change BandPlan

• The user can choose between 4 different bandplans from this menu.

[0 - Cenelec-A] [1 - Cenelec-B] [2 – ARIB] [3 – FCC] [z – Return] to the previous menu



2.3.2 Dflash Menu

DFlash menu:

• [0 – init dev config]: Initialize dflash for AutoBoot mode setup as follows: RX will be reboot after the initialize.

� EUI64: 0xFF0102FFFE000101 � PSK: 0x00112233445566778899AABBCCDDEEFF � PanID: 0x1001 this field uses only the Coordinator.

• [1- edit dev config]: Initialize dflash with unique EUI64 address. The user can set the lesser 16bit address of EUI64. The address will be mapped to 0xFF0102FFFE000000 to 0xFF0102FFFE00FFFF . Other parameters are the same with certification.

• [2 – disp all config]: Shows current config parameter stored on Dflash.

• [3 – erase preserved]: Erase preserved information like frame counter and loadng sequence number.

• [z - Return]: Back to the previous menu



2.3.3 Simple CUI This mode dialogue proceeds as follows:

1) The device type shall be selected.



2) The EUI 64 address shall be set. The address can be entered directly as an 8byte hexadecimal number. Alternatively, the address can be chosen from 16 preset values (0-F), which will map to addresses from; 0xABCDABCDABCD0000 to 0xABCDABCDABCD000F. When the device type is selected to be device, the program will proceed to the Peer Main Menu. And when the device type is selected as server, the program will proceed to the Coordinator Main Menu.

2.3.3.1 Coordinator Main Menu

The Coordinator Main menu allows the private SAP for the coordinator device, commands like network start or kick. And the mode also allows common service for adaptation layer within the ADP common SAP menu.

Coordinator main menu:

• [1 - Start network]: Starts a network and makes the server a PAN coordinator. The PANID is fixed as 0x781D .

• [2 - Show connected devices]: Shows a list of devices that are currently joined to the PAN

• [3 - Kick device]: Removes a device from the PAN.

• [4 - Toggle Mac promiscuous mode]: If turned on, macPromiscuousMode is activated over ch1 on dual stack.

• [7 – G3 common SAP]: Proceeds to ADP Common Service

• [8 - Toggle verbose mode]: Toggles verbose mode. If turned off, no information messages are displayed.

• [0 - dflash menu]: Proceed to the dflash configuration menu

• [z – Return]: Back to the previous menu



2.3.3.2 Peer Main Menu

The Peer Main menu allows the private SAP for peer devices, commands like join and leave. And the mode also allows common service for adaptation layer within the ADP common SAP menu.

Device main menu:

• [1 - Join a network (with discovery)]: Starts the joining procedure, which first scans for networks invoking the network discovery primitive. The discovery procedure is repeated multiple times if no active node could be found. Once an active node has been found, the user is asked to choose the network to join.

• [2 - Leave a network]: Starts the leave procedure by sending an LBP kick frame to the coordinator using ADPM-NETOWORK-LEAVE.request. After the transmission the device resets itself.

• [4 - Toggle Mac promiscuous mode]: If turned on, macPromiscuousMode is activated over ch1 on dual stack.

• [7 – G3 common SAP]: Proceeds ADP Common Service


• [0 - dflash menu]: proceed dflash configuration menu




2.3.3.3 ADP Common Service

ADP common service:

• [1 - Send data frame]: Sends a UDP data frame containing random data to a specified node in the network. The user has to provide the short address, the UDP payload length and has to decide if automatic route discovery shall be allowed or not. Furthermore, the demo application allows to send the same frame multiple times.

• [2 - Start route discovery]: A manual route discovery is initiated. The result is written to the routing table.

• [3 - Start path discovery]: A path discovery is started. If successful, the list of hops is displayed.

• [4 - Scan for devices]: Starts the discovery procedure to detect neighbouring nodes.

• [5 – Configuration]: Proceed to the Configuration menu

• [6 - Reset ADP]: The reset adaptation layer menu. Note that after this menu, the device has left the network.

• [7 - Statistics/Log]: Proceed to the Statistics/Log menu


• [0 dflash menu]: proceed dflash configuration menu

• [z - Return]: Back to the previous menu



2.3.3.4 Statistics/Log Menu

Statistics/Log menu: • [0 - Clear Statistics]: Clear all statistics on the CPX3

• [1 - Clear Log]: Clear the log on the CPX3

• [2 - Get LML Statistics]: Reads and displays the statistics of the LML layer.

• [3 - Get MAC Statistics]: Reads and displays the statistics of the MAC layer.

• [4 - Get ADP Statistics]: Reads and displays the statistics of the ADP layer.

• [5 - Get EAP Statistics]: Reads and displays the statistics of the EAP layer.

• [6 - Get LML Log]: Reads and displays the log of the LML layer.

• [7 - Get MAC Log]: Reads and displays the log of the MAC layer.

• [8 - Get ADP Log]: Reads and displays the log of the ADP layer.

• [9 - Get EAP Log]: Reads and displays the log of the EAP layer.




2.3.3.5 Configuration Menu

Configuration menu: • [1 - Get MAC PIB entry]: Reads an entry from the MAC layer information base. The entry is selected

by providing the corresponding attribute ID, which are displayed in menu 3.

• [2 - Set MAC PIB entry]: Writes an entry to the MAC layer information base. The entry is selected by providing the corresponding attribute ID, which are displayed in menu 3.

• [3 - Show all MAC PIB entries]: Displays all entries of the MAC layer information base.

• [4 - Get ADP IB entry]: Reads an entry from the ADP layer information base. The entry is selected by providing the corresponding attribute ID, which are displayed in menu 6.

• [5 - Set ADP IB entry]: Writes an entry to the ADP layer information base. The entry is selected by providing the corresponding attribute ID, which are displayed in menu 6.

• [6 - Show all ADP IB entries]: Displays all entries of the ADP layer information base.

• [7 - Get EAP IB entry]: Reads an entry from the EAP layer information base. The entry is selected by providing the corresponding attribute ID, which are displayed in menu 9.

• [8 - Set EAP IB entry]: Writes an entry to the EAP layer information base. The entry is selected by providing the corresponding attribute ID, which are displayed in menu 9.

• [9 - Show all EAP IB entries]: Displays all entries of the EAP layer information base.




2.3.4 Auto Start Mode This mode dialogue proceeds as follows:

1) The device type shall be selected. When the device type is selected as server, the program will start the pan wth the PANID from Dflash. And when the start the pan finishes successfully, the application proceeds to the G3 certification menu (Coordinator). Otherwise, if the device type is selected as device , the program will start trying to join the PAN infinitly with scan the pan devices. If the joining finishes successfully, the application proceeds to the G3 certification menu (Peer).



2.3.4.1 G3 Certification Menu (Coordinator)

G3 Certification Menu (Coordinator):

• [0 - main menu]: proceed to Coordinator Main Menu which is described in section 2.3.3.1 “Coordinator Main Menu”.

• [1 - Send test frame]: send UDP and ICMP echo frame sequentially to 0x0001 as 100 byte payload.

• [3 - Reboot device]: reboot CPX3 and return to start menu.



2.3.4.2 G3 Certification Menu (Peer)

G3 Certification Menu (Peer):

• [0 - main menu]: proceed to Peer Main Menu which is described in 2.3.3.2

• [1 - Send test frame]: send UDP and ICMP echo frame sequentially to coordinator as 100 byte payload.

• [3 - Reboot device]: reboot CPX3 and return to start menu.

Revision History Date Revision Section Substance September 10, 2015 Rev.0.01 - correction of erroneous description December 1, 2015 Rev.0.02 - Add Statistics/Lod app

Add macPromiscuous mode app for Dual use December 14, 2015 Rev.0.03 2.1.2 Modify configuration setting by Dip switch February 16, 2016 Rev.0.04 2.1.2 Modify configuration setting by Dip switch March 28, 2016 Rev.0.05 2.3 Add bandplan switch, modify certification mode. July 4, 2016 Rev.0.06 All Changed Synergy board from DK-S3A7 to SK-S7G2 July 5, 2016 Rev.0.07 All Review version cleaned August 29, 2016 Rev.0.08 3.2.1 Added section September 14, 2016 Rev.0.09 All Moved to newer REL template October 3, 2016 Rev.0.10 2.1 Added PMOD hardware description October 4, 2016 Rev.0.11 All Reviewed and cleaned version December 14, 2016 Rev.0.12 All Updated menus and SSP version, added IAR EWSYN March 03, 2017 Rev.0.13 2.2.1 Add description of build configurations March 18, 2017 Rev.0.14 - Update document number for release March 27, 2017 Rev.0.15 0, 2.2.1,

2.3.1 Changed title, fixed a typo and added mention about RFP driver, add band plan Cenelec-B

May 12, 2017 Rev. 1.00

All First approved release

August 08, 2017 Rev. 1.01

2.1 – 2.3

Updated after GooBE report

August 11, 2017 Rev. 1.02

2.2.3 Added note how to handle files that cannot be found during debug session in EWSYN.


Publication Date: Rev.1.02 August 11, 2017

Published by: Renesas Electronics Corporation

Synergy PLC Framework for CPXSample Application Quick Start Guide

R11QS0004ED0102

Documents

Synergy PLC Framework for CPX · The numeric version from the file name is the SSP version for which this pack file is built (not the version of the PLC Framework). To interact with