Sudhir Koul

Director Engineering, SoC Design

Samsung Semiconductors Inc

October, 2019

Samsung Foundry- 2 -

Samsung Automotive Solutions

• Evolution in Automotive Technology

• Product Solutions

• Design Solutions

• Methodology Solutions

• Process Solutions

• Manufacturing Solutions

• IP Solutions

• Success Stories

October 2019

The Evolution of Automotive Technology

Transportation Intelligence

~ ~ ~

4

Technologies for Autonomous Vehicles

5G Network

V2V,V2I,V2X

Deep Learning

Processing Power

Security System

Biometrics

5

October 2019

Samsung Solutions for Automotive

ADAS

Processor / NPU

Security IC

Memory

Infotainment

Processor / DDI / Touch

IC Security IC / PMIC

Memory

eMirror

Image Sensor

DDI / PMIC

Surround / Rear

View Camera

Image Sensor / DVS

Steering Wheel

Fingerprint Sensor

Bio Processor

Iris Sensor / PMIC

Front Sensing

Driver Monitoring

NPU / Image Sensor /

DVS

Key Fob

Security IC

Fingerprint Sensor

7

Samsung in Automotive

2017

JAN2019

JAN

2018

OCT2019

MAY

Source : Samsung Newsroom 8

9

IVI System Trend and Samsung

IVI System Trend

Distributed(Audio/Video Navigation)

Domain Centralized(Integrated Cockpit)

Vehicle Centralized(High Computing Platform)

3 or 4 independent networks Collaboration of ECUs within 1 domain Limited communications among domains

Central Domain Controller Consolidation of functions

※ Integrated Cockpit (Cost Optimization) HW : Low Power/High Performance SOC SW : Hypervisor for Multi OS/Display

Virtual Domain: Integrated Domain Controller

High-complexity, high-computing functionsHW : High Performance Computing SOCSW : HW Agnostic SW Driven Architecture

Gateway backbone

BODYMULTIPT/Chassis

IVI

CLU

※ IVI : In-Vehicle Infotainment

※ CLU : Cluster

※ PT : Powertrain

Domain 2Domain 1

PT/

Chassi

s

ADAS MULTI BODY

I/O Node I/O Node

I/O BackBone(Gateway)

I/O NodeI/O Node

PT/

Chassi

s

ADAS MULTI BODY

Gateway

IVI/CL

UIVI/CL

U

Exynos

Auto

8890

Exynos

Auto

V910

Exynos

Auto

V920

10

11

Telematics System Trend and Samsung

Modem Technology Evolution for

Autonomous Driving

5G4G3G1G/2G

Voice Call

Texting

Mobile

Internet

Mobile Computing

Streaming Services

Ultra-reliable & Low Latency

Enhanced Mobile Broadband

Massive IoT

Cellular V2X

Live Streaming

AR/3D Maps

Samsung leads 5G standard as a 5GAA board member

SN

S

12

Samsung 5G Modem Technologies

C-V2X Legacy

1ms

Latency

Proven

Commercially

4G

Sub-6GHz

Wider

Bandwidth

100MHz

20MHz

5G

4G

3G/2G

mmWave

Beamforming

13

14

Samsung Memory and Image

Sensor Solution for Automotive

Samsung Memory Solution for Automotive

Increasing Demand for

High Bandwidth, High Density

DDR2/3〈 2,133Mbps

LPDDR4〈 3,733Mbps

LPDDR4X〈 4,266Mbps

LPDDR5/GFX/HBM6,400Mbps 〈

2016 2018 2020 ~ 2021 2025 ~

eMMC〈 128GB

UFS〈 256GB

UFS/SSD〈 TB

DRAM

NAND

Infotainment Connected Car Autonomous Car

15

Cameras for Next Generation ADASMove to “More Pixel” & “More Camera”

Need efficient development for the complex camera systems

Level2

Level3+

Level4+

AD level

PremiumMediumEntry

7.4 ~ 8.3Mp x 1ea

with wide-HFOV

~2.5Mp x 4ea

with Fisheye-HFOV

~2.5Mp x 4ea

7.4 ~ 8.3Mp x 2, 3ea

with wide & tele-HFOV

~5Mp x 2ea

with typ-HFOV

8.3 ~ 12Mp x 2, 3ea

with wide & tele-HFOV

Front Sensing / NCAP / AD

Sound View Monitoring

E-mirror / Blind spots

ISP

[Gpix/s]

56

12 ~ 15Mp x 2, 3ea

with wide & tele-HFOV

~5Mp x 4~6ea

44

18

75

~2.5Mp x 4ea

~5Mp x 2ea

with typ-HFOV

16

17

ADAS Trends and Samsung

ADAS AD TrendDifferent Use Cases for ADAS and AD

MOBILITY AS A SERVICEPERSONAL VEHICLE

Samsung is focused on ADAS/AD solutions for personal vehicles.

Cost-effective sensor set

Some fleet usage

Up to 130 kph for highway and urban

No outside control

Design critical

Expensive sensor set

Centralized fleet model

Max 70 kph for urban

Service model (regular pit stops)

Purpose built

Cost

Fleet

Speed

Control

Design

18

Scalable SoC ApproachScaling problem of the car architecture Samsung ADAS “scale out” solution

A Class B Class C Class D Class E/F Class

% o

f A

vaila

bili

ty o

f A

DA

S fu

nct

ion

s

NCAPL0

NCAPL0L1L2L3L4

Co

mp

uta

tio

nal

Pow

er

2 x Exynos A High

Exynos A High

Exynos A Mid

Exynos A Low

3 x Exynos A High

Front Camera: NCAP

Front Camera: L0-l2

Front Camera: L0-l2 + DM

Central Comp.: L0-l2 +Parking

Next SOC Gen.

Central Comp.:

L3 Functionality

L4 and L5

de-centralized centralized

Flexible ADAS solution suitable for all car lines, saving cost and time.

Model SegmentsA Class B Class C Class D Class E/F Class

Nanometers

19

Modular, vision-based ADAS SolutionOpen and flexible Approach architected to allow third-party Integration

Option 1 Option 2 Option 3

20

21

Driving autonomous vehicle revolution with a comprehensive Automotive

Semiconductor Portfolio

Server Architecture

High performance CIS & Memory

Multi-function IVI-Tele-ADAS system

Solutions and technology partners

Tier 1 + Tier 2

OEMs

AI NPU

AI

Delivering innovative and disruptive

solutions with synergies across productsDeveloping Samsung Automotive

Ecosystem across OEMs, Tier 1s, Tier 2s

Samsung in Automotive

October 2019

23

SoC Platform Based Design Solution

24

Peripheral

Safety subsystem

ISP/UFS/CSI/PCIe

Security

NOC

Memory SerDes IP

Custom IP

Automotive SoCProcess Technology

- 12”: 5LPE, 8LPP, 14LPU, 28FDS, LNF28- 8”: LF6S, BCD1370- 28nm eNVM solution for MCU

Samsung provides product-proven automotive solutions

• Automotive design platform with safety mechanisms and security solutions

• Silicon-proven IPs in compliance with ISO 26262 and AEC-Q100

• Design, test and package infrastructure dedicated for automotive applications

Automotive Platform Solution

25

System specification & architecture define

Bus design : legacy AMBA, NoC Bus

Bus exploration : bandwidth & latency

IP & RTL Design

SOC & System IP Integration

Synthesis & timing constraint description

SOC physical design(P&R, timing closure)

Off-chip power integrity / signal integrity

Physical verification (DRC, LVS, ERC, etc)

Device driver development on Linux OS

Firmware development for IP validation

Post silicon validation

UVM-based platform SOC functional verification

Emulator (Palladium) based platform SOC performance verification

DFT architecture definition and implementation

DFT/Test related customer support

1

3

5

2

4

6

Architectural Design Functional Design

DFT (Design For Testability)Design Verification

Physical Design & Verification SW Solution

Design Services

October 2019

Samsung 27

28FDS14LPU

8LPP

Head Unit ADAS

- Single VGA- Rear-Camera Park Assist

Surround viewHead Unit

- Multi-VGA Camera - Augmented Reality - Navigation

Sensor fusion

Multi-Resolution CamerasFor higher depth of view

Head UnitSurround

view

Process Technology for Infotainment & ADAS • Fast Move to Automotive Node Due to Higher Processing Needs• Automotive Process Adopts Automotive Program to Ensure Reliability, Robustness & Safey

5LPE (TBD)

28LPP+eFlashMCU

28

Automotive IP sign-off condition

Hard IP tested to AEC-Q100 Grade temperature

AEC-Q100 targeted for Grade 2 and Grade 1

Soft IP tested to ASIL Requirements

ASIL targeted for ASIL-B with key IPs for ASIL-D

Vmax/Vmin, -40/125℃ Vmax/Vmin, -40/105℃

3 years, Vmax, 150℃ 3 years, Vmax, 150℃

Auto Auto

3 years, Vmax, Tac 3 years, Vmax, Tac

Auto G1 Auto G2

ASIL Reports via SGS TUV

AEC-Q100 Qualification Requirements

Automotive Qualified to accelerate ISO26262 System Qual

Automotive IP –AEC-Q100 & ASIL Certified

29

Package type by areas in car

Body & Convenience(Grade 0~3)

•Leadframe•PBGA•FCBGA•POP/SIP/MCP

ADAS(Grade 1~3)

•Leadframe•PBGA•FCBGA•POP/SIP/MCP

Infotainment(Grade 2~3)

•Leadframe•PBGA•FCBGA•POP/SIP/MCP

Chassis & Safety(Grade 0~1)

•Leadframe•PBGA

Powertrain(Grade 0~1)

•Leadframe• PBGA

Data communication, key factor for future automotive productsLead frame or WB PBGA for Grade 0 & 1, FC-BGA or SIP for Grade 2 & 3

Automotive Package Solution

October 2019

31

Power-On Self-Test (POST)• Boot-up time fault detectionLogic/Memory Built-In Self-Test• In-system test method against

progressive faults in logic area

SER (Transient Fault)-Aware Design• Soft error analysis/mitigation• Soft error mitigation with ECC

IDDQ Test• IDDQ test for additional fault coverageDFT Implementation Guide• DFT guide for improved test coverage for

lower DPPM

Automotive Electrical and Reliability Sign-off Guide• AEC-Q100 grade-related

timing/power/reliability sign-off guide based on product specification and mission profiles

SRAM

PERISRAM

SRAM

SRAM

SRAM

SRAM

FF FF

CLK

Alpha particle

/ neutrons

Boundary Scan• Inter-chip connection test method for

system-level testing

Chip 1

Chip 2

Fault Injection Simulation• Fault injection simulation for safety

analysis of design

CPU 1

CPU 2 Thermal Awareness• Thermal analysis for reliable design

Tool Evaluation and Qualification• General guide to achieve the confidence

in the use of S/W tools

Automotive Requirements

AEC-Q100 Grade 2: -40°C to +105°C

ISO 26262ASIL B: <100FIT (PMHF)

SPFM (90%), LFM (60%)

Samsung Automotive SoC Design Methodology

Tied to ISO26262 Tied to AEC-Q100

32

Worst-Case Current Scenario System PDN Optimization

Active

Idle

CLK Off

M Cycles

Width of PDN Resonance Freq.(for resonance scenario)

TActive TIdle

Tr (for di/dt scenario)

Mode Power CLK Data

CLK Off On Off Off

Idle On On Off

Active On On On

Mode change scenario based on early power estimation

Idle-to-Active (di/dt) Scenario : voltage drop due to off-chip inductance

Burst-Transient (resonance) Scenario : voltage drop due to PDN resonance

Mode change scenario can be modified using other modes customer want to consider.

Pre- & post-layout what-if analysis

Pre-layout : design target extraction by what-if analysis

Post-layout : PKG de-cap optimization considering positions

Pre-Layout Analysis

Scenario

What-if Analysis

Vdrop @bump< Spec

Design Target

• PKG De-cap Combination

• PKG Layout

• # of Balls• # of Balls• Cdie

• Board De-cap Combination

Post-Layout Analysis

C1

C4

C4

C4

C4

C2

C2

C2

C2

C5

C5

C5

C5

C5

C5

C5

C2

C2

C2

C5

C5

C5

C1

C3

PKG De-cap Combination (Position Dependent)

Vo

ltag

e D

rop

Effect of Position: ~15% of spec

Optimum Combination & Position

[De-cap Combination]C1 x2, C2 x9, C3 x1, C4 x4, C5 x10

PI System Level PDN Optimization for Automotive

33

• POST Controller

– Interpreting ROM data and interfacing to the BIST

– Checking the test results of BISTs

– Flexible access mechanism via IEEE 1687, 1149, 1500

• Logic BIST

– Embedded logic testing solution

– High fault coverage through multi-seeding

– Dynamic X-masking solution

• Memory BIST

– Embedded SRAM testing and repair solution

– Soft-repair solution as well as hard repair

– Automotive-specific SRAM test algorithm

TCK

TMS

TDI

TDO

ROM

POSTController

LBISTController

TCMDECODER

ClockController

LBIST DECOMP

LBIST COMP

SEED

PRPG

MISR

SIGNATURE

IEEE std. SIB

TAPController

IEEE std. SIB

JTAG TAPs

External Pinsfor Test

Internal System ports

MBISTController

FSM

AddressGenerator

SignalGenerator

DataGenerator

SharedComparator

SRAM

Safety-critical systems require POST (Power-On Self-Test) via memory and logic BIST

When power is turned on, BISTs run to determine if a device is operating properly

In System Test for Automotive

October 2019

35

Tesla Autonomy Day – April 2019

Musk said they contained what was

“objectively” the “best chip in the world.”

And that’s not best by a little, but “by a huge margin.”

260 square millimeter, 6 billion transistors –

claims 21x performance increase over previous solutio

n

There’s an awful lot of specs associated

with this new Tesla-designed, Samsung-manufactured silicon – The Verge

Samsung Foundry Automotive Manufacturing

36

Global Technology, Manufacturing, Test & Package Locations

Over 1600+ Design, IP, Methodology etc Engineers in Korea, US (San Jose), and India

Additional 10+ Design Service Partners Worldwide

Samsung Design Service

Samsung Foundry

SF DS (US/San

Jose)

8”, 12”, P&T(Korea)

SSIR 2)

(India)

1) SF DS: Samsung Foundry Design Service2) SSIR: Samsung Semiconductor India R&D Center

SESS (China)

SF DS 1)

(Korea)

S2-Line (US/Texas)

Global Manufacturing Fabs & Design Centers

October 2019

38

Product Main IP

28FDS 28LPP 14LPU 8LPP 5LPE Trend Market req.

ADAS G2 G1 G1

- AEC-Q100/ISO26262

based AutoSafe platform

- ASIL-B ASIL-C/D

- Embedded Vision /

Security / Sensor Fusion

- Functional Safety

. ISO26262 (FMEA/FMEDA,

ASIL-B/D)

- Reliability

. AEC-Q100 G1

- Quality

. Meet quality levels

required for automotive

applications

LPDDR4, Ethernet AVB,

MIPI, HDMI, PCIe, SATA,

ADC

Infotainment G2- Real-time Multimedia /

Security / Sensor Fusion

USB, LPDDR4, Ethernet

AVB, MIPI, PCIe, ADC

MCU G1

- eNVM readiness

. eFlash G1 (done) /

eMRAM G2 (developing))

Ethernet 10/100/1000,

ADC, I/F peripherals

Automotive IP Readiness & Plan

39

● ◐● ◐◐ -

◐● ◐● ◐◐◐◐◐◐● ◐● ◐● ◐● ◐● ◐●● ◐

◐◐

●◐◐

Automotive IPs from Samsung and Partners

● Available ◐ Under DevelopmentContact Samsung for complete listing by process node

40

- 40 -

ADAS

• Camera Module• Radar Module• LIDAR & Laser Module• V2X• Infrared Module• ADAS Domain Controller• Grade 2/1 ASIL B

Infotainment

• Head Unit• Instrument Cluster• Telematics• Cockpit Domain Controller• Grade 2 ASIL B

Chassis & Safety

• Airbag ECU• ABS• Electronic Power Steering• Active suspension• Grade 1/0 ASIL C/D

Body & Convenience

• Lighting• Power Systems• Central Body Control• HVAC• Keyless Entry• Grade 1 ASIL C/D

Powertrain/xEV

• Engine Management System• Transmission System• xEV• Grade 1/0 ASIL B/C/D

Samsung Focus

28nm/ 14nm/ 8nm/ 5nmGrade 2/1

Automotive IPs Different Applications

October, 2019

42

CPULP4 I/F

LP4 I/F

LP4 I/F

LP4 I/F

Security

Safety

ISP

CAM I/F

GPU

CODEC

NPU NPU

Inter-chip Link

LP4 I/F

LP4 I/F

LP4 I/F

LP4 I/FCustomer IP

Samsung Solution

Customer Requirements

•Application: ADAS/ADS

•System: CPUs/GPU/NPU; 6B transistors

•Key IPs: LPDDR, PCIe, GbE, UFS, ISP, Security PUF

•Business Model: ASIC/SoC; RTL to GDS

Samsung Automotive SoC Case Study

43

802.11ax WiFi Systems

LPDDR5 SerDes

EmbeddedMemory

NetworkProcessor

/CPU

Sensor &Control IP

VisionProcessor

Security

AnalogFront-End

Automotive V2X Systems

LPDDR5 SerDes

EmbeddedMemory

V2XIP

Sensor &Control IP

CPUVision

Processor

Security

AnalogFront-End

Automotive V2X Analog Front-End

• Low-power 12-b 160MS/s ADC & 320MS/s DAC

• Automotive Safety Mechanism

Wi-Fi 6 (802.11ax) Analog Front-End

• Low-power 12-b 320MS/s ADC & 640MS/s DAC

• Low-jitter LC-PLL (< 2ps)

SFF 2019-USA

5G & Connectivity Platform-Success Story

44

Thank you