STATUS Understanding Doc

8/8/2019 STATUS Understanding Doc

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STATUS SUB-SYSTEM

This subsystem controls the SCPI-defined status-reporting structures.QUEStionable and OPERation registers are defined here. These registers conform to the IEEE 488.2specification. These status structures are as follows:

Operation Status Register (for SCPI)Consists of CONDITION, TRANSITION FILTER, EVENT, and event enable (MASK)registers.

Questionable Status Register (for SCPI)Consists of CONDITION, TRANSITION FILTER, EVENT, and event enable (MASK)registers.

In general, the status data structure is used to "request service" or indicate a specific condition (forexample, operation complete) via SRQ (Service Request) e.g. the user may be notified that certain

events have occurred even if the user did not request the information.Following is the model of status data structure.

Status Reporting Structure


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Each bit of Status Byte Register is set by some specific input. Each input is explained in following:

Status Byte Register

The Status Byte register contains bits related to the instrument's Status Byte (STB) summary messages,Request Service (RQS) messages, and Master Summary Status (MSS) messages.

Status Byte Register

The Status Byte Register can be read with either a serial poll or the *STB? common query command.Both serial poll and STB? read the Status Byte Register identically and returns the same Status Bytevalue, but have following difference: SPOLL returns RQS for bit6 STB? returns MSS for bit6

Service Request Enable Register

The Service Request Enable Register is an 8-bit register that can be used by the programmer to selectwhich summary messages in the Status Byte Register may cause service requests.

Service Request Enable Register


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Standard Event Status Register

The Standard Event Status Register has specific events assigned to specific bits.

Standard Event Status Register

Standard Event Status Enable Register

The Standard Event Status "Enable" Register is an 8-bit register that can be used by the program toselect which bits of Standard Event Status Register are enabled. The enabled bits are ORed together,and reported to the ESB bit (Bit5) of the Status Byte Register. The 8 bits of this register correspond tothe 8 bits of the Standard Event Status Register.

Output Queue

The Output Queue stores response messages until they are read. If an unread message exists, Bit4(Message Available - MAV) of the Status Byte Register is set to 1. So, Bit4 is used to synchronizeinformation exchange with the controller.


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Operation Status Register

This register consists of CONDITION, TRANSITION FILTER, EVENT, and event enable (MASK)registers. Refer the figure for the register interaction.

Enable the desired bits of the EVENT register by using the MASK register. 1 enables, 0 masks thecorresponding bit of EVENT register. The MASK register is set by the:STATus:OPERation:ENABle command.

The TRANSITION FILTER register consists of positive and negative transition filters.

If a bit in the positive transition filter is set to 1, then a 0 to 1 transition in the corresponding bitof the CONDITION register causes a 1 to be written in the corresponding EVENT register bit. Thepositive transition filter is set by the :STATus:OPERation:PTRansition command.

If a bit in the negative transition filter is set to 1, then a 1 to 0 transition in the corresponding bitof the CONDITION register causes a 1 to be written in the corresponding EVENT register bit. Thenegative transition filter is set by the :STATus:OPERation:NTRansition command.

Operation Register Interaction


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Condition register is nothing but the Operation Status register in case of Operation mode. Refer thefollowing and above figure.

Questionable Status Register

This register consists of CONDITION, TRANSITION FILTER, EVENT, and event enable (MASK)registers. Refer the figure for the register interaction.

You enable the desired bits of the EVENT register by using the MASK register. 1 enables, 0 masksthe corresponding bit of EVENT register. The MASK register is set by the:STATus:QUEStionable:ENABle command.

The TRANSITION FILTER register consists of positive and negative transition filters.

If a bit in the positive transition filter is set to 1, then a 0 to 1 transition in the correspondingbit of the CONDITION register causes a 1 to be written in the corresponding EVENT register bit. Thepositive transition filter is set by the :STATus:QUEStionable:PTRansition command.

If a bit in the negative transition filter is set to 1, then a 1 to 0 transition in the correspondingbit of the CONDITION register causes a 1 to be written in the corresponding EVENT register bit. Thenegative transition filter is set by the :STATus:QUEStionable:NTRansition command.


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Questionable Register Interaction

Condition register is nothing but the Questionable Status register in case of Questionable mode. Referthe following and above figure.

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