Status of the Run IIb CDF Detector Upgrade Projecthep.uchicago.edu/~thliu/projects/Pulsar/Pulsar_doc/Ted... · 2005. 4. 18. · CDF PAC - 13 Dec 2003 Ted Liu - 3 Project Scope (I)

CDF

Ted Liu - 1PAC - 13 Dec 2003

Status of the Run IIb CDF Detector Upgrade Project

Ted LiuFermilab

CDF


2b or not 2b this is no longer the question

• RunIIb spec was for 4 x 1032cm-2s-1

• All non-silicon upgrades will NOT change, the scope is still right

• a portion of silicon tasks remainto take care of current detector

New baseline accepted by DOE,endorsed by CDF internal review

Strong commitment to see all the projects through…

Goal is now for: 3 × 1032cm-2s-1

CDF


Project Scope (I)

1.1 - SiliconContains closeout activities, some tasks needed to preserve the current detector (DAQ maintenance, radiation monitoring, safety maintenance)

1.2 Calorimeter1.2.1 – Preshower Upgrade - No scope change needed - Significant impact on the installation plans due to silicon cancellation

1.2.2 – EM Timing- No scope change needed

CDF


Project Scope (II)

1.3 Data Acquisition and Trigger1.3.1 – TDC upgrade1.3.2 – Level 2 Decision crate upgrade1.3.3 – Level 1 Fast track trigger (XFT II) upgrade1.3.4 – Event Builder upgrade1.3.5 – Level 3 computer upgrade (buy new PCs)1.3.6 – Silicon Vertex Trigger upgrade (details changed)

All are still needed to operate at 3 × 1032cm-2s-1

(design goal from the Summer 2003 DOE review).No scope changes

CDF


1.2.1: Preshower Status

Phototube statusUsed to be the critical path item, ending in Oct 04Japan has accelerated orders, now delivery is March 04All phototubes will be ready for a Summer 04 installation

Detector statusAll time-critical production parts orderedReady to start production in February 046-month production expected based on prototypeShould be ready for installation by Fall 2004

CDF


Preshower Installation

Cancellation of the silicon installation and its long shutdown has implications for other projectsPreshower installation is most affectedWe have concluded that installation in the collision hall is possible.Current installation schedule for both EM Timing and Preshower requires 10 weeks

Realistic manpower availability (40 hour weeks, 1 shift/day) If cannot be completed in summer 04, will be completedduring 2005 summer shutdown

CDF


1.2.2: EM Timing StatusHardware is ready for installation

Hardware is 4 months ahead of scheduleAll hardware finished & tested, ready for installationAll cables, splitters, ASDs and TDCs in handEnd-Plug installation completed, fully operational4 Central Wedges completed, fully operationalDAQ/online monitoring software fully working Performance excellent, < 2 ns timing resolutionInstallation procedures reviewed by expertsInstallation to be completed in the next shutdown (2004)

CDF


1.3.1: TDC Status

New high speed TDC with Altera Stratix FPGAsExcellent Chicago engineer team (built many CDF boards)Design work started on Dec 2002Core firmware design finished on June 2003Firmware design reviewed by experts on July 2003Layout of board close to finalBackward compatible

Lots experience with TDCtesting & commissioning within CDF

CDF


1.3.2: L2 Upgrade Status (I)Pulsar production started

Hardware 10 months ahead of original scheduleOne motherboard, four mezzanine and one AUX designAll custom board prototypes designed&built last yearBoard design extensively simulated + trace analysisHave tested ALL interfaces in self-test mode (Tx Rx)Core firmware fully developed (in CVS) and tested in beamHas been used as RunIIa L2 muon interface boardfor data taking (interface with legacy Alpha processor)Muon online DAQ/monitoring/offline software workingProduction Readiness Review done (Nov. 07, 2003)No blue wires on ALL prototypes, no revision needed

Web page: http://hep.uchicago.edu/~thliu/projects/Pulsar

CDF


Mezzanine slotsAUX card

Pulsar Designmodular/universal/self-testable

Pulsar

Custommezzanine

Bottom viewPulsar design philosophy: able to interface with any user data with

any link format (e.g. S-LINK or GbE) via mezzanineMany applications within & outside CDF (compatible with Atlas)

S-LINKPCIGbE

worksup to

100MHz

Top view

CDF


Tested with real L2 trigger data

1.4GHz Linux PC

1.3.2: L2 Upgrade Status (II)Pulsar PC timing

Pulsar to PC round trip timing measured (w S-Link to PCI)With Alpha L2 algorithm code running in Linux PC

Good performance (compare to that of old Alpha)

500MHzAlpha

2.4GHz Linux PC

Pulsar PC roundtrip timing

without L2algorithm

with L2algorithmrunning

PC vs old Alpha algorithm timing

CDF


1.3.3: Fast Track Trigger (XFT II) Status

Lots simulation work doneHave working XFT upgrade simulation

Hardware progress (in parallel with simulation)Most interfaces design do not need to change,primary changes are in the firmware (algorithm)All fully backward compatibleNew Linker: firmware implemented & fully simulated Finder&Linker board design begunStart production by late 2004XFT II ready by summer 05Three new postdocs recently joined (Sept. 2003 -)

CDF


1.3.4: Event Builder Status

Technology decision made (Gigabit Ethernet)VME to switch readout: VMIVME-7805GbE switch: Cisco 6509

Well underway:System design has been decidedFinal system switch orderedReadout test boards orderedExpertise on board (from both CD and CDF)Working prototype by Aug 2004Plan to have new system ready by Summer 2005

CDF


1.3.6: SVT Upgrade (SVT II)

Original plan was only to handle SVX IIb geometryadditional Merger boards + new Track Fitter boards

Now main motivation is to improve SVT efficiency with good timing (critical for high Luminosity L2 latency)

Redundant roads removal @ earlier stage less fitsFiner roads (larger Associative Memory or AM) less fitsImprove track fitting Replace obsolete boards, add additional flexibility Ensure good SVT performance all the way through 2009

CDF


1.3.6: SVT Upgrade (SVT II)

Phase One: (funded by operation money)Use Pulsar as Road Warrior to remove redundant roadsRW firmware successfully tested on Pulsar last month Ready for commissioning early 2004 (Pulsar production)

Phase Two: (AM++ funded by INFN R&D)Replace old AM boards with new AM++ developed for LHCUse Road Warrior to replace Hit Buffer & AM Sequencer(mostly firmware changes, replace obsolete boards,which also provides additional flexibility)

Replace Track Fitter (RunIIb money) All backward compatible, can develop&tune standalone

CDF


Conclusions

Our baseline schedule will not changeWe will work towards earlier completionOur target is to install as much as possible in the summer 2004 and 2005 shutdowns.

We proposed a new baseline cost for the DOE MIE of $10.4M, accepted by the DOE on 8 December.

By Fall 2005, CDF will be ready for operation at 3 × 1032cm-2s-1

CDF


Rebaselined Cost Estimate

Contingency per subproject is from 2002 low level estimate –*scaled by use to dateNew DOE MIE total cost drops - $24,987K → $10,374K

All costs shown are total (M&S/Labor/Overhead), in current year $K

Baseline ($K) New Scope ($K)Cost Cont.* Cost Cont.

Silicon 12,008$ 5,145$ 2,527$ 396$ Calorimeter 342$ 335$ 342$ 335$ DAQ 3,788$ 1,678$ 3,788$ 1,678$ Admin. 1,285$ 407$ 1,006$ 302$ Total 17,422$ 7,565$ 7,663$ 2,711$

CDF


New L2: Pulsar FormationPulsar pre-processors

muon

trackL1 triggerSVT

PC 0

SLINK

PC 3

PC 1

PC 2

TriggersupervisorPCI SLINK

muon

cluster

electron

merger

merger

L2toTS

SLINK PCIL2 CAL

ShowMax

• Pulsar’s self-testability allows us to develop&tune the upgrade standalone

• then run parasitically with CDFaim at fall 2004

• minimal impact on data taking merger

L2 Commissioning strategy

Buffer 0 & 3

Buffer 1 & 2

CDF


Pulsar will be used as Road Warrior

SVT data out

SVT data in

SVT data inSVT data in

Control FPGA

DataIO FPGA 1

DataIO FPGA 2

VME chip

SRAM

SRAM

SVT

2 SLINK

SVT input

SVT output

P2 SVT inter-commLines(5):Master&Slave

Pulsar RW will also replace Hitter Buffer and AM Sequencer

CDF


Why do we want 4/5?

4/4

4/5D0

D01.58

1.59 ±0.05

1.5

1.55 ±0.06

R

Bs MC after offline reconstruction (Ivan F.)

Bs MC(Pt_b>5.5; |η_b|<1.3)

974663J/psi yield

17.5 (nb)

11.2 (nb)D0 yield

4/54/4source

CDF


SVTtiming0Entries 6722Mean 20.47RMS 3.037

0 20 40 60 80 100 120 140 16010

-4

10-3

10-2

10-1

SVTtiming0Entries 6722Mean 20.47RMS 3.037

SVT timing 4/5 – upgraded 4/5 – 4/4

Upgrades:T(4/5) → T(4/4) !

µs

After upgrade

Current (4/5)

CDF


4/5

SVT is running right now @4/5

ROAD WARRIOR + AM ++ bring us back to the old 4/4 timing, with better efficiency!

239.3128 kpatt 4/5 + RW

4217.632 kpatt 4/5 + RW

9439.132 kpatt 4/5 (now)

9.43.932 kpatt 4/4

# of fits# of fitsSVTconfiguration

Z bbB physics

Ghost removal 4.3 14.5

CDF


What does the new Hardware do?

How to speed up SVT:

1. Thinner roads (larger AM) → less fits.

2. Road Warrior → ghosts removal

Hit Finders

Merger

Associative Memory

Hit Buffer

Track Fitter

to Level 2

COT tracks fromXTRP

12 fibers

hits

roads

hits

x 12 phi sectors

Sequencerraw data fromSVX front end

Larger AM

Road Warrior

Single Hit

Superstrip

Road

Det

ecto

r Lay

ers

CDF


AM++

Replace old AM boards with 1 AM++/wedgeIncreased pattern density: standard cell chips (2K [↔128] pattern/5x5 mm)Potentially larger I/O bandwidthProvide backward compatibility with older hardwareCan house potentially up to 1Mpattern!

CDF


AM++ schedule

• New AM-board: summer 2004 (Pisa)during summer 2004: test with FPGA chips (Pisa)

•AM-chip design: july 2004 (Ferrara-Pisa)first chip ~2 months → october

• New LAMB: assemble AM-chip in october 2004 (Pisa)

• test chip + board: october – december 2004 (Pisa-Ferrara)

• Mass production: beginning 2005 (Pisa-Ferrara)• install: summer 2005 (Pisa-Ferrara)

CDF


Impact on data taking•Boards can be completely developed and tested in test-stands

•Algorithm development & tuning may requiresome test runs

•Overall the experiment dead time will come from:

•Boards swapping

•Development/modification of online code

•Everything will be back-compatible: virtually no point of no-return!

CDF


Flexibility

The larger AM bank allows new strategies:1. Narrower patterns to improve timing2. Trigger bit dependent patterns3. (L1) Lepton seeded pattern recognition4. Standalone Si trackingAs an example we tried to merge 3. And 4. To build a forward z→µµ trigger!

CDF


In a glimpse..

213126+ η match

0.50L2 Eff.

22L2 Rej.

362132match ∆φ<2.5ºPt>4 & χ2<10

4678250L1_MU

# L1_BMU_REAR# Z0Selection

•Efficiency @ L2: study Z0→µµ from data• Back. Rejection: L1 backup from data

CDF


Upgrading the Track Fitter

The current TF cannot handle 1Mpattern (current limit is [16x]32K patterns)

Current design is based on ageing components at their fullestit would not accommodate:

Handling of a large pattern bankHandling of different patterns for different trigger strategiesHandling of >4 detector layers (e.g. if we want to add lepton ID/TOF information to the SVT fit)

CDF


SVT upgradeINFN Pisa

A. Annovi, A. Bardi, P. Catastini, M. Dell’Orso, P.Giannetti, L. Ristori, F. Spinella

INFN FerraraDamiani, Sartori, R. Tripiccione, Cotta, Chiozzi

INFN TriesteS. Belforte

LBNLA. Cerri

CDF


Back up slides

Man power (just in case they ask)need a full list of names for each project, but couldn’t findthe full list some projects…. Experts, please help.

Motivation (just in case we need to remind people),although this talk is just for STATUS.misc

Backup slides are for possible questions, most of them will notshow up in the actual pdf file sent to PAC

The part will be sent to PAC is slide 1-17

CDF


Calorimetry Upgrade

University of TsukubaINFN (Pisa, Rome)JINR (Dubna)Argonne National LaboratoryMichigan State UniversityRockefeller UniversityFNAL

Texas A&MINFN (Frascati)University of ChicagoUniversity of MichiganArgonne National LabFNAL

Electromagnetic TimingPreshower/Crack

Steve Kuhlmann, Level-2 Manager

Joey Huston, Level-3 Manager Preshower

Dave Toback, Level-3 Manager EM Timing

CDF


TDC Upgrade: people

University of ChicagoEngineers: Harold Sanders, Mircea BogdanPhysicist: Henry Frisch

FermilabPhysicist: Ting MiaoEngineers:

Looking for new people to get involved

CDF


XFT Upgrade: people

Ohio State UniversityRichard Hughes, Kevin Lannon(pd), Ben Kilminster(pd), Brain Winer

University of IIIinoisMike Kasten(eng), Suzanne Levine(gs), Ryan Mokos (eng), Kevin Pitts, Greg Veramendi(pd)

New groups are getting involved:Purdue University (Matthew Jones et al.)Rutgers University (John Conway, Amit Lath et al.)Fermilab (engineering/technician support)

CDF


Related to CDF L2 decision crate upgrade:• ANL

R. Blair, J. Dawson, B. Haberichter, J. Schlereth, J. Proudfoot• FNAL

R. Demaat, M. Hakala, R. Kivilahti, J. Lewis, C. Lin, T. Liu, T. Masikkala, F. Marjamaa, J. Patrick, S. Pitkanen, B. Reisert, P.Wilson

• Univ. of ChicagoM. Bogdan, Y. Kim, W. Fedorko, H. Frisch, S. Kwang, V. Rusu, H. Sanders, M. Shochet

• UpennK. Hahn, P. Keener, J. Kroll, C. Neu, F. Stabenau, R. Van Berg, D. Whiteson, P. Wittich

The project first started as a project (with few people) to build a test-stand tool …

Pulsar project

CDF


Pulsar has attracted many good young peoplenew generation of L2 experts !

After prototype success last year, many young people joined the project this year:

Burkard Reisert (FNAL RA, from H1): Jan. 2003 -Cheng-Ju Lin (FNAL RA, SLD): Jan. 2003 -Chris Neu (Upenn postdoc, CDF): Oct. 2003 –Vadim Rusu (Chicago postdoc, SNOW): Oct. 2003 –Dan Whiteson (Upenn postdoc, D0): Dec. 2003 –Shawn Kwang (Chicago student, 2rd year): Jan. 2003 –Wojciech Fedorko (Chicago, first year): Oct. 2003 -Kristian Hahn (Upenn, third year): Jan. 2003 –Hans Stabenau (Upenn, 2rd year): May 2003 -

CDF


Core team:

Markus Klute (MIT)

Bruce Knuteson (MIT)

Ron Rechenmacher (Fermilab)

Sham Sumorok (MIT)

Steve Tether (MIT)

Event Builder Upgrade

CDF


Calorimetry Upgrade Motivation

Maintain capabilities of current Preshower detector, used in over 100 papers.Preshower expected to suffer high occupancy and aging effects in Run IIB.Preshower and Crack detectors expected to provide 5-10% Jet Energy Resolution improvement, part of the 20-30% needed improvement for the Higgs search.

Electromagnetic timing needed to reject photon backgrounds from cosmic rays, in new physics searches such as SUSY.

CDF


Preshower/Crack Detectors

CDF


Electromagnetic Timing

• Virtually identical to existing system on hadron calorimeter

• Re-use electronics and well-established technologies

• Add splitters for CEM. PEM already readout-ready

• Build more ASD’s• Recycle TDC’s, crate and

tracer. Purchase new power supply and processor

e, γγ

Light

Photo−Multiplier

Tube (PMT)

Electro−Magnetic

Calorimeter(CEM, PEM)

anode

TimingOutput

VME Crate(detector)

PMTBase

Data Acquisition System (DAQ) VME Crate

(upstairs)

CDF EM Timing Project

EnergyOutput

1st Floor

On Detector

TransitionBoard

AmplifierShaper

Discriminator(ASD)

Time− to−Digital

Converter(TDC)

220 ft

splitteror dynode

CDF


MotivationThe DAQ/Trigger upgrades presented here are driven exclusively by our Run IIb trigger and data acquisition needs to carry out our high-pT physics programOur current level of understanding is based upon

Run IIa data: L ≤ 2x1031 cm-2 s-1, ~1 interaction per crossingRun I data: L ~2x1031 cm-2 s-1, ~2 interactions per crossing

We are extrapolating to Run IIbL = 2x1032 cm-2 s-1 w/396ns bunch spacing (~5 int/beamX)Due to significant uncertainties in extrapolation, and a desire to be prepared for success, we have evaluated our system for: L = 4x1032 cm-2 s-1 w/396ns bunch spacing (~10 int/beamX)

CDF


Trigger StrategyFocus on Higgs & high pT searches

Know that triggers needed for these modes will allow for many beyond Standard Model searches

General requirements:High pT electrons and muons- Associated WH/ZH modes, also t→Wb

Missing ET triggers- ZH with , modes with taus

b-jet triggers - , b-jets tagged by displaced tracks

Calibration triggers- , J/ψ→µ+µ−, photons

Z νν→

H bb→

Z bb→

CDF


Run IIb Trigger Tabletrigger path σL1(nb) σL2 (nb) σL3 (nb)High ET electron 1,500 170 30Plug electron + missing ET 771 55 10High PT muon (CMUP) 1,773 200 8High PT muon (CMX) 1,773 200 82 high pT b-jets 10,840 200 10missing ET + 2jets 163 126 13jets 6,500 42 12missing ET overlap 163 3Photons overlap 50 15J/ψ→µ+µ− 850 38 10High PT jets 19,000 60 17hadronic top overlap 50 5di-τ 5,000 50 4missing ET+τ overlap 50 4High ET photons 13,500 110 21dileptons, trileptons 1,000 190 45total 59,200 1904 215rate @4E32 25kHz 750Hz 85Hzrejection factor ~100 ~33 ~9

CDF


Summary of Run IIb specifications

Level 1 Accept rate: >25kHz (spec 50kHz)deadtimeless

Level 2 Accept rate: 750 Hz →bursts to 1.1kHzL2 processing deadtime < 5%readout deadtime (on L2A) < 5%

Level 3 Accept rate: 85HzEvent builder rate: 400MB/sOutput data rate: 40MB/s

Reminder: trigger & bandwidth rates estimated based upon Run IIa, significant underestimate possible (assumes linear growth in fake contribution)

CDF


CDF Data Acquisition System

Level 1 trigger pipelined and “deadtimeless”fully synchronousdesigned for 132ns operationon L1A, write data to 1 of 4 local L2 buffers

Level 2 triggerasynchronousL1 + supplemental info

Level 3 triggerfull detector readoutPC farm runs reconstructionoutput to mass storage

CDF


Trigger/DAQ Upgrades for Run IIb

General considerations:upgrades “targeted” to specific needs

e.g. COT TDCs replaced, but remaining COT readout (ASDQ, repeaters) unmodified

retain existing infrastructurecables, crates unchangedI/O protocols, timings retainedupstream/downstream components unchanged

upgrades plug compatible with existing components

take advantage of knowledge & experiencewill aid in commissioning

CDF


TDC Replacement

Limitations of current system:TDC on-board data processing

existing system performs hit processing after L2Aprocessing time (=deadtime) grows with # of hitsCOT occupancy higher than expectedRun IIa processing time too large for Run IIb

VME readout16 TDCs per crate read out serially by VME block transfer- current VME transfer rate 14MB/s with additional overhead per board- Run IIa, 300Hz…falls to ~150Hz (!) in Run IIb

Data transferTRACER→TAXI→VRB link provides bandwidth limitation- maximum TAXI →VRB is <12MB/s…Run IIb requires 14MB/s

CDF


Run IIb TDC Performance

TDC (on-board) processing time [time after L2A]

Now: slowest TDC >650µs/eventNeed ~360µs to achieve 1kHz L2A rate

VME readoutCurrently: ~ 500µs per crate Run IIb: x10 more data ⇒ >1ms

Data transferRun IIb: expect 14MB/s, TAXI link limited to <12MB/s

Internal CDF TDC Review committee convened in June Conclusion:

existing COT TDCs + VME readout system cannot maintain necessary L2A rate in Run IIb TDC system must be replaced OR significant modifications to the DAQ & infrastructure must take place

Specification: entire TDC readout must be completed within 600µs to handle 1.1kHz rate ⇒ 14MB/s.

CDF


New TDC Design

Address on-board processing deadtime by moving hit processing into the L1→L2 transition

“hide” hit processing behind L2 triggerAddress VME and Readout problems via bypassing the VME→TRACER→TAXI

Keep existing data path as a backup (commissioning)Maintain other pieces of DAQ chain (VRB →EVB)

Design exclusive to COT system, reduces constraintsRun IIa TDC will continue to work well for other systems (muons, hadron timing, CLC)

CDF


TDC SpecificationsBackward compatible with existing system

No change to COT front-end, cables or calibrationNo change to track trigger (XFT) interfaceAccept CDF specific signals from CDF_CLOCK/TRACER

Must handle the following rates50kHz L1A, 1.1kHz L2AReadout time below 500µs with 20kB/crate

Allow for on-board data compressionPerform hit finding for track trigger“TDC Specifications” document provides details

CDF


New TDC Design

Done with Altera Stratix FPGAcommercially availablehigh bandwidth differential input ⇐ matches COTsufficient on-chip logic & memory to carry out all needed functions (with room to spare)moderate price

Time-to-digital conversion performed on chip input840MHz LVDS inputs not sensitive to routing issuesremainder of FPGA functionality digital

CDF


TDC Readout

A few options for TDC readoutReadout by G-link: data concentrator VRBVME-PCI then to PC (commercial)VME-GbE (commercial)

TDC will support Run IIa VME readout for commissioning

will be able to install new TDCs into existing system for testing and timing resolution studies

CDF


Run IIa Track Trigger System

XFT works by finding line segments in the four axial superlayers

“finder” boards

Tracks are found by linking the segments into tracks

“linker” boards

Stereo superlayers

(unused in XFT)

Interaction point

CDF


Run IIa Track Trigger System

Lv1 trackingtrigger cable

(220 ft)

168 TDCfrom COTaxial layers

24 crates

48XFT Finder

3 crates

24XFT Linker

3 crates

12XTRP

mezzanine cardon detector

1st floor counting room

CDF


XFT UpgradeTrack-based triggers are responsible for >50% of the Run IIb physics program

e, µ, τ, b-tags

COT occupancy at high luminosity causes significant L1 track trigger (XFT) degradation

Significant growth in fake track rate (primarily at high pT)Degradation in pT and φ0resolution (next slide)

Minimum bias MC events

CDF


XFT pT & φ0 Resolution

+0 minimum bias events

Data: high pT electrons



pT φ0

L = 2x1032 cm-2 s-1 @396ns

L = 4x1032 cm-2 s-1 @396ns

L = now

CDF


XFT IIb DesignReduce fakes and improve resolution with improved axial track finding & 3D information Take advantage of existing design and infrastructure

Cables, I/O, data formats unchanged

Difference between XFT & offline tracking is time binning. Segment angle match improves with finer time bins.

Upgrade:Utilize 396ns baseline to pipe more information per beam-X from TDC→XFT.

Go from two time bins to six time bins in the triggerSupplement axial tracking with stereo measurement

Segment finding identical to axial XFTStereo information provides:- improved fake track rejection (important at high L)- new: electron & muon matching in η

CDF


XFT Upgrade Performance

Additional timing information plus stereo provides high efficiency for tracks while keeping the fake rate low

Plots shown are for 10 interactions/crossing

high efficiencylow fake rateimproved pT and φ resolution

CDF


DAQ/Trigger SummaryThese are the pieces of the CDF Front-end, Trigger and Data Acquisition system we need to upgrade/update to carry out a high pT physics program

TDC replacementXFT upgradeSVT upgradeL2 replacementEvent builder/L3 upgrade

The remainder of the Run IiaCDF front-end/trigger/DAQ system will perform well throughout Run IIb

CDF


Event Builder/L3 Upgrade

Full detector readout occurs on Level 2 trigger accept

Event Buildersubsystems send data to VRBsEvent builder accepts data from VRBs, assembles the full event

Level 3 Triggerevent sent: EVB→L3 PC farmsingle PC node per event runs reconstruction & trigger algorithmsgreater rejection at L3 needed in Run IIb

Det

ecto

r Rea

dout

pat

h

CDF


Assumed luminosity was 4 x 1032

Justification was high-pTprogram

These triggers give 750 Hz

→ Rate spec is 1 kHz

Event size assumed to grow

→ Size spec is 500 kB

→ Throughput spec is

500 MB/sec

Event Builder Upgrade

CDF


DØ has a system that runs at our spec (1 kHz, 250+ kB/event)

Put together in a year by a core team of ≈ 6 people

Made use of off the shelf, Ethernet-based hardware

Our strategy: Make use of a demonstrated, working solution to the same problem to implement a system appropriate for CDF

CDF


Level 3 PC Farm UpgradeMore Level 3 PC processing power is required for Run IIb

reconstruction takes longer- higher occupancy

trigger algorithms more elaborate- greater rejection required

sam ple M ean C P U tim e(seconds)†

t-tbar + 0 m in im um b ias 0 .82±0.03t-tbar + 5 m in im um b ias 2 .66±0.10t-tbar + 10 m in im um b ias 5 .93±0.19t-tbar + 15 m in im um b ias 8 .32±0.67

† CPU time to run COT tracking on offline analysis computer (fcdfsgi2). Tracking code not optimized for higher luminosity conditions.

Purchase processors at constant rate over 3 years of project Expect processor improvements will keep up with our growth in L3 needs throughout Run IIb

increased complexity of events offset by improved processing power

CDF


Nov. 12, 2002

2b or not 2b this is no longer the question

Goal is for: 3 × 1032cm-2s-1

• All non-silicon upgrades will NOT change, the scope is right

• a portion of silicon tasks remain(take care current detector)

New baseline accepted by DOE,endorsed by CDF internal review

Strong commitment to see all the projects through…

Documents

Status of the Run IIb CDF Detector Upgrade Projecthep.uchicago.edu/~thliu/projects/Pulsar/Pulsar_doc/Ted... · 2005. 4. 18. · CDF PAC - 13 Dec 2003 Ted Liu - 3 Project Scope (I)