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Stacked Signal TSV for Thermal Dissipation in Global Routing for 3D IC Po-Yang Hsu, Hsien-Te Chen, TingTing Hwang National Tsing Hua University, Taiwan

Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

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Page 1: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

Stacked Signal TSV for Thermal

Dissipation in Global Routing for

3D IC

Po-Yang Hsu, Hsien-Te Chen, TingTing Hwang

National Tsing Hua University, Taiwan

Page 2: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Outline

• Introduction

• Motivation

• Stacked-TSV Assignment & Relocation

• Experimental Results

• Conclusions

2/34

Page 3: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

3D IC

• 3D IC reduces the interconnect delay and

integrates heterogeneous components

• High power density and lower thermal

conductivity produce critical thermal issue

3/34

Page 4: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Heat Dissipation in 3D IC

• The heat dissipation in vertical direction is the

critical issue in 3D IC

• Thermal conductivity of Si is much better than

oxide material

Thermally insulated materials

4/34

Page 5: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Related Work

• Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

– Cong and Zhang “Thermal via placement in 3D ICs”, ISPD’05

– Goplen and Sapatnekar “Placement of thermal vias in 3D ICs using various

thermal objectives”, TCAD’06

– Wang et al. “Rethinking thermal via planning with timing-power-temperature

dependence for 3D ICs”, ASP-DAC’11

• Thermal aware routing and placement – Pathak and Lim “Performance and thermal-aware Steiner routing for 3-D stacked

ICs”, TCAD’09

– Cong et al. “Thermal-Aware Cell and Through-Silicon-Via Co-Placement for 3D

ICs”, DAC’11

– Chen et al. “A new design architecture for power network in 3D ICs”, DATE’11

Extra via overhead

Without fully utilization of stacked signal TSV 5/34

Page 6: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Outline

• Introduction

• Motivation

• Stacked-TSV Assignment & Relocation

• Experimental Results

• Conclusions

6/34

Page 7: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Non-stacked TSV vs. Stacked Signal TSV

Heat sink layer

Non-stacked signal TSVs Stacked signal TSVs

7/34

Page 8: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Temperature Comparison of Stacked

TSV and Non-stacked TSV

• Stacked TSV has better thermal dissipation

8/34

Page 9: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Temperature vs. Distance of Stacked TSV

9/34

Page 10: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Outline

• Introduction

• Motivation

• Stacked-TSV Assignment & Relocation

• Experimental Results

• Conclusions

10/34

Page 11: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Problem Definition

• Input:

– 3D cell placement result

– TSV budget

• Output:

– 3D cell and TSV placement result

• Objective:

– Wirelength

– Temperature

11/34

Page 12: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Overall Flow

TSV budget 3D cell placement result

Stacked-TSV assignment

Stacked-TSV relocation

3D cell and TSV placement result

1: Wirelength

2: Temperature

1: Temperature

2: Wirelength

12/34

Page 13: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

• Assign TSV within bounding boxes for each

inter-tier net no wirelength overhead

• Place as many stacked signal TSVs as possible

reduce temperature

Stacked-TSV Assignment Stage

source terminal TSV

13/34

Page 14: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Stacked TSV Assignment Flow

Select an inter-tier net

Current tier = second bottommost tier of the net

Find candidate grids by Steiner tree

Place TSVs by gain function

Topmost tier? No

Yes

Rip-up and re-assignment TSV for critical region

All nets are

performed ?

14/34

Page 15: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Find Candidate Grids by Steiner Tree

Construct 2D Steiner tree

Map adjacent tier sinks to 2D plane

Aerial view Grid view

source terminal

Tier 1

Tier 2

Tier 3

1 2

3 4

15/34

Page 16: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Gain Function for Candidate Grids

• Select the TSV location by a gain function

– Grid with larger gain value is selected to place signal TSV

PowDensityi,j,k Power density in grid (i,j,k)

TSVNumi,j,k Number of signal TSVs in grid(i,j,k)

SDi,j Stacking degree in grid (i,j)

SDB < SDA

B

A

kji

n

kkji

jikji

TSVNum

PowDensitySDGain

,,

1,,

,,,

16/34

Page 17: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Signal TSV Placement

• For the given TSV budget N, we select N

candidate grids which have largest gain values

2D Steiner tree

If TSV = 1

If TSV = 2

Tier 1

Tier 2

Tier 1

Tier 2

17/34

Page 18: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Rip-up and Re-assignment TSV for

Critical Region

• Re-assign TSVs in overflow grids to nearby grids

that have whitespace

• Re-assign TSVs in congested grids to nearby

low routing demands grids

High routing demand

Sufficient whitespace

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Page 19: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Overall Flow

TSV budget 3D cell placement result

Stacked-TSV assignment

Stacked-TSV relocation

3D cell and TSV placement result

1: Wirelength

2: Temperature

1: Temperature

2: Wirelength

19/34

Page 20: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

• Not all hotspot grids are near the candidate grids

in bounding boxes

• Relocate stacked signal TSV to the hotspot grid

outside the bounding boxes with minimum wiring

overhead

Stacked-TSV Relocation Stage

hotspot

source terminal TSV

Stacked signal TSV 20/34

Page 21: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Stacked TSV Relocation Flow

Current tier = the bottommost tier

Hotspot grids identification in current tier

Matching saver nets and hotspot grids

Determination of stacking grid

Topmost tier?

No

Yes

Re-computation of thermal distribution

Current tier ++

output

21/34

Page 22: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Explore Saver Nets

Critical hotspot identification Hotspot source terminal

kji

n

kkji

kji

TSVNum

PowDensityThermalCri

,,

1,,

,,

Saver net

22/34

Page 23: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Hotspot grids Saver nets

Select Pairs of Nets and Grids

(wirelength overhead) (heat dissipation ability) greeStackingDeGridDistngEdgeCost ),(

Grid Distance

hotspot

Stacking Degree

hotspot

Net 1 Net 2

(Net1 > Net2)

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Page 24: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Place Stacked TSV by Gain Function

n

k

n

kkjikjijiji TSVPowerDSSTGain

1 1,,,,,,

t

bk

t

bkkjikji WLWSDens ,,,,

Hotspot grids

A

B

C

Saver nets

2

1

3

A

DSST = Distance to hotspot grids

Power = Power density

TSV = TSV count

WSDens = Whitespace

WL = Wirelength

Candidate target grid

Thermal Wirelength

DSST

Power

TSV

WSDens

WL

24/34

Page 25: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Outline

• Introduction

• Motivation

• Stacked-TSV Assignment & Relocation

• Experimental Results

• Conclusions

25/34

Page 26: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Experimental Environment

• Benchmarks are from reference work [5]

• 3D placement results produced by a partitioning-

driven placement for 3D IC [5]

• Use FLUTE [19] to estimate global routing wirelength

• The topmost layer of chip and ambient temperature

set to 25 ℃

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Page 27: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Wafer thickness 50 um 6670 (um * K/W)

TSV size 25 um2

2500 (um * K/W)

Interposer thickness 100 um 3*106 (um * K/W)

Low-K thickness 2 um 106 (um * K/W)

SiO2 of TSV thickness 0.2 um 106 (um * K/W)

Power dissipation 1 ~ 107 W/cm2

Key Parameters

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Page 28: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Experimental Results

• Baseline result [5]

• Thermal-TSV insertion method [1]

28/34

Page 29: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Routing Congestion Results

• 3D Elmore delay model [11] is used to estimate

maximum delay value

29/34

Page 30: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

# Stacked TSVs vs. Temperature in ckt1

30/34

Page 31: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Analysis of Each Step

31/34

Page 32: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Outline

• Introduction

• Motivation

• Stacked-TSV Assignment & Relocation

• Experimental Results

• Conclusions

32/34

Page 33: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

VLSI/CAD

Conclusions

• An algorithm is proposed to construct stacked

signal-TSVs for heat dissipation

• The experimental results show that our

algorithm has 17% temperature reduction

with 4% wiring overhead

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Page 34: Stacked Signal TSV for Thermal Dissipation in Global ... · VLSI/CAD Related Work • Thermal via insertion method – Zhang at el. “Temperature-aware routing in 3D ICs”, ASP-DAC’06

Thank You