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CHAPTER
5Sputtering Targets and Thin Films forIntegrated Circuits
5.1 IntroductionThis chapter is devoted to commercially important materials that are either sputtered in pure form
(e.g., Al, Al-0.5Cu, Cu, NiV, Ti, W, W-Ti) or reactively using gases (e.g., Ti, Ta) to form a variety
of thin films for integrated circuit (IC) manufacturing [1�6]. These sputter-deposited thin films are
used for forming silicide contact, conductor, liner, wetting layer, adhesion layer, anti-reflection
coating, barrier, self-forming barrier and so forth.
Figures 5.1 and 5.2 show examples of such material applications in the interconnect formation
and also assembly and packaging (back-end processing) of chips [7,8]. Readers are encouraged to
refer to section 1.3 of Chapter 1 and also Table 1.10 and 1.11 to identify specific materials and
their place in multilayer stacks used in IC manufacturing.
It is also important to revisit types of commercially available sputter tools used for depositing
such thin films. Different original equipment manufacturers (OEMs) supply application-specific
sputtering tools. For example, Table 5.1 (p. 293) lists a number of sputter tools by Applied
Materials, against specific applications, used in the manufacturing of ICs [8]. Note that while this
book was being prepared, the EnCoRe RFX sputtering tool for barrier/copper seed application aim-
ing at 32 nm and 22 nm technology nodes was released.
In this chapter each section is devoted to a particular material. First, we discusses the methods
of optimizing sputtering target properties considering the metallurgical practices and then character-
istics of sputtered thin films in relation to the sputtering process parameters. Note that the advanced
salicide processes based on nickel and cobalt are discussed in Chapter 7 and only titanium based
silicides are discussed in this chapter.
5.2 TitaniumSputtered Ti, TiN and Ti/TiN thin films are widely used in the semiconductor industry as cap, liner,
glue, anti-reflection coating, diffusion barrier and so forth. Titanium has two allotropic forms, i.e.,
hcp α titanium (α-Ti) and bcc β titanium (β-Ti). This transformation takes place at 882�C for high
purity titanium, but exact transformation temperature depends on the purity of the material.
Figure 5.3(a) (p. 293) shows the unit cells of hcp α-Ti phases at room temperature [9]. Three most
densely packed crystallographic planes in α-Ti are (0002), {1010} and {1011} planes. These are
also identified as basal, prismatic and pyramidal planes. The closed pack directions are ,1120..
Figure 5.3(b) (p. 293) shows the unit cells of bcc β-Ti phases at 900�C [9]. The basic properties of
α-Ti are given in Table 5.2 (p. 294).
291J. Sarkar: Sputtering Materials for VLSI and Thin Film Devices. DOI: http://dx.doi.org/10.1016/B978-0-8155-1593-7.00005-9
© 2014 Elsevier Inc. All rights reserved.
FIGURE 5.2
Example of metals used in UBM and bond pad applications [8].
FIGURE 5.1
Example of metals used in CMOS device [7].
292 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Table 5.1 Standard Processes and Applied Materials Sputtering Tools for
Various Applications [8]
Application Chamber
Front end metallization Standard Co
Standard Ni
ALPS Co
PVD Clean W
Liner/Barrier IMP Ti
Barrier/Cu Seed SIP EnCoRe Ta(N)
SIP EnCoRe Cu
Al interconnect Hot Al
ALPS Al
SIP TTN
Al
Durasource TTN
Back end metallization (UBM/Bondpad) Standard PVD Cu
Standard PVD Ta(N)
Standard PVD Ti
Standard PVD Cu-Cr
Standard PVD AL
NiV
<1123>
<1120>
a2
(a) (b)a1
a3
a
a
a
c
0.332 nm
(110)
{1122}
(0002)
{1011}
{1010}
FIGURE 5.3
Crystallographic directions and planes of (a) hcp α-Ti and (b) bcc β-Ti [9].
2935.2 Titanium
There are one octahedral and two tetrahedral sites per titanium atom. If the titanium atoms are
regarded as rigid spheres of radius “r” and these are in contact along the closed-packed direction,
the maximum radius of the sphere that can fit into an octahedral or tetrahedral site would be 0.41r
and 0.22r, respectively. The octahedral and tetrahedral interstitial hole sizes in α-Ti are 0.61 A and
0.33 A, respectively.
Table 5.3 lists the neutral atomic radius of O, C and N, volume expansion of the titanium lattice
and also maximum solubility of these elements in α-Ti phase [9,10]. Hence, interstitial elements
such as O, C and N occupy the octahedral sites in hcp α titanium. These elements raise the solvus
temperature and hence are regarded as α phase stabilizers. In the case of commercial purity (CP)
grade titanium, the oxygen content and also the content of other impurities can vary significantly.
Table 5.4 lists some of the variants of CP grade α-Ti, which have different mechanical proper-
ties because of the varying impurity content [9�11]. One of the prominent substitutional elements
that stabilizes the α phase is Al. Other α stabilizing elements are B, Ga, Ge and rare earth
elements, but their solid solubilities are much lower than O or Al. β stabilizing elements can be βisomorphous elements (V, Mo, Nb, Ta) or β eutectoid forming elements (Cr, Fe, Si, Mn, Cu, H).
Sufficient concentration of β isomorphous elements in titanium can stabilize the β phase to room
temperature.
Table 5.2 Properties of α-Ti
Property Value
Atomic number 22
Atomic weight (amu) 47.867
Crystal structure at RT HCP
Density (kg/m3) 4507
Melting point (�C) 1668
Linear thermal expansion coefficient (k21) 8.631026
Thermal conductivity (Wm21k21) 21.9
Electrical resistivity (Ωm) 40.03 1028
Young’s modulus (GPa) 116
Vickers hardness (MPa)� 970
�Grain size dependent.
Table 5.3 Neutral Atomic Radius, Volume Expansion of the Lattice and the Maximum Solubility of
the Interstitial Elements In HCP α Titanium [9,10]
Interstitial element Neutral AtomicRadius (A)
Volume Expansion(A3 per at%)
Max. Solubility(at%)
O 0.60 0.13 30
N 0.71 0.18 19
C 0.77 0.49 2
294 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Titanium has strong affinity for oxygen, nitrogen and hydrogen above 565�C. Therefore, usageof titanium should be below this temperature to avoid embrittlement of the material. Titanium can
also become embrittle, under certain conditions, in contact with silver, cadmium, mercury and
some of their compounds. Titanium is known to have good corrosion resistance but chemical reac-
tion can take place between titanium and selected environments such as methyl alcohol, chloride
salt solutions, hydrogen and liquid metals.
Usually α-Ti is available in all familiar shapes (e.g., rectangular bar, rod, sheet). This is because αtitanium has excellent formability and also weldability. Though high purity (99.995�99.9999%) tita-
nium is the most commonly used sputtering material in the semiconductor industry, other grades of
titanium can be used in specific applications. For example, 99.99% and even lower purity titanium can
be used as sputtering material for photovoltaic applications, while CP grade titanium can be used as
the backing plate in flat sputtering targets and as flange material in hollow cathode magnetrons.
Although high purity titanium grades, which have less than 10 ppm metal impurities and less
than 250 ppm oxygen, are in use for liner, anti-reflection coating and barrier application in the
semiconductor industry, a limited amount of literature is available on the processing of high purity
titanium [12�19]. Most metallurgical results comprise CP grade titanium and as a result we will
discuss such results more often than its high purity counterpart.
5.2.1 Titanium processing and property controlCrude titanium in the form of sponge, particles or needles is prepared by various methods. In the
Kroll or Hunter method, a titanium containing compound (TiCl4) is reduced with an element such as
Na or Mg. In an iodide method, a TiI4 compound is thermally decomposed to produce crude tita-
nium. Molten salt electrolysis in salts such as NaCl and KCl is another alternative for crude titanium
production. Acid treatment of crude titanium is known to reduce the impurity level and in particular
heavy metals such as Fe, Ni and Cr. Subsequent arc or electron beam melting of crude titanium in a
vacuum is used to produce ingots. Electron beam melting effectively reduces the Na and K contents.
Figure 5.4 shows a electron beam melted titanium billet that has very large grains [20]. These
cast titanium billets are then thermomechanically processed and heat treated to improve the homo-
geneity of the billets.
5.2.1.1 Thermomechanical processingBefore we discuss the response of α-Ti during thermomechanical processing, the fundamentals of
plastic deformation of α-Ti are presented here. Table 5.5 lists the type of slip systems and their
Table 5.4 Commercial Purity (CP) Grade Titanium and their Mechanical Properties [9]
ASTM Specification O (max.) Fe (max) YS (MPa) UTS (MPa) Elongation(%)
CP grade 1 0.18 0.20 170 240 24
CP grade 2 0.25 0.30 275 345 20
CP grade 3 0.35 0.30 380 445 18
CP grade 4 0.40 0.50 480 550 15
2955.2 Titanium
characteristics [9]. It is important to remember that the nature of slip in titanium is a strong func-
tion of the concentration of interstitial impurities and in particular oxygen and nitrogen [10]. More
pure α titanium deformed predominantly on the prismatic planes, i.e., on {1010}, 1120. slip
system with some on the basal planes, i.e., on {0001}, 1120. slip system, while less pure α tita-
nium showed slip on the pyramidal planes, i.e., on {1011}, 1120. slip system. The critical
resolved shear stress (CRSS) values for {0001}, 1120. and {1011}, 1120. slip systems are
110 MPa and 49 MPa, respectively. In the case of more pure titanium, CRSS for prismatic slip is
well below that for basal slip. In the case of less pure titanium, the difference in CRSS values is
FIGURE 5.4
Image showing large grains in a Ti ingot made using e-beam melting [20].
Table 5.5 Slip Systems in α Titanium [9]
Slip System Type Burgers Vector Slip Plane Slip Direction No. of Slip Systems
Total Independent
1 a (0002) ,1120. 3 2
2 a {1010} ,1120. 3 2
3 a {1011} ,1120. 6 4
4 c1 a {1122} , 1123. 6 5
296 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
much less. This is attributed to the impact of interstitial oxygen atoms on the movement of disloca-
tions on the {1010} prismatic planes than on the {1011} pyramidal planes. An increase in test tem-
perature showed more favored slip on the {1011} and {0001} planes than on the {1010} planes,
the same as increased interstitial impurity in titanium. For a given purity of α-Ti, results from vari-
ous studies establish that the {1010}, {1011} and {0001} planes with Burgers vector a in
,1120. direction are the most common slip systems in order of ease of operation. Evidence of
glide with c1 a Burgers vector has been found from transmission electron microscopy and slip
trace analysis. {1122} and also {1011} slip planes were identified as contributing glide planes.
Similar to bcc and fcc metals, the deformation of hcp α-Ti at ambient temperature starts with
slip. However, because of the symmetry of the lattice and the availability of fewer slip systems,
slip can continue only up to a small strain (, 0.1) and twining becomes significant at moderate
strains [21,22]. It is recognized that slip is essential prior to twining and the accumulation of dislo-
cation is required to create stress concentration, which would nucleate twins. A great deal of evi-
dences suggests that there cannot be universal CRSS values for twining to occur in hcp metals.
This is because the localized stress field required to nucleate twins can be generated by various
means depending on the geometry and orientation of the sample and also the nature of applied
stress. In fact, bent or distorted crystals have shown twins to occur at much lower stresses than
undamaged crystals. A common feature, the cold deformed α-Ti microstructure is the occurrence
of lenticular twins. The development of twins takes place rapidly with increasing strain. Optical
micrographs in Figure 5.5 show an increase in the twin density with increasing strain in α-Ti [22].Figure 5.6 shows a sharp increase in the volume fraction of twins between a true strain of 0.1 and
0.2 before it saturates at larger strains [23]. Further deformation by slip is possible within the twins
because of the re-orientation of the crystal in the twinned regions.
The majority of sputtering target manufacturers procure high purity titanium billets from chosen
suppliers. These billets are further processed to improve the homogeneity of the material and to
achieve desired shape and size. In most cases, prior to the final annealing, cold rolling of titanium
is preferred for the manufacturing of α-Ti sputtering targets and as a result concurrent development
of crystallographic texture as a function of strain becomes an important aspect of thermomechanical
processing.
A significant number of studies have been focused on the development of texture during cold
rolling of α-Ti, and it is recognized that twining ceases above 40% deformation and slip becomes
dominant at larger strains. Cold rolling experiments on recrystallized α-Ti clearly show that a split
rolling direction texture formed at 20% deformation and further deformation leads to texture transi-
tions from the split rolling direction to the split transverse direction [24].
Figures 5.7(a-c) (p. 299) show the texture transitions from the split rolling direction at 20%
deformation to the split transverse direction at 40% deformation in the (0002) pole figure [24].
Twining was responsible for the rapid development of the texture and the transition in the texture.
Each grain deformed on at least two twining systems at 20% deformation level. Formation of small
secondary twins between and within primary twins was favored with further deformation because
of small twining shear in titanium. Transmission electron microscopy study revealed that the major-
ity of the twins belonged to the {1012}, 1011. twining system and some belong to {1122},1123. and {1121}, 1126.. A short annealing treatment of 40% deformed titanium sample at
575�C (for 1 hour) restored the split rolling direction texture recorded in 20% deformed titanium
sample (Figure 5.7(d)) [24].
2975.2 Titanium
FIGURE 5.5
Optical micrographs showing twin development as a function of strain in compression test [22].
0.5
Vol
ume
frac
tion
of tw
ins 0.4
0.3
0.2
0.1
00 0.05 0.1 0.15 0.2
True strain0.25 0.3 0.35
FIGURE 5.6
Twin volume fraction increase in α-Ti with increasing strain in compression test [23].
298 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
A significant change in microstructure was also noted. Secondary twins inside primary twins
were removed because of the annealing and a reduction in dislocation density was also observed.
There are also evidences that every grain in CP grade α titanium did not undergo twining at 30%
deformation. Grains that had orientation close to {1213}, 1010. did not twin [25]. At 80%
deformation, these grains appeared as pancake and were free of twins or any strain markings (called
“white grains”) [25]. A transmission electron microscopy study of these grains showed the presence
of high dislocation density, but no twins or bands. Other studies have reported additional features
of deformed structures such as thin elongated bands caused by the rotation of twins at large strains.
Formation of shear bands was also noticed in the aligned structure because of large strains.
However, the formability of α-Ti was found to be considerably high even at very large strains.
FIGURE 5.7
X-ray (0002) pole figures measured in commercial purity Ti after (a) 20% cold rolling, (b) 30% cold rolling,
(c) 40% cold rolling and (d) after annealing 40% cold-rolled Ti at 575�C for 1 h [24].
2995.2 Titanium
Recrystallization kinetics studies in 80% deformed CP grade α-Ti at 500�C showed a wide vari-
ety of microstructural features (sub-grains, lamellar) with increasing annealing time [25].
Annealing treatment of the samples for one hour did not fully recrystallize the deformed structure
and, in fact, so called “white grains” remained intact, while the remaining microstructure showed
recrystallized grains (Figure 5.8) [25]. On increasing the time of annealing treatment up to six
hours, only a very limited change in texture was recorded during the primary recrystallization pro-
cess. It was shown that most of the texture change took place within the one hour annealing time,
which indicated a rapid variation in kinetics during the primary recrystallization.
Approximately 80% of the material was recrystallized within 40 to 80 minutes (first stage),
and the remaining materials, including “white grains,” took more than 300 minutes to recrystallize
(second stage). This implies that the first stage of the primary recrystallization was rapid while the
second stage was sluggish. However, only 25% of the material recrystallized with a change in ori-
entation towards {1013}, 1210.. Evidence shows that nucleation of recrystallized grains started
in the grains that had twins. Seventy-five percent of the material recrystallized without any orienta-
tion change and this was believed to be due to the occurrence of continuous recrystallization. In
the second stage of primary recrystallization, white grains that had rather homogeneous distribution
of dislocation underwent continuous recrystallization. On the other hand, annealing of the samples
at 700�C for one hour showed significant changes in texture because of the secondary recrystalliza-
tion/grain growth. Details of Ti processing can be found elsewhere [26�35].
As discussed before, Ti used for sputtered thin films are high purity variety and a large number
of patents reveal how microstructure and texture are controlled in planar Ti sputtering targets
FIGURE 5.8
Recrystallized microstructure of T40 grade Ti showing unrecrystallized "white grains.” [25].
300 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
[12�19,36]. Figure 5.9 shows a flow chart for planar titanium sputtering target manufacturing for
semiconductor, photovoltaic and other electronic applications [based on 9,14�17].
Suitable thermomechanical processing routes, using optimized deformation and heat treatment con-
ditions, are used to achieve the desired grain size and crystallographic texture.
Figure 5.10 shows a representative microstructure of high purity recrystallized Ti [37]. Ti tar-
gets with average grain sizes between 5 μm to tens of μm are commercially available for specific
applications. Figure 5.11 shows grain orientation ratios of such a high purity Ti target measured
using x-rays [38]. Systematic study of Ti sputtering for semiconductor applications showed that
high grain orientation ratios from (102) and (103) reflections are favorable for filling narrow
trenches and vias [15,38].
5.2.1.2 Titanium target manufacturingFigure 5.9 shows a representative flow chart for manufacturing high purity planar titanium targets
[based on 9,14�19]. The starting Ti billets are typically hot-worked material. A combination of hot
pressing, hot rolling, cold rolling and annealing steps is used for Ti target fabrication [9,14�19].
Individual manufacturing steps have been discussed in Chapter 4. Optimization of microstructure
and crystallographic texture is achieved by choosing suitable parameters for the above processes. A
semi-finished Ti target is typically subjected to conventional machining operation to achieve
desired shape and dimensions. Both monolithic and bonded (solder and diffusion) Ti targets are
used for electronic applications. In the case of bonded products, Ti targets are bonded to inexpen-
sive backing plates (e.g., Cu alloys, Al alloys).
Typically, Ti targets for 300 mm wafers are diffusion bonded to Al or Cu alloy backing plates.
The most common practice for diffusion bonding Ti to a backing plate is hot isostatic pressing.
Ti billet
Cold rolling
Recrystall.annealing &
flattening
Cleaning &packaging
Metallurgicalevaluation
Finishing (gritblasting, arc
spraying etc.)
Bonding tobacking plate
& NDT
Machining/milling
Hot pressing/hot rolling
Heat treatment
Heat treatment
Hot pressing/forging/rolling
FIGURE 5.9
A representative flow chart for Ti sputtering target fabrication [based on 9,14,17].
3015.2 Titanium
Solder bonding of Ti targets involves application of a low melting solder alloy between the Ti tar-
get and the backing plate to hold them together after solidification of the solder alloy. Ti target
may require a Ni coating prior to bonding. Good bonding is ensured by checking the bond coverage
using non-destructive testing such as ultrasound. Subsequently, Ti targets are finished with required
machining, polishing and grit-basting/arc-spraying operations. On achieving desired external dimen-
sions and surface roughness, targets are transferred to the cleaning section for degreasing, precision
cleaning and packaging.
FIGURE 5.10
An example of recrystallized microstructure of high purity Ti [37].
FIGURE 5.11
X-ray grain orientation ratio measured in a recrystallized Ti sputtering target [38].
302 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
5.2.2 Titanium and titanium nitride thin films5.2.2.1 Film propertiesFigure 5.12 shows some examples of titanium (Ti) and titanium nitride (TiN) thin film usage in the
semiconductor industry [8]. Note that Durasource (DS) and SIP are some of the most important Ti
and TiN (TTN) Applied Materials’ processes for different semiconductor applications, e.g., cap,
FIGURE 5.12
Examples of the usage of Ti and TiN film in various AMAT processes. ( ) denotes chamber technology of
Applied Materials Inc [8].
3035.2 Titanium
liner, glue, anti-reflection coating. Figure 5.13 shows a schematic diagram of a 300 mm SIP Ti
PVD cluster tool by Applied Materials Inc [8]. Ti sputtering targets for both Durasource and SIP
processes are typically diffusion bonded to backing plates (Al and Cu based alloys) for achieving
greater bond strength. In order to increase the life of diffusion-bonded Ti targets, a deep recess was
used in the backing plate to accommodate a thicker Ti target [39].
As far as sputtering conditions and thin film properties are concerned, such information is protected
by OEMs and users. Only published patents and occasionally journal articles provide some general
information about these commercial processes. For a given sputtering tool, deposition of Ti and reac-
tively sputtered TiN films, settings are quite different. For example, in TiN sputtering mode target-
to-wafer spacing and applied DC power are typically increased in addition to the flow of nitrogen in
FIGURE 5.13
Schematic illustration showing a commercial Endura SIP Ti PVD tool of Applied Materials Inc. for 300 mm
wafers [8].
304 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
sputtering gas. For a given set of sputtering conditions, in general sheet resistance and Rs uniformity
of Ti films slightly increases with Ti target usage. Film thickness and thickness uniformity also vary
with increasing usage of the Ti target. In commercial processes, it is a common practice to apply either
power or time compensation to adjust thin film properties with target usage. In some cases, target-to-
wafer spacing is also adjusted with increased target usage to control thin film properties.
TEM examination of sputtered Ti thin films (B90 nm thick) on (001) Si substrate showed the
presence of an amorphous interlayer made of Ti and Si. This layer was formed because of the solid
state reaction between Ti and Si [40]. The thickness of the Ti-Si interlayer was approximately 1 nm
in the case of collimated sputtering. Thickness of this layer increased to 3�4 nm in the case of ion-
ized sputtering. This is attributed to the increased energy of the Ti ions that impinge Si wafer and
increase the temperature of the wafer surface unlike neutrals in the case of collimated sputtering. Ti
film deposited by collimated sputtering showed well-developed coarse grains. Ionized puttering
without substrate bias showed finer grains with strong strain field. On applying substrate bias in
ionized sputtering, fine Ti grains were preferentially found in the vicinity of the Si wafer surface.
The Ti film texture in collimated sputtering was predominantly (0002) basal planes parallel to the
(001) Si wafer surface.
In the case of ionized sputtering, weaker (0002) texture was developed and biasing of the sub-
strate completely eliminated the (0002) preferred orientation. Rather smaller Ti grains were
recorded with lattice fringes of (1011). In sputtering, the reduction in preferred orientation of the
(0002) basal plane parallel to the wafer surface was attributed to the formation of Ti films by ener-
gized Ti ions rather than neutrals. Application of bias to the substrate further enhanced the energy
of the Ti ions and hindered formation of (0002) preferred orientation [40]. Some studies revealed
target power dependence of Ti film microstructure and preferred orientation [41]. For a given set of
sputtering conditions, lower target power produced amorphous Ti films, while higher target power
produced crystalline Ti films [42]. Crystallinity of the Ti film improved with higher sputtering
pressure.
A systematic study of Ti films property evaluation as a function of sputtering parameters, using
a commercial cluster tool (Varian’s S Gun) with a hexagonal patterned collimator and 15 cm diam-
eter (001) Si wafer coated with 100 nm thick SiO2, revealed that: (a) sheet resistance of the Ti film
(5�18 nm) increases with time of exposure to the ambient atmosphere, (b) resistivity of the as-
deposited Ti film decreases with increasing film thickness and eventually saturates at about 60 nm
film thickness, (c) thickness of the Ti film has a linear relationship with deposition rate, (d) grain
size of the Ti film increases with increasing film thickness, (e) Ti deposition rate does not have any
effect on the film grain size and the resistivity, (f) with increasing substrate bias, Ti film thickness
drops after a threshold value of substrate bias and film resistivity increases (up to 112 μΩcmat 2225 V) and (g) Ti film grain size drops with increasing substrate bias [40].
Figure 5.14 shows the interrelationship between film resistivity, average grain size and the Ti
film thickness [43]. Sputtering of the Ti target using Ne produced finer grains in the film for a
given film thickness and residual film resistivity was higher as compared to the Ar sputtering case.
In Chapter 2, we noted the advantage of using ionized PVD for coating deep and narrow features.
Figure 5.15 (p. 307) shows bottom-coverage variation with increased aspect ratio of features such as
vias and trenches [44]. Note how bottom coverage improves with increased Ar gas pressure and coli
RF power. This is attributed to increased ionization of Ti in ionized PVD. This subject has been dis-
cussed in greater detail in Chapter 2.
3055.2 Titanium
Deposition of TiN using reactive sputtering has been studied extensively because of its diffusion
barrier property, high thermal and chemical stability and also low resistivity. TiN has fcc cubic
structure (NaCl type) with a 4.24 A lattice constant. Figure 5.16 (p. 308) shows a cross-sectional
TEM micrograph of 100 nm thick TiN film sputter deposited on a (100) oriented Si wafer. Note the
columnar grain structure of the TiN film, which has saw-tooth surface morphology. Voids were
also seen at the grain boundaries [45]. Resistivity of TiN film depends on the deposition conditions
and in particular nitrogen content in the Ar1N2 sputtering gas mixture.
Figure 5.17 (p. 308) shows resistivity and sputter rate variation of TiN film with nitrogen con-
tent in a sputtering gas mixture [46]. A sharp drop in film resistivity at 20% N2 is because of the
transformation of α-Ti film to fcc TiN. In this composition range the deposited film contains both
α-Ti and Ti2N phases at low pressure. On the other hand, phases such as Ti2N and TiN have been
found in high pressure. If the nitrogen content in the film (N/Ti) is plotted against the nitrogen con-
tent of the sputtering gas mixture, a sharp increase in nitrogen content in the film is noted between
zero and 20% nitrogen content of the sputtering gas mixture. After this region nitrogen content of
the film increases gradually with increasing nitrogen content in the sputtering gas mixture.
Typically, stoichiometry of the reactively sputtered TiN film is monitored by measuring resistivity
FIGURE 5.14
Relationship between Ti film resistivity, average grain size in the film and film thickness. Ti films were sputter
deposited on Si wafers at 3 kW and 4.3 mTorr Ar pressure [43].
306 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
100
Bot
tom
cov
erag
e (%
)B
otto
m c
over
age
(%)
Bot
tom
cov
erag
e (%
)B
otto
m c
over
age
(%)
100
90
80
70
60
50
40
90
80
70
60
50
40
100
90
80
70
60
50
401.0 1.5 2.0 2.5
Aspect Ratio (AR)
3.0 3.5
1.0 1.5 2.0 2.5 3.0 3.5
1.0 1.5 2.0 2.5 3.0 3.5
1.0 1.5 2.0
vias
trenches
(a) 10 mTorr, 1 kW rf
(b) 10 mTorr, 2 kW rf
(c) 30 mTorr, 1 kW rf
(d) 30 mTorr, 2 kW rf
2.5 3.0 3.5
100
90
80
70
60
50
40
FIGURE 5.15
Improved Ti bottom coverage with increased RF power and Ar pressure for a given aspect ratio of trench
(open circle) and via (filled circle). Ti bottom coverage decreased with increased aspect ratio [44].
3075.2 Titanium
and also optical reflectivity. A distinct color change takes place in the film with increasing nitrogen
content. Ti has a silver-like appearance, Ti2N has a bright yellow color and TiN has a golden yel-
low color. TiN film with even higher nitrogen content has brown to bronze to red colors. The low-
est reflectivity of reactively sputtered TiN film was recorded at about 4500 A wavelength, which
correspond to the 20% nitrogen in sputtering gas mixture. Thus lowest reflectivity also corresponds
to lowest resistivity of the film.
FIGURE 5.16
Cross-sectional TEM microstructure of reactively sputtered TiN film [45].
300
200
100
00
0
1
2
3
4Resistivity
Nitrogen (%)
Res
istiv
ity (
μΩ -c
m)
Rat
e (Å
/S)
Rate
1000 watts DC inputwith substrate BIAS
20 40 60 80 100
FIGURE 5.17
TiN film resistivity and deposition rate variation with nitrogen content in sputtering gas mixture. Reactive sputtering
was conducted S-gun tool at 1 kW power and substrate bias was varied between 290 and 2100 V [46].
308 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
As shown in Figure 5.17, the lowest TiN film resistivity of 75 μΩcm was measured at a nitrogen
content of 22% in the sputtering gas mixture [46]. TiN film resistivity also depends on substrate
heating and bias. Substrate heating enhances mobility of the deposited atoms. Typically, a substrate
temperature in the range of 300�500�C is used for TiN deposition. This also improves the stoichi-
ometry of the TiN film. On the other hand, negative substrate bias is used to achieve various objec-
tives. Low negative bias of substrate resputter weakly held adsorbed gas atoms from the surface.
Substrate bias also reduces oxygen and carbon contamination in TiN film. Low oxygen content in
TiN results in lower film resistivity. In contrast, large negative substrate bias extracts ions from
plasma, which impinge on the substrate and cause resputtering of the deposited film. Preferential
resputtering of the metal from the deposited films gives rise to concentration of nitride in the film.
With suitable negative bias (2 80 to2 150 V), highly stoichiometric TiN is achieved, which also
shows minimum resistivity.
Figure 5.18 shows substrate bias dependent resistivity of TiN film sputter deposited reactively
using Varian’s S-gun tool [46]. Note that for a given concentration of nitrogen (20% in this case)
in the sputtering gas mixture, a minimum TiN film resistivity was achieved at moderate negative
bias of substrate.
As discussed in Chapter 2, sputtering of Ti with a N21Ar2 gas mixture with higher nitrogen
content (.20%) can lead to the formation of refractory nitride compound on the target face. As a
result, the deposition rate of TiN can drop drastically. This is called target poisoning. Severe target
poisoning may also lead to the cracking of the target at the erosion zone. Typically these cracks are
shallow and small (,1 cm) in nature. The most common remedy of target poisoning is the process
optimization. In general, using low nitrogen concentration (,10%) formation of nitride on the target
face can be avoided. Applied Materials’ Vectra IMP Ti and e-SIP Ti processes are some of the
most popular processes used in Al metallization. The Vectra IMP Ti chamber is extensively used
for achieving good bottom coverage in high aspect ratio contacts in 65 nm and 90 nm node logic
devices. This chamber has a side coil for producing electromagnetic field and also uses substrate
biasing. These also reduce overhang.
600
Res
istiv
ity (
μΩ-c
m)
1000 Watts DC input20% N2,80% Ar
400
200
00 100
BIAS (V)200 300
FIGURE 5.18
Variation of TiN film resistivity with bias voltage. Reactive sputtering was conducted using S-gun tool [46].
3095.2 Titanium
Figure 5.19 shows the sheet resistance variation of Ti film as a function of the number of depos-
ited wafers, which is proportional to target life [8]. The e-SIP Ti chamber is used for Ti liner appli-
cation to #45 nm logic devices. It uses low sputtering pressure, large target-to-wafer spacing, fixed
side magnets and off-center magnetron rotation for creating high ionization, improved directionality
of atoms and as a result superior bottom coverage.
The other important thin film property is stress. A number of studies have measured residual
stresses in Ti and TiN films using wafer curvature and x-ray sin2ψ technique [46,47]. For example,
a detailed study of residual stress development in Ti film as a function of sputtering pressure and
substrate bias showed initial large compressive residual stresses (2600 MPa at 0.8 mTorr) of Ti
film at low sputtering pressure reached to zero stress at higher sputtering pressure and then it
attained a large tensile stress (400 MPa at 3.0�5.5 mTorr). After reaching the peak tensile stress,
Ti film stress gradually dropped with increasing sputtering pressure. These results also revealed a
linear relationship between residual stress and sputtering pressure up to a specific sputtering pres-
sure. The effect of substrate bias on the residual Ti film stress showed that residual stress remained
20
15
10
5
0
20(a)
(b)
15
Rs. Non-uniformity,Avg.= 6.0%, 10
10
5
00 1,000 2,000 3,000
Number of wafers
Non
-uni
form
ity (
%,1
0)N
on-u
nifo
rmity
(%
,10)
Number of wafers
4,000 5,000
Rs. Avg. = 11.5Ω/sq
Vectra IMP Ti
e-SIP TiRs. Avg. = 176Ω/sq
Rs. Non-uniformity,Avg.= 22%, 10
250
200
150
100
50
00 10,000 20,000 30,000
0
5
10
15
20
Rs
(Ω/s
q)R
s (Ω
/sq)
FIGURE 5.19
Sheet resistance of Ti films deposited using (a) IMP Vectra and (b) e-SIP Ti PVD tools of Applied Materials
Inc [8].
310 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
nearly constant at stress of 400 MPa up to a bias of 50 V. Then the stress sharply dropped to about
-600 MPa between 50 V and 75 V substrate bias. Beyond 75 V bias, residual stress of the Ti film
remained unaltered.
In ionized sputtering, the effect of substrate temperature on stress in the Ti, TiN and Ti/TiN bi-
layer was studied. Figure 5.20 shows film stress variation between 25�C and 400�C substrate tem-
perature [48]. At any given substrate temperature, TiN film has the largest compressive residual
stress. Large compressive stress of the TiN layer can be reduced by applying a Ti underlayer as
shown in case of the Ti/TiN bi-layer. In all cases, with increasing substrate temperature, stress is
reduced almost linearly. In the case of Ti film, stress changes from compressive to tensile at high
substrate temperature [48]. An x-ray texture study of Ti/TiN bi-layer film showed only weak
,111. TiN peak because of the poor lattice match of TiN with the Ti underlayer [48]. However,
at 200�C substrate temperature, stronger ,111. TiN peak was noted because of a better match of
,111. TiN and ,002. Ti lattice constants. An indirect estimate of TiN average grain
size, using x-ray full-width half maximum measurements, was 270 A in 600 A thick TiN film. An
in-depth discussion of sputtered Ti and TiN films properties can be found elsewhere [49�56].
For relatively large technology nodes, Ti hollow cathode magnetron (HCM) targets have been
used for depositing Ti, TiN and Ti/TiN bi-layer films [57]. In Chapter 2, principles of HCM opera-
tion were discussed in some detail. Here we highlight some of the features of HCM deposited Ti
films. Figure 5.21 shows variation of Ti bottom coverage with increasing substrate bias during
HCM Ti sputtering [58]. In 0.15 μm wide and 8:1 aspect ratio via, Ti bottom coverage was success-
fully increased from 22% to 36%. At intermediate RF bias, optimum step coverage was achieved.
High RF bias produced unwanted overhand over the narrow feature because of the re-sputtering.
During development of Ti HCM processes for 150 mm wafers, properties of Ti and TiN films were
compared with films deposited using collimated sputtering [59].
1.00Ti
Ti/TiN
TiN
0.00
–1.00
–2.00
–3.00
–4.00
–5.00
–6.00
–7.00
–8.00
–9.00
–10.00
–11.000 100 200 300
Table tempeature (°C)
Str
ess
(GP
a)
400 500
FIGURE 5.20
Stresses in Ti, TiN and Ti/TiN bi-layers as a function of substrate temperature in I-PVD [48].
3115.2 Titanium
Figure 5.22 shows variation of Ti and TiN film resistivity as a function of film thickness [59].
Ti films deposited by the collimated and HCM sputtering had comparable resistivity. However,
HCM sputtered TiN films had resistivity values almost four times lower than collimated sputtered
TiN films. Step coverage was higher in the case of HCM Ti sputtering as compared to collimated
sputtering.
FIGURE 5.21
TEM image showing improved Ti bottom coverage with increased RF power [58].
300
180
160
140
120HCM Ti
HCM TiN
cds Ti
cds TiN
100
Res
istiv
ity (
μohm
-cm
)
80
60
40
20600
Film thickness (Å)
900 1200
FIGURE 5.22
Variation of resistivity of Ti and TiN films with thickness. These films were sputter deposited using HCM and
collimated sputtering [59].
312 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
5.2.2.2 Defect generationParticle generation during Ti and TiN sputtering is a well-recognized problem [60,61]. In particular,
during reactive sputtering of Ti target to deposit TiN films, TiN in-film particles can form easily.
As discussed in Chapter 3, one of the sources of in-film particles is nodules formed on sputter face
because of re-deposition of sputtered material. Figure 5.23(a) shows growth of TiN nodules on a Ti
target sputter face edge because of re-deposition of sputtered materials [37]. Figure 5.23(b) shows a
TiN nodule at high magnification that has fractured. The missing portion of this fractured nodule
forms in-film particles. Other sources of in-film particles are re-deposition of sputtered material on
the shield and clamping ring.
5.3 TungstenIn the semiconductor industry, tungsten has been used in the form of silicide, in forming plugs and
barrier metal in W-Al based technology (Figure 5.24) [62,63]. Depending on the technology node,
for barrier and plug formation, tungsten thin film is deposited either using sputtering or chemical
vapor deposition (CVD). For such applications the tungsten purity requirement can vary between
99.99% and 99.999%. In CVD deposition of tungsten film, WF6 and W(Co)6 are the primary
sources of tungsten. Reducing agents such as H2, Si, GeH4 and SiH4 are used in CVD to form
highly conformal tungsten films for high aspect ratio features.
Tungsten is regarded as a refractory metal because it has a very high melting point (3422�C). Thename tungsten was derived from the Swedish word tungs ten (heavy stone) and the symbol W from
the German word Wolfram. The sources of tungsten are ores such as Wolframite and Scheelite. High
purity tungsten is extracted from its oxide WO3 by a reduction reaction [64]. Tungsten reacts with car-
bon and, hence, hydrogen is used as a reducing agent. WO3 is heated between 550�C and 850�C in a
hydrogen atmosphere to produce tungsten powders. Table 5.6 lists the basic properties of tungsten. In
bulk form, tungsten has a bcc crystal structure. It has very high density, hardness, modulus and resis-
tance to corrosion as compared to the metals we have discussed so far.
FIGURE 5.23
SEM image showing (a) distribution of TiN nodules at target edge and (b) fractured nodules [231].
3135.3 Tungsten
FIGURE 5.24
Examples of applications of sputtered W films in gate and bit line [62].
Table 5.6 Properties of Tungsten (W)
Property Value
Atomic number 74
Atomic weight (amu) 183.84
Crystal structure at RT BCC
Density (kg/m3) 19,250
Melting point (�C) 3422
Linear thermal expansion coefficient (k21) 4.53 1026
Thermal conductivity (Wm21k21) 174
Electrical resistivity (Ωm) 5.43 1028
Young’s modulus (GPa) 411
Vickers hardness (MPa)� 3430
�Grain size dependent.
314 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
5.3.1 Tungsten processing and property controlBulk tungsten is in general produced by a powder metallurgy route. The starting material for sput-
tering target manufacturing is typically high purity tungsten powders. Because of the oxidation,
tungsten powders contain oxide in the form of WO3. [65�70] The oxygen content of tungsten pow-
der can be of the order of a few hundred ppm depending on the purity of tungsten powders.
However, for high purity and high density tungsten targets, desired oxygen content is less than
100 ppm for semiconductor applications [65]. In advanced applications, oxygen specification in
tungsten film can be less than 20 ppm. High oxygen content of tungsten target leads to higher tung-
sten film resistivity.
5.3.1.1 Thermomechanical processingFigure 5.25 shows a representative flow chart for tungsten target manufacturing [65�70]. The pre-
ferred size of tungsten powders is less than 50 μm. After powder screening operation, powders with
suitable size distribution are either packed in a graphite die for uniaxial cold/hot pressing or canned
in a metallic container (e.g., Ti, Fe) for hot isostatic pressing (HIP) [68,70]. Refer to Chapter 4 for
details on uniaxial cold and hot pressing and also HIP sintering of powders. In uniaxial pressing of
tungsten powders, a graphite foil is used between powder body and the ram of the press. In order
to produce high density tungsten targets, various combinations of cold pressing, hot pressing, HIP
sintering and sintering at elevated temperatures without pressure have been used [65�70]. In gen-
eral, HIP sintering with optimum conditions successfully produced high density (. 99%) tungsten
targets. On the other hand, uniaxially cold and hot pressed tungsten powders produced relatively
low density tungsten targets. In such situations, an additional metal forming operation such as hot
rolling produced high density tungsten targets.
W powder/plate
For processedW plate
Screening &canning
Vacuum hotpressing / HIP
Hot rollingDensity checkGrinding of
W & B/Ppreparation
Solder / HIPbonding toB/P & NDT
Final grinding Inspection Cleaning &packaging
HIP: Hot isostatic pressingB/P: Backing plateNDT: Non-destructive testing of bond
FIGURE 5.25
A representative flow chart for W target manufacturing [based on 66�71].
3155.3 Tungsten
For example, in the case of hot pressing of tungsten powders in multi-steps, after a degassing
step (at 1.0 Pa pressure), first heat treatment was done at 1250�C for a few hours. In the next step,
hot pressing was conducted using 30 MPa at relatively high temperatures, i.e., between 1450�C and
1700�C (for 1.5 h to 8 h). Subsequently, a sintering heat treatment was done at 1900�C for 5 hours
(without pressure) to achieve high density and desired grain size in tungsten target [70]. In contrast,
in another study tungsten powders were HIP sintered at 1400�C for 7 hours at 40 ksi to obtain
more than 99% density [68]. It was noted that the oxygen content of the sintered tungsten target
dropped by 100 ppm after HIP sintering. It was argued that the Ti and Fe container played a posi-
tive role in absorbing oxygen during elevated temperature sintering [68].
5.3.1.2 Tungsten target manufacturingFigure 5.25 shows a representative flow chart for tungsten target manufacturing [65�70]. W targets
can be fabricated using a combination of cold pressing of powder compact, hot pressing, [65�70]
HIP and hot rolling steps [68�70]. Individual fabrication steps were discussed in Chapter 4. Each
fabrication step increases the density of the semi-finished target. Optimization of density, micro-
structure and crystallographic texture is done by choosing suitable temperature, time and pressure
combinations for pressing operations and temperature, % deformation per pass, total deformation,
etc. for hot-rolling conditions.
A variety of W plates are commercially available for sputtering target manufacturing. However,
some target manufacturers may like to develop a more cost-effective and unique W target with a
more controlled microstructure and texture. A semi-finished W target is typically subjected to
grinding operation to achieve desired shape and dimensions. W targets are brittle in nature and in
the majority of cases these are bonded to a conducting backing plate (e.g., Cu alloys, Al alloys)
using a solder layer. Soldering involves application of a low melting solder alloy between the W-Ti
blank and the backing plate to hold them together after solidification of the solder alloy. Good
bonding is ensured by checking the bond coverage using non-destructive testing such as ultrasound.
Subsequently, bonded W targets are finished with final grinding (if required), polishing and grit-
basting/arc-spraying operations. On achieving the desired external dimensions and surface rough-
ness, targets are transferred to the cleaning section for degreasing and packaging.
5.3.2 Tungsten thin filmsDeposition of W films using sputtering has been studied extensively in order to understand the role
of sputtering parameters on thin film properties [71�84]. One of the most popular commercial
sputtering tools for advanced applications is Applied Materials’ Versat W PVD tool. WN/W PVD
process has been used in gate and bit line for technology nodes below 70 nm for memory applica-
tions. This process has also been used in 55 nm Flash applications for W gate construction. For
such applications, typically high density W sputtering targets are used.
Figure 5.26 shows SEM images of two 99.9995% purity sputtered W targets that had approxi-
mately 90% and 99.5% density [74]. The low density target showed large isolated pores that initi-
ated small explosions during sputtering and increased in-film particles. In recent years, for
advanced applications, emphasis has also been placed on the sputter surface finish. A very smooth
sputter surface can prevent nodule formation on the target surface because of re-deposition and
reduce in-film particle counts throughout the life of the target.
316 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
5.3.2.1 Film propertiesProperties of sputtered tungsten thin films typically depend on the film thickness, sputtering pres-
sure, substrate bias, substrate heating and also oxygen partial pressure inside the chamber [71�84].
W film may have metastable A15 cubic β-W phase or equilibrium bcc α-W phase or a mixture of
both phases. In general, thinner films showed metastable β-W phase, and thicker films (typically
$50 nm thick) showed predominantly α-W phase. A number of experiments revealed the presence
of a small amount of β-W phase in α-W film after phase transformation. β-W to α-W transforma-
tion was considered to be thermally induced, but this transformation is also possible at room tem-
perature over a long period of time.
Figure 5.27 shows XRD results from a number of sputtered W films of varying thickness values
[81]. Both 50nm and 100 nm thick W films showed α-W and β-W peaks. Even 600 nm thick W
film showed β-W (200) reflections around 2θ B 35.2�. These results suggest that β-W grains can
remain present in thicker W films even above critical film thickness of 50 nm.
High-resolution electron microscopy study of sputtered W films has shown some unique fea-
tures. Figure 5.28 shows a high resolution SEM image of 310 nm thick W film deposited on heated
(at 350 K) silicon substrates [72]. Large grains of the order of 200 nm diameter showed the pres-
ence of platelets of 15 nm width. Grains were found to be packed with piles of platelets in the case
W films that were more than 50 nm thick. The grains themselves continued up to the film/substrate
interface and showed a columnar structure. The application of 100 nm thick titanium underlayer
below 200 nm thick W films showed a slightly different film structure but platelets were present at
the film surface. High density W sputtering targets showed finer platelets in deposited films as
compared to films deposited using less dense W sputtering targets [74].
A study of microstructure and stress evolution in 99.99% purity 150 nm thick sputtered W films
showed that sputtering pressure influences the microstructure and also the stresses in as-deposited
films [78]. Figure 5.29 (p. 319) shows cross-sectional TEM images of sputter-deposited W films as
FIGURE 5.26
Microstructure of W targets: (a) 89.8% dense and (b) 99.5% dense [74].
3175.3 Tungsten
a function of sputtering pressure [78]. At low sputtering pressure of 12 mTorr Ar (Figure 5.29(a)),
film was dense and without any columnar grains. At this sputtering pressure, W film predominantly
showed coarse bcc α-W grains and only few β-W grains were noticed. Spotted rings shown in the
inset indicate presence of bcc α-W grains. Similar results were reported in relatively thin sputtered
W films (Figure 5.30) (p. 320) [81]. The microstructure at 12 mTorr sputtering pressure corre-
sponded to large compressive stresses in the W film.
FIGURE 5.27
XRD patterns for W films of various thicknesses [81].
FIGURE 5.28
SEM images showing morphology of sputtered W film (310 nm thick). Note piles of platelets within the grains [72].
318 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Returning to Figure 5.29(b), at relatively high sputtering pressure of 26 mTorr, the microstruc-
ture was columnar with isolated voids between columnar grains. This columnar grain structure cor-
responded to maximum tensile stress in W film. On further increase in sputtering pressure to
60 mTorr, the microstructure transformed to a dendrite-like microstructure (Figure 5.29(c)). The
electron diffraction pattern shown in the inset of the image indicates an amorphous microstructure
of W film. This dendrite-like and amorphous microstructure corresponded to zero stress in W film.
In this study a good correlation between film microstructure and the nature of stress was
established.
The lowest resistivity of α-W film reported in the literature is between 10 and 20 μΩcm. However,
most commonly reported α-W resistivity values are 20 μΩcm or higher. α-W film resistivity is sensi-
tive to impurities. An incremental increase of 1.1 to 4.2 nΩcm per ppm wt% impurity was reported in
the literature. β-W film resistivity typically varies between 150 and 350 μΩcm. Figure 5.31 shows a
drop in sheet resistance of 70 A and 150 A thick sputtered W films with time [83]. X-ray measure-
ments showed that both films completely transformed from β-W to α-W over 10,000 min. Although
resistivity values dropped significantly, the lowest value did not reach the level of thick film, i.e.,
12 μΩcm. This was attributed to oxidation of the film or surface scattering effects.
FIGURE 5.29
TEM images of cross-section of W films deposited at: (a) 12 mTorr, (b) 26 mTorr and (c) 60 mTorr [78].
3195.3 Tungsten
Figure 5.32 shows variation of W film resistivity with film thickness [83]. The 3.4 nm thick W
film had β-W grains only. Between 3.4 nm and 45 nm thickness, all other as-deposited films had a
mixture of α-W and β-W grains. As expected, resistivity increased in thinner films. Films that had
thickness of 45 nm or more showed only α-W grains. This explains the reduced resistivity in such
films shown in Figure 5.32 [83]. The bulk value of α-W is 5.3 μΩcm, which is shown by the dotted
FIGURE 5.30
Bright field TEM image is showing α-W and β-W grains in 50 nm thick W film. The continuous rings in
electron diffraction pattern arise from the fine grained β matrix. The speckles in rings arise from coarse α-Wgrains [81].
0.1 1 10
Time after deposition (min)
100 1000
150 Å
70 Å
Sheet resistance of W films
10000 100000
120
100
80
Rs
(Ohm
/sq)
60
40
20
0
FIGURE 5.31
Sheet resistance variations in 70 A and 150 A thick W films with time [83].
320 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
line. More than 150 nm thick W films peeled off from the silicon substrate because of large com-
pressive residual stresses [83].
As discussed earlier, stress in sputter-deposited W film is microstructure dependent, which in
turn is process parameter dependent [82]. For example, variation in sputtering pressure can result in
a significant change in W film stress. Figure 5.33 shows stress variation in W film with increasing
100As-deposited
80
60
40
Res
istiv
ity (
mic
ro-O
hm-c
m)
20
00 50 100
Film thickness (nm)150 200
FIGURE 5.32
Variation of resistivity in as-deposited W film with thickness [83].
2
1
0
Tens
ion
Com
pres
sion
Str
ess
(GP
a)
–1
–2
–30 20 40
Ar pressure (mTorr)8060
50
40Avg. Mech. (>0.16 μm) = 7.2 Avg. In-film (>0.26 μm) = 4.4
30
Par
ticle
s
20
10
00 2,000 6,000 10,000
Number of wafers
14,000 18,000100
FIGURE 5.33
Variation of (a) stress in W film with argon pressure, [78]. and (b) in-film particles in W films with wafer
numbers [62].
3215.3 Tungsten
Ar pressure [82]. At low enough Ar pressure, W film stress was compressive in nature and film
showed a dense microstructure without any columnar grains. With gradual increase in Ar pressure,
W film stress reached to the maximum tensile stress value. The W film microstructure at this
sputtering condition had columnar grains with isolated voids between grains. On increasing the
Ar pressure, tensile stress gently dropped and finally film stress reached to zero stress. At large Ar
pressure condition, the film had a amorphous dendrite-like microstructure.
In one of the studies, β-W to α-W transformation was found to form two layers of α-W films
with different stress profiles [79]. The first α-W layer, up to 25 nm thickness from substrate,
showed tensile strain in the plane of substrate, while the remaining thickness showed compressive
strain [79]. This two-layer configuration resulted in α-W x-ray peak asymmetry. It was also noted
that if an x-ray instrument with low resolution was used, this asymmetry could have been over-
looked. X-ray stress measurements also recorded heterogeneous residual stress states in sputtered
W films, which was attributed to incomplete β-W to α-W phase transformation. The existence of
remnant β-W grains in small quantity in fully transformed film cannot be ruled out.
5.3.2.2 Defect generationAs discussed in Chapter 3, any open or closed pores inside a sputtering target can generate parti-
cles. In particular, voids along the grain boundaries in a low density W target were found to pro-
duce in-film particles [74]. Applied Materials’ Cleant W PVD and Versa WN/W PVD processes
provide tight in-film particle counts because of overall improvement in the W PVD processes.
Figure 5.33 shows variation of in-film particle in W films with a number of coated wafers for
Applied Materials’ Clean W PVD process for 300 mm wafers [62].
5.4 Tungsten�titanium (W-Ti) alloysThe role of Ti in W-Ti alloys is to increase adhesion of W to oxide surfaces and also to improve
oxidation resistance. Sputtered W-Ti films are used as a barrier layer between Al and Si [85�88].
W-10 wt% Ti (W-30 at% Ti) is the most widely used W-Ti alloy in semiconductor applications.
The composition of sputtered W-Ti films always deviates from the composition of the sputtering
target. For example, the W-10 Ti sputtering target actually produces W-Ti films that typically have
5 to 7 wt% Ti. The resistivity of such W-Ti films varies between 50 and 80 μΩcm. This makes the
resistivity of W-Ti comparable to that of reactively sputtered diffusion barrier TiN film. The step
coverage of W-Ti film has been found to be relatively good because atomic mass of W is high and
W atoms suffer less gas-phase scattering with Ar. The basic properties of W and Ti are given in
Table 5.7.
5.4.1 Tungsten�titanium phase diagramFigure 5.34 shows the binary equilibrium phase diagram of tungsten (W) and titanium (Ti) [89].
Here, we are interested in the W-rich end (# 30 wt.% Ti) of the phase diagram. Only phases above
500�C are shown in this phase diagram. This is because of the unavailability of the data below
500�C. However, the interpretation of microstructures in terms of various solid phases at ambient
temperature is not complicated by this fact. The equilibrium solid phases found in the
322 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
3500
3000
2500
2000
1500
1000
5000 10 20 30 40 50 60 70 80 90 100
0 5 10 20 30 40 50 60 70 80 100
Ti WWeight percent tungsten
740 ± 20°C
(βTi,W)
1250°C
882°C
1670°C
L
Atomic percent tungsten
Tem
pera
ture
°C
3422°C
(αTi)
FIGURE 5.34
Equilibrium phase diagram of tungsten (W) and titanium (Ti) binary alloys [89].
Table 5.7 Properties of Tungsten (W) and Titanium (Ti)
Properties Tungsten (W) Titanium (Ti)
Atomic no. 74 22
Atomic weight (amu) 183.84 47.867
Crystal structure at RT BCC HCP
Density (kg/m3) 19,250 4507
Melting point (�C) 3422 1668
Linear thermal expansion coefficient (k21) 4.53 1026 8.63 1026
Thermal conductivity (Wm21k21) 174 21.9
Electrical resistivity (Ωm) 5.43 1028 40.03 1028
Young’s modulus (GPa) 411 116
Vickers hardness (MPa)� 3430 970
�Grain size dependent.
3235.4 Tungsten�titanium (W-Ti) alloys
microstructures are closed packed hexagonal (αTi) solid solution and body centered cubic (βTi, W)
solid solution. Both W and Ti have complete mutual solid solubility in (βTi, W) between 1250�Cand the solidus. W-rich alloys are primarily produced by powder metallurgy methods and phase
evolution has been studied extensively by various investigators [90�100].
In the powder metallurgy processing of W-Ti alloys, elemental powders are mixed well to
obtain a homogeneous mixture that undergoes sintering at elevated temperatures under high pres-
sure. It is believed that tungsten starts to diffuse into titanium and an equilibrium phase is obtained
on the completion of the reaction. For example, a single phase (βTi, W) can be attained only when
temperature (and pressure) is high enough and time is long enough for solid solution to form. The
phase diagram indicates that if the overall composition of W-rich alloy is below 12 wt.% Ti, a
single-phase (βTi, W) microstructure can be retained at ambient temperature with a proper choice
of sintering parameters. With increased titanium content, as seen in many studies, multi-phase
microstructures would result at ambient temperature. Because of slow cooling (in the sintering
chamber) below 740�C, the microstructure is expected to show a mixture of (βTi, W) and (αTi)phases. In essence, various types (single-phase, multi-phase) of microstructures can be developed
with the choice of raw materials and processing parameters.
5.4.2 Tungsten�titanium processing and property control5.4.2.1 Powder processing and consolidationFigure 5.35 shows a representative flow chart for manufacturing W-Ti targets [based on 91�100].
As shown, W-Ti alloy targets are processed using powder metallurgy methods that involve powder
W & Tipowder / plate
Blending &canning
Vacuum hotpressing / HIP
Hot rollingDensity checkGrinding ofW-Ti & B/Ppreparation
For processedW-Ti plate
Solderbonding toB/P & NDT
Final grinding InspectionCleaning &packaging
B/P: Backing plateNDT: Non-destructive testing of bond
FIGURE 5.35
A representative flow chart for manufacturing W-Ti sputtering targets [based on 91�100].
324 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
processing and consolidation steps. Elemental tungsten and titanium powders (usually less than 100
μm) are mixed in a container using a hard and non-reactive media as practiced in a ball milling
operation (Chapter 4). Enough time (a few hours to a day) is allowed to produce a homogeneous
mixture to obtain a uniform microstructure. A sieving operation of this mixture can be added to
remove oversize agglomerates. Evidence has shown that the shape of the powders can influence the
porosity content and phase evolution in the microstructure.
Compaction is an essential step to impart strength to the powder compact for easy handling,
which can be done with various methods e.g., cold pressing (CP), cold isostatic pressing (CIP). In
some cases, both compaction and sintering are allowed to take place simultaneously. In hot iso-
static pressing (HIP) the powder mixture is canned in a hermitically sealed metallic container that
is subjected to hydrostatic pressure at elevated temperatures. Alternatively, powder mixture in a
graphite die can be subjected to increasing pressure and temperature simultaneously without a sepa-
rate sintering step.
W-10 wt.% Ti alloy is one of the most widely used W-Ti alloys in the semiconductor industry.
This is used as a diffusion barrier layer [91�100]. The phase diagram predicts that a multi-phase
microstructure consisting of (βTi, W) solid solution and (αTi) solid solution would exist at ambient
temperature. In the literature the (βTi, W) phase has further been characterized based on its W and
Ti content, namely, the W-rich (βTi, W) and Ti-rich (βTi, W) phases. During slow cooling, precipi-
tation of W particles from the Ti-rich phase has also been recorded. This is believed to be due to
decreased solubility of W in Ti with decreasing temperature (below 740�C), and W precipitates
would be regarded as W phase in the following discussion.
Interestingly, these three phases have very distinct appearances, morphological features and
hardness that constitute a multi-phase microstructure. Figure 5.36 shows the variation of area frac-
tion of these three different phases as a function of sintering temperature between 1200�C and
1550�C [100]. The area fractions of Ti-rich (βTi, W) and W phases decreased gradually to a value
of 8% each, while W-rich (βTi, W) increased sharply to a value of 84% at 1550�C. A detailed
study of the microstructure evolution revealed that a significant amount of voids exist at lower tem-
peratures and only a small number of isolated voids are visible at high sintering temperatures.
Figure 5.37 show a scanning electron micrograph of the multi-phase microstructure obtained at
1550�C [100].This essentially shows a gray color W-rich (βTi, W) phase, dark Ti-rich (βTi, W)
phase, bright color W phase in the form of lamellae in the dark Ti-rich phase and also some iso-
lated voids. The corresponding improvement in density as a function of increased temperature is
shown in Figure 5.38 (p. 327) [100]. It should be noted that if the processing conditions are altered,
a completely different microstructure can be obtained. A single-phase (βTi, W) microstructure is
shown in Figure 5.39 (p. 327) that has been processed at much higher temperature (1630�C)[98,101]. Because of adequate inter-diffusion of elemental W and Ti, a complete solid solution was
achieved. However, single phase (βTi, W) is known to be brittle in nature and shows very high
hardness (Rockwell C 50). Hence, a single-phase W-10 wt.% Ti alloy poses severe challenges with
regard to the machining operations for final finish.
5.4.2.2 Tungsten�titanium target manufacturingFigure 5.35 shows a representative flow chart for manufacturing W-Ti targets [based on 91�100].
W-Ti alloy targets can be fabricated using a combination of cold pressing of hot pressing, HIP of pow-
der compact and hot rolling steps [90�99]. Individual fabrication steps were discussed in Chapter 4.
3255.4 Tungsten�titanium (W-Ti) alloys
FIGURE 5.36
Variations of area percentage of three different phases with pressure sintering temperature [100].
FIGURE 5.37
SEM image showing various phases in W-Ti target processed at 1550�C [100].
326 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Each fabrication step increases the density of the semi-finished target. Optimization of the density and
also microstructure is done by choosing suitable temperature, time and pressure for pressing opera-
tions. Depending on the Ti content, W-Ti alloys can show different levels of hardness, which would
ultimately control whether conventional machining operations can be performed or grinding operations
FIGURE 5.38
Effect of sintering temperature on the density of W-10 wt% Ti alloy (time: 3h; pressure: 8.62 MPa) [100].
FIGURE 5.39
Single phase (βTi, W) microstructure in W-10 wt% Ti alloy was obtained at 1630�C (time: 3h; pressure:
6.9 MPa) [101].
3275.4 Tungsten�titanium (W-Ti) alloys
are required. W-Ti alloy targets are brittle in nature and in the majority of the cases these are bonded
to a conducting backing plate using a solder layer. Soldering involves application of a low melting sol-
der alloy between the W-Ti blank and the backing plate to hold them together after solidification of
the solder alloy. Good bonding is ensured by checking the bond coverage using non-destructive testing
such as ultrasound. Subsequently, bonded W-Ti targets are finished with required machining/grinding,
polishing and grit-basting/arc-spraying (for particle trap formation) operations. On achieving desired
external dimensions and surface roughness, assemblies are transferred to the cleaning section for
degreasing and packaging.
5.4.3 Tungsten�titanium alloy thin films5.4.3.1 Film propertiesProperties of sputtered W-Ti thin films have been studied in great detail [101�116]. Figure 5.40
shows examples of sputter-deposited W-10 wt% Ti thin films at two different argon pressures, i.e.,
2 mTorr and 11 mTorr [102]. Note the feathery structure of the film in the case of 11 mTorr argon
pressure. The development of the feathery film structure, which consists of pockets of lamellae,
was recorded in a number of studies. Examination of two thin film samples produced using identi-
cal sputtering conditions with a (βTi, W) single-phase target and a multi-phase target showed some
distinct microstructural features. In the case of the single-phase target, films showed evidence of
smaller pockets of closely spaced lamellae than the film produced from the multi-phase target. It is
well-documented that Ti concentration in the W-Ti film is usually lower than that in the target, and
this phenomenon has been explained by the higher degree of atomic scattering for Ti relative to W.
For example, a W-Ti alloy target with 18 wt% Ti showed 14.2 wt% Ti in W-Ti alloy film, which is
approximately 20% off from the desired composition. This affects the electrical properties such as
sheet resistance uniformity. Hence, it is important to make a composition adjustment for a particu-
lar product and process used for the deposition.
In a study, comparison of W-Ti film resistivity as a function of Ti concentration was done
considering three different deposition methods, i.e., electron beam co-evaporation of W and Ti,
FIGURE 5.40
TEM images of W-Ti thin film sputter deposited using (a) 2 mTorr and (b) 11 mTorr argon pressure [102].
328 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
co-sputtering of W and Ti targets and sputtering of a W-25% Ti target made using powder metal-
lurgy steps [105]. Figure 5.41 shows change of resistivity values of W-Ti films with increasing Ti
concentration [105,106]. Data from co-evaporation experiments are plotted in curve D and data
from sputtering of W-25% Ti target is shown using C. Remaining data are from co-sputtering
experiments. Co-evaporated films showed an increase followed by a decrease in resistivity value
with increasing Ti concentration. A maximum resistivity of as high as 250 μΩcm was seen at about
50 at% Ti. In contrast, co-sputtered films showed a steady increase in resistivity with increasing Ti
concentration (except in 96% to 99% Ti range). Co-sputtered W-Ti films showed significantly
lower resistivity values as compared to co-evaporated films. At 25% Ti concentration, film from
the powder metallurgy processed target showed much higher resistivity than the co-sputtered film.
This was attributed to the high concentration of carbon and oxygen in the film that probably incor-
porated during powder metallurgy processing of W-25% Ti target.
Figure 5.42 shows resistivity variation of DC-sputtered W-Ti films with increasing Ti:W ratio
in the film [107]. In this case, a linear relationship between film resistivity and Ti:W ratio in film
was noticed. Usage of increasing RF substrate bias reduced the deposition rate of W-Ti, which was
A
501
2
3
C
D
45
6
+
100
150
200
Ele
ctric
al r
esis
tivity
(μO
hm c
m)
250
3005 10 20 30 40 60 80
W 25 50
Concentration (at.%)
Concentration (wt.%)
75 Ti
B
FIGURE 5.41
Variation of resistivity in W-Ti film with Ti/W ratio. Curve D represents experimental data of Babcock and Tu.
Point C represents data from sputtering experiment with a powder metallurgy processed target [106].
3295.4 Tungsten�titanium (W-Ti) alloys
believed to be due to re-sputtering [107]. Resistivity of W-Ti film (150 nm thick) was found to
decrease linearly with increasing RF substrate bias (Figure 5.43) [107].
W-Ti alloy film stresses have been found to be a strong function of deposition condition and in
particular deposition pressure [102]. Figure 5.44 shows the variation of thin-film stress as a
90
Res
istiv
ity, m
icro
ohm
-cm 80
70
60
50.00 .05 .10
r = 0.91(Ti)
(W)δ = 43.8 + 286
Ti:W Ratio.15 .20
FIGURE 5.42
Variation of W-Ti film resistivity with Ti/W ratio [107].
040
50
60
70
80
90
Res
isiti
vity
(m
icor
-Ohm
-cm
)
100
0.1 0.2
RF bias power, kW
0.3 0.4 0.5
FIGURE 5.43
Variation of W-Ti film resistivity with RF bias power [107].
330 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
function of argon pressure, which changes steadily from a large compressive stress to a moderate
tensile stress value between 2 and 20 mTorr pressure of argon [102]. It is important to realize that
ideally a stress level close to zero stress is desired for most applications, which may not be attained
in reality. In general, lower stresses have been achieved by increasing the pressure and the substrate
temperature. On the contrary, higher powers and thicker films aggravate the situation.
5.4.3.2 Defect generationSputtering of W-Ti alloys is known to cause in-film defects as sputtering time progresses
[101,108�116]. The main sources of in-film particles are: (a) flaking of brittle films from process kit
(chamber shield and clamping ring) and (b) flaking of re-deposited nodules from the target surface.
Sputtering of W-Ti target deposits brittle alloy films on the chamber shield and clamping ring.
Such W-Ti films retain very large compressive residual stresses and have a tendency to peel off
from the process kit, which is known as flaking of films. This leads to the generation of particles
on the deposited film. Hence, the process kit has to be changed at correct intervals to prevent flak-
ing and yield loss. W-Ti film pasting is another effective way to improve particle performance.
This involves depositing a layer of tensile W-Ti film to paste the compressive W-Ti film on the
process kit. This is done on regular intervals without interrupting the production. Process kits are
typically recycled by removing the deposited film and making the surface rough again using bead-
blasting, arc-spraying and so forth.
As shown in Chapter 2, the majority of the sputtering targets start to eject material from local-
ized areas known as erosion grooves or race tracks. As sputtering progresses and erosion grooves
become deeper, certain sputtered areas of the target may see certain degree of re-deposition of the
sputtered material. This is attributed to the backscattering of sputtered atoms because of low emis-
sive energy and low emissive angle. At an atomic level this is a complex phenomenon and forms
nodules at the target surface. The distribution of the nodules in a target surface is determined by
0 5 10 15 2050
55
60
65
701000
500
500
–500
–1000
–1500
–2000
Pressure (mTorr)
Res
istiv
ity (
μΩ-c
m)
Str
ess
(MP
a)
StressResistivity
FIGURE 5.44
Film stress as a function of argon pressure for a 300 nm thick W-10 wt% Ti alloy film [102].
3315.4 Tungsten�titanium (W-Ti) alloys
the competition between the erosion rate and the re-deposition rate of the sputtered material. If
there is a net gain in deposition rate, nodules would be formed and the number of nodules would
increase with sputtering life. The size and distribution of nodules vary based on the location in the
sputtered surface and also on the void content of the target microstructure [115].
Figure 5.45 shows the growth of nodules as a function of life for a fully dense W-10 wt%Ti tar-
get [115]. A significant growth of nodules was reported up to 25 kWh life. It has been noted by
many investigators that voids in less dense target material cause generation of embryos for nodules.
Figure 5.46 shows nodule formation adjacent to the voids in 87% dense target after 8 kWh life
[115]. Crevices and micro-cracks have similar effect on the formation of nodules in the target sur-
face (see also Chapter 8). Hence, particles identified on the processed wafers are results of flaking
of brittle films from the process kit and also nodules from the target surface. In practice, good parti-
cle performance is achieved by using high density targets, pasting and changing of process kit in
regular intervals.
5.5 Aluminum and its alloysFor successful applications of Al and Al alloys in interconnect, certain properties need to be met,
i.e., (a) low resistivity, (b) high current carrying capacity, (c) resistance to electromigration (EM),
(d) resistance to stress migration (SM) and (e) ease of etching with a suitable technique [117�119].
Some of the basic properties of Al are given in Table 5.8. Historically, Al has been alloyed with spe-
cific elements such as silicon (Si) and copper (Cu) for specific applications. For example, Al-Si
alloys have been used in contact applications to avoid spiking (Figure 5.47, p.334) [120].
70
60
50
Nod
ule
size
(μm
)40
30
20
10
00 5 10 15
Sputtering life (kWh)20 25 30
FIGURE 5.45
Increase in nodule size with sputtering life of a W-Ti target [115].
332 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
As shown in the schematic illustration, when a contact hole is formed, a discontinuous layer of
native oxide may exist on the surface of Si. A treatment above 300�C is used to reduce the native
oxide layer. Some parts of the native oxide layer disappear faster than the remaining parts. As a
result, the cleaner part of the Si surface, that is free from native oxide, reacts with Al. Because sol-
ubility of Si in Al rapidly increases above 300�C, spikes are formed at the interface because of
inter-diffusion of Al and Si. On cooling, epitaxial Si islands are formed on Si contact and field
oxide interfaces. This raises the barrier height of the Al-Si contact. Spiking also causes short circuit
FIGURE 5.46
SEM image showing growth of nodules around voids after 8 kWh sputtering life [115].
Table 5.8 Properties of Aluminum (Al)
Property Value
Atomic number 13
Atomic weight (amu) 26.981
Crystal structure at RT FCC
Density (kg/m3) 2700
Melting point (�C) 660
Linear thermal expansion coefficient (k21) 23.13 1026
Thermal conductivity (Wm21k21) 235
Electrical resistivity (Ωm) 2.73 1028
Young’s modulus (GPa) 70
Vickers hardness (MPa)� 167
�Grain size dependent.
3335.5 Aluminum and its alloys
in the shallow junction. The problem of spiking was solved by adding a small amount of Si (1 wt
%) into Al to form Al-Si alloy. The presence of Si in deposited film stops the spiking at the
contact.
Alloying of Al with Cu has been found to overcome failure of interconnect because of electro-
migration [121�131]. Electromigration in interconnect is described as diffusion of atoms under the
influence of high current density, which eventually causes failure of the interconnect line because
of void or hillock formation. As shown in Figure 5.48(a), electromigration can be characterized as
high current density driven drift of metal ions in the direction of electron flow [121]. The ion flux
also depends on the intrinsic property of the conductor, grain size, grain boundary and interface
chemistry, temperature (because of Joule heating) and residual stresses. In general, electromigration
failure of interconnect takes place because of voids and protrusion like hillock growth.
Figure 5.48(b) shows electromigration failure of Al interconnect line [121]. Although the elec-
tromigration phenomenon was first discovered more than 100 years ago, a systematic study of the
phenomenon started only in the 1960s. In 1969, Jim Black of Motorola, USA, proposed a relation-
ship for predicting mean time to failure (MTTF) [125].
MTTF5A
Jnexp
k
T
� �(5.1)
In this equation, A is an interconnect cross-section dependent constant, J is the current density,
n is the scaling factor, E is the activation energy for electromigration, k is Boltzmann’s constant
and T is the temperature. As shown in Figure 5.49(a), mean time to failure can be delayed by add-
ing Cu to Al-Si alloy [129]. Al-0.5wt% Cu is a commercially available alloy that shows excellent
resistance to electromigration and is used extensively in the semiconductor industry. Al-0.5 Cu
FIGURE 5.47
Spiking because of reaction between Al and Si [120].
334 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
produced the minimum number of voids under the given set of current density and temperature
conditions (Figure 5.49(b)) [131]. It is important to note that there is a threshold length of the inter-
connect line, called the Blech length, below which no electromigration-related failure takes place in
the interconnect line.
FIGURE 5.48
Electromigration in Al and failure of interconnect [121].
99.9
Cum
ulat
ive
failu
re r
ate
(%)
Allo
y
AI-SiAI-Si-Cu
ECL100K150°C60mA
(a) (b)
90
50
10
5
2
102 103
Testing time (h)104
AISiVPd
AISiV
AISi
AISiCu
AICu
0 100 200Number of voids (1/mm)
300 400
FIGURE 5.49
(a) Effect of Cu in increasing electromigration resistance in Al-Si alloy, [129]. and (b) number of voids per
millimeter in 1 μm thick aluminum alloy on SiO2 [131].
3355.5 Aluminum and its alloys
Another phenomenon that can cause failure of the interconnect line is stress migration. In this
case stress is the driving force for the atom diffusion, which can cause void formation and eventu-
ally failure of the interconnect line [132]. Figure 5.50(a) shows an example of void formation in an
Al wire because of stress migration in an accelerated lifetime test of multi-layered metallization
[130]. Stress development in a stack of thin films can originate from thin film processing steps and
also during thermal cycling of the component. For example, various steps of damascene process for
Cu interconnect fabrication can develop stress in the device. Hence, optimization of dielectric etch
parameters, chemical mechanical polishing, barrier/seed deposition, dielectric deposition and clean-
ing is important.
1.2
0
20
40
60
80
(b)
Cum
ulat
ive
failu
re p
roba
bilit
y (%
)
1.7
AI-Si-Cu
AI-Si
295°C1,000 hours
2.7Wire width (μm)
3.7
FIGURE 5.50
(a) Image showing voiding in aluminum wiring because of stress migration, [130]. and (b) effect of Cu
addition in the stress migration behavior of Al-Si alloy [129].
336 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
During thermal cycling of a device that is made of materials with different thermal expansion
coefficients, large stresses can develop. If interfaces between various layers of materials are not
chemically and mechanically stable, voids can form at the interfaces. Severity of stress migration
also depends on the width and thickness of the interconnect line. Both interconnect failure proba-
bility and mean time to failure sharply increased in narrow and thin interconnect lines.
Figure 5.50(b) shows increased cumulative failure probabilities in narrow Al-Si interconnect lines
[129]. In wider interconnect lines, cumulative failure probabilities dropped to lower values.
Alloying Al with Cu has been found to improve stress migration resistance. The horizontal dotted
line in Figure 5.50(b) shows much lower cumulative failure probability values in Al-Si-Cu alloy
interconnect lines.
5.5.1 Al alloy phase diagramsAl-Si and Al-Cu equilibrium phase diagrams are shown in Figure 5.51(a,b) [133,134]. In the Al-Si
system an eutectic is formed at 12.6 wt% Si (at 577�C). Two terminal phases are fcc Al and dia-
mond cubic Si. The maximum solubility of Si in Al is 1.5 6 0.1% at the eutectic temperature. In
the Al-Cu system, an eutectic is formed at 5.7 wt% Cu (at 542�C) [135]. As described in
Chapter 4, supersaturated alloy decomposes to form GP zones, θ’, θ’’ and θ below 130�C. GP zones
are ordered, one or two atomic thick and coherent to the Al matrix. It is recognized that the forma-
tion of GP zones is quenched-in vacancy driven diffusion of Cu atoms. The equilibrium phase is θ(Al2Cu). The evolution of these phases is reflected in the variation of hardness of the alloy with
time (see Figure 4.32 in Chapter 4). The solubility of the Cu in Al decreases from 5 wt% at 500�Cto less than 0.2 wt% at room temperature (Figure 5.52, p. 339) [135]. If the alloy is cooled slowly
from solution temperature, it forms αSat (Al with 0.2 wt% Cu) and tetragonal θ (Al2Cu with 52 wt
% Cu). The θ precipitates are usually coarse. On the other hand, if the alloy is quenched at room
temperature and left at room temperature for a prolonged time or heated at slightly higher tempera-
ture (known as aging), GP zones are formed.
Figure 5.52 (p. 339) shows the solvus for the GP zones, which lies below the solvus of the θ.GP zones do not form above 200�C. On prolonged heating, other transition phases θ0 and θv form
in sequence. These are partially coherent with the matrix and have compositions and crystallo-
graphic structure different from θ. Coherency is lost when equilibrium θ precipitates are formed,
which are usually coarse in size. The drop in hardness indicates over-aging of the alloy, which can
occur because of prolonged heat treatment at moderate temperatures or heat treatment at higher
temperatures. This tells us that the temperature of the sputtering target has to be low enough to
retain the strength of the target.
5.5.2 Aluminum alloy processing and property controlMost Al and Al alloys for interconnect applications are ductile in nature and these are subjected to
conventional thermomechanical processing steps such as homogenization heat treatment, hot or
cold pressing, hot or cold rolling and annealing heat treatments based on property requirements.
Combinations of these processes are known to produce coarse-grained materials with moderate
strength.
3375.5 Aluminum and its alloys
01500(a)
(b)
1300
1100
Tem
pera
ture
°C
Tem
pera
ture
°C
900
700
500
3000
0 10 20 30 40 50 60 70 80 90 1001084.87
10
(Al)
Al
Al
(Al)
20
12.6
660.452°C
1414°C
577±1°C
L
L
30 40 50Weight percent silicon
Atomic percent silicon
Atomic percent copper
Weight percent silicon
60 70 80 90
(Si)
100
0300
400
500
600
700
800
900
1000
1100
10 20
548.2°C567°C
η2
θ
η1 δ
ζ2
ζ2
ε2
α2
γ1
γ0
β0
ε1 β
660.452°C
30 40 50 60 70 80 90 100
Si
Cu
(Cu)
10 20 30 40 50 60 70 80 90 100
FIGURE 5.51
Binary phase diagrams of (a) aluminum and silicon (Al-Si), [133]. and (b) aluminum and copper (Al-Cu). [134].
338 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
However, if fine-grained material is required for certain applications, special processing steps
are included into the processing cycle. For example, one of the methods of introducing large defor-
mation (e.g., equal channel angular pressing) or moderate plastic deformation at low temperature
(e.g., using cryogenic rolling) has been used on a work piece prior to the final annealing
[136�141]. Figure 5.53 shows a typical flow chart for Al alloy target manufacturing [136�141].
Note that, in the case of high purity Al, no homogenization heat treatment is required to start with.
The primary goal of the homogenization treatment of Al alloys is to reduce solute segregation by
promoting diffusion of elements from solute segregated regions to the solute depleted regions. In
the following sections, specific features of Al and Al alloys have been discussed in relation to pro-
cessing steps.
5.5.2.1 Thermomechanical processingHot working of Al alloy billets is one of the steps of sputtering target manufacturing. As discussed
in Chapter 4, hot deformation of a material can produce some microstructure characteristics
depending on the hot-working temperature, total strain, strain rate and also on the mode of defor-
mation (e.g., uniaxial compression, forging, rolling, extrusion). A large volume of literature is
available on the hot deformation condition dependent microstructure, texture and mode of failure
of various Al alloys [142�146].
FIGURE 5.52
Al-rich end of the Al-Cu phase diagram and solvus lines for various phases [135].
3395.5 Aluminum and its alloys
In the case of sputtering target manufacturing, it may not be possible to achieve homogeneous
deformation if a billet is hot pressed uniaxially. Typically, areas close to the die faces may not
deform to the degree center of the billet deforms. However, uniaxial compression or press forging
of a billet is quicker than hot rolling or extrusion. Also subsequent cold rolling of a hot-worked bil-
let may eliminate the influence of inhomogeneity of the pressed billet on the final properties of the
target. In general, hot rolling of the Al billets provides a more homogeneous microstructure.
Depending on the temperature, deformation per pass and total deformation, the microstructure of
the semiprocessed target can be quite variable. With optimized processing parameters, it is possible
to achieve a suitable microstructure and texture in a semiprocessed target.
Figure 5.54 shows a cross-sectional microstructure of a hot-rolled AA1050 alloy (400�C,2.5 s21, equivalent strain of 2) [145]. Note several newly recrystallized round grains that emerged
from the deformed elongated grains. Under suitable temperature, strain and strain conditions, Al
alloys were found to dynamically recrystallize (DRX) and produce a microstructure with equiaxed
grain structure [144,147]. Nucleation and growth of such dynamically recrystallized grains are also
dependent on the size and volume fraction of the particles. Geometrical dynamic recrystallization
(GDRX) is also possible in Al alloys in the case of impingement of grain boundaries of elongated
grains [146]. Recrystallized isolated grains in Figure 5.54 show that these were nucleated locally in
Homogen.treatment
MachiningAl (& B/P)
Bonding toB/P & NDT
Finalmachining
Finalannealing
Pressing /rolling
(Hot / cold)
Intermediateheat
Cold rolling(RT/Cryo),
ECAP
High purity Al
Al ingotDilute Al alloy
InspectionCleaning &packaging
RT/Cryo: Room temp. / cryogenicECAP: Equal channel angular pressingB/P: Backing plateNDT: Non-destructive testing of bond
FIGURE 5.53
A representative flow chart for Al target manufacturing. REX stands for recrystallization [based on 137�142].
340 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
colonies of bands and not randomly [145]. It is important to note that AA1050 alloy has Fe3Al par-
ticles that can produce recrystallized grains because of particle stimulated nucleation (PSN). In hot
deformation of AA1050, particle-stimulated nucleation of grains was found to be less dominant as
compared to cold deformation [145]. Al alloys (e.g., Al-Si, Al-Si-Cu, Al-Cu) for sputtering targets
typically do not have large non-deformable particles.
A large volume of literature is available on the microstructure, texture development and also
mode of failure in various Al alloys as a function of deformation conditions [144�150].
In the manufacturing of Al and Al alloy target, it is essential to optimize a percentage of the
cold deformation requirement and final annealing condition to achieve desired grain size, texture
and their distribution in through-thickness direction. Because high purity Al does not have enough
solute atoms, it is rather difficult to produce small grain size using conventional thermomechanical
processing steps. In general, solutes and precipitates of suitable sizes pin grain boundaries during
grain growth and help achieve fine grains and better control over texture. In the majority of cases,
Al and Al alloys are finished with a cold deformation and annealing steps. In cold deformed Al,
say after cold rolling, individual grains break into cell blocks separated by dense dislocation bound-
aries (often called dense dislocation walls, DDWs) [151,152]. In addition, the microstructure may
show microbands (MBs) and lamellar boundaries (LBs) can also be seen depending on the degree
of cold deformation).
Figure 5.55(a) shows TEM micrographs of a 10% cold-rolled high purity Al sample [152]. Note
the presence of dense dislocation boundaries in the RD-ND section of the cold-rolled sample. At
relatively large cold deformation, in addition to cell blocks and first-generation microbands,
S-shaped perturbations were seen in the microband structure. Figure 5.55(b) shows formation of
FIGURE 5.54
Cross-sectional optical micrograph of a hot-rolled AA1050 alloy (400�C, 2.5 s21, equivalent strain of 2) [145].
3415.5 Aluminum and its alloys
cell blocks, microbands and also S-shaped configurations in 50% cold-rolled Al samples [151].
Note the three dotted lines that show tilting of the microbands caused by the intersection of coarse
slip within the S-bands. These examples show complexity of the deformed microstructure of Al.
Figure 5.56 is a schematic illustration showing microbands, lamella bands and the superimposed
future nucleus of grains in a deformed microstructure of an aluminum alloy [148].
Approaches such as rolling of Al alloys at cryogenic temperature (e.g., at 2196�C using liquid
nitrogen) and low temperature annealing have successfully produced fine-grain sputtering targets
[153,154]. High purity Al and Al alloys (e.g., Al-0.5 Cu, Al-0.5Cu-1Si and AA5083 Al alloy) were
successfully cryo-rolled up to a 95% reduction in thickness. Figure 5.57 shows the microstructure
evolution during cryo-rolling of an AA5083 Al alloy sheet and also changes in mechanical proper-
ties [153]. Figure 5.57(a) shows the initial microstructure of the sample that was subjected to
annealing at 540�C for 2 hours. The average grain size of the starting material was 78 μm. On
cryo-rolling it to 85% reduction in thickness, equiaxed grains transformed into severely elongated
grains (Figure 5.57(b)) [153]. A TEM study of the deformed elongated grains showed the presence
of bands of width 0.05 to 1 μm and length 0.4 to 0.8 μm (Figure 5.57(c)) [153]. The substructure of
these bands had high dislocation density. Isothermal annealing (for 1 h) of cryo-rolled AA5083 Al
alloy samples at 200�C produced an average grain size of 200 nm. On increasing the annealing
temperature to 250�C, the microstructure shows relatively coarse grains (1.5�2.0 μm).
FIGURE 5.55
TEM image showing substructure of (a) 10% deformed, [152] and (b) 50% deformed Al [151].
342 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.56
Schematic illustration of microbands (MB), lamella bands (LB) and superimposed future nucleus (shaded
circles) of grains in deformed microstructure of Al [148].
FIGURE 5.57
Microstructure evolution during cryogenic rolling of AA5083 Al alloy sheet. (a) Microstructure of starting
material, (b) microstructure after 85% cold rolling, (c) TEM image showing substructure of 85% cold-rolled Al
and (d) changes in mechanical properties with total amount of deformation [153].
3435.5 Aluminum and its alloys
Some grains also revealed the presence of elongated subgrains. A differential scanning calorim-
etry (DSC) study of a cryo-rolled sample showed the occurrence of recovery up to 250�C.Recrystallization of the Al alloy took place only at higher temperatures, i.e., above 265�C.Figure 5.57(d) shows that cryo-rolling increases yield stress and ultimate tensile strength of
AA5083 Al alloy with larger deformation. An increase in these values was higher for cryo-rolled
material than its room temperature rolled counterpart. Ductility of the alloy dropped sharply
because of the cryo-rolling.
Cold deformation develops crystallographic textures, which are called deformation textures.
Most commonly observed deformation textures in Al and Al alloys are {110}, 112. brass,
{112}, 111. copper and {123}, 634. S. Figure 5.58 shows (100) and (111) pole figures of 95%
cold-rolled Al [155]. Note that Al has high stacking fault energy (B170 mJ/m2), and as a result, Al
shows pure metal texture unlike low stacking fault energy metals (,25 mJ/m2 for silver, brass) that
show alloy type texture [144].
In recent years detailed study of texture development in Al alloys shows the texture gradient in
thickness direction [156,157]. Parameters such as roll-gap geometry, deformation per pass and
also friction conditions were found to develop texture gradient in a rolled Al alloy workpiece. For
example, textures such as brass, copper and S dominated at the half-thickness plane, while
{001}, 110. H, {111}, 110. E and {111}, 112. F textures were found at the surface
[157]. In cryo-rolled Al-0.5Cu alloy discs for sputtering target making, gradient in certain texture
components was recorded along the thickness direction. It is desirable to have a minimum texture
gradient in a sputtering target for consistent target performance.
A large volume of information on recovery, recrystallization and grain growth of Al and Al
alloys is available in the literature [142,144]. Here we only briefly review some of the important
results. As discussed in Chapter 4, recovery of high stacking fault energy metals involves subgrain
growth by various means. The driving force for the subgrain growth is directly proportional to the
low angle grain boundary energy and inversely proportional to the radius of the subgrains. One
FIGURE 5.58
X-ray pole figures of 95% cold-rolled aluminum: (a) 100 pole figure, and (b) 111 pole figure [155].
344 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
way of measuring subgrain growth is to measure subgrain misorientation as function of annealing
parameters.
Figure 5.59 shows variation of subgrain diameter in Al with time at three different temperatures
[158]. These samples were cold-rolled to achieve 20% reduction in thickness and subjected to
annealing treatment. It is obvious that subgrain size increases gradually with increasing annealing
time and at any given annealing time, subgrain size is larger for higher temperature annealing.
Subgrain misorientation measurements show that mean misorientation and also the spread decrease
with annealing time before misorientation saturate values.
As discussed in Chapter 4, in order to achieve stable microstructure and texture in a metallic
sputtering target, material is allowed to recrystallize at suitable annealing conditions.
Microstructure and texture control in commercial Al and dilute Al alloys is quite straightfor-
ward. The reason is availability of enough solutes and/or particles that help control
microstructure by pinning the grain boundaries. In the semiconductor industry, the Al purity
requirement is quite high (99.9995% minimum). In such high purity Al, solute content being
low there are not enough solute and/or particles that can facilitate grain-size control and micro-
structure uniformity. A minimum strain is required to induce recrystallization during annealing
heat treatment. The higher the strain, the lower would be the recrystallization temperature.
Figure 5.60(a) shows the effect of tensile strain on the recrystallization kinetics of Al at 350�C[159]. Note that with greater tensile strain, the sigmoidal-shaped curves moved towards the left,
which signifies faster recrystallization kinetics. Because of the advancements in texture mea-
surements using EBSD, it is now possible to monitor grain growth kinetics of a set of grains of
similar texture. Figure 5.60(b) shows variation of grain size with annealing time for cube,
random and rolling texture containing grains. For this study, 90% cold-rolled AA1050 Al alloy
samples were annealed at 280�C [148]. Cube grains grew faster than random and rolling texture
components.
FIGURE 5.59
(a) Subgrain growth kinetics in 20% cold-rolled 99.995% purity Al and (b) misorientation variation with
annealing time at 300�C [158].
3455.5 Aluminum and its alloys
Development of texture during annealing has been studied extensively [142�149,151]. Here a
few examples are given to illustrate the texture development in cold-rolled Al alloys. Figure 5.61
shows the TEM image of a microstructure and local texture of 99.996% purity Al sample cold-
rolled to 60% reduction in thickness and annealed at 350�C for 1 hour [151]. This image shows a
recrystallization nuclei located between the lamellar boundaries and a cell. Orientation of this
nuclei was very close to cube orientation. The schematic illustration shows orientation of neighbor-
ing grains [151].
Hot-rolling of Al and Al alloys is a common practice to break cast microstructure prior to
cold-rolling and final annealing. Development of cube texture has been observed in most Al
alloys because of the hot-rolling operation. Cube texture typically stays in the cold-rolled mate-
rial along with rolling and random textures, but in the form of fine dispersion. On annealing, the
strength of cube texture has been found to increase. The data in Figure 5.60(b) show similar
results. Depending on the particle content in Al alloys and processing conditions, Al alloys show
a wide mix of texture components including steep gradient from surface to the mid-plane of
the plate.
5.5.2.2 Aluminum alloy target manufacturingIn recent years, for advanced applications, fine-grain Al and Al alloy sputtering targets have been
preferred over coarse-grain sputtering targets. Figure 5.53 shows a representative flow chart for Al
alloy target manufacturing [136�141]. The starting Al billets are typically cast or hot-worked mate-
rial. A combination of hot pressing, hot rolling, cold rolling, cryogenic rolling, equal-channel angu-
lar pressing (ECAP) and annealing steps is used for Al target fabrication [136]. In ECAP, a ductile
material is subjected to large shear strain by extruding it through a die that has a sharply bent chan-
nel. The advantage of the ECAP is its simple die design requirements and operation at ambient
temperature. On the other hand, it is not easy to produce large parts by ECAP with high yield.
Typically, an Al workpiece is subjected to several ECAP passes and annealing heat treatment to
FIGURE 5.60
(a) Strain dependent recrystallization kinetics of Al at 350�C, [159]. and (b) grain size change with annealing
time in AAl1050 Al alloy at 280�C [148].
346 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
(a)
(b)
RD
RD
10 μm
121
20
19
18
17 14
13 10
12
11
8
7
6
52
3
22
4
9
15
16
1
4
3
13
6
7
12
14
1615
17
20
19
2221
18
9
111085
2
(1101)[1010]
(110)[110]
(110)[110]
(221)[110]
(331)[310]
(121)[210]
(131)[110]
(321)[571]
(321)[230]
(153)[301]
(142)[201]
(143)[301]
(164)[1014]
FIGURE 5.61
TEM image (on left) showing intragranular recrystallization nuclei in of 60% deformed and annealed (150�C,1h) Al. Nuclei orientation is very close to cube orientation (on right) [151].
3475.5 Aluminum and its alloys
produce fine grains. For example, when conventional processing produces targets with grain size of
the order of tens and hundreds of microns, ECAP successfully produces Al alloy Al alloy targets
with grain size between 0.5 and 10 μm [136]. Similarly, rolling of Al and Al alloys at cryogenic
temperatures (e.g., liquid nitrogen) and a subsequent annealing step successfully produces fine grain
targets [138].
Optimization of microstructure and crystallographic texture is done by choosing suitable para-
meters for the above processes. A semi-finished Al target is typically subjected to a conventional
machining operation to achieve desired shape and dimensions. Both monolithic and bonded Al tar-
gets are popular for microelectronic applications. In the case of a bonded product, Al targets are
bonded to inexpensive backing plates (e.g., Al alloys). Both solder-bonded and diffusion-bonded Al
targets are used in electronic applications. Typically, Al targets for 300 mm wafers are diffusion
bonded at low temperatures to Al alloy backing plates.
The most common practice for diffusion bonding Al target to a backing plate is hot isostatic
pressing. Solder bonding of an Al target involves application of a low-melting solder alloy between
the Al target and the backing plate to hold them together after solidification of the solder alloy.
Good bonding is ensured by checking the bond coverage using non-destructive testing such as
ultrasound. Subsequently, targets are finished with required machining, polishing and grit-basting/
arc-spraying (for particle trap formation) operations. On achieving desired external dimensions and
surface roughness, targets are transferred to the cleaning section for degreasing, precision cleaning
and packaging. Individual manufacturing steps have been discussed in Chapter 4.
5.5.3 Aluminum alloy thin filmsAs noted in Chapter 1 and in the introduction of this chapter, the technology of Al and Al alloy
interconnects for ICs is a mature one. A large volume of literature is available on various aspects
of sputtered Al thin films for specific applications [160�170]. In particular, the role of various Al
alloys on the electromigration and stress migration resistance has been studied extensively using
experiments and modeling [171�173]. In this discussion, the simple relationships between sputter-
ing parameters and thin film properties are reviewed before moving to the topic of electromigration
and stress migration.
Some basic DC sputtering studies of Al target reveal that target current is directly propor-
tional to the Ar pressure and holds almost a linear relationship over a wide range of Ar pressure
(Figure 5.62) [160]. At a given Ar pressure, target current increased with increasing target volt-
age target current increased and, in particular, at a higher Ar pressure the jump in target current
value was significant. The deposition rate of Al was also found to be a linear function of target
power.
Advanced interconnect and metal plug applications of Al and Al alloys involve deposition of Al
using various methods. Figure 5.12 shows some of the Applied Materials’ commercial processes
such as Al SLAB, ALPS Al and CVD Al fill. Note the use of Durasource TTN and SIP TTN pro-
cesses before Al deposition and the use of TiN anti-reflection coating (ARC) after Al fill process.
Traditionally, either a flow or multi-step deposition process has been used for Al deposition at con-
tact and via levels [174]. The choice of one of these processes depends on the profile, diameter and
aspect ratio of the contact or via.
348 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Figure 5.63 shows Applied Materials’ 300 mm ALPS PVD cluster tool [174]. In the Al flow
process approach, Al film is usually deposited using a standard chamber and then wafer is trans-
ferred to a flow chamber that is run at elevated temperatures. The increased temperature of the
wafer allows Al to flow and planarize the contact and via. In contrast, in the first step of the
FIGURE 5.62
Variation of target voltage with sputtering pressure as function of applied voltage [160].
FIGURE 5.63
ALPS cluster tool of Applied Materials Inc. for 300 mm wafers [174].
3495.5 Aluminum and its alloys
multi-step deposition approach a layer of cold Al is deposited on the TiN wetting layer. This Al
layer is called the nucleation layer or seed layer. Subsequently this wafer is heated to a chosen
temperature range and then Al is sputter deposited to form contact or via. Typically, cold Al is
deposited at much higher power than its hot Al counterpart.
5.5.3.1 Film propertiesAl film thickness requirements are generally higher than most materials we have discussed so far
for IC applications. Like other materials, resistivity of Al and Al alloy films is inversely propor-
tional to the film thickness. The resistivity values of the Al film also depend on the temperature at
which it was deposited or annealed after deposition. Typically, Al film resistivity after annealing
goes as low as 2.7 μΩcm.
The microstructure of sputter-deposited Al film can vary depending on the sputtering process
parameter and substrate temperature (see Chapter 2 for details). Figure 5.64 shows a cross-sectional
TEM micrograph of Al-0.5 Cu film deposited on the Ti underlayer over SiO2 [165]. Note the pre-
cipitation of Al2Cu precipitates at the grain boundaries. One micron thick sputtered blanket Al film
on (001) Si wafer showed strong (111) preferred orientation [175]. Similar results have been
reported from studies in which Al films were deposited on glass substrate for liquid crystal display
applications (see Chapter 6). However, it is possible to tailor Al film texture by changing the sput-
tering process parameters. The 500 m thick Al-1Si lines of various widths deposited on Ti and TiN
underlayer over (001) Si wafers and annealing at 460�C showed: (a) a near-bamboo grain structure
in less than 2 μm wide lines and (b) a polycrystalline microstructure of average grain size of 1 μmin wider than 2 μm lines [167].
The early work on electromigration in bulk material revealed that the driving force for mass
transport has two components. The first component is the force experienced by the ionic core of
the metal atom due to the presence of potential gradient across the conductor. This field-ion force
scales with valence of the metal and the direction of the force is opposite to that of electron flow.
The second component originates from interaction between electrons and polarized vacancy�metal
FIGURE 5.64
Cross-sectional TEM image showing presence of lenticular Al2Cu precipitates on grain boundaries and at Ti/
Al-Cu interface in Ti/Al-Cu/TiN stack [165].
350 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
ion complexes. This is often called electron wind force. In Al, electron wind force was estimated to
be much higher than the field�ion force. If J is the flux of materials and ν is the drift velocity,
according to Nerst�Einstein diffusion relationship, J will be given by
J5Nν5NDF
kT(5.2)
where N is the density of moving species, D is the diffusivity, k is the Boltzmann’s constant and T
is the temperature. In the case of an Al strip, rather than bulk material, the flux of material (J) can
be given by
J5ND
kTeZρj (5.3)
where e is elemental charge, Z is the effective charge number, ρ is the resistivity of the strip mate-
rial and j is the current density.
Blech found that electromigration failure of the interconnect line did not occur because of the
absence of drift below a critical length of the interconnect line [123,124]. A mechanical driving force
for back-diffusion developed because of the mechanical stress gradient in the interconnect lines.
This is called the Blech effect. Taking into account this driving force, mass flow can be given by
J5ND
kTeZρ j2Ω:
Δσl
� �(5.4)
where Ω is atomic volume, Δσ is the stress difference at the ends of the strip and l is the length of
the strip. For disappearing mass, J(lc)5 0 and
ðj:lcÞ5Ω:ΔσeZρ
(5.5)
As a result, drift velocity ν(l) can be expressed as a function of strip length:
vðlÞ5 D
kT:e:Z:ρjð12 lc
lÞ (5.6)
For Al strip, the estimated strip length was about 5 μm below which drift velocity was zero.
As illustrated in Figure 5.48(a), under the influence of large current density (105 to 106 A/cm2),
net material transport is possible because of momentum transfer from conduction electrons to the
metal ions. In a real interconnect material, severity of mass transfer will depend on the grain size,
grain geometry, chemistry of the alloy, diffusion, temperature rise and also the nature of the passiv-
ation and under-layer. It has been noted that the divergence in high current density induced material
transport, both material deficient areas (voids) and areas with material accumulation (hillocks,
whiskers) can form.
Material transport is dependent on the material homogeneity, temperature gradient and also the
architecture of interconnect. Figure 5.65(a) illustrates such mass transport phenomenon in the pres-
ence of grain boundaries and interfaces [176]. Note that both voids and hillocks can form, which
can cause electromigration failure of the interconnect line.
Figure 5.65(b) shows an example of electromigration failure in a real Al interconnect line. If
diffusion of atoms are considered by taking grain boundaries, triple junctions, interfaces and bulk
3515.5 Aluminum and its alloys
into account, the interpretation of electromigration failure of an interconnect line needs to consider
the grain structure of the interconnect line.
Figure 5.66 illustrates the effect of grain structure in relation to the interconnect line width on
the lifetime of the interconnect [121]. When line width/grain size is more than 1, the interconnect
microstructure has to have a metal/barrier interface and large grain boundary area for rapid
Electronflow
Cathode
Void Hillock
Al film Anode
SiO2 film
FIGURE 5.65
Electromigration: (a) schematic illustration and (b) hillock and void formation in metal lines [176].
FIGURE 5.66
Lifetime variation with ratio of line width/grain size as a function of different grain structure [121].
352 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
diffusion of atoms to occur. In contrast, when grain size is comparable to the interconnect line
width, the structure becomes near-bamboo. At the junction of polycrystalline and near-bamboo
structure domains, the lifetime would be minimum because of possible fast diffusion of atoms in
the direction of material transport at few grain boundaries and metal/barrier interfaces that can cre-
ate voids rapidly. In an ideal bamboo grain structure, diffusional transport of material is possible
only at the metal/barrier interfaces because there are no grain boundaries in the direction of mate-
rial transport. As a result, electromigration failure will be prevented because of slower interface
and lattice diffusion of atoms.
In a polycrystalline and fine grain microstructure, once a void is created at grain boundary or
triple junction, the cross-sectional area of the interconnect line decreases, which increases the cur-
rent density. This in turn increases the temperature because of Joule heating. Higher temperature
increases material transport because of enhanced diffusion, which leads to growth of the voids and
eventually failure of the interconnect line. The best resistance to stress voiding and electromigration
was noted in the Al-0.5Cu alloy. In the case of copper-containing alloys, copper atoms diffuse to
the grain boundaries to form Al2Cu precipitates.
As shown in Figure 5.49(b) Al-Cu alloy produced a minimum number of voids per mm [131].
As shown in Figure 5.49(a), Al-Si alloy has inferior resistance to electromigration than Al-Si-Cu
alloy [129]. An elaborate TEM study of sputtered Al-1Si films showed a network of defects (voids)
around Si precipitates in 1.2 μm wide lines after an electromigration test at 250�C and 33 106
A/cm2 current density [131].
Al and Al alloy film thickness for interconnect applications is typically higher as compared to
other materials we have discussed so far. In Chapter 2, optimization of Al-0.5Cu film Rs uniformity
for one of the commercial targets was discussed (Figure 2.66) [162]. In order to achieve an Rs uni-
formity of 1.5% (1σ), for the Applied Materials’ Endura target, target-to-wafer spacing had to be
adjusted at a different life of the target. Figure 5.67(a) shows Rs non-uniformity variation with the
number of deposited wafers for Applied Materials’ Hot Al process for 200 mm wafers [174]. Note
that with increasing use of the sputtering target, a target-to-wafer spacing compensation of 1.1%
(1σ) was applied to achieve less than 2.0% (1σ) Rs non-uniformity.
5.5.3.2 Defect generationLike all other processes, Al and Al alloy sputtering targets also produce in-film particles. From an
Al metallurgy point of view, it is difficult to completely eliminate inclusion incorporation into the
molten Al during melting and casting practice of target manufacturing. Molten Al rapidly forms
alumina inclusions, which are dielectric in nature. If the size of the inclusions is fine and inclusions
are uniformly distributed in the Al target, the severity of arcing can be minimum. However, if the
inclusion size is bigger and the cluster of inclusions are found in sputtering targets, in-film particles
in the form of splats (molten droplet-like appearance) can readily be seen in the sputter-deposited
film [177�180]. Al splats form because of localized melting of Al at the target surface.
Figure 5.67(b) shows variation of in-film particles with number of deposited 200 mm wafers
using the Hot Al process of Applied Materials, Inc. [174]. In recent years, melting and casting prac-
tice of Al and Al alloys has improved significantly to control alumina inclusion size in sputtering
targets. Other features such as voids, entrapped gas and metallic impurities can also produce in-
film particles [177]. This topic is discussed in greater detail in Chapters 3 and 8.
3535.5 Aluminum and its alloys
Stress development in sputtered Al and Al alloy films under thermal cycling has been studied
extensively using x-rays and wafer curvature measurements. A large volume of results on the rela-
tionship between residual stresses and hillock growth is readily available in thin film literature.
Chapter 6 discusses this topic in greater detail. Hence, we look at only one example of high purity
Al film (0.64 μm thick) on Si substrate subjected to thermal cycling between 50�C and 460�C(Figure 5.68) [181].
Initially, as-deposited Al film has tensile stress. During heating film stress changes linearly with
temperature from tensile to compressive and attains a value of 100 MPa. Upon further heating up
to 470�C, a transition from elastic to plastics deformation takes place at about 180�C. Up to about
470�C, Al film stress remains almost unaltered. On cooling, Al film stress changes from compres-
sive to tensile. The maximum tensile stress after thermal cycling was of the order of 180 MPa.
5.5.3.3 Optical propertiesAnother property of Al and Al alloy films that has been studied in great detail is reflectivity. The
reflectivity measurement is straightforward and routinely done using standard equipment. However,
FIGURE 5.67
Variation of (a) Al film Rs non-uniformity and (b) in-film particles with wafer number in Applied Materials’ hot
Al process (200 mm wafer) [174].
354 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
modeling reflectivity and predicting resistivity and thermal conductivity requires a good under-
standing of the Drude model for modeling of dielectric function [182]. Here some of the experi-
mental results of Al, Al-Si, Al-Cu, Al-Ti, Al-Cr, Al-Cu-Ti, Al-Cu-Cr and Al-Si-Cu alloy films are
discussed [183�185]. Al alloys films are used in recordable and rewritable compact discs for
greater reflectivity, which also needs reduced electrical conductivity (higher resistivity). Al has an
fcc crystal structure and free electron bands. Hence, reflectivity of Al is high in the visible spec-
trum of light with an absorption band at 800 nm. Surface roughness Al film also influences reflec-
tivity. If Al film surface roughness is controlled well, reflectivity is maintained in the ultraviolet
region of the spectrum with an absorption edge between 80 nm and 90 nm.
Historically, evaporation has been used for Al film deposition to control surface topography.
Sputtered Al film typically has greater surface roughness, inferior resistance to hillock and whisker
formation and low hardness. Alloying of Al with elements such as Cu, Ti and Cr has been done to
tailor properties of sputtered Al alloy films [185]. Al alloys help achieve finer grain size and lower
surface roughness in sputtered deposited films with a compromise on reflectivity and electrical
conductivity.
Various binary and ternary sputtered Al alloy films have been examined to understand reflec-
tance characteristics along with simulation of dielectric function [183�185]. Figure 5.69 shows an
experimentally measured reflectance spectrum of Al, Al-Cu, Al-Cu-Ti and Al-Cu-Cr alloy films
[185]. Sputtering of Al film showed the lowest reflectivity because of greater intraband absorption
than the Al-Cu alloy film (Figure 5.69(a)) [185]. Orientated grains of Al film and less impurity
were believed to be the reason for the lowest reflectivity. All three Al-Cu alloy films showed simi-
lar reflectance spectrum with slight shift of intraband transition (near 800 nm) towards the visible
spectrum. In the infrared region, Al and three Al-Cu alloy films had similar reflectance. The addi-
tion of Ti and Cr to Al-0.5 Cu alloy significantly changed the reflectance spectrum (Figure 5.69(b))
[185]. Intraband transition (near 800 nm)) moved into the infrared region of the visible spectrum,
i.e., at 640 nm for Ti and 660 nm for Cr cases. These results were rationalized in terms of film
microstructure and surface roughness.
FIGURE 5.68
Stress-reversal in Al thin film under thermal cycling [181].
3555.5 Aluminum and its alloys
Figure 5.70 shows the experimentally measured reflectance spectrum of Al-Ti and Al-Cr alloy
films [184]. The reflectance spectrum of binary Al-Ti and Al-Cr alloys film showed a drop in
reflectance with increasing alloy content. Intraband transition in Al was recorded at 12000 cm-1. In
heavily alloyed Al alloy this was absent. In order to extract resistivity data from the reflectance
spectrum, it was important to simulate the dielectric function (ε(ν)), which is given by
εðνÞ5 11Xi
χiðνÞ (5.7)
where χ is the susceptibility of interband transition and, as per the Drude model, susceptibility can
be expressed as
χDrudeðνÞ5 12Ω2
p
ν2 1 1νΩT
(5.8)
FIGURE 5.69
(a) Reflectivity variation in Al films as a function of copper content, and (b) reflectivity variation in Al-1.0% Cu
films with 2% titanium and chromium additions [185].
356 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
where Ωp is the plasma frequency, ν is the frequency in terms of wave numbers and ΩT is the
damping constant. Plasma frequency Ωp is given by
Ω2p 5
ne2
ε0m(5.9)
where n is the carrier concentration, and m is the electron mass.
In order to simulate the reflectance spectrum of Al-Ti and Al-Cr alloys, the base line parameters
extracted from the Al film were adjusted. Figure 5.70 also shows the results of the dielectric func-
tion simulation using the Drude model [184]. The interband transition in Al is shown at
12000 cm21[182]. The reappearance of the intraband transition was noted in annealed (450�C,30 min) films. However, the overall reflectance of alloy films decreased with increasing alloy
content.
On measuring film resistivity (ρ) from the van der Pauw relation [resistivity5 sheet resistance x
thickness], thermal conductivity (λ) was calculated using Wiedemann�Franz law, given by
λ5 L0T
ρ(5.10)
where L0 is the Summerfield constant, T is the temperature and ρ is the film resistivity.
FIGURE 5.70
(a) Plots at the top show reflectance variation in Al-Ti and Al-Cr alloy films with wave number, and (b) plots at
the bottom show dielectric function variation in Al-Ti and Al-Cr alloy films with wave number [184].
3575.5 Aluminum and its alloys
5.6 TantalumIn previous sections we reviewed Al(Cu) interconnect-related topics including Ti and/or TiN bar-
riers as applies to larger technology nodes. Cu interconnect has been used for its enhanced resis-
tance to electromigration and low resistivity for smaller technology nodes [2,3,186,187]. With this
change, it was required to use additional thin film layers to improve adhesion between the Cu and
dielectric layer and also prevent diffusion of Cu into the dielectric. The most important diffusion
barrier layer materials for semiconductor applications are Ta, TaN and the bi-layer of TaN/Ta. In
the TaN/Ta bi-layer, TaN is first deposited on the dielectric because TaN has good adhesion to
dielectric materials (e.g., SiO2, low k dielectrics). In addition, TaN help deposit low resistance bcc
α-Ta film. α-Ta film has much lower resistivity than tetragonal β-Ta film. If α-Ta film is directly
sputter deposited on the dielectric, the result will be growth of high resistivity β-Ta film.
Figure 5.71 shows a representative Cu interconnect structure fabricated using a dual-damascene
process [186]. In this figure TaN is shown by the solid conformal line at the bottom of the trench
and vias, while Ta is shown by the dotted conformal line above TaN. The α-Ta layer acts as an
adhesion layer for the Cu seed layer upon which thick Cu layers are deposited using electroplating.
The diffusion barrier Ta and/or TaN layers deposited on the side walls of the trench and vias did
not affect the overall electrical conductivity of the Cu interconnect line. Figure 5.72 shows various
steps of fabricating a Cu interconnect line using AMAT’s EnCoRe II PVD cluster tool [188]. For
deep features, as in the case of smaller technology nodes, TaN film can be deposited using atomic
layer deposition (ALD) in place of reactive sputtering of Ta [189].
Ta is known as refractory metal because of its high melting point (3017�C). Ta has a grayish
silver color and high density. Table 5.9 lists some of the basic properties of bulk Ta. High purity
Ta is ductile in nature and can be drawn to form wire.
Ta is extracted from columbite and tantalite oxide mineral sources, which also contain niobium
(Nb). Since Ta and Nb have similar chemical properties, it is difficult to separate them. Columbite
and tantalite mineral deposits are concentrated in Nigeria. The most stable oxide of Ta is Ta2O5,
which is acidic in character. Hence, ore is made to undergo fusion with alkali to form tantalets,
FIGURE 5.71
Dual damascene interconnect structure showing usage of Ta and Cu in chip [186].
358 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
which is sparingly soluble in water [190]. HCl acid treatment of tantalets produce hydrated oxide,
which is brought into solution by treating it with an aqueous solution of HF. Fractional crystalliza-
tion of K2TaF7 and K2NbOF5 separates Nb and Ta. Fluoro-complex present in aqueous solution
can either be precipitated as hydrated oxide of Ta by treating it with ammonia or double fluoride
(K2TaF7) by treating with potassium fluoride. Ta metal powder can be extracted from its pentaox-
ide by a calciothermic reduction reaction using calcium (Ta2O51 5 Ca5 2 Ta1 5 CaO). Ta metal
powder is then isolated from CaO by an acid treatment of the reduced product. Alternatively,
K2TaF7 double fluorides can be reduced to Ta by making it react with Na
(K2TaF71 5 Na5Ta1 5 NaF1 2 KF). Finally, alkali fluorides are leached off to collect Ta metal
powder. First, Ta hydride powder and metals with high oxygen affinity metal (e.g., Mg, Ca) are
reacted in a chamber under suitable argon pressure. In order to produce low oxygen (preferably
,100 ppm) containing Ta, 0.3 to 0.5 wt% Mg was used for oxygen removal [191]. Later, Mg was
removed from the powder by evaporation and selective leaching/dissolution of the powder.
Subsequently, these powders were processed using powder metallurgy and conventional
FIGURE 5.72
An example of barrier/Cu seed deposition process using Applied Materials’ SIP EnCoRe sputtering tool [188].
Table 5.9 Properties of Tantalum (Ta)
Property Value
Atomic number 73
Atomic weight (amu) 180.947
Crystal structure at RT BCC
Density (kg/m3) 16650
Melting point (�C) 3017
Linear thermal expansion coefficient (k21) 6.33 1026
Thermal conductivity (Wm21k21) 57
Electrical resistivity (Ωm) 13.53 1028
Young’s modulus (GPa) 186
Vickers hardness (MPa)� 873
�Grain size dependent.
3595.6 Tantalum
thermomechanical processing steps to form high density Ta plates. An excellent description of Ta
powder production with low oxygen content has been given elsewhere [191].
5.6.1 Tantalum processing and property control5.6.1.1 Thermomechanical processingWhile common practice is to use powder metallurgy methods to produce Ta billets, Ta can be
electron-beam melted for using its refining capability. In the case of electron-beam melted Ta, bil-
lets typically show very large grains [192]. As a result it is difficult to produce homogeneous mate-
rial in terms of microstructure and crystallographic texture. As shown in the Ta sputtering target
manufacturing flow chart (Figure 5.73), Ta being ductile in nature, it can be cold- or hot- worked
to break large grains into smaller grains [193�202]. Typically, Ta is heat treated in an inert atmo-
sphere or in a vacuum to avoid oxidation of Ta. Several hot/cold working steps and annealing heat
treatment steps are commonly used to produce homogeneous microstructure and texture [197].
A large number of studies revealed that wrought Ta plate may have both texture gradient from
the surface to the half-thickness plane and also textural bands in the form of dark and light areas
[203�208]. The surface of Ta plate may have strong {100}, uvw. texture, while the mid-plane
may show {111}, uvw. texture. For example, orientation distribution function sections at
surface, quarter plane and mid-plane shown in Figure 3.7 illustrates such variation of texture com-
ponents from surface to the mid-plane of a 4 mm thick Ta plate. This is attributed to the inhomoge-
neous plastic deformation of TA in the thickness direction. In textural bands, dark and light grains
FIGURE 5.73
Representative flow chart for Ta target manufacturing [based on 192�201].
360 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
typically show {100}, uvw. and {111}, uvw. textures, respectively. Texture measurements
using EBSD confirmed orientation of these grains and their alignment in the bands. Figure 3.6
shows such bands in an annealed Ta plate.
As shown in Figure 5.74, the inhomogeneity of the microstructure and texture initiates from defor-
mation during cold rolling of Ta [200]. Note the subdivision of a single Ta grain by deformation bands.
Pole figures measured using EBSD show orientation spread. As one would expect, large changes in
RD
TD
100
111
TD
TD
RD
110
30 μm
TD
RD
RD
Max 26.01
Min 0.00
20.0010.99
6.03
3.31
1.82
1.00
0.55
FIGURE 5.74
SEM image from 70% cold-rolled tantalum showing deformation bands that subdivide a single grain and
corresponding pole figures measured using EBSD showing the orientation spread associated with the
banding [200].
3615.6 Tantalum
orientation was seen across these bands in cold-rolled Ta. Subsequent isothermal annealing of these Ta
samples at 900�C and 1200�C (for 1 h) produced a very inhomogeneous microstructure [200].
Figure 5.75 shows banding of recrystallized grains and associated texture variation [200]. In the
fabrication of electron beam melted Ta sputtering targets, some degree of texture banding is always
seen [193,194]. In one case, parameters such as the texture gradient severity parameter (Ω) and
texture banding severity parameter (λ) were developed to quantify texture gradient and banding in
thickness direction [194]. These are given by
Ω51
h
ðh0
dωdδ
dδ (5.11)
λ51
h
ðh0
d2ωdδ2
dδ (5.12)
FIGURE 5.75
EBSD image showing microstructure of annealed Ta. Pole figures were measured from are shown by dotted
lines [200].
362 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
In the above equations, h is the sample thickness, δ is the depth increment and Ω is the devia-
tion value. Powder metallurgy processed Ta was found to show minimum banding.
Texture gradient and textural banding in Ta targets were found to change the deposition rate
and thin film Rs uniformity during sputter deposition of Tathin films. Figure 5.76 shows two sput-
tered Ta targets�one of which has eroded uniformly and the other non-uniformly [194]. The non-
uniform sputtered surface in the second target corresponds to larger values of texture gradient
severity (Ω5 128 mm21) and texture banding severity (λ5 10.3 mm21).
5.6.1.2 Tantalum target manufacturingFigure 5.73 shows a representative flow chart for tantalum target manufacturing [193�202]. For
both powder metallurgy and electron beam processed Ta billets, a combination of hot pressing, hot
rolling, cold rolling and annealing steps is used for Ta target fabrication [194�199]. Optimization
of the microstructure and crystallographic texture is done by choosing suitable parameters for the
above processes. A variety of Ta plates are commercially available for sputtering target
manufacturing. However, some target manufacturers may want to develop more cost-effective and
unique Ta targets with a more controlled microstructure and texture.
A semi-finished Ta target is typically subjected to conventional machining operations to achieve
desired shape and dimensions. The cost of monolithic Ta targets can be very high and hence most
Ta targets are bonded to inexpensive backing plates (e.g., Cu alloys, Al alloys). Both solder-bonded
and diffusion-bonded Ta targets are in demand for electronic application. Typically, Ta targets for
300 mm wafers are diffusion bonded to Cu alloy backing plates. The most common practice for dif-
fusion bonding Ta to a backing plate is hot isostatic pressing.
Solder bonding of Ta target involves application of a low melting alloy between the Ta target
and the backing plate to hold them together after solidification of the solder alloy. Good bonding is
ensured by checking the bond coverage using non-destructive testing such as ultrasound. Following
the bonding operation, target assemblies are finished with required machining, polishing and grit-
blasting/arc-spraying (for particle trap formation) operations. On achieving the desired external
dimensions and surface roughness, bonded targets are transferred to the cleaning section for
degreasing, precision cleaning and packaging. Individual manufacturing steps have been discussed
in Chapter 4.
FIGURE 5.76
Images of Ta targets: (a) uniformly eroded and (b) non-uniformly eroded targets [194].
3635.6 Tantalum
5.6.2 Tantalum and TaN thin films5.6.2.1 Film propertiesSputter-deposited Ta, TaN and TaN/Ta bi-layer are integral parts of Cu interconnect. As discussed
in previous sections of this chapter, optimization of grain size and crystallographic texture is impor-
tant for controlling performance of sputtering targets in terms of deposition rate, thin film proper-
ties and target life. Most commercially available Ta targets offer average grain sizes between
20 μm and 50 μm.
Figure 5.77 shows a schematic of the EnCoRe II PVD cluster tool by AMAT used for fabricat-
ing Cu interconnects [209]. Note that these chambers are used for depositing barrier and Cu seed
layers as shown in Figure 5.72. Like other materials, Ta sputtering targets show grain orientation
dependent sputter yield. Grains with (110) plane-normal oriented within 15� of the target face
showed highest sputter yield (0.95 atom/ion at 400 eV) followed by (110) and (111) planes in
decreasing order [210]. Figure 5.78 shows the inverse pole figure and relative sputter yields in rela-
tion to the grain orientation [210]. In this case, sputter yield data were generated from physical ero-
sion depth measurements on individual grains (up to 26 grains) in a 99.999% purity Ta target. In
another study, trajectories of emitted Ta atoms were measured during sputtering [211].
In the last two decades, microstructure, phase transformation, texture, stresses and resistivity of
Ta and TaN films have been studied extensively [212�227]. In one of the studies, phase evolution
in sputtered Ta films was studied using x-ray in-situ experiments [219]. In this study, substrate was
glass with low surface roughness. Figure 5.79(a) shows the evolution of phases in Ta film with
deposition time [219]. RF sputtered films initially (up to 7 min, 45 nm thickness) showed growth of
amorphous Ta film followed by tetragonal β-Ta film (upto 2 min, 15 nm thickness) and finally
α-Ta film (30 min, 190 nm thickness). Simultaneous growth of β-Ta (002) and α-Ta (110) was also
noticed in some cases. Figure 5.79(b) shows SEM images of Ta film that had 45 nm of amorphous
layer, 15 nm of β-Ta layer and 190 nm of α-Ta layer [219]. Post-deposition x-ray characterization
of the films showed β-Ta (002) and α-Ta (110) peaks along with background resulted from
FIGURE 5.77
Applied Materials’ 200 mm SIP EnCoRE Ta(N) tool for barrier application [209].
364 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.78
Inverse pole figure showing variation of sputter yield as a function of orientation of grains [210].
FIGURE 5.79
(a) Results of in-situ X-ray synchrotron study showing phase transformation in sputtered Ta film and (b)
cross-sectional TEM image showing Ta film microstructure [219].
3655.6 Tantalum
amorphous Ta film and glass substrate (Figure 5.80) [219]. In contrast, a number of studies showed
evolution of β-Ta when Ta films were sputter deposited on silicon dioxide and other low k dielec-
trics. β-Ta is the high resistance phase and the resistivity value varies between 150 μΩcm and
260 μΩcm. Figure 5.81(a) shows film thickness dependent resistivity of β-Ta film deposited on
SiO2 [186]. A moderate drop in β-Ta film resistivity was recorded with increasing film thickness.
α-Ta is the low resistance phase and this phase is grown by using TaN underlayer. If TaN film is
deposited using reactive sputtering of Ta, a minimum thickness of TaN film is required to grow
α-Ta film in metal mode sputtering. In one of the studies, a minimum TaN thickness of 3 nm was
required to achieve α-Ta phase. Figure 5.81(b) shows the variation of sputtered α-Ta film resistiv-
ity as a function of film thickness when α-Ta was deposited on a 3 nm thick TaN layer that had
300 μΩcm resistivity [186]. Figure 5.82 shows the minimum nitrogen required (flow rate) in the
TaN layer to have low resistivity α-Ta film [186]. In this case, no shield was used and a relatively
large target-to-substrate spacing was used.
Reactive sputtering of Ta with an Ar1N2 gas mixture generates various phases such as Ta3N4,
Ta3N5, Ta4N5, Ta5N6, TaN, TaN0.43 and Ta2N, which have different electrical resistivity [186,187].
Variation in chamber setup (e.g., with/without shield, target-to-substrate spacing, ionization) and
nitrogen flow rate produces very different TaN resistivity values [186]. Figure 5.83 (p. 368) is a
plot showing resistivity values of various Ta-N phases that are N/Ta ratio dependent [186]. In par-
ticular, resistivity of TaN can vary significantly depending on the chamber setup and nitrogen flow
rate. At zero nitrogen flow rate, resistivity of TaN was of the order of 150�160 μΩcm (equivalent
to β-Ta resistivity). With increasing nitrogen flow rate, the deposition rate dropped and resistivity
jumped by two orders of magnitude [186].
FIGURE 5.80
XRD patterns showing phases in Ta films under grazing incidence and Bragg-Brentano conditions [219].
366 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.81
Film thickness dependent resistivity variation in (a) β-Ta films deposited on SiO2 (without TaN underlayer)
and (b) α-Ta films deposited 3 nm thick TaN underlayer [186].
0 10 20 30 40 50 60
Nitrogen flow rate (sccm)
α-Ta
β-Ta
0
2
4
6
8
10
12
14
She
et r
esis
t (O
hm/S
q; 1
45nm
Ta)
FIGURE 5.82
Variation of sheet resistance of 145 nm thick Ta film deposited on 5 nm thick TaN underlayer as a function of
nitrogen flow rate [186].
3675.6 Tantalum
Applied Materials’ SIP EnCoRe II Ta(N) process has been an important one for depositing
TaN/Ta barrier (#100 A thickness) for 300 mm wafers. In combination with SIP EnCoRe II RF Cu
seed layer (#300 A thickness), it provides excellent stress migration and electromigration proper-
ties. Figure 5.84(a) shows TaN sheet resistance and Rs non-uniformity variation with number of
deposited wafers for barrier application [188]. Mean sheet resistance is 182.6 Ω/sq. Full face ero-
sion of Ta target is one of the features of this technology. The other application of PVD TaN films
is barrier layer in back-end packaging. Figure 5.84(b) shows TaN sheet resistance and Rs non-
uniformity variation with number of deposited wafers for bond pad application [188].
A number of studies have focused on the measurement of intrinsic stresses that develop in sput-
tered α-Ta and β-Ta films and variation in stress with thermal cycling [212,218,220].These studies
used thermally oxidized silicon wafers. Typically, β-Ta film sputtered at low Ar pressure shows
large compressive stress, while high pressure films show tensile stress. As shown in Figure 5.85,
for 100 nm thick Ta film, below 105 mTorr Ar pressure, β-Ta film stress was compressive in
nature. At a pressure higher than 105 mTorr, β-Ta film had tensile stress.
Stresses in thin films can also depend on the method of deposition. Electron beam evaporated
film produced large tensile stress, which is shown in Figure 5.85 [212]. As-deposited β-Ta film
sputtered at 10 mTorr has large compressive stress (Figure 5.86, p. 370) and resistivity of
200 μΩcm (Figure 5.86(a)) [212]. On heating, the compressive stress increases moderately with
increasing temperature up to about 600�C. During heating, β-Ta resistance also drops by a small
magnitude up to 600�C. Between 600�C and 750�C, about 10% relaxation in compressive stress
was recorded. Above 750�C, a sharp relaxation in stress took place which corresponded to the β-Ta(tetragonal) to α-Ta (bcc) transformation. On cooling, tensile α-Ta film stress slightly increased
with decreasing temperature.
These results suggest that the stress relaxation was associated with β-Ta to α-Ta phase transfor-
mation. β-Ta to α-Ta transformation took place at much lower temperature (300�C�400�C) in oxy-
gen free β-Ta films [220]. On exposing the deposited films to various amounts of oxygen to form
oxide layers on Ta film, the β-Ta to α-Ta phase transformation was arrested because of oxygen
intake from oxide layers. The lower oxygen content of the Ta film appeared to lower the phase
100 1000 10000
Resistivity (micro-Ohm-cm)
0
0.5
1.0
1.5
2.0
N/T
a ra
tio (
RB
S)
Ta3N5
Ta4N5
Ta2N
Ta
Ta5N6
TaN0.43
TaN
FIGURE 5.83
Relationship between N/Ta ratio and resistivity in TaxNy films [186].
368 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
2.0
1.0
0.0
–1.0
–2.0
–3.00.0 20.0 40.0 60.0
Compressive
Tensile
Str
ess
(1 x
1010
dyn
e/cm
2 )
Evaporated Ta, 1-2 x 1010 dyne/cm2
Sputtered TaBias constant = 0 V
80.0
Pressure (mTorr)
100.0 120.0 140.0
FIGURE 5.85
β-Ta film stress as a function of Ar pressure. Also note stress in electron beam evaporated Ta film [212].
0 4,000
1,000020
40
60
80
100 5
4
3
2
1
0
Number of wafers
Non
-uni
form
ity (
%,1
σ)
2,000 3,000 4,000 5,000
8,000 12,000 16,000 20,000Number of wafers
0
5
10
15
20
Rs
non-
unifo
rmity
(%
/s)
0
100
200
300
400(a)
(b)
Mean Rs = 182.6WIW = 1.55WTW = 2.05
Rs, Avg. = 88.7Ω/sqRepeatability = 1.9%, 1σ
Rs, Non-uniformityAvg. = 1.4%, 1σ
Rs
(Ω/s
q)R
s (Ω
/sq)
FIGURE 5.84
Variation of TaN sheet resistance and non-uniformity with number of 300 mm deposited wafers for (a) barrier/
seed application, and (b) bond pad application [188].
3695.6 Tantalum
transformation temperature range [220]. The intrinsic compressive stress of as-deposited β-Ta film
can also vary with substrate bias voltage. With increasing negative bias voltage, an initial domain
of an almost linear increase in compressive stress followed by a peak and then gradual decrease
was recorded [213].
5.6.2.2 Defect generationBetter particle performance of any reactive sputtering process is important for yield improvement.
Figure 5.87 shows particle count data as a function of the number of wafers for TaN/Ta bi-layer
films deposited using Applied Materials’ EnCoRet II Ta(N) sputtering tool [209]. It is important
to note that particle count on wafer also depends on the maintenance schedule of the PVD tool. In
addition to disc shape Ta targets, hollow cathode magnetron Ta (HCM Ta) targets are also used for
Cu interconnect fabrication in order to use high density plasma.
Figure 5.88 shows trends of TaN film resistivity and N/Ta ratio variation with increasing N2:Ar
flow rate in an Novellus’ Inova tool [228]. Note evolution of various phases with increasing N2
3Beta–Ta
Beta–Ta
Tensile
Compressive
Elasticstress
Flowstress
Alpha–Ta
(a)
(b)
Alpha–Ta
2
1
0
2
Str
ess
(1 x
1010
dyne
/cm2 )
Res
istiv
ity (
100
μohm
-cm
)
1
0
–1
–2
–30 2 4 6
Temperature (100°C)8 10
FIGURE 5.86
Variation of resistivity and stress in Ta film during thermal cycling. 10 mTorr Ar and no substrate bias used
[212].
370 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
0 3,000
100
80
60
40
20
09,000
Number of wafers
Avg. Mech >0.09 μm = 2.3
Avg. In film >0.12 μm = 3.5
Particle performance
Par
ticle
s
15,000 21,000
FIGURE 5.87
In-film defects variation with number of wafers for SIP EnCoRE II Ta(N) bi-layer re-sputter process [209].
500
450
400
350
300
250
200
150
100
50
0
2
1.8
1.6
1.4
N:T
a ra
tio
Res
istiv
ity (
μohm
cm
)
1.2
1
0.8
0.6
0.4
0.2
00 0.05 0.1 0.15 0.2
N2: AR flow ratio0.25 0.3 0.35 0.4
Ta tetragonal(002)
TaNx bcc(110)
TaNx fcc (200)
TaNx fcc (111)
TaNx bcc (110)+ Ta tetragonal
Resistivity
N/Ta
FIGURE 5.88
Variation of TaN resistivity and N:Ta ratio with increasing nitrogen flow in a HCM sputtering tool. Note
structure variation in TaN and also absence of any hysteresis effects [228].
3715.6 Tantalum
content in N21Ar mixture. At very low N2 content, deposited film is a mixture of β-Ta (tetrago-
nal) and TaNx (bcc). With increasing N2 content in sputtering gas, film transforms to bcc TaNx and
finally to fcc TaNx. No hysteresis was noted in reactive sputtering of Ta to form Ta-N phases.
Similar to planar target, Ta HCM targets generate particles that often originate from re-deposited
flakes (Figure 5.89) [229]. Because of its shape, some parts of a HCM accumulate more re-deposits
than the remaining parts. The ring-shaped area shown in Figure 5.89 generated more loose flakes
than other parts in a Ta HCM target for 200 mm wafers. These flakes disintegrate and form fine
particles during the sputtering process.
5.7 Copper and its alloysFor smaller technology nodes, high purity copper (Cu) and copper alloys (e.g., Cu-Al) are the
choices for interconnect material because of their improved resistance to electromigration and low
enough resistivity [2,230�236]. One of the uses of sputtered Cu film in interconnect formation is
seed layer, which is deposited over the diffusion barrier layer (e.g., TaN/Ta). Sputtered Cu films
are also used in packaging applications. 99.999% and higher purity Cu sputtering targets are the
choices for interconnect and packaging applications. As shown in Figure 5.90, dual-damascene is
the most common method of forming Cu-based interconnects [237]. Some Cu alloys (e.g., Cu-Mn,
Cu-Mg) also have potential for producing self-forming diffusion barrier layers [238�249]. During
preparation of this text, these alloys were only investigated at the research and development level.
Cu is a fcc metal and good conductor of heat and electricity. Some of the basic properties of Cu
are listed in Table 5.10. The extraction procedure of Cu from its sulfide ores has been discussed
elsewhere [250]. Various grades of Cu and Cu alloys are commercially available for purchase, but
suppliers of high purity Cu are small in number. Most sputtering target manufacturers purchase Cu
billets from these suppliers. Typically as-cast billets show large grains (up to a few mm). However,
it is possible for a sputtering target manufacturer to buy lower purity Cu and purify it to higher
purity grade. Electrolytic refining of Cu is the most common practice that produces high purity
FIGURE 5.89
Image showing formation of flakes inside Ta HCM targets used for coating 200 mm wafers [229].
372 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
porous Cu sponge [251]. Vacuum re-melting of such deposits is required to produce bulk Cu billets,
which are eventually thermomechanically processed to make sputtering targets. Note that Cu alloys
(e.g., C18200, C18000, Cu-Zn alloys) are also used as backing plate materials in sputtering targets,
but these are out of the scope of our discussion.
5.7.1 Copper alloy phase diagramsThe most common dilute Cu alloys for interconnect and self-forming barrier applications are
Cu-Al, Cu-Mn and Cu-Mg. The binary phase diagram of Cu and Al is shown in Figure 4.30.
OxideDeposition
ElectroplatedMetal
Diffusion Barrier/Seed Layer Stack
(PVD)
Lithography/Etch
Metal StackDeposition
Metal CMP
Wstud
Wstud
Wstud
Wstud
Wstud
Wstud
Wstud
Wstud
FIGURE 5.90
Steps of forming damascene structure [237].
Table 5.10 Properties of Copper (Cu)
Property Value
Atomic number 29
Atomic weight (amu) 63.546
Crystal structure at RT FCC
Density (kg/m3) 8920
Melting point (�C) 1084
Linear thermal expansion coefficient (k21) 16.53 1026
Thermal conductivity (Wm21k21) 400
Electrical resistivity (Ωm) 1.723 1028
Young’s modulus (GPa) 130
Vickers hardness (MPa)� 369
�Grain size dependent.
3735.7 Copper and its alloys
The terminal solid solution in the Cu-rich end of the phase diagram has good hot and cold work-
ability for making sputtering target Table 5.11. Figure 5.91(a) shows the binary phase diagram of
copper and manganese (Cu-Mn). γ0 and γv phases are ordered in nature [252]. Dilute Cu-Mn alloys
with less than 8 wt% Mn are single-phase alloys at room temperature and can be easily hot and
cold worked to desired shapes. Figure 5.91(b) shows the binary phase diagram of copper and mag-
nesium (Cu-Mg) [253]. Note that compositions of dilute Cu-Mg alloys lie on the right end of the
phase diagram. The terminal solid solution in Cu-rich end of the phase diagram has maximum solu-
bility of 6.93 at% Mg. MgCu2 has fcc C15-type structure and this has a composition range of 64.7
to 69 at%Cu. Stoichiometric MgCu2 has a melting point of 797�C [253]. Similar to dilute Cu-Mn
alloys, Cu-Mg alloys have satisfactory cold and hot workability for making sputtering targets.
Figure 5.92 (p. 376) shows a generic flow chart for making flat Cu and Cu alloy sputtering targets
[254�258]. Cu and dilute Cu alloy targets can be monolithic, solder bonded or diffusion bonded
depending on the application.
5.7.2 Copper alloy processing and property control5.7.2.1 Thermomechanical processingInformation on thermomechanical processing of less pure Cu is readily available in the literature
[259�264]. However, because the purity of Cu used in sputtering targets is high, it is rather diffi-
cult to produce fine grain size and, in particular, control uniformity of the grain structure. This is
because of the absence of enough solute and particles in high purity Cu. For most advanced semi-
conductor applications, the Cu sputtering target requirement is fine grain size (preferably less than
50 μm). In addition, control of crystallographic texture in the plane and also in through-thickness
direction of the Cu target is important.
In order to achieve controlled grain size and texture, in the first step Cu billets are either cold/
hot pressed or cold/hot-rolled to break the cast structure. The achievable reduction in thickness can
Table 5.11 Properties of Nickel (Ni) and Vanadium (V)
Properties Nickel Vanadium
Atomic no. 28 23
Atomic weight (amu) 58.693 50.941
Crystal structure at RT FCC BCC
Density (kg/m3) 8908 6110
Melting point (�C) 1455 1910
Linear thermal expansion coefficient (k21) 91 8.43 1026
Thermal conductivity (Wm21k21) 7.23 1028 30.7
Electrical resistivity (Ωm) 13.43 1026 203 1028
Young’s modulus (GPa) 200 128
Vickers hardness (MPa)� 638 628
�Grain size dependent.
374 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
01300
(a)
(b)
1200
1084.87°C
871°C∼33.7
85.8 1143°C
1079°C
710°C
1246°C
86.81099°C
707°C
(δMn)
(βMn)
(αMn)
γ(Cu, γMn)
1100 L
L
1000
900
800
700
600
500
400
3000
01100
1000
900
Tem
pera
ture
°C
Tem
pera
ture
°C
800
700
600
500
400
300
0
Mg Cu10 20 30 40
Weight percent copper50 60 70 80 90 100
5 10 20 30 40
797°C
568°C
1084.87°C
552°C65.4
485°C
650°C
0.035
(Mg) Mg 2C
u MgCu2
(Cu)
82.72
30.7
725°C
85.33 97.23
89.7
50 60 70 80 100
10
Cu
20 30 40 50
Weight percent manganese
Atomic percent copper
60 70 80 90 100
Mn
10 20 30 40 50 60
Atomic percent manganese70 80 90 100
FIGURE 5.91
Binary phase diagram of: (a) copper-manganese (Cu-Mn) [252]. and (c) copper-magnesium (Cu-Mg) alloys
[253].
3755.7 Copper and its alloys
be moderate to high depending on the purity of the Cu and processing conditions. A very large
reduction in thickness may cause cracking of the Cu workpiece. In the case of hot pressing and hot
rolling, dynamic recrystallization (DRX) of the Cu is possible in which fine grains nucleate at the
grain boundaries and triple junctions.
Figure 5.93 shows such fine dynamically recrystallized grains in polycrystalline Cu deformed at
400�C up to a strain of 0.2 and at a strain rate of 23 1022 s21 [264]. Growth of such dynamically
recrystallized grains can reconstitute the microstructure of the Cu workpiece without changing the
average grain size. As discussed in Chapter 4, dynamic recrystallization typically shows large undu-
lations in stress versus strain curves if the deformation is conducted in a controlled experiment
(e.g., tension, compression tests). Cold pressed/rolled Cu may recover or even show small recrys-
tallized grains if purity of the Cu is very high and degree of deformation is large. After the first
metal working operation, an intermediate annealing heat treatment is used to homogenize and
soften the Cu workpiece before the final cold-working operation and annealing step.
The final cold-working operation of the Cu workpiece includes room temperature rolling, roll-
ing at cryogenic temperature and equal channel angular pressing (ECAP) [265�267]. In either of
these processes, a large strain is imparted to the Cu workpiece. Characteristics of a deformed
microstructure depend on the strain rate and, extent of recovery.
Figure 5.94 shows some commonly observed microstructural features of deformed Cu [263].
While Figure 5.94(a) shows cell structure in 25% cold deformed Cu, Figure 5.94(b) shows micro-
bands in 18% cold-rolled Cu [263]. At relatively large strain of 98%, the microstructure showed
Billet
High purity Cu
PreheatCold / hotpressing
Intermediateheat
MachiningCu (& B/P)
Finalannealing
Cold rolling(RT/Cryo),
ECAP
Solder/HIPbonding toB/P & NDT
RT/Cryo: Room temp. / CryogenicECAP: Equal channel angular pressingB/P: Backing plateHIP: Hot isostatic pressingNDT: Non-destructive testing of bond
Finalmachining
Inspection Cleaning &packaging
Cu alloy
FIGURE 5.92
A representative flow chart for Cu and Cu alloy target manufacturing [based on 257�261].
376 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.93
Optical micrograph of Cu showing occurrence of dynamically recrystallized grains at the grain boundaries
[264].
FIGURE 5.94
TEM micrographs showing: (a) cell structure in 25% cold-rolled Cu, (b) microbands in 18% cold-rolled Cu,
(c) microbands in 98% cold-rolled Cu and (d) shear bands in Cu [263].
3775.7 Copper and its alloys
microbands (Figure 5.94(c)). Shear band formation because of localization of deformation is also
shown in Figure 5.94(d). Hardness, yield strength and ultimate tensile strength of such cold-worked
Cu will be high as compared to its recrystallized counterpart. Fundamental studies of Cu have mea-
sured stored energy in cold-worked Cu, and these data have been used to understand the recovery
and recrystallization behavior of Cu during annealing treatment [259].
Cu being fcc metal with medium stacking fault energy cold rolling of it has been found to pro-
duce distinct crystallographic texture components. Typical deformation texture components found in
cold-rolled Cu samples are {112}, 111. Cu, {123}, 634. S and {001}, 211. brass. Such
textures are described by β-fiber, which runs from Cu to brass orientation in Euler space (see the
book’s companion website) [268]. The friction condition encountered in cold rolling may introduce
different texture components at the surface of the Cu workpiece as compared to the center layer. A
number of studies reveal the existence of through-thickness texture gradient in cold-rolled Cu.
Figure 5.95 shows x-ray (111) pole figures measured at the surface and at the center layer of a
90% cold-rolled stack of four Cu strips [260]. The samples from the surface showed a strong
{001}, 110. shear texture component and a weak {112}, 111. Cu texture component. On the
other hand, texture in the center layer was predominantly {112}, 111. Cu.
In another study, dry-rolled Cu samples showed more severe shear band formation than in
the case of lubricated rolling, although the overall texture remained similar in both cases [261].
Annealing heat treatment of dry cold-rolled Cu samples showed finer grain size because of
numerous nucleation events at the sherbands, which also led to the development of weak recrystal-
lization texture components. It was noted that the growth of recrystallized grains were prevented
by microstructural inhomogeneities (rhombus-like parallelogram) and orientation discontinuities
[261]. Preferential nucleation of recrystallized grains at the shear bands in Cu samples is a
well-documented feature and is shown in Figure 5.96 [269].
Local texture measurements in annealed Cu samples using EBSD showed that cube grains
f001g , 001. preferentially nucleate within shear and transition bands or in recovered cube-
RD RD
TD TD
Maximum 3.31.0 2.0 3.0(001)
(112)(112)
[001][111][111]
Maximum 7.31.0 2.0 3.05.0 6.0 7.0
4.0
(112)(112)
[111][111]
FIGURE 5.95
X-ray (111) pole figures from (a) surface and (b) mid-thickness of a 93% deformed Cu sample [260].
378 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
oriented areas. A detailed study of recrystallization in oxygen-free Cu showed that the intensity of
deformation texture components (e.g., Cu, S, brass) with larger strain energy disappear first during
annealing heat treatment [259]. Annealing of 70% cold-rolled Cu at 350�C for 15 minutes exhibited
intergranular nucleation of recrystallized grains at grain boundaries and also growth of recovered
cube-oriented grains (Figure 5.97(a)) [259]. Twins were also seen in this microstructure, which
FIGURE 5.96
Optical micrograph showing occurrence of recrystallization at shear bands in Cu [269].
FIGURE 5.97
EBSD microstructure of recrystallized Cu sample (a) 70% deformed and (b) 90% deformed prior to annealing
[259].
3795.7 Copper and its alloys
affected the growth of cube-oriented grains. In contrast, the 90% cold-rolled Cu sample showed
predominantly cube-oriented grains after annealing at 300�C for 15 minutes (Figure 5.97(b)) [259].
In the last decade, high purity Cu sputtering targets were made using severe cold rolling, rolling
at cryogenic temperature and equal channel angular pressing in order to produce fine grain and
favorable texture components [265,266]. Although Cu sputtering targets with average grain size of
less than 50 μm were produced successfully, non-uniform grain structure is quite common in
recrystallized high purity Cu sputtering target. As compared to high purity Cu sputtering targets,
dilute Cu alloy targets (i.e., Cu-Al, Cu-Mn and Cu-Mg) show more uniform grain structure because
of the presence of large number of solutes.
5.7.2.2 Copper alloy target manufacturingIn recent years, for advanced applications, fine grain Cu and Cu alloy sputtering targets have been
preferred over coarse grain sputtering targets. Figure 5.92 shows a representative flow chart for Cu
and Cu alloy sputtering target manufacturing [254�258]. The starting Cu billets are typically cast
or hot-worked material. A combination of hot pressing, hot rolling, cold rolling, cryogenic rolling,
equal-channel angular pressing (ECAP) and annealing steps is used for Cu target fabrication [136].
Similar to Al and Al alloy, ECAP successfully produced fine-grain Cu sputtering targets. Rolling
of Cu at cryogenic temperatures (e.g., liquid nitrogen) and a subsequent annealing step successfully
produced fine-grain targets [266]. Optimization of microstructure and crystallographic texture is
done by choosing suitable parameters for the above processes. A semi-finished Cu target is typi-
cally subjected to conventional machining operation to achieve desired shape and dimensions. Both
monolithic and bonded Cu targets are popular for electronic applications.
In the case of bonded products, Cu targets are bonded to inexpensive backing plates (e.g., Cu
alloys). Both solder-bonded and diffusion-bonded Cu targets are in demand for electronic applica-
tion. Typically, Cu targets for 300 mm wafers are diffusion-bonded at low temperatures to Cu alloy
backing plates. The most common practice for diffusion bonding Cu to a backing plate is hot iso-
static pressing. Solder bonding of Cu target involves application of a low melting solder alloy
between the Cu target and the backing plate to hold them together after solidification of the solder
alloy. Good bonding is ensured by checking the bond coverage using non-destructive testing such
as ultrasound.
In order to manufacture hollow cathode magnetron targets, typically a two-step approach is
used. In the first step, a Cu plate with a controlled microstructure is fabricated and then this plate is
deep-drawn to achieve the final cup shape configuration [270]. Cu and Cu alloy targets are finished
with required machining, polishing and grit-basting/arc-spraying operations. On achieving desired
external dimensions and surface roughness, bonded targets are transferred to the cleaning section
for degreasing, precision cleaning and packaging. Individual manufacturing steps have been dis-
cussed in Chapter 4.
5.7.3 Copper alloy thin filmsBoth disc-shaped and hollow cathode magnetron Cu sputtering targets are used in semiconductor
manufacturing. The sputter yield of Cu is higher than the majority of the elements with the excep-
tion of common elements Au, Ag and Pd (Figure 2.23). For advanced semiconductor applications,
Cu is typically sputtered by ionized PVD (I-PVD). For example, Cu seed layer deposition is done
380 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
using the self-ionized plasma (SIP) sputtering tool by Applied Materials [271,272]. While SIP
EnCoRe RF Cu has been used for 90 nm to 65 nm technology nodes, the SIP EnCoRe RFX Cu tool
is being used for 45 nm to 20 nm nodes. The Amber PVD tool by Applied Materials will be avail-
able for ,20 nm technology nodes [290]. For below 20 nm technology nodes, the aspect ratio of
the via would be .7:1 and via dia ,10 nm. After seed layer deposition using the SIP sputter tool,
if conventional plating is used, voids will be produced because of the closure of the via opening. In
order to address this problem, a new Amber PVD tool by Applied Materials’ Amber PVD tool
would use a two-step approach, i.e., cold deposition of a seed layer followed by a high temperature
thermal reflow of Cu.
During cold deposition, in addition to sidewall coating, the bottom of the via will be deposited
excessively to reduce the overall aspect ratio of the via. In the high temperature thermal reflow pro-
cess, Cu from sidewalls will be transported to the via interior to further reduce the aspect ratio of
the via. This would be achieved by diffusion of surface atoms from sidewalls to the interior and
also capillary-assisted flow of Cu towards opening.
5.7.3.1 Film propertiesIn this section, various properties of sputter-deposited Cu thin films are discussed. Figure 5.98
shows a linear relationship between target current and target life (kWh) for SIP sputtering of Cu at
a given power using the Applied Materials Endura sputter tool [273]. In this study, only a very
small change in Cu film thickness was noticed with increased target life. The deposition time was
adjusted to maintain Cu film thickness within the specification. Step coverage was found slightly
higher at the center of 200 mm wafer compared to the edge with 1.0 cm edge exclusion [273]. The
reason for higher step coverage at the wafer center lies in the symmetry of atom ejection from the
sputtering target. Step coverage both at the center and the edge decreased with target life
(Figure 5.98). The drop in step coverage with target life is typically compensated by increasing the
sputter power.
The microstructure, crystallographic texture and resistivity of sputtered Cu film have been
examined in various studies over the last few decades [274�289]. Triode sputtering of 99.999%
purity 1 mm thick Cu film on silicon wafer under negative bias showed room temperature recrystal-
lization and grain growth in the film. Large negative substrate bias increased the rate of recrystalli-
zation of the Cu film [290].
In another study, 1000 nm thick sputtered Cu film showed bi-modal distribution of grain size
[283]. Small grains were as small as 60 nm and larger grains were as big as 1000 nm. On anneal-
ing, coalescence of small grains was noted at a temperature as low as 100�C and grain coarsening
up to 500�C. Similar bi-modal distribution of grain size in Cu film was also noted in other
studies [282].
During TEM examination of of Cu thin films, twins were found in both as-deposited and
annealed Cu films. Figure 5.99 (p. 383) shows such twins in 500 nm thick Cu films deposited on
SiO2 substrate and annealed at 450�C for 30 min [281]. Broadening of twin bands was observed
because of the annealing heat treatment. Microstructure of the as-deposited Cu film also depended
on the sputtering power [279]. Like Al thin films, Cu thin film also shows hillocks under certain
deposition conditions. At lower power, Cu film did not show hillocks. However, at relatively higher
powers and in thicker films, hillocks started to appear. Preferentially ,110. oriented grains in
the matrix of ,111. oriented grains produced hillocks.
3815.7 Copper and its alloys
Figure 5.100(a) shows bright field TEM images of a hillock at the grain boundaries of the Cu
film [279]. The mechanism of hillock formation in Cu film is shown using the schematic illustra-
tion in Figure 5.100(b). XRD results showed that spacing of (111) planes increased with increased
sputter power. Stress in ,111. grains was estimated to be of the order of 600 MPa. The differ-
ence in elastic strain energy between ,111. and ,110. directions in Cu was attributed to the
driving force for the hillock formation in Cu films deposited at higher sputtering powers [279].
Because of the importance of the Cu in forming seed layer and other applications, resistivity of
Cu thin films has been measured by various investigators by varying sputtering conditions, sub-
strates, time of exposure to air and annealing temperature. Resistivity of Cu thin film is linked to
size-effect, i.e., thickness of the film. The thinner the film, the higher the resistivity. In particular
when film thickness approaches room temperature mean-free path for electron-phonon collision
(B39 nm), resistivity can be very high. Therefore, for 45 nm and below technology nodes, resistiv-
ity can be quite high. Figure 5.101 (p. 384) shows resistivity variation with thickness of Cu film
41.5
41
40.5
40
39.5
39
38.5
38
37.50
0 200 400 600 800
100 200 300 400 500 600 700 800
Targ
et C
urre
nt (
A)
Target Life (kWhrs)
Target Life (kWhrs)
65%
60%
55%
50%
45%
40%
35%
Bot
tom
cov
erag
e
(a)
(b)
CenterEdge
FIGURE 5.98
Variation of (a) Cu target current and (b) Cu seed layer bottom coverage with target life for 200 mm wafer and
Cu SIP chamber [273].
382 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.99
500 nm thick annealed (450�C, 30 min) Cu thin film showing twins (T) [281].
FIGURE 5.100
(a) TEM image showing hillocks and (b) mechanism of nucleation and growth of ,110. grains at grain
boundaries and triple junction of ,111. grains [279].
3835.7 Copper and its alloys
sputter deposited on Si/SiO2 substrates with 2 nm thick Ta layer on them [277]. Films were
annealed at 400�C for 1 hour in forming gas (N21 5% H2) atmosphere. The electron-scattering
components include surface, grain boundaries, roughness and impurities. With the exception of
impurities, resistivity contributions from each electron-scattering component scales with 1/dimen-
sion. At low enough temperatures, the mean-free path of electron scattering increases due to reduc-
tion in phonon. As a result conductivity of Cu film increases.
Results of a number of studies show that grain size in high purity Cu thin film increases with
time (within hours to days) and, in some cases, up to 25% change in resistivity was recorded.
Because both grain size and surface roughness are film thickness dependent, the effect of each
component on overall resistivity cannot be estimated with certainty. This is further complicated by
time-dependent grain size in sputtered Cu thin films. Therefore, stabilization of microstructure
using an annealing treatment (300�C�400�C) facilitates the measurements. As shown in
Figure 5.101, resistivity of even thick enough Cu film is higher than bulk value.
TEM study of Cu films showed existence of high dislocation density, which increased the resis-
tivity of the film. In common manufacturing processes, after Cu electroplating, wafers are subjected
to an annealing treatment to stabilize the microstructure. The grain size of the Cu film can be of
the order of the dimensions of trenches and vias. As a result, near-bamboo polycrystalline or bam-
boo structure can develop. Below 100 nm features, grain growth in Cu films was found to be
slower than in larger features. Also, a significant increase in Cu line resistance was noted when
grain size was comparable or slightly smaller than the line width. When Cu line resistance values
were found to be higher and did not scale with thickness, by changing the nature of the bond
between Cu film and the substrate, resistivity was lowered and value scaled with thickness. One
such approach is developing Cu epitaxy by using highly oriented sapphire or MgO substrate and
heating (440�C). In another approach, Si substrate was etched using dilute HF solution and dried
12
10
8
6
4
2
010 100 1000
Res
istiv
ity (
mic
ro-O
hm-c
m)
Film thickness (mm)
Cu on SiO2, Annealed
Cu on HF cleaned Si
Bulk Cu, p=1
FIGURE 5.101
Variation of Cu film resistivity with film thickness for Cu film sputter deposited on SiO2/Ta (2 nm) and
annealed (400�C, 1 h) in forming gas as against near-epitaxial Cu (100) film deposited on HF cleaned Si
(100) [277].
384 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
with nitrogen. This treatment removed the oxide layer from Si substrate. Sputter deposition of Cu
film at room temperature produced near-epitaxial Cu (100) film. For comparable thicknesses, resis-
tivity values of above Cu films were lower than the values shown in Figure 5.101. In fact, thick as-
deposited Cu film resistivity reached bulk resistivity value.
The Applied Materials SIP EnCoRe II Cu RF sputter tool provides excellent film uniformity
and in-film particle performance for seed layer application, which is shown in Figure 5.102(a)
[291]. As per Applied Materials, unique magnet rotation and magnet spacing compensation technol-
ogy extended Cu sputtering target life by two times and a stable process can be run over
30,000 wafers. Sputtered Cu films are also used in back-end metallization. Figure 5.102(b) shows
Cu film sheet resistance variation with the number of deposited wafers for the Ti-Cu process of
UBM [291].
Similar to Al, electromigration in Cu interconnect leads to line failure, which is current density
and temperature dependent. Figure 5.103 shows an example test structure, which has a completely
blocking boundary at the cathode end of the line [292]. This test structure has three levels of inter-
connects represented by MC, M1 and M2. Underlying the MC level W line is connected to the M1
level electroplated Cu line by a Cu via (CA). The M2 level electroplated Cu line is connected to
SiO2
SiO2SiNx CuV1
Cu
Cu CA
M1
Via TaN/Ta linerSiO2
Electron flowW MC
CuM2
FIGURE 5.103
Test structure for electromigration study in two level Cu dual damascene structure [292].
300
200
100
00 800 1,600 2,400 3,200
Rs
(Ω/s
q)
Rs
(Ω/s
q)
Number of wafers Number of wafers
Rs Repeatability Cu Rs Repeatability
Repeatability = 2.9%, 1σ
10
8
6
4
2
0
(a) (b)Rs, Avg. = 220Ω/sqRepeatability = 1.8%, 1σRs, Avg. = 0.11Ω/sq
Non
-uni
form
ity (
%,1
σ)
Non
-uni
form
ity (
%,1
σ)
0.15
0.12
0.09
0.06
0.03
00 500 1,000 1,500 2,000
Rs non-uniformityAvg. = 3.3%
Rs non-uniformityAvg. = 1.2%, 1σ
8
6
4
2
0
FIGURE 5.102
Variation of Cu film Rs and Rs non-uniformity with number of wafers for: (a) 300 mm Cu barrier/seed
application and (b) 300 mm Ti-Cu under bump metallization (UBM) process [291].
3855.7 Copper and its alloys
the M1 level electroplated Cu line by a Cu via (V1). The M1 level Cu line is 400 μm long,
0.23 μm wide and 0.28 μm thfick. The M2 level Cu line is 7.5 μm wide. The Cu CA via is 0.35 μmin diameter and Cu V1 is 0.45 μm in diameter. Dielectrics used in this test structure were SiNx and
SiO2. 0.56 μm SiO2/0.07 μm SiNx and 0.8 μm M1/0.07 μm CA at M2/V1 levels were used for the
electromigration tests. The passivation layer used in this test structure had 0.34 μm SiO2/0.12 μmSiNx. Electromigration tests were done at 330�C and in air. Current density between 7.5 and
90 mA/μm2 was used.
Figure 5.104 shows a focused ion beam (FIB) image of electromigration tested samples that
correspond to failure time of (a) 62 h, (b) 19 h and (c) 5 h [292]. In the case of the 62 h lifetime,
some melting was noticed along with line and via voids. In the case of the 19 h lifetime, via voids
were observed in the Cu CA via. Only small via voids were seen in the Cu CA via in the case of
6 h failure time.
The other reason for Cu line failure is stress migration. Stress gradient in Cu metallization
because of the damascene process and thermal cycling may lead to stress migration related voiding
(Figure 5.105) [2]. Unlike electromigration, stress voiding can occur in the absence of an electric
field. Entrapped voids and weak interfaces trigger stress voiding. Figure 5.106 shows some of the
mechanisms of via failure driven by the void generation [2]. In order to reduce chances of void for-
mation, it is important to achieve chemically and mechanically stable interfaces. A number of pro-
cesses such as dielectric etch, chemical mechanical polishing, barrier/seed deposition, dielectric
FIGURE 5.104
FIB images showing electromigration failure for (a) 62 h, (b) 19 h and (c) 5 h cases [292].
386 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
350
300
250
200
150
100
50
–50
–100
–1500 50 100 150 200 250 300 350 400 450
0
Temperature (°C)
Str
ess
(MP
a)Tensile Thermal cycle:
Δstress ~ 250MPa
Stress migration
Onset of plastic flow
Compressive
Stressconcentration= defects
FIGURE 5.105
Stress reversal in Cu film due to thermal cycling and origin of stress concentration [2].
(1) Void migration after 400°C PECVD cycle
(2) Stress relaxation at 150°C–200°C
(3) Poor barrier coverage
Fill oretchvoids
High tensilestress
Cu or etchresidue
Voids migrate tobottom at 400°C
Relaxation of stress= M1 or M2 voids
Poor Cu adhesion to viasidewall with thin barrier
Voids at viasidewall
FIGURE 5.106
Schematic illustration of stress migration that leads to via failure [2].
3875.7 Copper and its alloys
deposition and cleaning steps need to be optimized to manage stress development that causes
voiding.
In addition to disc-shaped sputtering Cu targets, Cu hollow cathode magnetron (HCM) targets
are also used for semiconductor applications. This is aimed at using high density plasma of a
HCM, the same as ionized PVD (I-PVD) in the case of a disc-shaped target. The RF bias of sub-
strate was found to improve film properties and alter the microstructure of HCM-sputtered Cu
films. Figure 5.107 shows variations of deposition rate and film uniformity with increasing RF sub-
strate bias [228]. While deposition rate decreases with increased RF substrate bias, film uniformity
improved. At very high RF substrate bias, because of severe re-sputtering, unwanted overhang can
form at the top of the small feature. Increased re-sputtering of Cu film also lowered the deposition
rate. In contrast, Cu film stress increased with increasing RF substrate bias (not shown here).
5.7.3.2 Defect generationMost advanced semiconductor applications require satisfactory particle performance of deposition
processes. In particular, processes that use 99.9999% purity Cu sputtering targets for coating
300 mm wafers (e.g., using the EnCoRe II RF and RFX PVD tools of Applied Materials), specifica-
tions for in-film particle count can be very tight. In order to meet such stringent requirements, typi-
cally very robust processes for target-making and process control are required. The most commonly
reported in-film defects are splats (appear like molten Cu droplets). In the case of HCMs, the
sources of in-film particles are nodules and flakes formed on the less sputtered area inside the
HCM targets.
Figure 5.108(a) shows such nodules formed inside a HCM Cu target [293]. These nodules grow
by nucleation and growth mechanisms [293]. Figure 5.108(b) shows particle counts (size . 0.16 μm)
as a function of a HCM Cu target life [294].
2.0
1.8
1.6
1.4
1.2
1.00 50 100 150 200
Dep
rat
e (A
/kW
/sec
)
1210
86422
0 50 100 150 200
Uni
form
ity (
%, s
igm
a)
RF power (W)
FIGURE 5.107
Variation of Cu film deposition rate and film uniformity with RF power during Cu HCM sputtering [228].
388 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
In recent years a number of Cu alloys have been studied with an aim to use these alloys as a
self-forming diffusion barrier (e.g., Cu-Mn alloy), self-passivating layer (e.g., Cu-Mg alloys) and as
a seed layer (e.g., Cu-Al, Cu-Mn) with greater resistance to electromigration [240�250]. In the
self-forming diffusion barrier approach, attempts were made to form a thin enough barrier layer in-
situ on Si substrate to replace TaN/Ta diffusion barrier layer. A number of Cu-Mn alloy films were
deposited on Si/SiO2 (100 nm) substrate and made to react with SiO2 to form a barrier layer. A Cu-
7.9 at% Mn alloy film showed promising results in terms of low resistivity, thin enough diffusion
barrier layer and good adhesion to Si substrate. Figure 5.109 shows the variation of Cu-Mn film
(163 nm thick) film resistivity with annealing temperature [241].
As deposited, Cu-Mn film showed a resistivity value of 24.4 μΩcm, which dropped to
3.17 μΩcm at 450�C within 30 min. Cross-sectional TEM examination of annealed samples
Particles (>0.16 microns)50454035302520151050
0 50 100 150 200 250
Par
ticle
s (in
-film
)
(b)(a)
Lifetime (kWhrs)Mag = 500 x20 μm
FIGURE 5.108
(a) SEM image showing nodule formation at target edge because of re-deposition, [293]. and (b) in-film
particle performance in case of a high purity and fine-grain Cu target [294].
30
25
20
15
10
5
00 50 100 150 200 250 300 350 400 450
Res
istiv
ity /
μΩ c
m
Temperature / °C
FIGURE 5.109
Variation of resistivity Cu(Mn) film with annealing temperature. Film delamination is represented by cross
mark in tape test. [241].
3895.7 Copper and its alloys
revealed formation of a polycrystalline oxide layer at the top surface of Cu-Mn alloy film
(Figure 5.110(a)) and an amorphous oxide layer at the Cu-Mn film/SiO2 interface (Figure 5.110(b))
[241]. The oxide layer at the interface was identified as MnSixOy. No trace of Cu was found in the
SiO2 layer that lied beneath the MnSixOy layer. This result confirmed diffusion barrier characteris-
tics of the 3 nm thick MnSixOy layer. Mn containing oxide layer formation at the surface and inter-
face was attributed to the diffusion of Mn to the surface and the interface. Mn was not found in the
film interior including grain boundaries. These observations were rationalized by considering rapid
diffusion of Mn in Cu. 3 nm thickness of the MnSixOy layer made it a choice for barrier in 45 nm
technology node where maximum thickness of barrier can be 5 nm. The adhesion property of
annealed Cu-Mn film to Si substrate was also found satisfactory. Open circles in Figure 5.109 rep-
resent good adhesion and crosses represents poor adhesion.
Prior to the above study, similar attempts were made to form self-passivating layers using Cu-
Mg alloys [246�248]. Relatively higher concentration of Mg was used in Cu-Mg alloys. In this
FIGURE 5.110
Cross-sectional TEM image of annealed (450�C, 30 min) Cu-Mn film: (a) image of surface of Cu(Mn) film and
(b) Cu(Mn) film/SiO2 interface. Arrows indicate oxide layers [241].
390 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
approach, MgO layer was formed at the Cu-Mg film/Si substrate interface. However, the MgO
layer thickness was of the order of 20 nm. Also, reduction of SiO2 gave rise to free Si, which dif-
fused into the Cu alloy film and increased film resistivity. A dilute Cu-Mg (Mg: 0.7�1.2 at%) alloy
successfully formed a MgO passivation layer with resistivity value of 2 μΩcm [249].
Figure 5.111(a) shows variation of resistivity of Cu and Cu-0.7 at% Mg films with annealing
temperature [249]. Except at 500�C, Cu-0.7 at% Mg alloy had higher resistivity than its pure
Cu counterpart. High resistivity of pure Cu at 500�C is believed to be due to diffusion of Si into
Cu film. Figure 5.111(b) shows change of resistivity Cu and Cu-0.7 at% Mg alloy films with time
at 350�C [249]. In both films, a significant drop in resistivity was recorded within 10 minutes time.
Resistivity change in pure Cu was attributed to the grain coarsening during annealing, while in
alloy film it was grain coarsening as well as diffusion of Mg to the surface and interface. Annealed
Cu-0.7 at% Mg alloy film also showed better adhesion to dielectrics compared to Cu films. This
was believed to be due to the segregation of Mg at Cu-Mg film/Si substrate interface.
FIGURE 5.111
Variation of Cu(0.7 at% Mg) film resistivity with (a) annealing temperature (time: 1 h) and (b) annealing time
(annealing temperature: 350�C) [249].
3915.7 Copper and its alloys
5.7.3.3 ElectromigrationIn recent years, Cu(Al) and Cu(Mn) alloys have been investigated for potential application in seed
layer that would improve resistance to electromigration [27�29]. Cu(Al) alloys showed promising
results and here we summarize important observations made in these studies. In one case, a Cu(Al)
alloy seed layer of varying thickness were sputter deposited on substrate with barrier layer
(Si/SiO2/TaN/Ta) before electroplating of Cu and annealed at 350�C for 30 minutes to examine the
grain structure in the Cu line. The resistivity of the Cu line was measured as a function of line
width and lifetime was also measured in an electromigration test (using 300�C�400�C,1�8 MA/cm2). SIMS analysis of Cu line showed that Al doping was greater in the Cu line with
thicker Cu(Al) seed layers. For a given width of Cu line, median grain size decreased with thicker
Cu(Al) seed layer. This was more prominent in the wider Cu line. This was attributed to the
increased Al doping of the Cu line because of the thicker Cu(Al) seed layer. For a given thickness
of Cu(Al) seed layer, median grain size was smaller in a less wide Cu line. High Al concentration
and fine grain size led to higher resistivity of the Cu line.
Figure 5.112 shows variation in Cu line resistivity with line width as a function of Cu(Al) seed
layer thickness [238]. For a given Cu line width, if Cu(Al) seed layer thickness is higher because
of higher Al concentration and reduced grain size, the resistivity value is higher. On increasing the
Cu line width to 1 μm and reducing the Cu(Al) seed layer thickness to 40 nm, lower resistivity was
recorded. Pure Cu showed lower resistivity at all line widths. However, it was noted that, in elec-
tromigration tests, the pure Cu line had an inferior lifetime as compared to the Cu line with a
60 nm thick Cu(Al) seed layer (Figure 5.113) [238]. These results were generated from a sample
with a passivation layer SiCN over the Cu line, and electromigration tests were done at 350�C and
6 MA/cm2 current density.
In the interpretation of these results, grain morphology and diffusion paths such as interfaces,
grain boundaries and bulk were considered. It was noted that: (a) Al doping reduced the drift
0.1 1Line width (μm)
Res
istiv
ity (
mic
ro-O
hm-c
m)
1.8
2
2.2
2.4
2.6
2.8
3
: pure Cu: 40 nm CuAl: 60 nm CuAl: 90 nm CuAl
FIGURE 5.112
Cu and Cu(Al) alloy film resistivity variation with line width [238].
392 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
velocity of Cu migration and increased the incubation time, (b) Al also slowed down Cu migration
at the Cu/SiCN interface, which was the rate-determining path of void growth and (c) migration of
Al was slower than Cu at the Cu/SiCN interface. In another study, using a Cu(1at% Al) seed layer
and relatively low annealing temperature (100�C, 1 h), similar improvement in lifetime was
achieved [240]. The Cu line with a Cu(0.5at% Mn) alloy seed layer also showed greater lifetime as
compared to the pure Cu line. In this case, the microstructure of the Cu line depended on the line
width. While 50 nm and 65 nm wide Cu lines showed polycrystalline-bamboo microstructure, the
180 nm wide Cu line showed a near-bamboo microstructure. As one would expect, the
polycrystalline-bamboo and near-bamboo structure enhanced the lifetime of the Cu line by slowing
down Cu diffusion at grain boundaries and by generating mechanical stress for back flow.
5.8 Nickel�vanadium (Ni-V) alloysNi is a fcc metal and ferromagnetic in nature. Alloying of Ni with 7 wt% vanadium makes it non-
magnetic. As a result, Ni-7V alloy can be sputtered easily and sputtering target thickness can be
increased to extend life of the target. Sputtered Ni-7V alloy films are used as a pre-wetting layer
(Figure 5.2), diffusion barrier and resistive films. In under-bump metallization (UBM), Ni-7V forms
a low energy interface with Cu6Sn5 compound formed because of the reaction between the Cu layer
of the Al/ Ni-7V/Cu stack and the eutectic SnPb solder. After several reflow steps, Cu6Sn5 does not
spall and can act as a diffusion barrier between Ni-7V and SnPb alloy films. Figure 5.114 shows a
cross-sectional TEM image of a solder/UBM interface undergone annealing at 220�C for 5 min
[295]. This UBM metallization had 400 nm Al/ 400 nm Ni-7V/300 nm Cu stack. In this case, a
500 nm thick continuous Cu6Sn5 barrier layer was formed.
Figure 5.115 shows a nickel�vanadium (Ni-V) binary phase diagram [296]. As the Ni-rich end
of the phase diagram shows, the Curie temperature shown by the dotted line drops with increased
V content. An extended terminal solid solution exists in the Ni-rich corner in which the Ni-7V
1 10 100 1000
Life time (h)
Cum
ulat
ive
failu
re (
%)
0.1
1
5
10
20304050607080
9095
99
99.9
Cu CuAI
FIGURE 5.113
A comparison of electromigration lifetime between Cu and Cu(Al) EM alloy lines (60 nm thick) [238].
3935.8 Nickel�vanadium (Ni-V) alloys
FIGURE 5.114
Cross-sectional TEM image showing Ni-7V film structure in an UBM which is in contact with solder layer
Cu6Sn5. This stack was annealed for 5 min at 220�C [295].
FIGURE 5.115
Binary phase diagram of nickel and vanadium (Ni-V) [296].
394 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
composition lies. Beyond this composition, with slightly higher V content, an ordered phase (Ni8V)
is formed, which has an fct crystal structure. This Ni8V phase is formed by an order-disorder reac-
tion from the Ni-rich terminal solid solution. In addition to the terminal solid solution and the Ni8V
ordered phase, the other phase which formed in the range of 22.7 to 27.5 at% V is Ni3V. Ni3V has
an bct Al3Ti-type crystal structure. Typically, Ni-7V alloy is made by vacuum melting and casting
[297�299]. At elevated temperatures, Ni-7V alloy may show some Ni3V phase in the terminal
solid solution.
5.8.1 Nickel�vanadium and property control5.8.1.1 Thermomechanical processingAs shown in Figure 5.116, after casting, Ni-7V billets are subjected to suitable thermomechanical
processing steps [297�299]. In order to hot press or hot roll, billets are heated to high enough tem-
peratures to avoid cracking of the billets. An intermediate annealing heat treatment of billets is
common prior to the warm or cold rolling. A rolled workpiece is finally subjected to an annealing
heat treatment to produce the desired grain size. A wide variety of grain sizes can be produced
using a combination of hot rolling, cold rolling and annealing heat treatment. For example, hot roll-
ing of Ni-7V (between 760�C and 1315�C) followed by cold rolling (% not disclosed) and anneal-
ing at 870�C for 1 h produces a grain size of the order of 40 μm or less [298]. Commercially
Ni stockV stock
Vacuummelting
Preheating ofingot
Hot rolling / pressing
Intermediateannealing
Cold / warmrolling
Final REXannealing
Bonding &NDT
Finalmachining
Inspection
B/P: Backing plateNDT: Non-destructive testing of bond
MachiningNiV & B/P
Cleaning &packaging
FIGURE 5.116
A representative flow chart for Ni-7V alloy target manufacturing. REX stands for recrystallization [based on
[297�299, 300�302].
3955.8 Nickel�vanadium (Ni-V) alloys
available Ni-7V sputtering targets are 99.95% or higher purity targets with grain size between
20 μm and 150 μm [297�299].
5.8.1.2 Nickel�vanadium target manufacturingFigure 5.116 shows a representative flow chart for Ni-7V sputtering target manufacturing
[297�299]. In order to fabricate Ni-7V target, after casting of the ingot, a combination of hot press-
ing, hot rolling, cold rolling and annealing steps is used [297�299]. Optimization of microstructure
and crystallographic texture is done by choosing suitable parameters for the above processes. An
important requirement for Ni-7V alloy is low alpha particle emission (, 1022 counts/cm2 h).
These alpha particles originate from isotopic elements such as U and Th. A semi-finished Ni-7V
target is typically subjected to a conventional machining operation to achieve the desired shape and
dimensions. The cost of monolithic Ni-7V targets can be high and hence most Ni-7V targets are
bonded to inexpensive backing plates (e.g., Cu alloys). Both solder-bonded and diffusion-bonded
Ni-7V targets are in demand for applications such as pre-wetting layer, diffusion barrier and resis-
tive films.
The most common practice for diffusion bonding Ni-7V to a backing plate is hot isostatic press-
ing. Solder bonding of Ni-7V target involves application of a low melting alloy between the Ni-7V
target and the backing plate to hold them together after solidification of the solder alloy. Good
bonding is ensured by checking the bond coverage using non-destructive testing such as ultrasound.
Subsequently, targets are finished with required machining, polishing and grit blasting/arc-spraying
(for particle trap formation) operations. On achieving the desired external dimensions and surface
roughness, bonded targets are transferred to the cleaning section for degreasing, precision cleaning
and packaging. Individual manufacturing steps have been discussed in Chapter 4.
5.8.2 Nickel�vanadium alloy thin filmsLike other materials, Ni-7V thin film properties are dependent on the property of the sputtering tar-
get and also the process recipe for sputtering [300,301]. Limited published results on sputtered Ni-
7V thin films results show that Rs uniformity (%, 1σ) of Ni-7V film can be below 4% for 200 mm
wafer [297]. Figure 5.117 shows Ni-7V film resistivity variation with increasing substrate bias volt-
age [300]. In this case, a Nimbus 310 PVD tool was used to deposit 4000 A thick Ni-7V film on
200 A thick titanium film. Ni-7V film without substrate bias has a resistivity of about 60 μΩcm,
which does not change much with increased substrate bias voltage. Unlike resistivity, Ni-7V film
stress decreases steadily with increasing substrate bias voltage (Figure 5.118) [300].
5.9 Silicides5.9.1 Polycide and salicide processesA contact is a low resistance connection between the active region and metal interconnect in a
CMOS device. Contacts can be rectifying (Schottky) or Ohmic in nature. Historically, specific sili-
cide contacts have been used in CMOS devices taking into account scaling of the polysilicon line
width in the gate and contact in the source/drain regions [302�307].
396 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Figure 5.119 illustrates the evolution of silicide contacts for CMOS devices [305]. Apart from
low resistivity, the other requirements for silicide contacts are thermal stability, oxidation proper-
ties, chemical reactivity and diffusivity in silicon. Contacts are M0 level interconnects and are
called local interconnects.
FIGURE 5.117
Variation of Ni-7V film resistivity with substrate RF bias. 4000 A thick Ni-7V film was deposited on 200 A thick
Ti layer. [300].
FIGURE 5.118
Variation of Ni-7V film stress with substrate RF bias. 4000 A thick Ni-7V film was deposited on 200 A thick Ti
layer [300].
3975.9 Silicides
Figure 5.120 shows the transmission electron microscopy images of various silicides structures
in actual scaled transistors [305]. As discussed in Chapter 1 (Figure 1.21), two types of silicide
forming processes have been used in CMOS devices, i.e., polycides and salicides [306]. Polycides
refer to refractory metal silicides (e.g., WSi2, MoSi2, TaSi2) formed on the polysilicon gate and sal-
icides refer to self-aligned silicide (e.g., TiSi2, CoSi2, NiSi2) formed on the gate and source/drain
regions of the device. Table 5.12 lists processing temperature and properties of various silicides.
TiSi2 CoSi2
N+ poly-Si
MoSi2
WSi2
NiSi
PolycidePolycide
Polycide
Salicide
Salicide
19901
10
100
2000 2010Year
2.0 1.0 0.1 0.02
Lg (μm)
ρ s (
Ω /
sq.)
FIGURE 5.119
Usage of silicides in semiconductor industry [305].
FIGURE 5.120
TEM images showing cross-sections of TiSi2, NiSi and CoSi2 silicide lines [305].
398 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
Salicides have lower resistivity (13�20 μΩcm) than the polycides. Polycide contacts were briefly
discussed in section 1.3.2 of Chapter 1. Being relatively old technology, we do not discuss this
topic in this chapter. Good reviews of this subject can be found elsewhere [302�304].
As shown in Figure 1.21(b) of Chapter 1, in a salicide process the polysilicon gate is patterned
and the sidewall spacers are formed prior to the deposition of metal film using sputtering. The
deposited metal layer is then reacted with exposed silicon regions in the gate and source/drain areas
using rapid thermal processing (RTP) to form the silicide layer. In this chapter only salicide pro-
cess for low resistivity TiSi2 contact will be discussed [303,304]. For smaller technology nodes,
cobalt silicides and nickel silicides are the choices, and corresponding salicide processes are dis-
cussed in Chapter 7.
5.9.2 Titanium silicidesFigure 5.121 shows the Ti-Si phase diagram [308]. Note that TiSi2 forms at about 54 wt% silicon.
TiSi2 exists in two crystallographic forms, i.e., metastable orthorhombic base-centered C49 TiSi2and thermodynamically stable orthorhombic base-centered C54 TiSi2. Low resistivity of the C54
TiSi2 phase is almost four times lower than the C49 TiSi2 phase.
Figure 5.122 (p. 401) shows various stages of the low resistivity C54 TiSi2 contact forming sali-
cide process [306]. Two-step annealing heat treatments are conducted to form low resistivity C54
TiSi2 contacts. The first annealing is conducted between 650�C to 700�C, which forms the high
resistivity C49 TiSi2 phase. The second annealing is typically conducted above 850�C to obtain
low resistivity C54 TiSi2.
Although the C54 TiSi2 phase is thermodynamically favored, the high resistivity C49 TiSi2phase is nucleated first. The reason for C49 TiSi2 nucleation is not well understood, but it can be
related to different surface energies, diffusivity and stress effects [307]. Increased difficulty in
forming the low resistivity (15�20 μΩcm) C54 TiSi2 phase, as the device dimensions grew smaller
(lack of C49 TiSi2 to C54 TiSi2 phase transformation in small dimensions), is because of inade-
quate nucleation sites which is schematically illustrated in Figure 5.123 (p. 401) [307].
Table 5.12 Processing Temperature and Properties of Silicides
Silicide Resistivity(μΩcm)
FormationTemperature (°C)
nm of Silicide/nmof metal
MeltingPoint (°C)
Polycide WSi2 30�70 1000 2.58 2165
MoSi2 40�100 800�1000 2.59 1980
TaSi2 35�55 800�1000 2.41 2200
Salicide TiSi2�C49 60�70 500�700 2.51 �TiSi2�C54 13�16 700�900 3.52 1500
CoSi 100�150 400�600 2.02 �CoSi2 14�20 600�800 3.64 1325
NiSi2 40�50 600�800 3.65 �NiSi 14�20 400�600 2.34 992
3995.9 Silicides
In the case of blanket film, only three nucleation sites of C54 TiSi2 phase are present in C49
TiSi2 grains. As transformation proceeds at 800�C, these three C54 TiSi2 grains grow to form only
C54 TiSi2 grains. In the case of lines, only lines with C54 TiSi2 grains successfully grow C54
TiSi2 lines, but the transformation temperature requirement is higher, i.e., 930�C. Note that lines
without the C54 TiSi2 nucleus cannot transform to the C54 TiSi2 phase. In-situ x-ray measurements
showed that in blanket film most C54 TiSi2 grains had (311) orientation parallel to the surface. In
contrast, grains in C54 TiSi2 lines showed (040) orientation parallel to the surface. On reducing the
length of the lines, C49 TiSi2 to C54 TiSi2 phase transformation was incomplete even at 930�C. Astrong dependence of the transformation on the line width was obvious. Therefore, two factors
affect the transformation of C49 TiSi2 to C54 TiSi2 phase, i.e., density of nucleation sites of C54
and line width dependent growth of C54 TiSi2 phase in lines.
Figure 5.124 (p. 402) shows variation of sheet resistance of TiSi2 with line width [309]. At
smaller line width, high sheet resistance is seen because of inhibited C54 TiSi2 phase
0 10 20 30 40 50 60 70 80 90 100Ti Si
Weight percent silicon
600
800
1000
1200
1400
1600
1800
2000
2200
Tem
pera
ture
°C
(Si)Tis
i 2
Tis
i
Ti 5
si4
Ti 3
si
Ti 5
si3
865°C
1170°C(βTi)
(αTi)
1570°C
1670°C
2130°C
1920
1480°C
L
1330°C
1414°C
1330°C
0 10 20 30 40 50 60 70 80 90 100Atomic percent silicon
FIGURE 5.121
Binary phase diagram of titanium and silicon (Ti-Si) [308].
400 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
FIGURE 5.122
Two-step annealing process for forming low resistance C54 TiSi2 phase. (a) Sputter deposition of Ti film after
MOSFET structure formation, (b) first low temperature annealing to form C49 TiSi2 phase, and (c) second
annealing at higher temperature to form low resistance C54 TiSi2 phase [306].
Blanketfilms
Lines
Smallerareas
Transformation
930°C
930°C
800°C
C49 TiSi2 C54 TiSi2
FIGURE 5.123
Schematic illustration showing difficulty of nucleation of C54 TiSi2 phase in narrow lines and small areas
[307].
4015.9 Silicides
transformation. Larger line width results in complete transformation of the C49 TiSi2 to C54 TiSi2phase and as a result sheet resistance has smaller values.
The above results were obtained from a set of in-situ experimental studies of phase transforma-
tion in TiSi2 using an synchrotron x-ray facility [310]. The studies were also able to monitor tex-
ture, resistivity and surface roughness evolution in TiSi2. 32 nm thick sputtered Ti films were
deposited on poly-Si and annealed at 3�C/sec. A laser with wavelength of 633 nm was used to eval-
uate surface roughness, which provided results in the length scale of 0.5 μm and 5.0 μm.
Figure 5.125 shows the evolution of phases as a function of temperature and corresponding
changes in resistivity and light-scattering signal [310]. Up to 600�C, occurrence of (002) and (101)
peaks at 2θB43.7� and 2θB45.6� indicateding existence of crystalline Ti in the film. However,
resistance increased up to 500�C and sharply dropped at about 600�C as Ti peak intensity went
down. At 600�C, small length-scale (0.5 μm) scattering signal started to increase sharply. These
changes indicated formation of the C49 TiSi2 phase at 600�C. At about 750�C, stabilization of
resistance was recorded along with (131) intensity of the C49 TiSi2 phase and 0.5 μm scattering
signal. On increasing the temperature, slightly below 800�C, (311) peak of the C54 TiSi2 phase
appeared and a peak in 5 μm scattering signal indicative of a nucleation controlled phase persisted
up to 1100�C. Above 900�C, because of the degradation of film in terms of agglomeration and con-
tinued surface roughening, the 5 μm length scattering signal became stronger. The peak at about
1060�C was attributed to silicide-polysilicon inversion [310].
Similar experiments on 32 nm thick TiSi2 with large (31 μm long x 0.35 μm wide) and small
(9 μm long x 0.35 μm wide) areas, i.e., 11 μm2 and 3 μm2 areas, clearly showed the difficulty of
complete transformation of C49 TiSi2 to C54 TiSi2 in the small area case. Figure 5.126 shows that
in the case of large area, C49 TiSi2 phase peak completely disappeared [310], while in the case of
small area, C49 TiSi2 phase peaks slightly decreased. This result indicated incomplete phase trans-
formation. Although transformation temperature remained the same, smaller TiSi2 area resisted for-
mation of C54 TiSi2 phase because of smaller length.
0 0.2 0.4 0.6 0.8 1 1.2
Line width (μm)
P-doped 3E15 cm2
As-doped 3E15 cm2
TiSi2/150 nm polycrystalline Si
0
20
40
60
80
She
et r
esis
tanc
e (Ω
/sqr
.)
FIGURE 5.124
Variation of sheet resistance with TiSi2 line width [309].
402 CHAPTER 5 Sputtering Targets and Thin Films for Integrated Circuits
400 500 600 700 800 900 100052
50
48
46
44
42
52
50
48
46
44
42
C54 (311)
C54 (040)
C54 (311)
C54 (040)
C49 (131)
C49 (131)
3 μm2
11 μm2
(a)
(b)
FIGURE 5.126
(a) Representation of X-ray peak contours in 2θ-temperature space for 11 μm2 area. (b) Representation of X-
ray peak contours in 2θ-temperature space for 3 μm2 area [310].
400 600 800 1000Temperature (°C)
50
48
46
44
42
40
0
0.5
1
1.5
Ti (101)
C49
C54TiSi2 TiSi2Ti (002)
Resistance
LS 5 μm
LS 0.5 μm
2θ (
°)R
esis
tanc
e or
light
inte
nsity
(a.
u.)
(a)
(b)
FIGURE 5.125
Results of in-situ measurements during annealing (3�C/sec) of 32 nm thick Ti film sputter deposited on poly-
Si: (a) variation of electrical resistance and high scattering signals with temperature and (b) representation of
X-ray peak contour in 2θ-temperature space [310].
4035.9 Silicides
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