Spring 2009W. Rhett DavisNC State UniversityECE 406Slide 1 ECE 406 – Design of Complex Digital Systems Lecture 1: Introduction Spring 2009 W. Rhett Davis

Spring 2009W. Rhett Davis NC State University ECE 406 Slide 1

ECE 406 – Design of Complex ECE 406 – Design of Complex Digital SystemsDigital Systems

Lecture 1: Lecture 1: IntroductionIntroduction

Spring 2009Spring 2009W. Rhett DavisW. Rhett Davis

NC State UniversityNC State Universitywith significant material from Paul Franzon, Bill Allen, & Xun with significant material from Paul Franzon, Bill Allen, & Xun

LiuLiu


Announcements

Labs to Start in 2 Weeks

HW#1 Due in 12 Days


Today’s Lecture

Introduction

Brief Review of ECE 212

Syllabus


ECE 406: A course in “building stuff”

Specification: Build a piece of hardware to perform Sobel edge detection on a stream of video.

How would you build it?

*Images byEvan Halley,Michael Chestnut,& Justin Walon,

Senior Design Proj.Fall 2007

p = ||Gx||2 + ||Gy||2


Approaches

ECE 206/306 Approach (Software)» Microcontroller & memory on an evaluation board,

assembly language or C code to implement behavior

ECE 212 Approach (Hardware)» Logic Gates (flip-flops, AND & OR gates, multiplexers),

– using discrete chips, breadboard, & wires– using a Field Programmable Gate Array (FPGA)

Which approach is better?


Comparison of Approaches

Cost» Manufacturing / Materials (Recurring)» Design (Non-Recurring)

Performance» Speed» Power


Analysis of Software Performance

Sobel algorithm needs » 16 AND Operations» 17 Shift Operations» 15 ADD Operations» 2 Multiply Operations» 50 Total per pixel

For NTSC Video (30 frames/sec, 640x480 resolution)» 50 x 30 x 640 x 480 = 461 MOPS

(Million Operations per second)


Analysis of Software Performance

Evan programmed the algorithm in C#, getting one frame in 16 seconds, rather than 30 frames per second

We can assume, however, that if programmed in C or C++, that it would meet the requirement.

Hardware AMD Athlon 64x2 CPU+ 1 GB DDR2 SDRAM

Cost $46.95 + $20

Speed Enough (if programmed properly)

Power ~ 100 W


Analysis of Hardware Performance

Evan, Michael, & Justin mapped this design on to an Altera DE2 board and met the timing requirement

Power was 1000X smaller! If we were to design an ASIC (Application Specific

Integrated Circuit), it would also be much faster, but cost changes (higher design cost, lower manufacturing cost)

Hardware AMD Athlon 64x2 CPU+ 1 GB DDR2 SDRAM

Altera Cyclone IIEP2C20 FPGA

Cost ~$65 ~$45

Speed Enough Enough

Power ~ 100 W ~0.1 mW


What are you likely to design?

Digital Still Camera (DSC)

CD Player Satellite TV/Radio

Receiver Digital Cable Set-Top

Box Cellular Telephone Wireless LAN Cards HDTV Receivers Cable Modems / DSL

ModemsKodak DSC


Kodak DSC System Overview

source: http://www/ti.com Blue is on-chip, white is off-chip

built around a TMS320DSC25 chip from Texas Instruments


Hardware vs. Software

When to use a Hardware approach instead of a Software approach?

New Hardware is generally created whenever a micro-processor can’t be found that’s fast enough for a given application» Higher resolution camera» Higher quality video» Faster data-rate modem» etc.

ECE 406 is a HARDWARE DESIGN CLASS» You’ll design an LC-3 Microcontroller before it’s over


Review of ECE 212

Specification: Design a piece of hardware to read in 4 bits and allow the user to select one bit for output.

REG

in1

in2

in3

in4

out

Block Diagram (Sketch)

D Q

D Q

D Q

D Q

in1

in2

in3

in4

out

sel[1:0]

clock

Schematic


Parts of a Schematic

D Q

D Q

D Q

D Q

in1

in2

in3

in4

out

sel[1:0]

clock

Ports / Terminals» interface to outside world» how many?

Nets» internal connections» how many?

Symbols» simple (or “abstract”)

representation of hardware» how many?

Instances» An occurrence of a symbol» how many


What is a Digital System?

It is a organized collection of digital elements which is designed to perform specified operations on a set of digital inputs and to generate a set of digital responses.

A digital system can be as simple as a block of combinational logic or as complex as a microprocessor.


What is a Digital System?Structure of digital systems: “system” vs. “module”

• For small systems which can be conveniently designed monolithically the terms “system” and “module” may be used interchangeably.

• A digital system can be created as a monolithic structure.

• Complex systems often need to be partitioned into some number of subsystems -- “modules”


What is a Digital System?Single module system:

moduledata in

control

data out

control

System


What is a Digital System?Multiple module system:

module

data in

control

data out

control

System

module

module

data in

control


Inside the TMS320DSC25 chip

How do we go about designing this?


Step 1: Describe the Hardware

One approach: Simply describe the whole system as a set of schematics.

Then send your description off to a semiconductor company to fabricate for you.

What problems arise with this approach?» Drawing schematics takes too much time» How do you know for certain that it will work?


Step 2: Simulate the Behavior

Automatically generate a timing diagram / waveforms to verify the behavior

In[0]

In[1]

In[2]

In[3]

clock

Out[0]

Out[1]

Out[2]

Out[3]

Clock

In

Out

F 1 A 5

x F 2 A A


Role of Hardware Description Languages

Modern digital chip and system design centers on the use of Hardware Description Languages (HDL) to capture the design at the Register Transfer Level (RTL)

» RTL specifies all registers (flip-flops) and the combinational logic between the flip-flops

» Capturing the design in RTL is much faster than drawing a schematic, because you don’t need to specify each gate.

» But how do we get the final hardware?


Step 3: Synthesize the Hardware

Modern design depends heavily on the use of Computer-Aided Design tools:» To synthesize the RTL design into a schematic» To turn the schematic into a chip layout, FPGA mapping or board

layout» To verify the original design, and verify that the more detailed

designs are consistent with the original design Good designers depend critically on their ability to operate effectively

with the CAD tools» Just knowing how to design logic is not enough» Unfortunately, you must learn a lot of tools and learn how to deal

with their complexity and bugs» Its important to form a good understanding of the tool’s

methodology

HDLs simplify Design Capture & Design Automation


Synthesis-based chip design

The chip is designed using synthesis tools» Used when time-to-market is the most important

issue

Basic Steps:Write HDL

Simulate

Snythesize

Place&Route

Verify


IC Design Approaches

HDL and synthesis based design is used in both Application Specific Integrated Circuits (ASICs):

D-flip-flop NOR gate

Place and Route Tool


…IC Design Approaches

and Field Programmable Gate Arrays (FPGAs):

Xilinx FPGAarchitecuture Configurable Logic Block (CLB):


Summary

Explain the differences between the following terms:

» Schematic vs. Block Diagram

» Port vs. Net

» Symbol vs. Instance

» System vs. Module

» HDL vs. RTL

Documents

Spring 2009W. Rhett DavisNC State UniversityECE 406Slide 1 ECE 406 – Design of Complex Digital Systems Lecture 1: Introduction Spring 2009 W. Rhett Davis