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EVENT PROPAGATION FOR ACCURATE CIRCUIT
DELAY CALCULATION USING SAT
Speaker: Bob TsaiInstructor: Jie-Hong Roland Jiang
TODAES 2007
Outline
Background Mathematical formulation Algorithm Sequential circuit Experimental results
Background
Static sensitization
Precise model blown-up problem size
Outline
Background Mathematical formulation Algorithm Sequential circuit Experimental results
Mathematical Formulation
.
( )
shortest / longest topological path an input event may propagate to node c
event variable for node c at instant i
value variable for node c at instant i
Event Rules Validity condition
Forward propagation
Backward justification
(𝑎¿¿𝑒𝑖−𝑑+𝑏𝑒𝑖−𝑑+⋯)(𝑐𝑣
𝑖 ⊕𝑐𝑣𝑖− 1)⇒𝑐𝑒
𝑖 ¿
𝑐𝑒𝑖 ⇒(𝑎𝑒
𝑖−𝑑+𝑏𝑒𝑖−𝑑+⋯)
()
(𝑎¿¿𝑒𝑖−𝑑𝑎+𝑏𝑒𝑖−𝑑𝑏+⋯)(𝑐𝑣
𝑖 ⊕𝑐𝑣𝑖−1)⇒𝑐𝑒
𝑖 ¿
𝑐𝑒𝑖 ⇒(𝑎𝑒
𝑖−𝑑𝑎+𝑏𝑒𝑖 −𝑑𝑏+⋯)
()
Primary input rules &Circuit rules For any PI a, Primary input initial value
Primary input event
Circuit rules
𝑎𝑣−1❑
⇔(𝑎𝑣
0⨁ 𝑎𝑒0 )
(𝑎𝑒0+𝑏𝑒
0+⋯)
Outline
Background Mathematical formulation Algorithm Sequential circuit Experimental results
(𝑃𝑂1𝑒𝐷+𝑃𝑂2𝑒
𝐷+⋯)
Outline
Background Mathematical formulation Algorithm Sequential circuit Experimental results
Sequential circuit
[ (𝑄0 ,𝑄1 ) ,(𝑄0 ,𝑄1)]
Outline
Background Mathematical formulation Algorithm Sequential circuit Experimental results
Experimental results
Experimental resultsUnit delay
Experimental results
