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Ans 1(a) BJT is called bipolar device because current in this is carried b bothelectrons and holes and in case of FET current is only carried by eitherholes or electrons

S No FET BJT

1 It is a voltage controlled devicei.e. voltage at gate ordrain terminal controls theamount of current flowingthrough the device

It is a current controlled device i.e.base current controls theamount of collector current

2 Its input resistance is very highand is the order of severalmega ohms

Its input resistance is very low ascompared o FET and is of theorder of Kilo ohms

3 It has negative temperaturecoefficient

It has positive temperaturecoefficient

4 It does not suffer from minoritycarrier storage effects andtherefore has higherswitching speeds

It suffers from minority carrierstorage effects and thereforehas lower switching speed andcut off frequencies than that ffFET

5 It is smaller in Size It is bigger in Size

There could be more differences. There should be at least 4Differences to get 5 marks

Ans1 (b) Operation JFET-working

Operation of JFET


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Operation of JFET

Let us consider an N-channel JFET for discussing its operation.

(i) When neither any bias is applied to the gate (i.e. when V GS = 0) nor any voltage to the drainw.r.t. source (i.e. when VDS = 0), the depletion regions around the P-N junctions , are of equalthickness and symmetrical.

(ii) When positive voltage is applied to the drain terminal D w.r.t. source terminal S withoutconnecting gate terminal G to supply, as illustrated in fig. 9.4, the electrons (which are themajority carriers) flow from terminal S to terminal D whereas conventional drain current I Dflows through the channel from D to S. Due to flow of this current, there is uniform voltage dropacross the channel resistance as we move from terminal D to terminal S. This voltage dropreverse biases the diode. The gate is more negative with respect to those points in the channel

which are nearer to D than to S. Hence, depletion layers penetrate more deeply into the channelat points lying closer to D than to S. Thus wedge-shaped depletion regions are formed, as shownin figure. when Vds is applied. The size of the depletion layer formed determines -the width of thechannel and hence the magnitude of current ID flowing through the channel.

layers gets reduced causing decrease in resistance and , therefore, increase in drain current ID.(The gate-source voltage VGS at which drain current ID is cut-off completely (pinched off) is
http://www.circuitstoday.com/wp-content/uploads/2009/08/jfet-bias-circuit.jpg


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called thepinch-off voltage Vp. It is also to be noted that the amount of reverse bias is not thesame throughout the length of the P-N junction. When the drain current flows through thechannel, there is a voltage drop along its length. The result is that the reverse bias at the drainend is more than that at the source end making the width of depletion layer more at the drain. Tosee how the width of the channel varies with the variation in gate

As the width of the depletion layer is penetrated both sides of it will toucheach other then the flow o current will stop then that voltage is calledCut off Voltage.

CHARACTERISTICS OF JFETS

There are two types of static characteristics viz

(1) Output or drain characteristic and

(2) Transfer characteristic.

JFET Parameters :-
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Drain Resistance (rd):- From Drain Characteristics, the important parameter of

JFET, is drain resistance rd, & can be calculated from figure Drainresistance rd is the are resistanceb/w drain & source terminal when JFET is

operating in saturation region it is the

reciprocal of the & lape of the drain

characteristics in saturation region

rd

Since characteristics in the saturation region is almost flart, rd in not easily.

rd range from about 50kr .. Several hundred kr.

rd is usually the O/P resistance of JFET, it may also be expressed as O/P admittance

Transconductance: - Transconductance gm , is the change in drain for given change ingate do source v/g with the drain to source v/g constant .

VDS = Const

unit m A/V

Or ms

s Siemens

-vas ID


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Amplification Factor ( )

Amplification factor

Open loop Op-Amp Configuration:-No connection b/w o/p & o/p & op-amp works as a very high gain amplifier. Following are thethree open loop op-amp configuration:-

(a) Non inverting amplifier

(b) Inverting amplifier

(c) Differential amplifier

(a)Non Inverting Amplifier:- +v

In Non inverting amplifier, I/P is applied at the

non-inverting terminal of the ground

op-amp &inverting terminal is grouched A

o/p of non-inverting amplifier is in phase with

the I/P

We know that for an Op-amp

Open loop gain


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but from the fig &

O/p is A times larger than I/P & is in phase with the e/p.

(b) Inverting Amplifiers:- I/P is applied

at the inverting terminal & the non-inverting

terminal is grounded.

O/P of inverting amp is out of phase with I/p

We know that

.. source resistance Rin is neglected than

O/P is A times greater or larger than the I/P & is in opposite phase .

(c) Differential Amplifier:-

I/P are applied at .eaverting & non Inverting

amplifier.

Since difference b/w the two input signal isamplifier, the Configuration is ealled the

differential amplifier.

A


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.. Two sources resistance are neglected than

From above equation it is obvious that the o/p is A times of dieefence b/w two I/p v/g .Thepolarity of I/p diff.v/g.

OP Amp as an Adder or Summer :-

Adder is a .whose

o/p is equal .. the

sem of applied I/p v/ges.

Let three V/gs are applied to the inverting I/p of op Amp.

Assuming that op-amp is ideal, we have

Since gain of op-Amp is

Therefore Vid

Vid =0

Now current ia is given as


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Similarly ib

Applying Kcl at Mode A we have

but is zero because i/p impedance cg ideal op-amp is infinite so

Ans 1(d) 5Marks

An Operational amplifier is a directly coupled very high gain amplifiergenerally consisting of one or more differential amplifiers. AnOperational amplifier can amplify signals having frequency ranging from0 Hz to 1MHz i.e. it can be used to amplify both ac and dc .It is basicallya multi stage amplifier which consists of large no of transistors.

Properties of Ideal Op amp

PARAMETER IDEALIZED CHARACTERISTIC

Voltage Gain, (A) Infinite - The main function of an operational amplifier is toamplify the input signal and the more open loop gain it hasthe better, so for an ideal amplifier the gain will be infinite.

Input impedance, (Zin) Infinite - Input impedance is assumed to be infinite to


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prevent any current flowing from the source supply into theamplifiers input circuitry.

Output impedance, (Zout) Zero - The output impedance of the ideal operational

amplifier is assumed to be zero so that it can supply as muchcurrent as necessary to the load.

Bandwidth, (BW) Infinite - An ideal operational amplifier has an infiniteFrequency Response and can amplify any frequency signalso it is assumed to have an infinite bandwidth.

Offset Voltage, (Vio) Zero - The amplifiers output will be zero when the voltagedifference between the inverting and non-inverting inputs is

zero.

CMRR Infinite An ideal operational amplifier has an infiniteCommon Mode Rejection ratio

Slew Rate Infinite An ideal operational amplifier has an infinite Slewrate

Ans1 (e)

i) CMRR : common-mode Rejection RatioAs stated before, an ideal differential amplifier only amplifies the voltage differencebetween itstwo inputs. If the two inputs of a differential amplifier were to be shorted together (thus ensuringzero potential difference between them), there should be no change in output voltage for anyamount of voltage applied between those two shorted inputs and ground:Voltage that is common between either of the inputs and ground, as "Vcommon-mode" is in thiscase, is called common-mode voltage. As we vary this common voltage, the perfect differentialamplifier's output voltage should hold absolutely steady (no change in output for any arbitrarychange in common-mode input). This translates to a common-mode voltagegain of zero.


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The operational amplifier, being a differential amplifier with high differential gain, would ideallyhave zero common-mode gain as well. In real life, however, this is not easily attained.Thus, common-mode voltages will invariably have some effect on the op-amp's output Theperformance of a real op-amp in this regard is most commonly measured in terms of itsdifferential voltage gain (how much it amplifies the difference between two input voltages)

versus its common-mode voltage gain (how much it amplifies a common-mode voltage). Theratio of the former to the latter is called the common-mode rejection ratio, abbreviated as

An ideal op-amp, with zero common-mode gain would have an infinite CMRR. Real opampshave high CMRRs, the ubiquitous 741 having something around 70 dB, which worksout to a little over 3,000 in terms of a ratio.(ii) Slew Rate

Slew rate is defined as the maximum rate of change of output voltage per unit of time under large

signal conditions and is expressed in volts / secs.

(iii) Input offset voltage

Input offset voltage is defined as the voltage that must be applied between the two inputterminals of an OPAMP to null or zero the output .

(iv) Input offset Current:The input offset current Iio is the difference between the currents into inverting and noninverting

terminals of a balanced amplifier.Iio = | IB1 - IB2 |The Iio for the 741C is 200nA maximum. As the matching between two input terminals isimproved, the difference between IB1 and IB2 becomes smaller, i.e. the Iio value decreasesfurther. For a precision OPAMP 741C, Iio is 6 nA

(v) Input Bias Current:

The input bias current IB is the average of the current entering the input terminals of a balancedamplifier i.e.

SECTION B

Ans 2


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As its name suggests, the depletion-enhancementMOSFET (DE-MOSFET)-was developed tobe used in either or both the depletion and enhancement modes.

Construction of a DEMOSFET.

Construction of DEMOSFET

Figure shows the construction of an N-channel depletion MOSFET. It consists of a highly dopedP-type substrate into which two blocks of heavily doped N-type material are diffused forming thesource and drain. An N-channel is formed by diffusion between the source and drain. The type ofimpurity for the channel is the same as for the source and drain. Now a thin layer of SiO 2dielectric is grown over the entire surface and holes are cut through the SiO2 (silicon-dioxide)layer to make contact with the N-type blocks (Source and Drain). Metal is deposited through the

holes to provide drain and source terminals, and on the surface area between drain and source, ametal plate is deposited. This layer constitutes the gate. Si02 layer results in an extremely highinput impedance of the order of 1010 to 1015 Q for this area. The chip area of a MOSFET istypically 0.003 um2 or less which is about only 5% of the area required by a BJT. A P-channelDE-MOSFET is constructed like an N-channel DE-MOSFET, starting with an N-type substrateand diffusing P-type drain and source blocks and connecting them internally by a P-dopedchannel region.

Operation of DEMOSFET.
http://www.circuitstoday.com/mosfet-metal-oxide-semiconductor-transistorhttp://www.circuitstoday.com/wp-content/uploads/2009/08/n-channel-de-mosfet-structure.jpghttp://www.circuitstoday.com/mosfet-metal-oxide-semiconductor-transistor


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DEMOSFET-Operation

DE-MOSFET can be operated with either a positive or a negative gate. When gate is positive

with respect to the source it operates in the enhancementor E-mode and when the gate isnegative with respect to the source, as illustrated in figure, it operates in depletion-mode.

When the drain is made positive with respect to source, a drain current will flow, even with zerogate potential and the MOSFET is said to be operating in E-mode. In this mode of operation gateattracts the negative charge carriers from the P-substrate to the N-channel and thus reduces thechannel resistance and increases the drain-current. The more positive the gate is made, the moredrain current flows.

On the other hand when the gate is made negative with respect to the substrate, the gate repels

some of the negative charge carriers out of the N-channel. This creates a depletion region in thechannel, as illustrated in figure, and, therefore, increases the channel resistance and reduces thedrain current. The more negative the gate, the less the drain current. In this mode of operation thedevice is referred to as a depletion-mode MOSFET. Here too much negative gate voltage canpinch-off the channel. Thus operation is similar to that of JFET.

Characteristics of DEMOSFET.

(i) Drain characteristics
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Typical drain characteristics, for various levels of gate-source voltage, of an N-channelMOSFET are shown in figure. The upper curves are for positive VGS and the lower curves are for

negative VGS. The bottom drain curve is for VGS = V GS(OFF). For a specified drain-sourcevoltage VDS, VGS (OFF) is the gate-source voltage at which drain current reduces to a certainspecified negligibly small value, as shown in figure. This voltage corresponds to the pinch-offvoltage Vp of JFET. For VGS between VGS (0FF) and zero, the device operates in depletion-modewhile for VGS exceeding zero the device operates in enhancement mode. These drain curves againdisplay an ohmic region, a constant-current source region and a cut-off region. MOSFET has twomajor applications: a constant current source and a voltage variable resistor.

(i) DEMOSFET-transfer characteristics

The transfer (or transconductance) characteristic for an N-channel DE-MOSFET is shown infigure. IDSS is the drain current with a shorted gate. Since the curve extends to the right of theorigin, IDSS is no longer the maximum possibledrain current.
http://www.circuitstoday.com/wp-content/uploads/2009/08/de-mosfet-transfer-characteristics.jpghttp://www.circuitstoday.com/wp-content/uploads/2009/08/de-mosfet-drain-characteristics.jpg


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Mathematically, the curve is still part of a parabola and the same square-law relation exists aswith a JFET. In fact, the depletion-mode MOSFET has a drain current given by the sametransconductance equation as before, equation . Furthermore, it has the same equivalent circuitsas a JFET. Because of this, the analysis of a depletion-mode MOSFET circuit is almost identicalto that of a JFET circuit. The only difference is the analysis for a positive gate, but even here the

same basic formulas are used to determine the drain current ID, gate-source voltage VGS etc.

The foregoing discussion is applicable in principle also to the P-channel DE-MOSFET. For sucha device the sign of all currents and voltages in the characteristics must be reversed.

Schematic Symbols of DEMOSFET.

DEMOSFET-Schematic symbols

Figure shows the schematic symbol for a DE-MOSFET. Just to the right of the gate is the thinvertical line representing the channel. The drain lead comes out from the top of the channel andthe source lead connects to the bottom. The arrow is on the P-substrate and points to the N-material. In some applications, a voltage can be applied to the substrate for added control ofdrain current. For this reason, some DE-MOSFETs have four terminal leads. But in mostapplications, the substrate is connected to the source. Usually the substrate is connected to thesource internally by the manufacturer. This results in a three terminal device whose schematicsymbol is shown in figure.

Schematic symbol for a three terminal P-channel DE-MOSFET device is shown in figure. Theschematic symbol of a P-channel DE-MOSFET is similar to that of an N-channel DE-MOSFET,except that the arrow points outward.
http://www.circuitstoday.com/wp-content/uploads/2009/08/circuit-symbol-for-de-mosfet.jpg


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Ans 3

Voltage Follower (Unity Gain Buffer)

If we made the feedback resistor, Rf = 0 then the circuit will have a fixed

gain of "1" and would be classed as a Voltage Follower and this type ofNon-inverting amplifier circuit is sometimes called a Voltage follower withgain. As the input signal is connected directly to the non-inverting input ofthe amplifier the output signal is not inverted resulting in the output voltagebeing equal to the input voltage, Vout = Vin. This then makes the VoltageFollower circuit ideal as a Unity Gain Buffercircuit because of its isolationproperties as impedance or circuit isolation is more important than amplification. The inputimpedance of the voltage follower circuit is very high, typically above 1M as it is equal to thatof the operational amplifiers input, since an ideal op-amp condition is assumed.

In this circuit, Rin has increased to infinity and Rf reduced to zero, thefeedback is 100% and Vout is exactly equal to Vin giving it a fixed gain of 1or unity. As the input voltage Vin is applied to the non-inverting input thegain of the amplifier is given as:

Since no current flows into the non-inverting input terminal the inputimpedance is infinite and also no current flows through the feedback loop soany value of resistance may be placed in the feedback loop without affectingthe characteristics of the circuit as no voltage is dissipated across it, zero
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current, zero voltage, zero power drop. However in most real unity gain buffercircuits a low value (typically 1k) resistor is required to reduce any offset input leakagecurrents, and also if the operational amplifier is of a current feedback type.

Summing Amplifier

The Summing Amplifier is a very flexible circuit based upon the standardInverting Operational Amplifierconfiguration. We saw previously in theInverting Amplifier tutorial that the Inverting Amplifier has a single inputsignal applied to the Inverting input terminal. If we add another input resistorequal in value to the original input resistor, Rin we end up with anotheroperational amplifier circuit called a Summing Amplifier, "SummingInverter" or even a "Voltage Adder" circuit as shown below.

Summing Amplifier Circuit

The output voltage, (Vout) now becomes proportional to the sum of the inputvoltages, V1, V2, V3 etc. Then we can modify the original equation for theinverting amplifier to take account of these new inputs thus:

However, if all the input impedances, (Rin) are equal in value the finalequation for the output voltage is given as:


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We now have an operational amplifier circuit that will amplify each individual

input voltage and produce an output voltage signal that is proportional to thealgebraic "SUM" of the three individual input voltages V1, V2 and V3. We canalso add more inputs if required as each individual input "see's" theirrespective resistance, Rin as the only input impedance. This is because theinput signals are effectively isolated from each other by the "virtual earth"node at the inverting input of the op-amp. A direct voltage addition can alsobe obtained when all the resistances are of equal value and Rf is equal toRin.

A Scaling Summing Amplifier can be made if the individual input resistorsare "NOT" equal. Then the equation would have to be modified to:

We can also rearrange the formula to make the feedback resistor RF thesubject and the output voltage is found from

Allowing the output voltage to be easily calculated if more input resistors areconnected to the amplifiers input. The input impedance of each individualchannel is the value of their respective input resistors, ie, R1, R2, R3 ... etc.

The Summing Amplifier is a very flexible circuit indeed, enabling us toeffectively "Add" or "Sum" together several individual input signals. If theinputs resistors, R1, R2, R3 etc, are all equal a unity gain inverting adder canbe made. However, if the input resistors are of different values a "scalingsumming amplifier" is produced which gives a weighted sum of the input

signals.


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Ans 4

The negative sign in the equation indicates an inversion of the output signalwith respect to the input as it is 180o out of phase. This is due to thefeedback being negative in value.

Non-inverting Amplifier

The second basic configuration of an operational amplifier circuit is that of aNon-inverting Amplifier. In this configuration, the input voltage signal,(Vin) is applied directly to the Non-inverting (+) input terminal which meansthat the output gain of the amplifier becomes "Positive" in value in contrast

to the "Inverting Amplifier" circuit we saw in the last tutorial and whoseoutput gain is negative in value. Feedback control of the non-invertingamplifier is achieved by applying a small part of the output voltage signalback to the inverting (-) input terminal via a Rf - R2 voltage divider network,again producing negative feedback.

This produces a Non-inverting Amplifier circuit with very good stability, avery high input impedance, Rin approaching infinity (as no current flows intothe positive input terminal) and a low output impedance, Rout as shownbelow.


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Non-inverting Amplifier

In the previous Inverting Amplifiertutorial, we said that "no current flows intothe input" of the amplifier and that "V1 equals V2". This was because thejunction of the input and feedback signal (V1) are at the same potential inother words the junction is a "Virtual Earth" summing point. Because ofthis virtual earth node the resistors, Rf and R2 form a simple voltage dividernetwork across the amplifier and the voltage gain of the circuit is determinedby the ratios of R2 and Rf as shown below.

Equivalent Voltage Divider Network

Then using the formula to calculate the output voltage of a potential dividernetwork, we can calculate the output Voltage Gain of the Non-inverting

Amplifier as:
http://www.electronics-tutorials.ws/opamp/opamp_2.htmlhttp://www.electronics-tutorials.ws/opamp/opamp_2.html


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Then the closed loop voltage gain of a Non-inverting Amplifier is given as:

We can see that the overall gain of a Non-Inverting Amplifier is greater but

never less than 1 (unity), is positive and is determined by the ratio of thevalues of Rf and R2. If the feedback resistor Rf is zero the gain will be equalto 1 (unity), and if resistor R2 is zero the gain will approach infinity, but inpractice it will be limited to the operational amplifiers open-loop differentialgain, (Ao).

Differentiator and Integrator Operational Amplifier Circuits


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