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Outline
Smalltalk-80 : hardware and software
Bernard Pottier
1LESTER - Architecture & SystèmeCNRS FRE 2734 - Université de Bretagne Occidentale
ESUG’05 16/8/05
Outline
Outline
1 Introduction
2 The electronic industry roadmap
3 Synthesis from Smalltalk
4 Virtual machines of the past
5 Example of a mixed-grain reconfigurable data path
6 Conclusion
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Group presentation
Status:
• Architectures and Systems (AS) is a research group atUniversité de Bretagne Occidentale, Brest, France.
• AS participates in the LESTER, a laboratory distributed ontwo universities at Lorient and Brest,
• LESTER received a recognition from french CNRS for itsresearch activities on software methods for integratedsystems: synthesis, power consumption, reconfigurabledevices, algorithms for communications.
AS is a small group (at most 10 persons) working in computerscience, sometime in relation with people working in electronics(academy and industry).
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Previous projects
Summary of my researches at UBO:
• 80-86 : virtual machines and support for programminglanguages (Lisp, Smalltalk, . . . )
• 87-89 : applications of concurrent architectures(Transputers, data-flow languages, mapping signalprocessing applications),
• 90-95 : parallel and reconfigurable architectures, dedicatedlanguage designs and synthesis techniques. Design of aparallel reconfigurable machine (ArMen),
• 96-2005 : tools for reconfigurable circuit ans systems(Madeo workbench).
In this last period, most of the work was achieved usingSmalltalk-80 (Visualworks).
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Motivations : software problems in the silicon industry
EETimes Aout 2005 : Pressure on integrated applicationdevelopments:
• Quick developments aremandatory,
• Part of the software isincreasing,
• The frontier between softwareand hardware is less and lessclear,
• Tools are inaccurate,• Multiprocessing is a key point.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Motivations to use Smalltalk at low level
• Smalltalk-80 has powerful development environments andis ideal to build generic solutions,
• It is easy to extend the language because it is not bound toa small number of types (int, char..).
• An interest is appearing for evolutions on Smalltalkallowing to take benefits of the emerging technologies.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Frustrations and dreams with current virtual machines
Long term desirableevolutions:
• Numeric processing withnew hardware primitives,(arbitrary floating andfixed points, Galoisfields, etc . . . ),
• Automatic synthesis ofthese circuits frombehavioural code,
• Concurrent execution forCollections (pipelined ordata parallel), andStream computations,
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Outline
1 Introduction
2 The electronic industry roadmap
3 Synthesis from Smalltalk
4 Virtual machines of the past
5 Example of a mixed-grain reconfigurable data path
6 Conclusion
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
THE ELECTRONIC INDUSTRY ROADMAP
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Technology progress: a scientific, economic and socialfact
Exponential increase in transistors,
(from the SIA Report 2005)
Effect of Moore’s law, ×10000transistors increase in 25 years.
1 1982: logic = 120K, ram = 64K2 2005: logic = 1.7G , ram = 1G
Increase expected to continue until2020.In the meantime, nanotechnologiesare preparing cheaper, smaller,more flexible integration solutionswith a variety of applications.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Industry roadmaps
The semiconductor industryprepare roadmaps, listing potentialdifficulties, preparing objectives,research, and use of thetechnologies. This is theunderlying activity behind Moore’slaw.A number of reports are availableon this roadmap:
• http://www.sia-online.org/• http://public.itrs.net
The future is :
• massive parallelism• software synthesis, or
hard/soft synthesis
..rather than hardwaredevelopments.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Known Challenges through 2009
Silicon complexity : devicesand interconnects
(SP) Technology and librarycharacterization(SP) eDRAM, eFPGA
System complexity : numberof states, design, diversity
(SP) verifying systems withexploding number of states(SP) scalable algorithms
Design Productivity
(S) Integrating 3rd party com-ponents(SP) Design tool interoper-ability
Time-to-market
(S) Support for platformbased design(SP) Exploiting ParallelProcessing
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Variety of hardwares
As Low Scale Integration (LSI) has disappeared, VLSI is alsoon the edge to be replaced by new technologies. Currently, thehardware available for application developments is:
1 ↓ microprocessors: VLSI, does not scale.2 ↑ system on chips: VLSI-ULSI, scale, but is specific.3 ↑ reconfigurable circuits: VLSI-ULSI, scale, general
purpose.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Processors evolve toward multi-processing
General purpose processors have internalinstruction level parallelism and evolve towardtask level parallelism:
1 time-shared multi-tasking: several tasksare sequenced following time slices orrace conditions on one processor,
2 simultaneaous multi-threading (SMT):several tasks run concurrently sharingprocessor resources,
3 multi-cores: several processors areimplemented in the same circuit and act inreal concurrency.
AMD and Intel are currently selling multi-coreprocessors.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
System-on-chips (SoC) are for the mass market
SoC are integrated systemsoptimized for an application.
1 Personal assistants,mobile phones,cameras, set-top-boxare implemented at lowcost due to the capabilityof the industry toproduce applications ona small number ofcircuits.
2 These circuits assemblespecific components’IPs’, general purposeprocessors.
Chip
Memory
CPU IP IP
IP IP
cache
network
network
(subsystem)
analog fct.
System on
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Field Programmable Gate Arrays
FPGAs allow to build adedicated system bycharacterizing anoff-the-shelf component.
1 They are the shortestpath from a need to anapplication because theyonly need ’software’.
2 They propose randomlogic integration, set ofoperators,multi-processors andhigh speedcommunications.
3 Xilinx FPGAs:maximum capacities.
Configuration = 50MBits
logic dsp systemlogiccells
200K 55K 150K
RAM(bits)
6K 6K 10K
oper-ators
100 500 200
CPUs 0 0 2serialports
0 0 24
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Gigascale will not have a tiny impact
The semi-conductor industry says:1 Moore’s law will continue its curve.2 We are at a turn with a scale change in the architectures.
Parallelism is a key point with several variants.
We would like to complement referencing two scientists.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Gigascale will not have a tiny impact
The semi-conductor industry says:1 Moore’s law will continue its curve.2 We are at a turn with a scale change in the architectures.
Parallelism is a key point with several variants.We would like to complement referencing two scientists.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
From the academy: a Call to Arms
In 2002, David Patterson haspublished a position onpresent and future ofcomputers. To summarize:
1 importance of computerfor science andtechnologies,
2 obsession forperformances, andridiculous reliability forusers,
3 serious problems withscaling: GB of memory,hundred of processorsare the future.
The ’new manifesto’ forresearch in computerscience is:
1 more attention to humanfactors: interest ofapplications, security,privacy,
2 start fresh researcheson new architectures,new software systems,new programmingsystems, newapplications.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Computers is a pop culture
Another interesting opinion is given in the Alan Kay interview toACM Queue (Dec, 2004)
1 computer systemsreflect the understandingof the people (like TV),
2 comparison of thesoftware building withpyramides brick tiling,build by brute force,
3 retrogression of systemsdue to personalcomputing,
On architecture support:1 Recall the B5000, and
pseudo-codes approachas used by Wirth, andrefused by the industry.
2 Critics on currentarchitecture efficiency.
3 Insists on the interest oflate binding.
“Just as an aside, to give you an interesting benchmark onroughly the same system, roughly optimized the same way, abenchmark from 1979 at Xerox PARC runs only 50 times fastertoday.”
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
What to do?
1 we must take into account the hypothesis of large amountof resources given from several sources,
2 most of these resources will be used for intensivecomputations: signal processing, multimedia, security,scientific,
3 it makes sense to define the whole translation andexecution chain with transparency, using the same tools,
4 it is mandatory to pay attention to these topics, this doesnot forbid to improve the quality of the language and itssupport for general purpose programming.
To be demonstrated.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
SYNTHESIS FROM SMALLTALK
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Objectives
Madeo project was started a long term effort withe hope tosurvive in the evolving domain of reconfigurable architectures(FPGAs).It came after ArMen that developped a parallel machine andad-hoc compilers quickly lost due to the change in tools andarchitectures.Several directions have been explored:
• technology modeling,• portable physical tools,• logic synthesis,
• structural design,• system synthesis.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Architecture modeling
Reconfigurable architectures are charaterized at run time byconnecting signal lines or buses, by programming switches,logic cells, operators, by filling memories.These circuits are replication of patterns that can be organizedhierarchically.This is very similar to the organization of nodes in a programtree, or window components. The common interface allows to:
• compute costs,• route signals or buses
• draw components in aneditor window,
• . . .
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Physical synthesis
PLacing and routing,Given an architecture, and given an abstract computationgraph, this task consists of resource allocation, then routeconstitution, to obtain an implementation.
• Resource allocation is a selection of architecturecomponents able to implement a primitive function nodefrom the graph,
• Graph edges are implemented by path of routedcomponents.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Physical synthesis
Floor-planning,Graphes are hierarchies of graphes. For each non-primitivenode, an opertion of floor-planning is achieved on theunderlying components to find the best arrangement minimizingthe number of resources.
Floor planning of a level in ahierachical graph,
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Directed acyclic graph, Equivalent graph placed androuted on an architecture.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Physical synthesis applicability
• Physical tools for logic based FPGAs are mature and hasbeen applied on several experimental or commercialarchitectures, including a practical workbench on theVirtex1.
• Applicability to data-path and heterogeneousreconfigurable circuits has been partially investigated on adesign from STMicroelectronics,
• On-going work on nanofabric modeling in a joint work witha team at UMass,
• Investigations on a massive parallel micro-programmablearchitecture model in a franco-german project,
• Integrated Project Morpheus will start this fall with theobective to develop a SoC approach with heterogeneousreconfigurable units. . .
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Logic synthesis: an evolving grain
We need data-flow graphs for the physical layer.• The grain of “fabrics” is evolving from gate arrays to tiles
grouping operators, registers, memories and buses.• The semiconductor roadmap predicts a move to mesh of
small processors, and reconfigurability will evolve to allowlocal control,
• The term Logic Synthesis match the requirement toproduce logic graphs, from higl level programs, for physicalsynthesis.
• It must be though as Numeric Synthesis when data-pathare involved, and Graph Mapping when processor mesheswill be addressed.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Algorithm+Data=Circuits
• Logic blocks are producedfrom Smalltalk methodswriten for this purpose, butexecutable in the high levelenvironment.
• As we are using a late-boundlanguage, no typeinformation is normallyavailable.
• This need is filled byrequiring a compilationcontext that holds the datathat will be operated by theresulting circuit.
• The programming game is toavoid nodes of largecomplexity, to quicklyconverge to synthesizablenodes.
• The same code allows tosynthesize from objects ofdifferent classes,
• Polymorphism survives inthis technique,
• Fully automatic process,
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Compiler flow for logic synthesis:
1 parser: Smalltalk parser, produces a program graph,2 DAG: Dependency analysis, removing temporaries,
production of a Directed Acyclic Graph (DAG),3 Type inference: the compiler context is propagated in the
DAG:1 complex messsage sends are compiled recursively2 simple nodes are replaced by a table
4 Optimization: removing useless tables and values,5 Coding: codes are attributed to objects,6 Logic production: tables are split for adaptation to a
target technology (SIS)
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Relations with a software environment
1 Combinational circuitsproduced at high level,applicative style ofprogrammation,
2 Strong interest foroperator production,
3 Very efficientoptimization, proof ofconcept on criticalapplications (Galoisfields and errorcorrection)
4 100% compatible withthe needs of a high levelsoftware environment
If used from a virtualmachine an adaptation isneeded between object inmemory and computingcircuit (at least indexes).
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Logic synthesis applicability
Finite state machines aresynthesized by including thestate values in the compilercontext. The state set isprogressively built byretrieving new values from aninitial value.
1 Limited for computationorganization
2 Currently: only logicsynthesis is working.Numeric synthesis fordata path, micromachines are notimplemented.
3 The type system allowsto preserve numeric setsas intervals
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Structural representations
More complex circuits are produced by copying, replicating andbinding components together on the top of logic synthesis andPhysical synthesis.These programs can be kept “architecture independents” dueto the relative geometrical characteristics obtained from thesynthesized modules.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Structural representations
Module component known byits geometry
is replicated after computinga correct position.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Use status
This software was started as an open alternative to industrialtools for architecture and compiler design.
• System synthesis: as a quick complement to the FPGAframework, a synthesizer has been built to allow theautomatic production of code from Smalltalk models: Ccode, communication code, micro-code for a camera andFPGA. Demonstration on an embedded camera.
• Language integration: use of the framework as a backend for C compilers and the synchronous language Signal.
• Architecture design: most of the interest received isactually for modeling, quick tool generation andperformance evaluations for new architectures.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
• Morpheus project: willinclude a system on chipand reconfigurable unitsof different grain to beaddressed in a similarway, and used undercompiler control.
• Next? dedicatedsupport for virtualmachines: it isattractive and natural toinvestigate how we couldbuild powerful supportfor ’virtual’ machinesusing the reconfigurableunits and .
Units can implementdedicated functions,reconfigurable on the fly.This is still general purposeHW, considered as a crediblealternative to IP for flexibilityand time-to-market reasons.It scales.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
VIRTUAL MACHINES OF THE PAST
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Virtual machines of the past
Past and present VM will not address new challenges due tothe large change of scale. However they can be used to controllarger processing elements coming from synthesis.For VM, three reference points are :
1 Micro-coded approach, as used in the Dorado, providesflexibility in the definition of the instruction set and efficientmicro-grain parallelism inside the processor.This model is a good match with current HW orientations.
2 Software approach, using a processor, we can interpret apseudo-code and implement all the required functionalities.Characteristics: sequential specification and few use ofspecific HW support. (multicores, SMT ?)
3 Specific processor tuned for performances, as wasSmalltalk-on-a-Risc (SOAR).Will not appear in SoC or FPGAs.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Dorado control path and organization
Pipeline for instructiondecoding and execution :the Instruction Fetch Unitshare accesses to thememory cache and produceadresses for themicro-machine (up to 6 bytesprepared in adavance).Micro-machine: has a RAMmicrostore with 4K words of36 bits. The IFU is restartedfor jumps, message sends,. . .
Instruction set switching:Smalltalk was implementedwith its own IS andmicro-code, plus the Alto ISaddressed from a B compiler.The IS is switched to executesome primitives.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Dorado processor characteristics
registers : 16 groups of 16registers (3 were used)stacks : 4 stacks of 64registers (used only in themicro-code)data-path : operated on 16bits
pipeline stages : 6,including 2 in the IFU.cycle time : 70nsprocess switching: supportof multitasking and I/Os inthe micro-codecache : 4K words access in100ns, virtual memory notused.
A number of resources were not used, and the implementationrelied mostly on the speed of the cache.Cost: 100000$.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Code distribution
IFU + microcode :interpretermicrocode :
• process switch andkernel operations
• most of the memorymanagement: allocation,recursive freeing,garbage collectors,compactor loops,
• access to the objects,• block context
management,• simple operations and
bitblt.
macrocode (Alto) :
• more or less C• large integers, floating
point• I/Os• snapshot,• other storage
management.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Micro-code interesting features
• Compared with a software interpreter : the time spent inthe fetch, dispatch loop, process switch is removed by theIFU. Primitives call is reduced.
• ILP: micro-code allows ’by hand’ instruction levelparallelism that could be difficult to produce frm a compiler.
• most of the code is located in a surprisingly smallmicro-code memory.
• cache architecture remains critical.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
EXAMPLE OF A MIXED-GRAIN RECONFIGURABLE DATA PATH
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
A data path slice
Data path slice showing 4 RAMs of 256 × 8 bits connected toan arithmetic part with 2 multipliers (16 bits), and 4 8 bits ALUslices.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
A reconfigurable unit
This unit has 8 similarslices organized as adata path, connectedto a fine grain unit(M2000). Areconfigurable loaderallows to programconnectivities, finegrain from outside.Micro-code is emittedto/from the data-path.(J.Cambonie,V.George, STMicro)
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
Being a little bit speculative...
Mapping of a Dorado-like architecture on this ST Data-path isnearly possible!
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
CONCLUSION
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
As a conclusion
1 feed back to the industry efforts: given the future hugeamount of hardware resources available, we can imaginemethods and tools to produce applications quickly.
2 it is best to build models and tools for future architecturesnow, rather than wait for the C compiler that will produceparallelism and ensure portability,
3 concurrency is the way to go, at the circuit level, distributedprocessing level, and machine level,
4 several mechanisms are lacking in current Smalltalk,especially for spatial parallelism description, timeconstraint, type systems, processor descriptions.
Introduction Outline The electronic industry roadmap Synthesis from Smalltalk Virtual machines of the past Example of a mixed-grain reconfigurable data path Conclusion
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