SJTU J. Chen 1 2015-8-16 Chapter 5 Field-Effect Transistors (FETs)

SJTU J. Chen 123/4/19

Chapter 5 Field-Effect Transistors (FETs)

23/4/19 SJTU J. Chen

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Content

Physical operation and current-voltage characteristics

DC analysisBiasing in MOS amplifier circuit and basic

configuration


Physical operation and current -voltage characteristics


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FET: Field Effect Transistor There are two types

MOSFET: metal-oxide-semiconductor FET JFET: Junction FET

MOSFET is also called the insulated-gate FET or IGFET. Quite small Simple manufacturing process Low power consumption Widely used in VLSI circuits(>800 million on a single IC chip)

Introduction to FET


5

Device structure of MOSFET (n-type)

p-type SemiconductorSubstrate (Body)

Body(B)

n+ n+

Oxide(SiO2)

Source(S)Gate(G)

Drain(D)

Metal

For normal operation, it is needed to create a conducting channel between Source and Drain

Channel area


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An n channel can be induced at the top of the substrate beneath the gate by applying a positive voltage to the gate

The channel is an inversion layer

The value of VGS at which a sufficient number of mobile electrons accumulate to form a conducting channel is called the threshold voltage (Vt)

Creating a channel for current flow


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L = 0.1 to 3 m

W = 0.2 to 100 m

Tox= 2 to 50 nm

Device structure of MOSFET (n-type)

Cross-section view


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According to the type of the channel, FETs can be classified as

MOSFET N channel

P channel

JFET P channel

N channel

Classification of FET

•Enhancement type

•Depletion type

•Enhancement type

•Depletion type


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Drain current under small voltage vDS

An NMOS transistor with vGS > Vt and with a small vDS applied.

The channel depth is uniform and the device acts as a resistance.

The channel conductance is proportional to effective voltage, or excess gate voltage, (vGS – Vt) .

Drain current is proportional to (vGS – Vt) and vDS.


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Drain current under small voltage vDS


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The induced channel acquires a tapered shape.

Channel resistance increases as vDS is increased.

Drain current is controlled by both of the two voltages.

Operation as vDS is increased

B


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When VGD = Vt or VGS - VDS = Vt , the channel is pinched off Inversion layer disappeared at the drain point Drain current does not disappeared!

Channel pinched off


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Drain current under pinch off

• The electrons pass through the pinch off area at very high speed so as the current continuity holds, similar to the water flow at the Yangtze Gorges

Pinched-off channel


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Drain current is saturated and only controlled by the vGS

Drain current under pinch off


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vGS creates the channel.

Increasing vGS will increase the conductance of the channel.

At saturation region only the vGS controls the drain current.

At subthreshold region, drain current has the exponential relationship with vGS

Drain current controlled by vGS


16

Two reasons for readers to be familiar with p channel device

p channel device

Existence in discrete-circuit. More important is the

utilization of complementary MOS or CMOS circuits.


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Structure of p channel device The substrate is n type and the inversion layer is p type. Carrier is hole. Threshold voltage is negative. All the voltages and currents are opposite to the ones of n

channel device. Physical operation is similar to that of n channel device.

p channel device


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The PMOS transistor is formed in n well.

Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well.

CMOS is the most widely used of all the analog and digital IC circuits.

Complementary MOS or CMOS


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Circuit symbolOutput characteristic curvesChannel length modulationCharacteristics of p channel deviceBody effectTemperature effects and Breakdown Region

Current-voltage characteristics


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(a) Circuit symbol for the n-channel enhancement-type MOSFET.

(b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel).

(c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

Circuit symbol


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(a) An n-channel enhancement-type MOSFET with vGS and vDS applied and with the normal directions of current flow indicated.

(b) The iD–vDS characteristics for a device with k’n (W/L) = 1.0 mA/V2.

Output characteristic curves of NMOS


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• Three distinct region

Cutoff region

Triode region

Saturation region

• Characteristic equations

• Circuit model

Output characteristic curves of NMOS


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• Biased voltage

• The transistor is turned off.

• Operating in cutoff region as a switch.

tGS Vv

0Di

Cutoff region


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• Biased voltage

• The channel depth changes from uniform to tapered shape.

• Drain current is controlled not only by vDS but also by vGS

tGSDS

tGS

Vvv

Vv

DStGSn

DSDStGSnD

vVvL

Wk

vvVvL

Wki

)('

2

1)(' 2

Triode region

process transconductance parameter


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• Assuming that the draint-source voltage is sufficiently small, the MOS operates as a linear resistance

OVn

tGSnVvD

DSDS

VL

Wk

VVL

Wki

vr

GSGS

'1

)('1

Triode region


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• Biased voltage

• The channel is pinched off.

• Drain current is controlled only by vGS

• Drain current is independent of vDS and behaves as an ideal current source.

tGSDS

tGS

Vvv

Vv

221 )' tGSnD Vv

L

Wki （

Saturation region


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The iD–vGS characteristic for an enhancement-type NMOS transistor in saturation

Vt = 1 V, k’n W/L = 1.0 mA/V2

Square law of iD–vGS characteristic curve.

Saturation region


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• Explanation for channel length modulation Pinched point moves to source terminal with the

voltage vDS increased.

Effective channel length reduced Channel resistance decreased Drain current increases with the voltage vDS

increased.

• Current drain is modified by the channel length modulation

)1)' 221

DStGSnD vVvL

Wki ＋（（

Channel length modulation


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The MOSFET parameter VA depends on the process technology and, for a given process, is proportional to the channel length L.



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• MOS transistors don’t behave an ideal current source due to channel length modulation.

• The output resistance is finite.

• The output resistance is inversely proportional to the drain current.

D

A

Dconstv

DS

Do I

V

Iv

ir

GS

1

.

1



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Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS

Large-signal equivalent circuit model


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(a) Circuit symbol for the p-channel enhancement-type MOSFET.

(b) Modified symbol with an arrowhead on the source lead.

(c) Simplified circuit symbol for the case where the source is connected to the body.

Characteristics of p channel device


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The MOSFET with voltages applied and the directions of current flow indicated.

The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.



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Large-signal equivalent circuit model of the p-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS



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In discrete circuit usually there is no body effect due to the connection between body and source terminal.

In IC circuit the substrate is connected to the most negative power supply for NMOS circuit in order to maintain the pn junction reversed biased.

The body effect---the body voltage can control iD Widen the depletion layer Reduce the channel depth Threshold voltage is increased Drain current is reduced

The body effect can cause the performance degradation.

The body effect


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Temperature effects and breakdown region

Drain current will decrease when the temperature increase.

Breakdown Avalanche breakdown Punched-through Gate oxide breakdown

221 )' tGSnD Vv

L

Wki （


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MOS管注意事项

MOS管栅 -衬之间的电容很小，只要有少量的感应电荷就可产生很高的电压。

由于 RGS(DC)很大，感应电荷难于释放，感应电荷所产生的高压会使很薄的绝缘层击穿，造成管子损坏。

因此，在存放、焊接和电路设计时要多加注意，应给栅 -源之间提供直流通路，避免栅极悬空。


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MOS器件出厂时通常装在黑色的导电泡沫塑料袋中，切勿自行随便拿个塑料袋装。可用细铜线把各个引脚连接在一起，或用锡纸包装。

取出的MOS器件不能在塑料板上滑动，应用金属盘来盛放待用器件。

焊接用的电烙铁必须良好接地。在焊接前应把电路板的电源线与地线短接，

待 MOS器件焊接完成后再分开。

MOS管注意事项


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MOS器件各引脚的焊接顺序是漏极、源极、栅极。拆机时顺序相反。

电路板在装机之前，要用接地的线夹子去碰一下机器的各接线端子，再把电路板接上去。

MOS场效应晶体管的栅极在允许条件下，最好接入保护二极管。在检修电路时应注意查证原有的保护二极管是否损坏。

MOS管注意事项


• DC analysis

• Biasing in MOS amplifier circuit and basic configuration


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1. Assuming device operates in saturation thus iD satisfies with iD~vGS equation.

2. According to biasing method, write voltage loop equation.

3. Combining above two equations and solve these equations.

4. Usually we can get two value of vGS, only the one of two has physical meaning.

MOSFET amplifier: DC analysis


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5. Checking the value of vDS

i. if vDS≥vGS-Vt, the assuming is correct.

ii. if vDS≤vGS-Vt, the assuming is not correct. We shall use triode region equation to solve the problem again.

DC analysis


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The NMOS transistor is operating in the saturation region due to

tGD VV

Examples of DC analysis

tV 2V


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Assuming the MOSFET operate in the saturation region

Checking the validity of the assumption

If not to be valid, solve the problem again for triode region

Examples of DC analysis


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The MOSFET as an amplifier

Graph determining the transfer characteristic

of the amplifier

Basic structure of the common-source amplifier


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The MOSFET as an amplifier and as a switch

vi

Time

vI

Time

vo

Transfer characteristic showing operation as an amplifier biased at point Q.

Three segments:

XA---the cutoff region segment

AQB---the saturation region segment

BC---the triode region segment


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Homework

April 2, 2008: 5.2 ； 5.4 ； 5.9 ； 5.10；


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Voltage biasing scheme Biasing by fixing voltage

(constant VGS) Biasing with feedback resistor

Current-source biasing scheme

Biasing in MOS amplifier circuits

Disadvantage of fixing biasingFixing biasing may result in large ID variability due to deviation

in device performanceCurrent becomes temperature dependent Unsuitable biasing method


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Biasing using a resistance in the source lead can reduce the variability in ID

Coupling of a signal source to the gate using a capacitor CC1

Biasing in MOS with feedback resistor


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Implementing a constant-current source using a current mirror

Biasing in MOS with current-source

Biasing the MOSFET using a constant-current source I


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The ac characteristic Definition of transconductance

Definition of output resistance

Definition of voltage gain

Small-signal model Hybrid π model

T model

Modeling the body effect

Small-signal operation and models


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Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

Small signal condition

gs GS tv 2(V V )

The conceptual circuit


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With the channel-length modulation the effect by

including an output resistance

The small-signal models

Without the channel-length modulation effect

OVn

VvGS

Dm V

L

Wk

v

ig

GSGS

'

DS A

o

D Di ID D

v Vr

i I

—transconductance


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An alternative representation of the T model

The small-signal models

The T model of the MOSFET augmented with the drain-to-source resistance ro


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Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body.

Modeling the body effect


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Characteristic parameters

Three configurations

Common-source configuration

Common-drain configuration

Common-gate configuration

Single-stage MOS amplifier


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Input resistance with no load

Input resistance

Open-circuit voltage gain

Voltage gain

LRi

ii i

vR

i

iin i

vR

LRi

ovo v

vA

i

ov v

vA

Definitions


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Short-circuit current gain

Current gain

Short-circuit transconductance gain

Open-circuit overall voltage gain

Overall voltage gain

Output resistance

0

LRi

ois i

iA

i

oi i

iA

0

LRi

om v

iG

Definitions

LRsig

vo v

vG 0

sigv v

vG 0

0

sigvx

xout i

vR


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Voltage divided coefficient

Hence the appropriate configuration should be chosen according to the signal source and load properties, such as source resistance, load resistance, etc

sigin

in

sig

i

RR

R

v

v

oL

Lvov RR

RAA

omvo RGA

oL

Lvo

sigin

inv RR

RA

RR

RG

vosigi

ivo A

RR

RG

outL

Lvov RR

RGG

Relationships


60

Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.

Basic structure of the circuit


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The simplest common-source amplifier biased with constant-current source.

CC1 And CC2 are coupling capacitors.

CS is the bypass capacitor.

The common-source amplifier


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Equivalent circuit of the CS amplifier


63

Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.

Equivalent circuit of the CS amplifier


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Input resistance

Voltage gain


Output resistance

Gin RR

)////( LDomv RRrgA

)////( oLDmsigG

Gv rRRg

RR

RG

Doout RrR //

Characteristics of CS amplifier

Summary of CS amplifier Very high input resistance Moderately high voltage gain Relatively high output resistance


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The CS amplifier with a source resistance


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Small-signal equivalent circuit with ro neglected Voltage gain

Overall voltage gainSm

LDmv Rg

RRgA

1

)//(

Sm

LDm

sigG

Gv Rg

RRg

RR

RG

1

)//(

RS takes the effect of negative feedback

Gain is reduction by (1+gmRS)


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Biasing with constant current source I

Input signal vsig is applied to the source

Output is taken at the drain

Gate is signal grounded

CC1 and CC2 are coupling capacitors

The Common-Gate amplifier


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The CG amplifier

A small-signal equivalent circuit

T model is used in preference to the π model

Ro is neglecting


69

The CG amplifier fed with a current-signal input

Voltage gain


)//( LDmv RRgA

sigm

LDmv Rg

RRgG

1

)//(


70

Noninverting amplifierLow input resistanceRelatively high output resistanceCurrent followerSuperior high-frequency performance

Summary of CG amplifier


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Biasing with current source

Input signal is applied to gate, output signal is taken at the source

The common-drain or source-follower amplifier


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The CD or source-follower amplifier

Small-signal equivalent-circuit model

T model makes analysis simpler

Drain is signal grounded


11

//

//

mLo

Lo

sigG

Gv

gRr

Rr

RR

RG


73

Circuit for determining the output resistance


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Very high input resistanceVoltage gain is less than but close to unityRelatively low output resistanceVoltage buffer amplifierPower amplifier

Summary of CD or source-follow amplifier


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The CS amplifier is the best suited for obtaining the bulk of gain required in an amplifier.

Including resistance RS in the source lead of CS amplifier provides a number of improvements in its performance.

The low input resistance of CG amplifier makes it useful only in specific application. It has excellent high-frequency response. It can be used as a current buffer.

Source follower finds application as a voltage buffer and as the output stage in a multistage amplifier.

Summary and comparisons


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Internal capacitances The gate capacitive effect

Triode region Saturation region Cutoff region Overlap capacitance

The junction capacitances Source-body depletion-layer capacitance drain-body depletion-layer capacitance

High-frequency model

The internal capacitance and high-frequency model


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MOSFET operates at triode region

MOSFET operates at saturation region

MOSFET operates at cutoff region

oxgdgs WLCCC 21

032

gd

oxgs

C

WLCC

oxgb

gdgs

WLCC

CC 0

The gate capacitive effect


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Overlap capacitance results from the fact that the source and drain diffusions extend slightly under the gate oxide.

The expression for overlap capacitance Typical value

oxovov CWLC LLov 1.005.0

Overlap capacitance

This additional component should be added to Cgs and Cgd in all preceding formulas


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• Source-body depletion-layer capacitance

• drain-body depletion-layer capacitanceo

SB

sbsb

VV

CC

＋1

0

o

DB

dbdb

VV

CC

＋1

0

The junction capacitances


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The equivalent circuit model with Cdb neglected (to simplify analysis)


The equivalent circuit for the case in which the source is connected to the substrate (body)


82

Current gain

Unity-gain frequency

)( gdgs

m

i

o

CCs

g

I

I

)(2 gdgs

mT CC

gf

The MOSFET unity-gain frequency


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The depletion-type MOSFET

Physical structure The structure of depletion-type MOSFET is

similar to that of enhancement-type MOSFET with one important difference: the depletion-type MOSFET has a physically implanted channel

There is no need to induce a channel

The depletion MOSFET can be operated at both enhancement mode and depletion mode


84

Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S).

Circuit symbol for the n-channel depletion-MOS

Circuit symbol for the n-channel depletion-type MOSFET


85

Characteristic curves

Expression of characteristic equation

Drain current with

221 )' tGSnD Vv

L

Wki （

0GSv

2

21 ' tnDSS V

L

WkI

the iD–vGS characteristic in saturation


86

Sketches of the iD–vGS characteristics for MOSFETs of enhancement and depletion types

The characteristic curves intersect the vGS axis at Vt.

The iD–vGS characteristic in saturation


87

The output characteristic curves


88

N-ch

ann

elN

-chan

nel

Depletion Depletion layerlayer

GG

DD

SS

GG

DD

SSnn-type -type

SemiconductorSemiconductor

The junction FET

PP++ PP++


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UUGS GS = 0= 0 UUGSGS < 0 < 0 UUGS GS = = UUGS(off)GS(off)

DD

SS

PP++

Physical operation under vDS=0

GGPP++

DD

SS

PP++

GGPP++

DD

SS

GGPP++ PP++


90

The effect of UDS on ID for UGS(off) <UGS < 0

动画动画


Summary of semiconductor devices


92

Diode, BJT and FET are nonlinear devices made of semiconductor, mostly silicon

Diode A diode allows current to flow in forward direction

and hence can perform functions such as rectification, demodulation/detection, switch etc.

The reverse current may become dramatically large at breakdown, such phenomena can be used as voltage regulator


93

Bipolar Junction Transistor A BJT has three terminals: base, emitter and collector The collector current is controlled by voltage/ current on

the base-emitter junction and is almost independent on collector voltage.

It can perform functions such as amplification and switch, etc.

A BJT should be properly biased for normal operation There are three basic configurations, each has different

performance (input/output resistance, gain, high frequency response, etc)


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Field Effect Transistor A FET has three terminals: gate, source and drain

The drain current is controlled by gate voltage and

is almost independent on drain voltage. It can perform functions such as amplification,

logic calculation and switch, etc. A FET should be properly biased for normal

operation There are three basic configurations, each has

different performance (input/output resistance, gain, high frequency response, etc)


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As the microelectronics develops, more and more functions are fulfilled by IC chips

The discrete devices and circuits, however, are still very important not only for practical applications, but also for better understanding and design of LSICs

Quantitative calculation is sometimes complicated but not difficult

As long as you know the parameter definitions clearly, results can be derived KCL, KVL, etc


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Homework

April 6, 2010: 5.25 ； 5.40 ； 5.47 ； 5.63; 5.116

Documents

SJTU J. Chen 1 2015-8-16 Chapter 5 Field-Effect Transistors (FETs)