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PAPER PRESENTATION ON SET
BY
B.SIRISHA
POOJA
II/IV B-TECH
ECE
KLUNIVERSITY
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SINGLE ELECTRON TRANSISTOR (SET)
INTRODUCTION
The single electron transistor, SET, is one of quantum devices.. It is a three-electrode tunnelling
device that consists of a conductive island with low self-capacitance connected to source and drain
electrodes by low-capacitance and low conductance tunnel junctions and having a capacitive coupling
with the gate electrode.
single-electron transistor is a high-profile nano device based on a new principle of operation. A typical
transistor currently deals with a flow of about 100,000 electrons. In contrast, a single-electron
transistor deals with only a single electron, thus opening up functions that were not possible
previously.
It consists of two tunnels Junctions sharing one Common electrode known as island. A charge can be
induced on island by a third Electrode (gate) capacitively coupled to the island.
Wires extending from the transistor carry additional electrons across the island.
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A quantum dot is weakly coupled with a source and drain through two tunnel junctions. The gate
controls the number of electrons inside the quantum dot. When the electronic quantum level in the QD
is the same as the Fermi level of electrons in the source and drain, a current is generated by electron
resonate tunneling between the source and drain.
PRINCIPLE
When a voltage is applied to the gate of a single-electron transistor, electrons try to jump from the
source to the quantum dot (Fig. 1, left). Note that only a single electron can enter the quantum dot.
The reason is as follows: a quantum dot confines electrons within a very small space. When one
electron jumps into the quantum dot, the electrons in the quantum dot increase the repulsive force
between the negatively charged electrons (Coulomb force), and this blocks one or more additional
electrons from jumping into the quantum dot. This is known as the Coulomb blockade phenomenon.
Thus, enabling one more electron to jump into the quantum dot requires a voltage to be applied to the
gate.
COULOUMB BLOCKADE PHENOMENON IN SET
Blocking the charge transport (Tunneling) through the structure. The increased resistance at small
bias voltages of an electronic device comprising at least one low capacitance tunnel junction.Energy
required to tunnel
Ec = e/2C= e/4d
(a) A drawing of a single electron transistor with two gates (b) The equivalent circuit.
This section discusses the electrostatic energy that is required to add or remove an electron from a
small conductor and how this leads to a phenomena called the Coulomb blockade. Figure 1(a) shows
a small conducting island between source and drain electrodes. These electrodes are close enough
that electrons can tunnel to and from the island. Two gates are placed near the island. These two
gates are too far away for electrons to tunnel from the island to the gates. Two gates are included in
the analysis because two gates are often used. One gate is used to set the bias point and the other is
used to input a signal to the SET.
The charge on the island is the sum of the charges on all of the capacitors,
Q = C1(V - V1) + C2(V- V2) + Cg1(V- Vg1) + Cg2(V- Vg2) + C0V.
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Here V is the voltage of the island and C0 is the stray capacitance to ground. Ground is
assumed to be at zero potential. The other capacitances and voltages in this equation
are defined in Fig. 1. The charge on the island can be expressed as the number of
electrons on the island plus an offset charge, Q = -ne + Q0. Using this expression, the
voltage of the island can be written as,
V(n) = (-ne + Q0 + C1V1 + C2V2 + Cg1Vg1 + Cg2Vg2)/C.
Here C = C1 + C2 + Cg1 + Cg2 + C0 is the total capacitance of the island and e is the
positive elementary charge, e = |e|.
The energy it takes to move an infinitesimally small charge dq from ground at zero
potential to the island is Vdq. As soon as charge is added to the island, the voltage of the
island changes. Ifq is defined as being the charge that has been added to the island,then the voltage of the island after a charge q has been added is,
V(n) = (-ne + Q0 + q + C1V1 + C2V2 + Cg1Vg1 + Cg2Vg2)/C.
The electrostatic energy necessary to bring a whole electron (charge -e) from ground to
the island is,
-e
V(n)dq = -eV(n) + e/(2C).
0
Similarly, the electrostatic energy necessary to remove an electron from the island (or
equivalently to add a hole of charge e) to ground is,
e
V(n)dq = eV(n) + e/(2C).
0
DESCRIPTION:
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Implementation of the Coulomb blockade phenomenon requires fabrication of an extremely small
quantum dot. Furthermore, the Coulomb force between electrons confined within the quantum dot is
very small. Thus, devices of the size manufactured by conventional microfabrication techniques can
generate the Coulomb blockade phenomenon only at very low temperatures
the Coulomb blockade phenomenon did not occur until the transistor was cooled to a temperature of 1
K (-272 C). Under those conditions, there was no hope of finding a practical application. The
minimum wire width for semiconductors currently achievable by microfabrication is about 20 nm (1 nm
is a billionth of a meter). If we can reduce the size of quantum dots so that the Coulomb blockade
phenomenon occurs at higher temperatures, for example, at room temperature.
a single-electron transistor using carbon nanotubes.
The carbon nanotube is an extremely fine tube made of carbon. Microfabrication techniques for
semiconductors can be used to connect a carbon nanotube to electrodes because, although the
diameter is about 1 nm, the tube has a length of more than 1 m,
Disadvantages using carbon nanotubes
quantum phenomena will dominate when conventional devices are further reduced into extremely
small elements, and thus devices will fail to function under the conventional principles of operation.
Besides, further microfabrication of integrated circuits increases the heat consumption per unit area,
leading to circuit malfunction. This is another serious problem.
WORKING OF SET
A single electron transistor is similar to a normal transistor, except the channel is replaced by a small
dot the dot is separated from source and drain by thin insulators.An electron tunnels in two
steps:source dot drain.... The gate voltage Vg is used to control the charge on the gate-dot
capacitor Cg .
FABRICATION FOR PRACTICAL APPLICATION
In order to be useful in practical applications,however,SETs must be operable in room temperature.
Capacitance and thermal fluctuation limitations require that the island size of the Set be no longer
than ~10nm,a feature size out of range of present conventional microfabrication processes.
Room temperature operation of single electron memory has been realized by the use of self-
organized, small-size structures on thin poly-silicon films.1
However, it is difficult to control the size
and structure of the SET island with the spontaneous size formation fabrication method.Earlier, we
demonstrated an artificial pattern formation method based on the scanning tunneling microscope
(STM) which avoids the control problems in self- organized structures.2
Using this technique, we have
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succeeded in fabricating an SET. The SET operates at room temperature, showing a clear Coulomb
staircase with a ~150 mV period at 300 K.
Fabrication of the Ti/TiOx SET by the STM nano-oxidation process.
schematic illustration of the SET made by the STM nano- oxidation process. At both ends of the 3 nm
thick Ti layer we formed the source and drain ohmic contacts, and on the back side of the n-Si
substrate, we formed the gate ohmic contact. At the center region of the Ti layer, we formed the island
region, surrounded by two parallel, narrow TiOx lines, that serve as tunneling junctions for the SET,
and two large TiOx barrier regions.
Figure 3 is an atomic force microscopy (AFM) image of the island region of a fabricated SET.
Typical sizes of the TiOx lines are 15-25 nm widths and 30-50 nm lengths. Typical island sizes are
30-50 nm by 35-50 nm. The most important feature of this structure is the small tunnel junction. The
junction area corresponds to the cross section of the TiOx line, and is as small as 2-3 nm (the
thickness of the Ti layer) by 30-50 nm (the length of the TiOx line). The deposited Ti layer is as thin as
3 nm, and the surface of the Ti layer is naturally oxidized to a depth of ~1 nm. Thus, the intrinsic Ti
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layer thickness is considered to be less than 3 nm. Owing to this small tunneling junction area, the
tunnel capacitance becomes as small as 10-19
F, which allows the SET to be operated at room
temperature.
Drain current Vs Drain Voltage Characteristics of the SET at 300K
The drain current-voltage characteristics of the SET were measured at room temperature and are
shown in figure 4. The gate bias was set to 2 V. In the figure, the solid lines shows the current of the
SET, and the dashed line shows the conductance of the SET. Between the drain bias of 0 V and -0.75
V, four clear Coulomb staircases with a ~150 mV period are observed. The conductance oscillates
with the increase of the drain bias with almost the same 150 mV period. The lower peaks of the
conductance oscillation correspond to the flat regions of the current of the Coulomb staircase.
The Coulomb staircase shown in figure 4 may be attributed to the asymmetrical structure of the two
tunneling junctions. One TiOx tunneling junction has a width of 18 nm, while the other junction is 27
nm wide. Due to this difference in junction widths, each tunneling junction has different values of
conductance and capacitance, which produces the Coulomb staircase.
The height of the Coulomb steps becomes larger with larger applied drain bias. This may be attributed
to the increase of the tunneling probability of the electron through the TiOx tunneling barrier. The
Fowler-Nordheim tunneling current increases as the applied drain bias lowers the height of the TiOx
tunneling barrier.
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The drain current v. gate bias characteristics with 150 mV drain bias at room temperature exhibit clear
current oscillations with a period of ~460 mV, implying a periodic Coulomb oscillation of the current.
The tunneling capacitance (Ct) and gate capacitance (Cg) could be roughly estimated from the period
of the Coulomb staircase and oscillation. Their values were found to be C t = ~3.6 x 10-19
F and Cg =
~3.5 x 10-19
F. These estimated values of the capacitances coincide well with the calculatedcapacitances from the SET's structural parameters. These results confirm the existence of Coulomb
blockade phenomena at room temperature, and are due to the small dimensions of the SET island
formed by the STM nano-oxidation process.
In conclusion, we have succeeded in fabricating a room temperature- operable single electron
transistor using the STM nano-oxidation process. The SET shows a Coulomb staircase with periods
of 150 mV at a temperature of 300 K. The Coulomb gap and staircase observed at high temperatures
are attributed to the small tunneling junction area made by the STM nano- oxidation process. The
fabrication process is quite easy and could be applicable to many kinds of devices.
ADVANTAGES OF SET
Very small
Low power consumption (low tunneling current)
High sensitivity (single electron charge)
One of the advantages of a single-electron transistor is its extreme sensitivity to an electric charge.
Another property of these oxide materials is ferroelectricity, which allows the transistor to act as asolid-state memory. The ferroelectric state can, in the absence of external power, control the number
of electrons on the island, which in turn can be used to represent the 1 or 0 state of a memory
element. A computer memory based on this property would be able to retain information even when
the processor itself is powered down, researcher commented. The ferroelectric state also is expected
to be sensitive to small pressure changes at nanometer scales, making this device potentially useful
as a nanoscale charge and force sensor.
The single-electron transistor can function at temperatures closer to room temperature when its size
is reduced. Furthermore, the single-electron transistor, which deals with a single electron, is the
ultimate energy-saving device, and so it is capable of solving the problem of heat generation
DISADVANTAGES
To observe the electronic charge to the gate voltage, the change in electronic energy due to a
single electron charge should be greater than the electronic thermal energy, so at room
temperature QD size < 10 nm, which is hard to fabricate.
Variation in QD size causes deviation of device properties.
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APPLICATIONS
The application of SET includes devices of nanoscaled memory, capacitance, and logic gate.
Waste
During 1980s, the main discoveries in mesoscopic physics are thetunneling of single electron
and Coulomb blockade phenomena, which make
manys c i e n t i s t s p r e d i c t t h a t i f t h e s i z e o f t h e q u a n t u m d o t s i s r e d u c e d t o s
everalnanometers, it is highly possible to produce applicable single electrontransistor ( S E T ) w h i c h w o r k s a b o v e l i q u i d n i t r o g e n t e m p e r a t u r e , a n d t h i s w
i l l b r i n g a revolut ion to electronic science.
SET -- which is the first single-electron transistor made entirely of oxide-based materials -- consists of
an island formation that can house up to two electrons. The number of electrons on the island -- which
can be only zero, one, or two -- results in distinct conductive properties.
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Basically, SET promises extremely high density with ultra small power dissipation and the possibility
of room temperature operation. The application of SET includes devices of nanoscaled memory,
capacitance, and logic gate.