SinOne Chip SC91F73 12 10 ADC 1T 8051 Flash MCUszcdxkmcu.com/PIC/PIC/SC91F73v1.3cn[1].pdf · Page 2 of 63 V 1.3 SinOne Chip SC91F73 9 INTERRUPT .....24

SC91F7312 10 ADC 1T 8051 Flash MCUSinOne Chip

..........................................................................................................................................1

1. ...............................................................................................................................4

2. ..............................................................................................................................4

3. ..............................................................................................................................5

3.1 .................................................................................................................................................... 5

3.2 .................................................................................................................................................... 6

4. ...........................................................................................................................9

5. Flash ROM SRAM ...................................................................................................10

5.1 flash rom................................................................................................................................................. 10

5.2 (INFORMATION BLOCK EEPROM) ............................................................................. 11

5.3 sram......................................................................................................................................................... 12

6. (SFR) ........................................................................................................13

6.1 SFR .................................................................................................................................................. 13

6.2 SFR .................................................................................................................................................. 14

7. ...........................................................................................................16

7.1 ................................................................................................................................................... 16

7.2 ........................................................................................................................................... 16

7.3 ................................................................................................................................................... 16

7.4 16M/8M Hz IRC................................................................................................................. 19

7.5 32K Crystal Base Timer ......................................................................................................19

7.6 STOP......................................................................................................................................... 20

8 CPU ............................................................................................21

8.1 CPU.......................................................................................................................................................... 21

8.2 ................................................................................................................................................... 21

8.3 ................................................................................................................................................... 22

Page 2 of 63 V 1.3 http://www.socmcu.com

SinOne Chip SC91F739 INTERRUPT ..............................................................................................................24

9.1 ............................................................................................................................................ 24

9.2 ............................................................................................................................................... 25

9.3 ............................................................................................................................................... 26

9.4 ............................................................................................................................................ 27

9.5 SFR ................................................................................................................................. 27

10. TIMER0 TIMER1 ...............................................................................................29

10.1 T0 T1 .................................................................................................................29

10.2 T0 ............................................................................................................................................ 31

10.3 T1 ............................................................................................................................................ 33

11. PWM ................................................................................................................................35

11.1 PWM ........................................................................................................................................ 35

11.2 PWM SFR .............................................................................................................................36

11.3 PWM .................................................................................................................................... 38

12 Buzzer .............................................................................................................................40

13 SIF ..............................................................................................................41

13.1 SIF SFR ..............................................................................................................................42

13.2 SIF ................................................................................................................................... 47

14 GP I/O..............................................................................................................................48

14.1 GPIO .......................................................................................................................................... 48

14.2 I/O ................................................................................................................................ 50

14.3 I/O ........................................................................................................................................... 52

15. ADC...................................................................................................................52

15.1 ADC .................................................................................................................................... 52

15.2 ADC ........................................................................................................................................ 54


SinOne Chip SC91F7316. IAP(in Application Programming).................................................................................54

16.1 IAP ...............................................................................................................................55

16.2 IAP .......................................................................................................................................... 56

16.3 IAP .......................................................................................................................................... 56

17. ..........................................................................................................................57

18 ..........................................................................................................................60

19 ...........................................................................................................................61

20 ....................................................................................................................63


SinOne Chip SC91F731. SC91F73 1T 8051 Flash 8051

SC91F73 8KB Flash ROM 256Byte EEPROM 256B SRAM 26 GP I/O 8LED 2 16 12 10 ADC 1 8 3 PWM 1

12 Buzzer 1 SIF 1 32K Base timer 16M/8M HzSC91F73 4 LVR 2.4V ADC WDT

SC91F73

2.: 3.6V~5.5V : -40 ~ 85

: SKDIP28 SOP28 : 1T 8051

: 8KB Flash ROM MOVC 0000~00FFH 256B , 256B SRAM:

16M/8M Hz IC ,

: (4.5V~5.5V) (-40 , 85 ) , % 32K

ICBase Timer

X32K STOPCode Option GPIO

LVR :4 ; : 3.5V 3.7V 3.9V 4.1V

Default Code Option Flash : 4

INT : TIMER0,TIMER1,SIF, ADC , PWM,X32K,INT0~7 14 INT0 INT2~7 7 INT1

: 26 4 GP I/O 8 LED 16 WDT 2 80C51 16 TIMER0 TIMER1 1 SIF Slave Master Mode 1 /Duty 8 PWM , 3 1 12 Buzzer 1 32K Base Timer

:12 10 ADC 1) 2.4V 2) ADC 3 , VDD Vref P3.0 2.4V3) ADC

: STOP MODE

INT0~7 STOP MODE32K STOP MODE


SinOne Chip SC91F733.3.1

SC91F73

X32I/P4.1

DIO/SCL/INT0/P1.4

INT1/P1.3

VSS VDD

P3.3/AIN2/GATE1

P3.4/AIN3/T0

P3.5/AIN4/T1

X32O/P4.0

ENB/RST/P1.7

P2.0/AIN7

CEN/BUZO/P1.6

CLK/SDA/P1.5

P3.1/AIN0

P3.2/AIN1/GATE0

P3.0/Vref

INT2/P1.2

INT3/P1.1

P3.6/AIN5

P3.7/AIN6

SC91F73

1

2

3

4

5

6

7

8

9

10

28

27

26

25

24

23

22

21

20

19

P2.1/AIN8INT4/P1.0 11 18

P2.2/AIN9PWMOA/INT5/P2.7 12 17

P2.3/AIN10PWMOB/INT6/P2.6 13 16

P2.4/AIN11PWMOC/INT7/P2.5 14 15


SinOne Chip SC91F733.2

1 VSS Power2 P4.1/X32I I/O 1) P4.1:

GPIO P4.1 LED2) 32K Crystal

3 P4.0/X32O I/O 1) P4.0 : GPIO P4.0 LED

2) 32K Crystal4 P1.7/RST I/O 1) P1.7:

GPIO P1.7 LED2) RST

RESET (Default), ( RST

SFR RSTCFG RESET Pin IO5 P1.6/BUZO I/O 1) P1.6 :

GPIO P1.6 LED2) BUZO:

Buzzer 6 P1.5/SDA I/O 1) P1.5:

GPIO P1.5 LED2) SDA:

SIF SDA7 INT0/P1.4/SCL I/O 1) INT0:

02) P1.4: GPIO P1.4 LED3) SCL:

SIF SCL8 INT1/P1.3 I/O 1) INT1 :

1 SFR INT1IT

2) P1.3 : GPIO P1.3 LED

9 INT2/P1.2 I/O 1) INT2 : 2

2) P1.2: GPIO P1.2 LED

10 INT3/P1.1 I/O 1) INT3: 3

2) P1.1: GPIO P1.1

11 INT4/P1.0 I/O 1) INT4 : 4

2) P1.0 GPIO P1.0

12 INT5/P2.7/PWMOA

I/O 1) INT5: 5

2) P2.7 GPIO P2.7 3) PWMOA:

PWM A


SinOne Chip SC91F7313 INT6/P2.6/PW

MOBI/O 1) INT6:

62) P2.6

GPIO P2.6 3) PWMOB:

PWM B14 INT7/P2.5/PW

MOCI/O 1) INT7:

72) P2.5

GPIO P2.5 3) PWMOC:

PWM C15 P2.4/AIN11 I/O 1) P2.4 :

GPIO P2.4 2) AIN11 :

ADC 11 16 P2.3/AIN10 I/O 1) P2.3 :

GPIO P2.3 2) AIN10 :

ADC 10 17 P2.2/AIN9 I/O 1) P2.2 :

GPIO P2.2 2) AIN9 :

ADC 9 18 P2.1/AIN8 I/O 1) P2.1 :

GPIO P2.1 2) AIN8 :

ADC 8 19 P2.0/AIN7 I/O 1) P2.0 :

GPIO P2.0 2) AIN7 :

ADC 7 20 P3.7/AIN6 I/O 1) P3.7 :

GPIO P3.7 2) AIN6 :

ADC 6 21 P3.6/AIN5 I/O 1) P3.6 :

GPIO P3.6 2) AIN5 :

ADC 5 22 P3.5/AIN4 I/O 1) P3.5 :

GPIO P3.5 2) AIN4 :

ADC 4 23 P3.4/AIN3 I/O 1) P3.4 :

GPIO P3.4 2) AIN3 :

ADC 3 24 P3.3/AIN2 I/O 1) P3.3 :

GPIO P3.3 2) AIN2 :

ADC 2 25 P3.2/AIN1 I/O 1) P3.2 :

GPIO P3.2 2) AIN1 :


SinOne Chip SC91F73ADC 1

26 P3.1/AIN0 I/O 1) P3.1 : GPIO P3.1

2) AIN0 : ADC 0

27 P3.0/Vref I/O 1) P3.0 : GPIO P3.0

2) Vref : ADC

28 VDD Power 3.6V – 5.5V


SinOne Chip SC91F734.


SinOne Chip SC91F735. FLASH ROM SRAMSC91F73 Flash ROM SRAM

5.1 FLASH ROM SC91F73 8KB Flash ROM ROM 0000H~1FFFH 8KB Flash ROM 100000H~1EFFH 7.75KB 256B 1F00~1FFFH

EEPROM IAP ICEEPROM 8KB 8KB FLASH ROM 7.75KB Flash 0.25KB EEPROM SinOneChip ICP (SOC Pro51/DPT51 ) 256B

0000H~00FFH ROM MOVC SC91F73 8KB Flash ROM 4 Byte IAP IRC

16M/8MHz 2.4V IRC 2.4VIC IC

IRC 2.4V 4BytesIAP 4 Bytes IAP4Byte

16 10

1FFF 1FFE 1FFE 00H 0

FFH 255

IRC 16M/8M Hz

Bit7 Bit7~Bit0

94H 16M/8M(1-20 )Hz ... ...

1 (

) 81H 16M/8M(1-1 )Hz 00H 16M/8M Hz

14H 16M/8M(1+20 )Hz ... ...

0 (

) 01H 16M/8M(1+1 )Hz

1FFD 1FFC 1FFC 00H 0 2.400V 1mv


SinOne Chip SC91F73FFH 255

Bit7 Bit7~Bit0

FFH 2.273V 2.400V-0.127V ... ...

1 (

) 81H 2.399V 2.400V-0.001V 00H 2.400V

7FH 2.527V 2.400V+0.127V ... ...

0 (

) 01H 2.401V 2.400V+0.001V

SC91F73 8KB Flash ROM 8KB 7.75KB 0000H~1EFFH 0.25KB1F00H~1FFFH BLANK PROGRAM VERIFY ERASEREAD

SC91F73 Flash ROM Pin4 ENB Pin5 CEN Pin6 CLK Pin7 DIO VDD VSS

5.2 (INFORMATION BLOCK EEPROM) SC91F73 Flash Code Option

IC IC IC SFRIFB Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0

IFB1 VrefS[1:0] USE32K ENWDT DISLVR LVRS[1:0] IFB2 8MHz

IFB1 7,6 VrefS[1:0] ADC SFR ADCCFG0 VREFS[1:0]

00 VDD ADC 01 2.4V ADC 10 P3.0 ADC 11

5 USE32K 32K 0 32K P4.0 P4.1 GPIO 1 32K P4.1 P4.0 32KOSCI 32K


SinOne Chip SC91F73OSCO

4 ENWDT WDT 0 WDT 1 WDT ( IC IAP )

2 DISLVR LVR 0 LVR 1 LVR

1,0 LVRS [1:0] LVR 00 4.1V 01 3.9V 10 3.7V 11 3.5V

( 0.1V@-40~85 ) LVR LVR

IFB2 7 8MHz

0 16MHz 1 8MHz

5.3 SRAM SC91F73 256B SRAM 00H~FFH 128B80H~FFH 128B 00H~7FH SFR 80H~FFH SFR 128B SRAM SFR

128B SRAM 128B SRAM 0~3 00H~1FH, PSWRS0 RS1 0~320H~2FH RAM RAM 00H~7FH

SRAM RAMSC91F73 8 80H


SinOne Chip SC91F73128B RAM

7F 7E 7D 7C 7B 7A 79 78 2FH

77 76 75 74 73 72 71 70 2EH

6F 6E 6D 6C 6B 6A 69 68 2DH

67 66 65 64 63 62 61 60 2CH

5F 5E 5D 5C 5B 5A 59 58 2BH

57 56 55 54 53 52 51 50 2AH

4F 4E 4D 4C 4B 4A 49 48 29H

47 46 45 44 43 42 41 40 28H

3F 3E 3D 3C 3B 3A 39 38 27H

37 36 35 34 33 32 31 30 26H

2F 2E 2D 2C 2B 2A 29 28 25H

27 26 25 24 23 22 21 20 24H

1F 1E 1D 1C 1B 1A 19 18 23H

17 16 15 14 13 12 11 10 22H

0F 0E 0D 0C 0B 0A 09 08 21H

07 06 05 04 03 02 01 00 20H

0

1

2

3

RAM

RAM RAM

00H

07H08H

0FH10H

17H18H

1FH20H

2FH30H

7FH

128B RAM

6. (SFR)6.1 SFR

SC91F73 SFR SFR 80H~FFH0 8

SFR SC91F73

0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F

F8H PWMCR PWMPRD PWMDTY PWMCFG

F0H B RSTCFG

E8H IAPKEY IAPADL IAPDAT IAPCTL

E0H ACC

D8H SIFSTA

D0H PSW SIFCFG SIFCTL SIFTXD SIFRXD

C8H WDTCR X32CTL

C0H P4 P4CFG0 BUZTGPH BUZTGPL ADCCR ADCVH ADCVL

B8H IP ADCCFG0 ADCCFG1

B0H P3 P3CFG1 P3CFG0 EXIP EXIE

A8H IE

A0H P2 P2CFG1 P2CFG0

98H

90H P1 P1CFG1 P1CFG0 INT1IT

88H TCON TMOD TL0 TL1 TH0 TH1 TMCON

80H SP DPL DPH PCON


SinOne Chip SC91F73 1 SFR RAM 2 SFR EFH F7H FFH

3

6.2 SFR SFR

7 6 5 4 3 2 1 0SP 81H SP[7:0] 00000111

DPL 82H DPL[7:0] 00000000

DPH 83H DPH[7:0] 00000000

PCON 87H - - - - - - STOP - xxxxxx0x

TCON 88H TF1 TR1 TF0 TR0 - - - - 0000xxxx

TMOD 89H GATE1 C/T1 M11 M01 GATE0 C/T0 M10 M00 00000000

TL0 8AH 0 8 TL0[7:0] 00000000

TL1 8BH 1 8 TL1[7:0] 00000000

TH0 8CH 0 8 TH0[7:0] 00000000

TH1 8DH 1 8 TH1[7:0] 00000000TMCON 8EH - - - - - - T1M T0M xxxxxxx00

P1 90H P1 P17 P16 P15 P14 P13 P12 P11 P10 11111111

P1CFG1 91H P1 Configuration - 1 P17M[1:0] P16M[1:0] P15M[1:0] P14M[1:0] 00000000

P1CFG0 92H P1 Configuration - 0 P13M[1:0] P12M[1:0] P11M[1:0] P10M[1:0] 00000000

INT1IT 93H INT1 - - - - - - INT1ES[1:0] xxxxxx00

P2 A0H P2 P27 P26 P25 P24 P23 P22 P21 P20 11111111

P2CFG1 A1H P2 Configuration - 1 P27M[1:0] P26M[1:0] P25M[1:0] P24M[1:0] 00000000

P2CFG0 A2H P2 Configuration - 0 P23M[1:0] P22M[1:0] P21M[1:0] P20M[1:0] 00000000

IE A8H EA EADC ESIF EPWM ET1 EX32K ET0 - 0000000x

P3 B0H P3 P37 P36 P35 P34 P33 P32 P31 P30 11111111

P3CFG1 B1H P3 Configuration - 1 P37M[1:0] P36M[1:0] P35M[1:0] P34M[1:0] 00000000

P3CFG0 B2H P3 Configuration - 0 P33M[1:0] P32M[1:0] P31M[1:0] P30M[1:0] 00000000EXIP B4H IPEX7 IPEX6 IPEX5 IPEX4 IPEX3 IPEX2 IPEX1 IPEX0 00000000

EXIE B5H EINT7 EINT6 EINT5 EINT4 EINT3 EINT2 EINT1 EINT0 00000000

IP B8H - IPADC IPSIF IPPWM IPT1 IPX32K IPT0 - x000000x

ADCCFG0

BDH P2 VREFS[1:0] - P24AIN11 P23AIN10 P22AIN9 P21AIN8 P20AIN7 nnx00000

ADCCFG1

BEH P3 P37AIN6 P36AIN5 P35AIN4 P34AIN3 P33AIN2 P32AIN1 P31AIN0 - 0000000x

P4 C0H P4 - - - - - - P41 P40 xxxxxx11

P4CFG0 C2H P4 Configuration - 0 P41M[1:0] P40M[1:0] xxxx1010

BUZTGPH

C3H BUZZER ENBUZ - - - BUZTGP[11:8] 0xxx1111

BUZTGPL C4H BUZZER BUZTGP[7:0] 11111111

ADCCR C5H ADC ENADC ADCS LOWSP EOC ADCIS[3:0] 00000000

ADCVH C6H ADC ADCV[9:2] 10000000

ADCVL C7H ADC - - - - - - ADCV[1:0] xxxxxx00

WDTCR C9H ENWDT - - CLRWDT - WDTCKS[1:0] nxx0xx00

X32CTL CAH 32K BaseTimer ENX32 FE - X32IF X32IFS[1:0] 00x0xx00

PSW D0H CY AC F0 RS1 RS0 OV - P 000000x0

SIFCFG D4H SIF ENSI INVI - - SIMOD[2:0] ACKO 00xx0000SIFCTL D5H SIF - - - - - MCMD[1:0] xxxxxx00

SIFTXD D6H SIF SIFTXD[7:0] 00000000

SIFRXD D7H SIF SIFRXD[7:0] xxxxxxxx

SIFSTA D8H SIF RTNACK - - - STPIF TXIF RXIF STRIF 0xxx0000

ACC E0H ACC ACC[7:0] 00000000

IAPKEY EAH IAP IAPKEY[7:0] 00000000

IAPADL ECH IAP IAPADR[7:0] 11111111

IAPDAT EDH IAP / IAPDAT[7:0] 11111111

IAPCTL EEH IAP - - - - PAYTIMES[1:0] CMD[1:0] xxxx0000

B F0H B B[7:0] 00000000


SinOne Chip SC91F73RSTCFG F6H - - - - DISRST DISLVR LVRS[1:0] xxxx0nnn

PWMCR F8H PWM ENPWM PWMIF - - - DTY8 PWMOS[1:0] 00xxx000

PWMPRD F9H PWM PWMPRD[7:0] 11111111

PWMDTY FBH PWM PWMDTY[7:0] 00000000

PWMCFG FCH PWM - - - INV - CKS[2:0] xxx0x000

8051 CPU 1 PC PC SFR PC 16

PC 0000H, 0000H 2 ACC E0H ACC 8051 A

3 B (F0H) B A MUL A B A B 8

16 A B DIV A B AB A B B 4 SP(81H) 8 RAM SP07H 08H 08H~1FH R1~R3 SP 80H

5 PSW(D0h) 7 6 5 4 3 2 1 0

CY AC F0 RS1 RS0 OV - P 0 0 0 0 0 0 x 0

7 CY 1 0

6 AC BCD 1 bit3 bit3 0

5 F0 4~3 RS1 RS0 :

RS1 RS0 0~3 0 0 0 00H~07H 0 1 1 08H~0FH 1 0 2 10H~17H 1 1 3 18H~1FH

2 OV 1 0 P ACC 1

1 ACC 1 0 ACC 1 0

6, DPTR 82H 83H DPTR 16 8 DPL 82H 8 DPH 83H DPTR

8051 16 DPL DPH Byte


SinOne Chip SC91F737.7.1

SC91F73 2.4V , ADC ADC

2.4V 8K Flash ROM 1FFCH ByteEEPROM MOVC

IAP Flash ROM

7.2SC91F73 , ,

SC91F73 , SC91F73 ,Clock LVR(3.5V)

SC91F73 0LVR , IRC clock Flash ROM IFB Code Option byte 1023

, SC91F73 Flash

7.3SC91F73 5 RST LVR POR WDT

7.3.1 RSTRST RST SC91F73 SC91F73

RST/P1.7 P17LVR RSTCFG F6H

7.3.2 LVRSC91F73 4 , Default 4.1V,

3.9V 3.7V 3.5VRSTCFG (F6h) /

7 6 5 4 3 2 1 0 - - - - DISRST DISLVR LVRS[1:0]

/ - - - - / / / x x x x 0 n n n

7~4

3 DISRST IO/RST 0 P1.7 1 P1.7 I/O

2 DISLVR LVR ( Code Option ) 0 LVR 1 LVR


SinOne Chip SC91F731,0 LVRS [1:0] LVR

00 4.1V Code Option 01 3.9V 10 3.7V 11 3.5V

SC91F73

7.3.3 PORSC91F73 VDD

7.3.4SC91F73 RST/P1.7

P1.7 P1.7 / / RST/P1.7 RST

7.3.5 WDTSC91F73 16 WDT 16M/8M Hz

WDTCR (C9h)

7 6 5 4 3 2 1 0 ENWDT - - CLRWDT - - WDTCKS[1:0]

/ / - - / - - /


SinOne Chip SC91F73 n x x 0 x x 0 0

7 ENWDT WDT Code Option 1: WDT 0: WDT

6,5,3,2 4 CLRWDT WDT �0� 1

1 WDT 0 0

1,0 WDTCKS [1:0] WDTCKS.1 WDTCKS.0 WDT WDT

0 0 Fosc/128 [email protected]@8MHz

0 1 Fosc/32 [email protected]@8MHz

1 0 Fosc/16 65.536ms@16MHz 131.072ms@8MHz

1 1 Fosc/4 16.384ms@16MHz 32.768ms@8MHz

7.3.6SC91F73 PORT FFh PC0000h, SP 07h � � Reset WDT LVR

SRAM SRAM SRAM RAM SFR SFR SFR

SP 00000111 IP x000000x DPL 00000000 ADCCFG0 nnx00000 DPH 00000000 ADCCFG1 0000000x

PCON xxxxxx0x P4 xxxxxx11 TCON 0000xxxx P4CFG0 xxxx1010 TMOD 00000000 WDTCR nxx0xx00

TL0 00000000 X32CTL 00x0xx00 TL1 00000000 BUZTGPH 0xxx1111 TH0 00000000 BUZTGPL 11111111 TH1 00000000 ADCCR 00000000

TMCON 00000000 ADCVH 00000000 P1 11111111 ADCVL xxxxxx00

P1CFG1 00000000 PSW 000000x0 P1CFG0 00000000 ACC 00000000

P2 11111111 IAPKEY 00000000 P2CFG1 00000000 IAPADL 11111111 P2CFG0 00000000 IAPDAT 11111111

IE 0000000x IAPCTL xxxx0000 P3 11111111 B 00000000

P3CFG1 00000000 RSTCFG xxxx0nnn P3CFG0 00000000 PWMCR 00xxxxxx

EXIP 00000000 PWMPRD 11111111 EXIE 00000000 PWMDTY 00000000

INT1IT xxxxxx00 PWMCFG x0xx0000


SinOne Chip SC91F737.4 16M/8M HZ IRC

SC91F73 IRC 8MHz@5V/25 , 16MHz , 16M/8M Hz FLASH MEMORY , 1FFE Flash ROM IAP Flash

IRC 4.5V~5.5V (-40 ~85 )

2%

7.5 32K CRYSTAL BASE TIMER SC91F73 32.768K Hz Crystal 17-bit Base

Timer, CPU STOP mode , Interrupt Base Timer Stop mode

P4.0/P4.1 32K Base Timer

X32I/P4.1

X32O/P4.0

C1 10~15P

C2 10~15P)

32.768KCrystal

P4.1/P4.0 IO 32K OSC Code Code OptionUSEX32

Code Option 7 6 5 4 3 2 1 0

VrefS[1:0] USEX32 ENWDT DISLVR LVRS[1:0]

5 USEX32 32K

0 32K P4.0/P4.1 IO ( P4.0/P4.1)

1 32K P4.0/P4.1 X32OSCO/X32OSCI32K SC91F73 32K 32K

0.25s/0.5s/1s/2s SFRX32CTL (C2h) 32K BaseTimer /

7 6 5 4 3 2 1 0

ENX32 FE - X32IF - - X32IFS[1:0] / / / - / - - /

0 0 x 0 x x 0 0

7 ENX32 32K OSC

0 32K Hz IRC 1 32K Hz IRC ( IFB USEX32 1 )

: ENX32 1 , 32KHz Crystal Oscillator10ms~25ms ENX32 0 ,Base Timer 0 Base Timer

, ENX32 1 ,


SinOne Chip SC91F736 FE Fast Enable.

bit 1, 32K Crystal Oscillator ,,

STOP mode , ENX32 FE 1 32K Crystal , X32IF , FE 0,

STOP mode 4 X32IF 32K Base Timer

CPU Base Timer ,.

1,0 X32IFS[1:0] 32K Base Timer Interrupt Frequency Selection 00 0.25 interrupt 01 0.5 interrupt 10 1.0 interrupt 11 2.0 interrupt

5,3,2

IFB USEX32 1, X32CTL ! IFB USEX32 1, X32CTL 32K Crystal

Oscilator Wakeup Counter 0 X32IFS[1:0] , IE[2] X32CTL[7] (ENX32) 0,

32K Crystal Oscillator FE 32K Crystal Oscillator

7.6 STOP

SC91F73 PCON PCON.1 1, 16M/8M HZ, STOP , STOP INT0~INT7 SC91F73 32K Base

Timer STOP PCON (87h) * *

7 6 5 4 3 2 1 0

- - - - - - STOP - / - - - - - - -

x x x x x x 0 x

1 STOP STOP

0 1 16M/8M HZ


SinOne Chip SC91F738 CPU

8.1 CPUSC91F73 CPU 1T 8051 8051

8.2 SC91F73 1T 8051 CPU

8.2.1

MOV A #50H 50H A

8.2.2

ANL 50H #91H

50H 91H � � 50H 50HRAM

8.2.3 R0 R1 �@� R1 40H, 40H

55H, MOV A, @R1 55H A

8.2.4 R7~R0 A B C

R7~R0 3 ACC B DPTR C

PSW RS1 RS0

INC R0 R0 +1 R0

8.2.5 PC

PCPC

+127~-128. JC +50H C 0 PC C 1 PC

50H 8.2.6

PC DPTR MOVC A, @A+DPTR

A DPTRA

8.2.7 RAM

C

MOV C 20H


SinOne Chip SC91F7320H C

8.3 1T 8051

ADD A, Rn A 1 1 ADD A, direct A 2 2 ADD A, @Ri RAM A 1 2 ADD A, #data A 2 2 ADDC A, Rn 1 1 ADDC A, direct 2 2 ADDC A, @Ri RAM 1 2 ADDC A, #data 2 2 SUBB A, Rn 1 1 SUBB A, direct 2 2 SUBB A, @Ri RAM 1 2 SUBB A, #data 2 2 INC A 1 1 1 INC Rn 1 1 2 INC direct 1 2 3 INC @Ri RAM 1 1 3 DEC A 1 1 1 DEC Rn 1 1 2 DEC direct 1 1 3 DEC @Ri RAM 1 2 3 INC DPTR DPTR 1 1 1 MUL AB A B 1 2 DIV AB A B 1 6 DA A 1 3

ANL A, Rn 1 1 ANL A, direct 2 2 ANL A, @Ri RAM 1 2 ANL A, #data 2 2 ANL direct, A 2 3 ANL direct, #data 3 3 ORL A, Rn 1 1 ORL A, direct 2 2 ORL A, @Ri RAM 1 2 ORL A, #data 2 2 ORL direct, A 2 3 ORL direct, #data 3 3 XRL A, Rn 1 1 XRL A, direct 2 2 XRL A, @Ri 1 2 XRL A, #data 2 2 XRL direct, A 2 3 XRL direct, #data 3 3 CLR A 0 1 1 CPL A 1 1 RL A 1 1 RLC A 1 1 RR A 1 1 RRC A 1 1


SinOne Chip SC91F73SWAP A 1 1

CLR C 0 1 1 CLR bit 0 2 3 SETB C 1 1 1 SETB bit 1 2 3 CPL C 1 1 CPL bit 2 3 ANL C, bit 2 2 ANL C,/bit 2 2 ORL C,bit 2 2 ORL C,/bit 2 2 MOV C, bit 2 2 MOV bit, C 2 3 JC rel 1 2 3 JNC rel 0 2 3 JB bit, rel 1 3 5 JNB bit, rel 0 3 5 JBC bit, rel 1 0 3 5

MOV A, Rn 1 1 MOV A, direct 2 2 MOV A, @Ri RAM 1 2 MOV A, #data 2 2 MOV Rn, A 1 1 MOV Rn, direct 2 3 MOV Rn, #data 2 2 MOV direct, A 2 2 MOV direct, Rn 2 2 MOV direct1,direct2 3 3 MOV direct, @Ri RAM 2 3 MOV direct, #data 3 3 MOV @Ri, A RAM 1 2 MOV @Ri, direct RAM 2 3 MOV @Ri, #data RAM 2 2 MOV DPTR,#data16 16 DPTR 3 3 MOVC A,@A+DPTR DPTR 1 5 MOVC A,@A+PC PC 1 4 MOVX A @Ri RAM 8 1 3 MOVX @Ri A RAM 8 1 4 MOVX A,@DPTR RAM 16 1 2 MOVX @DPTR A RAM 16 1 3 PUSH direct 2 3 POP direct 2 2 XCH A, Rn 1 2 XCH A, direct 2 3 XCH A, @Ri RAM 1 3 XCHD A, @Ri RAM 1 3

ACALL address11 2 4 LCALL address16 3 4 RET 1 4 RETI 1 4 AJMP address11 2 3


SinOne Chip SC91F73LJML address16 3 4 SJMP rel 2 3 JMP @A+DPTR DPTR 1 5 JZ rel 0 2 4 JNZ rel 0 2 4 CJNE A, direct, rel 3 5 CJNE A, #data, rel 3 4 CJNE Rn, #data, rel 3 4 CJNE @Ri, #data, rel RAM 3 5 DJNZ Rn, rel 1 0 2 4 DJNZ direct, rel 1 0 3 5 NOP 1 1

SC91F73 MOVC 0000~00FFH MCU

9 INTERRUPTSC91F73 14 Timer0 Timer1 X32K PWM SIF ADC INT0 INT1 INT2

INT3 INT4 INT5 INT6 INT7 14 2EA

9.1SC91F73

C51 STOP

Timer0 Timer0 TCON[5] (TF0) IE[1] (ET0) IP[1] 000BH 1 1 H/W Auto

X32K 32K Base Timer

X32CTL[4] (X32IF)

IE[2] (EX32K) IP[2] 0013H 2 2 H/W Auto

Timer1 Timer1 TCON[7] (TF1)

IE[3] (ET1) IP[3] 001BH 3 3 H/W Auto

PWM PWM PWMCR[6] (PWMIF)

IE[4] (EPWM) IP[4] 0023H 4 4

SIF SIF

STPIF RXIF TXIP

STRIF

IE[5] (ESIF) IP[5] 002BH 5 5

ADC ADC

ADCCR[4] (EOC/ADCIF

)

IE[6] (EADC) IP[6] 0033H 6 6

INT0 EXIE[0] EXIP[0] 003BH 7 7 H/W Auto

INT1

EXIE[1] EXIP[1] 0043H 8 8 H/W Auto

INT2 EXIE[2] EXIP[2] 004BH 9 9 H/W Auto INT3 EXIE[3] EXIP[3] 0053H 10 10 H/W Auto INT4 EXIE[4] EXIP[4] 005BH 11 11 H/W Auto INT5 EXIE[5] EXIP[5] 0063H 12 12 H/W Auto INT6 EXIE[6] EXIP[6] 006BH 13 13 H/W Auto INT7 EXIE[7] EXIP[7] 0073H 14 14 H/W Auto

EA=1 1 Timer0 Timer1 TF0 TF1 �1�TF0 TF1 �0�

SIF SIF STRIF TXIF RXIF STPIF �1� SIF

X32K 32K Base Timer X32IF �1�32K X32IF 0


SinOne Chip SC91F73PWM PWM ( : PWMPRD ), PWMIF (PWM Interrupt Flag)

�1� PWM PWM , PWMIF , bit

ADC ADC ADC ADC EOC/ADCIFADCCR.4 ADCS , EOC �0� ; , EOC

�1� ADC INTx(x=0~7) INT0~7

8 INT0 INT2~7INT1

SFR INT1IT EXIPINT0~7 STOP

9.2 SC91F73


SinOne Chip SC91F73

9.3 SC91F73

RETI


SinOne Chip SC91F73

SC91F73 C51

9.4 CPU

PC

PC

RETI PC

9.5 SFRIE (A8h) /

7 6 5 4 3 2 1 0

EA EADC ESIF EPWM ET1 EX32K ET0 - / / / / / / / / -

0 0 0 0 0 0 0 x

7 EA

0: 1:

6 EADC ADC 0 ADC 1 ADC

5 ESIF SIF 0 SIF 1 SIF

4 EPWM PWM 0 PWM 1 PWM PWMPRD

3 ET1 Timer1 0 TIMER1 1 TIMER1

2 EX32K 32K Base Timer 0 32K 1 32K


0

IP (B8h) ( / ) 7 6 5 4 3 2 1 0

- IPADC IPSIF IPPWM IPT1 IPX32K IPT0 - / - / / / / / / -


SinOne Chip SC91F73 x 0 0 0 0 0 0 x

6 IPADC ADC

0 ADC 1 ADC

5 IPSIF SIF 0 SIF 1 SIF

4 IPPWM PWM 0 PWM 1 PWM

3 IPT1 Timer1 0 Timer1 1 Timer1

2 IPX32K 32K Base Timer 0 32K 1 32K

1 IPT0 Timer0 0 Timer0 1 Timer0

7,0

EXIE (B5h) ( / ) 7 6 5 4 3 2 1 0

EINT7 EINT6 EINT5 EINT4 EINT3 EINT2 EINT1 EINT0 / / / / / / / / /

0 0 0 0 0 0 0 0

7~0 EINTx

(x=0~7)

0 INTx(x=0~7) 1 INTx(x=0~7)

EXIP (B4h) ( / )

7 6 5 4 3 2 1 0

IPEX7 IPEX6 IPEX5 IPEX4 IPEX3 IPEX2 IPEX1 IPEX0 / / / / / / / / /

0 0 0 0 0 0 0 0

7~0 IPEXn

(n=0~7)

0 : INTn(n=0~7) � � 1: INTn(n=0~7) � �

INT1IT (93h) INT1 ( / ) 7 6 5 4 3 2 1 0

- - - - - - INT1ES[1:0] / - - - - - - / /

x x x x x x 0 0


SinOne Chip SC91F73

1,0 INT1ES[1:0] INT1 Edge Selction , 00 01 10 11

7~2

10. TIMER0 TIMER1SC91F73 16 / T0 T1

TMOD C/Tx T0 T1

GATEx TRx T0 T1 / GATEx=0 TRx=1T0 T1

P3.4/T0 P3.5/T1 T0 T1 1 TMCON T0 T1 Fosc/12 Fosc/4

/ T0 4 / T1 3 0 13 / 1 16 / 2: 8 3 8 /

T0 T1 0 1 2 3

10.1 T0 T1 7 6 5 4 3 2 1 0 Reset

TCON 88H TF1 TR1 TF0 TR0 - - - - 0000xxxxbTMOD 89H GATE1 C/T1 M11 M01 GATE0 C/T0 M10 M00 00000000b

TL0 8AH 0 8 00000000bTL1 8BH 1 8 00000000bTH0 8CH 0 8 00000000bTH1 8DH 1 8 00000000b

TMCON 8EH - - - - - - T1FD T0FD xxxxxx00b

TCON (88h) 7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 - - - - / / / / / - - - -

0 0 0 0 x x x x

7 TF1 T1 T1 TF1

�1� CPU �0� 6 TR1 T1 1 0 GATE1

TMOD[7]=0,TR1=1 T1 TR1=0 T1 5 TF0 T0 T0 TF0

�1� CPU �0� 4 TR0 T0 0 GATE0

TMOD[3]=0,TR0=1 T0 TR0=0 T0 3~0


SinOne Chip SC91F73TMOD (89h) /

7 6 5 4 3 2 1 0

GATE1 C/T1 M11 M01 GATE0 C/T0 M10 M00 / / / / / / / / /

0 0 0 0 0 0 0 0 T1 T0

7 GATE1 TMOD[7] 1 0 TR1 1 T1 6 C/T1 TMOD[6] 1

0 T1 Fosc 1 T1 T1/P3.5

5,4 M11,M01 / 1 0 0 13 / TL1 3 0 1 16 / TL1 TH1 1 0 8 TH1 TL1 1 1 / 1

3 GATE0 TMOD[3] 0 0 TR0 1 T0 2 C/T0 TMOD[2] 0

0 T0 Fosc 1 T0 T0/P3.4

1,0 M10,M00 / 0 0 0 13 / TL0 3 0 1 16 / TL0 TH0 1 0 8 TH0 TL0 1 1 0 8 / TL0 8

/ 0 TH0 81

TMOD TMOD[0]~TMOD[3] T0 TMOD[4]~TMOD[7] T1 Tx TMOD C/Tx M0x M1x Tx

GATEx TRx T0 T1 GATEx=0 TRx=1 T0 T1 TMCON (8Eh) /

7 6 5 4 3 2 1 0

- - - - - - T1FD T0FD / - - - - - - / /

x x x x x x 0 0

1 T1FD T1

0 T1 Fosc/12 1 T1 Fosc/4

0 T0FD T0 0 T0 Fosc/12 1 T0 Fosc/4

7~2 IE (A8h) /

7 6 5 4 3 2 1 0


SinOne Chip SC91F73 EA EADC ESIF EPWM ET1 EX32 ET0 -

/ / / / / / / / - 0 0 0 0 0 0 0 x

3 ET1 Timer1

0 TIMER1 1 TIMER1


IP (B8h) / 7 6 5 4 3 2 1 0

- IPADC IPSIF IPPWM IPT1 IPX32 IPT0 - / - / / / / / / -

x 0 0 0 0 0 0 x

3 IPT1 Timer1

0 Timer 1 � � 1 Timer 1 � �

1 IPT0 Timer0 0 Timer 0 � � 1 Timer 0 � �

10.2 T0TMOD M10 M00 TMOD[1] TMOD[0] / 0 4

0: 13 /

TH0 13 / 8 TH0.7~TH0.0 , TL0 5 TL0.4~TL0.0 TL0TL0.7~TL0.5 13 /

TF0 1 0 C/T0 / C/T0=1 0 T0 P3.4

0 1 C/T0=0 0 GATE0=0 TR0 1 T0 TR0 1 TR0 1

TR0 0 T0FD


SinOne Chip SC91F73

1:16 /

16 TL0 8 / 1 0 /

2: 8 / 2 , 0 8 / TL0 TH0 TL0

0x00 TF0 1 TH0 TL0TF0 1 TH0

TL0 2 / 0 1 TMCON.0(T0FD) Fosc


SinOne Chip SC91F73/12 T0FD=0/4 T0FD=1

/ 2: 8 /

3 8 / 03 0 8 / TL0 TH0 TL0

0 TCON TMOD TR0 C/T0 GATE0 TF0 0T0 TMOD.2(C/T0)

TH0 1 TCON TH0TMOD.1(T1FD) T1

T0 3 T1 16 / TR1=0 T0 8TH0 8 T1 TCON

10.3 T1 TMOD M11 M01 TMOD[5] TMOD[4] / 1 3

0: 13 /

TH1 13 / 8 TH1.7~TH1.0 TL1 5 TL1.4~TL1.0 TL1TL1.7~TL1.5 13

TF1 1 1 C/T1 / C/T1=1 1 T1 P3.5 1 1


SinOne Chip SC91F73C/T1=0 1

GATE1=0 TR1 1 TR1 1 TR1 1TR1 0

T1FD

1:16 /

16 TL1 8 / 1 0 /

2: 8 /

2 , 1 8 / TL1 TH1 TL10x00 TF1 1 TH1 TL1TF1 1 TH1

TL1 2 / 0 1 TMCON.4(T1FD) Fosc


SinOne Chip SC91F73

11. PWM SC91F73 , PWM SC91F73 PWM 8 PWM 1 PWM

PWMOA PWMOB PWMOC SC91F73 PWM PWMCR PWM PWMCFG

PWM PWMPRD PWM PWMDTY PWM

11.1 PWM


SinOne Chip SC91F73

PWMDTY

PWMPRD

PWMIF

/1/2...

/256

CKSFosc

ENPWM

R Q

S

DTY8

PWM

PWMOS[1:0]

INV

PWMOA PWMOB PWMOC

11.2 PWM SFRPWMCR (F8h)PWM /

7 6 5 4 3 2 1 0

ENPWM PWMIF - - - DTY8 PWMOS[1:0] / / / - / / /

0 0 x x x 0 0 0


SinOne Chip SC91F73

7 ENPWM PWM (Enable PWM) 1 Clock PWM , PWM ; 0 PWM

6 PWMIF PWM (PWM Interrupt Flag) PWM ( : PWMPRD )

1 IE[4] (EPWM) 1, PWM PWM , ,

2 DTY8 PWM Force PWM as HIGH)

1 PWM 1 0 PWM PWM PWMDTY

1,0 PWMOS[1:0] PWM 00 PWM P27, P26, P25 GPIO 01 PWM P2.7 P2.7 PIN PWM 10 PWM P2.6 P2.6 PIN PWM 11 PWM P2.5 P2.5 PIN PWM

5,4,3

SFR PWMPRD[7:0] PWM PWM PWMPRD[7:0] , PWM CLK 00h, PWM (PWMPRD[7:0] + 1 )*PWM

PWMPRD (F9h) PWM / 7 6 5 4 3 2 1 0

PWMPRD[7:0] / / / / / / / / /

0 0 0 0 0 0 0 0

7~0 PWMPRD[7:0] PWM

PWM ( – 1); PWMPWMPRD[7:0] + 1 * PWM

PWM PWMCFG[2:0] ,

(pre-scalar selector) PWM Fosc PWM PWMCFG[4]INV PWM

PWMCFG (FCh) PWM / 7 6 5 4 3 2 1 0

- - - INV - CKS[2:0] / - - - / - / / /

x x x 0 x 0 0 0

4 INV PWM (INVerse PWM Output)

1 PWM 0 PWM

2~0 CKS[2:0] PWM (PWM ClocK source Selector) 000 Fosc 001 Fosc/2 010 Fosc/4


SinOne Chip SC91F73011 Fosc/8 100 Fosc/32 101 Fosc/64 110 Fosc/128 111 Fosc/256

7,6,5,3

PWMDTY (FBh) PWM / 7 6 5 4 3 2 1 0

PWMDTY[7:0] / / / / / / / / /

0 0 0 0 0 0 0 0

7~0 PWMDTY[7:0] PWM

PWM (PWMDTY[7:0]) PWM

IE (A8h) / 7 6 5 4 3 2 1 0

EA EADC ESIF EPWM ET1 EX32 ET0 - / / / / / / / / -

0 0 0 0 0 0 0 x

4 EPWM PWM

0 PWM 1 PWM

IP (B8h) ( / ) 7 6 5 4 3 2 1 0

- IPADC IPSIF IPPWM IPT1 IPX32 IPT0 - / - / / / / / / -

x 0 0 0 0 0 0 x

4 IPPWM PWM

0 PWM � � 1 PWM � �

1 ENPWM PWM 2 ENPWMO PWM GPIO PWM 3 EPWM(IE.4) PWM 4 ENPWM 1 PWM PWMO=0, PWM GPIO

PWM 8 Timer EPWM(IE.4) 1 PWM

11.3 PWMSFR PWM

DTY8


SinOne Chip SC91F73

PWM DTY8(PWMCR.1) PWM 2

DTY8 1 PWM 4 DTY8 0 PWM

PWM (PWMDTY)PWMDTY

PWM PWMPRDPWMPRD


SinOne Chip SC91F73

PWM INV 0PWMCFG.4(INV) 1 INV DTY8

12 BUZZER SC91F73 BUZZER P1.6

BUZTGP[11:0] 2KHz ~ 8MHz@16MHz 1KHz ~ 4MHz@8MHz 50% 12

BUZTGP[11:0] BUZZER 16M(8M)Hz / (2 * {BUZTGP[11:0]+1 })

BUZTGPH / 7 6 5 4 3 2 1 0

ENBUZ - - - BUZTGP[11:8] / - - - - / / / /

0 x x x 1 1 1 1 BUZTGPL /

7 6 5 4 3 2 1 0

BUZTGP[7:0] / / / / / / / / /

1 1 1 1 1 1 1 1

7 ENBUZ BUZZER P1.6

0 P1.6 I/O 1 Buzzer , P1.6 Buzzer

3~0 BUZTGP[11:8] BUZZER 4 7~0 BUZTGP[7:0] BUZZER 8

ENBUZ / 0 , BUZTGP[11:0] 12-bit Counter 000H; P1.6 BUZZER , GPIO ENBUZ 1 , 12-bit


SinOne Chip SC91F73Counter , Counter {BUZTGP[11:0] } , P1.6 (Toggle) , 12-bit Counter 000H BUZZER ENBUZ 0 P1.6GPIO P1.6

13 SIFSC91F73 Serial Interface(SIF), I2C bus, SIF

MASTER mode SLAVE mode , SLAVE mode I2CInterface

SC91F73 SIF MASTER mode SLAVE mode MASTER mode ,, : SEND-START, SEND-BYTE, READ-BYTE, SEND-STOP

SLAVE mode , , START, BYTE, STOP

send START

send BYTE

send

STO

P

read

BYT

E

START detected

BYTE received

STOP

det

ecte

d

BYTE

tra

nsmi

tted


SinOne Chip SC91F7313.1 SIF SFR

7 6 5 4 3 2 1 0 Reset SIFCFG D4H SIF ENSI INVI SIMOD[2:0] ACKO 00xx0000b SIFCTL D5H SIF - - - - - MCMD[1:0] xxxxxx00b SIFTXD D6H SIF SIFTXD[7:0] 00000000b SIFRXD D7H SIF SIFRXD[7:0] xxxxxxxxb SIFSTA D8H SIF RTNACK - - - STPIF TXIF RXIF STRIF 0xxx0000b

SIFCFG (D4h) SIF 7 6 5 4 3 2 1 0

ENSI INVI - - SIMOD[2:0] ACKO / / / - - / / / /

0 0 x x 0 0 0 0

7 ENSI SIF

0 P1.5 P1.4 I/O , P1CFG P1 SIF IDLE SIF 01 SIF , SC91F73 SIF

SDA SCL ! ,SFR P1CFG1 P15M[1:0] P14M[1:0] 00b, P1.5 P1.4

1, P1.5(SDA) P1.4(SCL) “weak pull-up” “input” , “I2C”

6 INVI INVI (INVerse Input) SIF0 SC91F73 SIF SDA P1.5 SCL P1.4

1 SC91F73 SIF SDA P1.5 SIF SCL P1.4 3 SIMOD

[2]MASTER/SLAVE0 MASTER1 SLAVE

2 SIMOD[1]

ACK0 ACK1 ACK

1 SIMOD[0]

SLAVE /0 SLAVE1 SLAVE

0 ACKO ACK ACKO SIF 8+1 bit , 8-bit , SDA

9bit bit SIMOD[1]==0 5,4

SIMODE[2:0]SIF MASTER SLAVE ACK

SIMODE[2:0]

(MASTER/SLAVE) ACK/RX/TX

Mode

0 0 x MASTER ACK0 1 x MASTER ACK1 0 0 SLAVE ACK1 0 1 SLAVE ACK1 1 0 SLAVE ACK1 1 1 SLAVE ACK


SinOne Chip SC91F7300x SIF MASTER , 8+1 bits(ACK/NACK) START , STOP

, SCL ( )

SIFCTL (D5h) SIF

01x SIF MASTER , 8 bits ( ACK/NACK) START , STOP, SCL ( )

SIFCTL (D5h) SIF

100 SIF SLAVE 8+1 bits(ACKO) START STOP SIF (pure “receiver”) BYTE “RXIF”

101 SIF SLAVE 8+1 bits(set ACKI) SLAVE START SDA SLAVESLAVE (pure “receiver”) STOP SIF (pure “transmitter”) BYTE “TXIF”

SLAVE 8+1 SIMODE[2:0]=101

Slave DATA[7:0]

TXIF1,

SCL

SDA

LSBMSB21 3 4 5 6 7 8 9

ACK

Slave SDASlave SDA

DATA[7] DATA[6] DATA[5] DATA[4] DATA[3] DATA[2] DATA[1] DATA[0]

110 SIF SLAVE 8 bits( ACKO) START STOP SIF (pure “receiver”) BYTE “RXIF”


SinOne Chip SC91F73111 SIF SLAVE

8bits( ACKI) SLAVE START SDA SLAVESLAVE (pure “receiver”) STOP

SIF (pure “transmitter”) BYTE “TXIF”

Slave DATA[7:0]

TXIF1,

SDA

LSBMSB21 3 4 5 6 7 8SCL

SLAVE 8+0 SIMODE[2:0]=111


SIFCTL (D5h) SIF MASTER 7 6 5 4 3 2 1 0

- - - MCMD[1:0] / - - - - - - / /

x x x x x x 0 0

MCMD[1:0] MCMD[1:0] SIF

SIF MASTER mode (SMOD[2]==0) SIF, SIF bus , SIF

bus00 send STOP event

MCMD[1:0] 00, SC91F73 STOP Frame SC91F73 Master Mode ”BUSY” state

STOP event , SC91F73 SCL SDA , SIF IDLE state, interrupt flag ”STPIF” 1

01 Send START event MCMD[1:0] 01, SC91F73 START event SC91F73 MASTER

Mode IDLE state START event , SC91F73 SCL(with driving cap), SDA(no driving cap), interrupt flag STRIF 1


SinOne Chip SC91F73

SCL

SDA

Master Start

START:SIMODE[2]=0 MASTER MCMD[1:0]=01(START)

Master SDA

STRIF1,

1 2 3 4 5 6 7 8

SCL

10 Send a byte MCMD[1:0] 10, SC91F73 SIF BYTE SIMOD[1] ,

ACK bit , SC91F73 SCL, SDA, , interrupt flag TXIF

1

Send a byte:SIMODE[2:0]=00X 01X MASTER MCMD[1:0]=10(send a byte)

Master DATA[7:0]

TXIF1,

SIMODE[2:0]=00X, MCMD[1:0]=10

SCL

SDA

Master SDA

SIMODE[2:0]=01X,MCMD[1:0]=10

LSBMSB21 3 4 5 6 7 8 9

ACK

TXIF1,

SDA

LSBMSB21 3 4 5 6 7 8

Master SDA

SCL


Master DATA[7:0]


11 Read a byte MCMD[1:0] 11, SC91F73 SCL 8 clocks, SDA BYTE

SIMOD[1] , ACK bit SDA, SC91F73 SCL, SDA, interrupt flag RXIF

1


SinOne Chip SC91F73

Read a byte:SIMODE[2:0]=00X 01X MASTER ; MCMD[1:0]=11(read a byte)

RXIF1,

SIMODE[2:0]=00X MCMD[1:0]=11 Master SDA

RXIF1

SIMODE[2 0]=01X,MCMD[1 0]=11

Master SDASlave DATA[7:0]

SCL

SDA

LSBMSB21 3 4 5 6 7 8 9

ACK

SCL

SDA

LSBMSB21 3 4 5 6 7 8



Slave DATA[7:0]

SIFSTA (D8h) SIF 7 6 5 4 3 2 1 0

RTNACK - - - STPIF TXIF RXIF STRIF / / - - - / / / /

0 x x x 0 0 0 0

7 RTNAC

KACK RTNACK

SC91F73 MASTER SLAVE mode, SIMOD[1]==0, SIF BYTE , SIF ACK bit; Returned ACK bit,

3 STPIF SIF STOP STPIF SC91F73 MASTER mode (SIMOD[2]==0), Send STOP

, bit 1 ; SC91F73 SLAVE mode, I2C Bus STOP event , bit 1 ; bit Interrupt flag, CPU

; bit User CPU instruction2 TXIF SIF TXIF

Send a Byte , SC91F73 SCL neg-edge bit 1. bit Interrupt flag, CPU ; bit User

CPU instruction1 RXIF SIF RXIF

Read a Byte , SC91F73 SCL neg-edge bit 1bit Interrupt flag, CPU ; bit User CPU instruction

0 STRIF SIF START STRIF SC91F73 MASTER mode (SIMOD[2]==0), Send START

, bit 1 ; SC91F73 SLAVE mode, I2CBus START event , bit 1 ; bit Interrupt flag, CPU ; bit User CPU instruction .


SinOne Chip SC91F736,5,4

SIFTXD (D6h) SIF 7 6 5 4 3 2 1 0

SIFTXD[7:0] / / / / / / / / /

0 0 0 0 0 0 0 0

7~0 SIFTXD SIF

SIFRXD (D7h) SIF 7 6 5 4 3 2 1 0

SIFRXD[7:0] / / / / / / / / /

x x x x x x x x

7~0 SIFRXD SIF

13.2 SIF1. SLAVE SLAVE STOP SLAVE SLAVE SDA MASTER SCL

MASTER STOP MASTER STOP SLAVE 1 BYTESLAVE (SLAVE SDA )


SinOne Chip SC91F73

2. MASTER I2CSIF MASTER I2C SIF 2 STARTSTOP SIF IDLE START

14 GP I/O SC91F73 26 GPIO 26 IO P4.0 P4.1 P1.2~P1.7 8

IO 35mA Sink LED COM SC91F73 I/O 8051 I/O IO PxCFG IO IO

IO , I/O “0” , (>15mA) (Sink) ,

I/O Output , I/O “1” , I/O ( clock ), I/O , , . ,

”0” Output , “1” Input , , I/O “1” , “ 1”,

IC

14.1 GPIO

1. Quasi-Bi3 MOS “ Weak ” “ Very weak ”

“ Strong ”3 MOS 1 MOS “ ” 1 1

1 1 1 “”

2 MOS “ ” 1

3 MOS “ ” 0 1 01 2


SinOne Chip SC91F73

2.

115mA

3 Input only


SinOne Chip SC91F73

4 Open Drain

VDD+0.3V

14.2 I/OP1CFG1 (91h) P1 1( / )

7 6 5 4 3 2 1 0

P17M[1:0] P16M[1:0] P15M[1:0] P14M[1:0] / / / / / / / / /

0 0 0 0 0 0 0 0 P1CFG0 (92h) P1 0( / )

7 6 5 4 3 2 1 0

P13M[1:0] P12M[1:0] P11M[1:0] P10M[1:0] / / / / / / / / /

0 0 0 0 0 0 0 0

P2CFG1 (A1h) P2 1( / ) 7 6 5 4 3 2 1 0

P27M[1:0] P26M[1:0] P25M[1:0] P24M[1:0] / / / / / / / / /

0 0 0 0 0 0 0 0 P2CFG0 (A2h) P2 0( / )

7 6 5 4 3 2 1 0


SinOne Chip SC91F73 P23M[1:0] P22M[1:0] P21M[1:0] P20M[1:0]

/ / / / / / / / / 0 0 0 0 0 0 0 0

P3CFG1 (B1h) P3 1( / )

7 6 5 4 3 2 1 0

P37M[1:0] P36M[1:0] P35M[1:0] P34M[1:0] / / / / / / / / /

0 0 0 0 0 0 0 0 P3CFG0 (B2h) P3 0( / )

7 6 5 4 3 2 1 0

P33M[1:0] P32M[1:0] P31M[1:0] P30M[1:0] / / / / / / / / /

0 0 0 0 0 0 0 0

P4CFG0 (C2h) P4 0( / ) 7 6 5 4 3 2 1 0

- - - - P41M[1:0] P40M[1:0] / - - - - / / / /

x x x x 1 0 1 0

7~0 PxyM1 : PxyM0

x=1 2 3 4(y=0~7)

Pxy PxyM1 PxyM0 Pxy PxyM[1:0] 00 01 10 11

P1 (90h) P1 ( / ) 7 6 5 4 3 2 1 0

P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 / / / / / / / / /

1 1 1 1 1 1 1 1

P2 (A0h) P2 ( / ) 7 6 5 4 3 2 1 0

P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 / / / / / / / / /

1 1 1 1 1 1 1 1

P3(B0h) P3 ( / ) 7 6 5 4 3 2 1 0

P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 / / / / / / / / /

1 1 1 1 1 1 1 1

P4 (C0h) P4 ( / )


SinOne Chip SC91F73 7 6 5 4 3 2 1 0

- - - - - - P4.1 P4.0 / - - - - - - / /

x x x x x x 1 1

7~0 P1.x

x=0~7P1

7~0 P2.x(x=0~7)

P2

7~0 P3.x(x=0~7)

P3

1~0 P4.x(x=0,1)

P4

14.3 I/O

15. ADCSC91F73 10-bit 12 ADC ADC 3

VDD VDD Regulator 2.4V

P3.0(Vref)

15.1 ADCADCCFG0 (BDh)P2 ADC /

7 6 5 4 3 2 1 0

VREFS[1:0] - P24AIN11 P23AIN10 P22AIN9 P21AIN8 P20AIN7

/ / / - / / / / / n n x 0 0 0 0 0

ADCCFG1 (BEh)P3 ADC / 7 6 5 4 3 2 1 0

P37AIN6 P36AIN5 P35AIN4 P34AIN3 P33AIN2 P32AIN1 P31AIN0 -

/ / / / / / / / - 0 0 0 0 0 0 0 x

7~6 VREFS[1:0]

00 VREF VDD 01 VREF 2.4V 10 VREF Vref pin P3.0 11

4~0 P2yAINn P2 ADC0 P2.y GPIO 1 P2.y ADC Channel n

7~1 P3yAINn P3 ADC0 P3.y GPIO


SinOne Chip SC91F731 P3.y ADC Channel n

ADCCR (C5h)ADC

7 6 5 4 3 2 1 0

ENADC ADCS LOWSP EOC ADCIS[3:0]/ / 1 / / / / / /

0 0 0 0 0 0 0 0

7 ENADC ADC

0 ADC 1 ADC

6 ADCS ADC ADC Start bit “1”, 1 ADC ADC

1 5 LOWSP ADC

0 ADC clock Fosc 1 ADC clock Fosc/6 ADC 89 ADC CLOCK

4 EOC /ADCIF /ADC (End Of Conversion / ADC Interrupt Flag)0 1 ADC ADC EOC ADCS ,

0 , 1 ; ADC ADCIF

ADC ADC ADC ,

3~0 ADCIS[3:0] ADCIS[3:0] ADC (ADC Input Selector)0000 := P3.1 ADC Input. 0001 := P3.2 ADC Input. 0010 := P3.3 ADC Input. 0011 := P3.4 ADC Input. 0100 := P3.5 ADC Input. 0101 := P3.6 ADC Input. 0110 := P3.7 ADC Input. 0111 := P2.0 ADC Input. 1000 := P2.1 ADC Input. 1001 := P2.2 ADC Input. 1010 := P2.3 ADC Input. 1011 := P2.4 ADC Input.

ADCVH (C6h)ADC 8 ( / ) 7 6 5 4 3 2 1 0

ADCV[9:2] / / / / / / / / /

1 0 0 0 0 0 0 0

ADCVL (C7h) ADC 2 / 7 6 5 4 3 2 1 0


SinOne Chip SC91F73 - - - - - - ADCV[1:0]

/ - - - - - - / / x x x x x x 0 0

7~0 ADCV[9:2] ADC 8 2~0 ADCV[1:0] ADC 2

IE (A8h) /

7 6 5 4 3 2 1 0

EA EADC ESIF EPWM ET1 EX32K ET0 -/ / / / / / / / -

0 0 0 0 0 0 0 x

6 EADC ADC

0 EOC/ADCIF 1 EOC/ADCIF

IP (B8h) ( / ) 7 6 5 4 3 2 1 0

- IPADC IPSIF IPPWM IPT1 IPX32K IPT0 -/ - / / / / / / -

x 0 0 0 0 0 0 x

6 IPADC ADC

0 ADC “ ” 1 ADC “ ”

15.2 ADC

ADC ADC P2yAINn/P3yAINn ADC ADC ;

ADC Vref, ADC ;ADCADC ( ADCIS ADC );ADCS ;EOC/ADCIF=1 ADC ADC 0 EOC/ADCIF ;

ADCVH ADCVL 10 ;5~7 ;

IE[6](EADC) , EOC/ADCIF, ADC

, EOC/ADCIF, ADC

16. IAP(IN APPLICATION PROGRAMMING) SC91F73 256B Flash In Application Programming IAP

Flash EEPROM SC91F73 8M Hz IAP 16MHz


SinOne Chip SC91F73IAP , 8K Flash ROM 256 Bytes (1F00H ~ 1FFFH)

16.1 IAP IAP SFR

7 6 5 4 3 2 1 0 Reset IAPKEY EAH IAP IAPKEY[7:0] 00000000bIAPADL ECH IAP IAPADR[7:0] 11111111bIAPDAT EDH IAP / IAPDAT[7:0] 11111111b

IAPCTL EEH IAP - - - - PAYTIMES

[1:0] CMD[1:0] xxxx0000b

IAPKEY EAH IAP / 7 6 5 4 3 2 1 0

IAPKEY[7:0]/ / / / / / / / /

0 0 0 0 0 0 0 0

7~0 IAPKEY[7:0] IAP IAP

n IAP nIAP IAP

IAPADL ECH IAP 8 7 6 5 4 3 2 1 0

IAPADR[7:0]/ / / / / / / / /

1 1 1 1 1 1 1 1

7~0 IAPADR[7:0] IAP 8

IAPDAT EDH IAP 7 6 5 4 3 2 1 0

IAPDAT[7:0]/ / / / / / / / /

1 1 1 1 1 1 1 1

7~0 IAPDAT IAP

IAPCTL EEH IAP 7 6 5 4 3 2 1 0

- - - - PAYTIMES[1:0] CMD[1:0] / - - - - / / / /

x x x x 0 0 0 0

3~2 PAYTIMES[1:0] IAP CPU Hold Time

00 CPU HOLD TIME 8ms@8MHZ 01 CPU HOLD TIME 4ms@8MHZ 10 CPU HOLD TIME 2ms@8MHZ 11


SinOne Chip SC91F73CPU Hold PC

Hold

1~0 CMD[1:0] IAP 00 := ( )01 := ( )10 := 11 := ( )

16.2 IAPSC91F73 IAP :

IAPDAT[7:0] IAP {IAPADR[12:8], IAPADR[7:0]} IAP IAPADR[12:8] 1IAPKEY[7:0] 0 n IAP n IAP

IAPCTL[3:0] CPU Hold CMD[1:0] 10 CPU Hold IAP IAP CPU

MOVC DATA IAPKEY[7:0]IAPCTL ,

16.3 IAP#include ”intrins.h” unsigned char code *POINT=0x1f00; unsigned char DATA1,ADDR1;

IAP C DemoIAPDAT=DATA1; // DATA1 IAP IAPADL=ADDR1; // ADDR1 IAPKEY=0xf0; // IAPCTL

// 240 0xf0 IAP ; //

IAPCTL=0x06; // IAP , 4ms@8M _nop_(); // ( 1 _nop_()) _nop_(); _nop_(); _nop_();

IAP C Demo

DATA1=*(POINT+ADDR1); // ADDR1 DATA1 IAP Demo

MOV DPTR #1f00H; //DPTR MOV A, ADDR1; // A MOVC A, @A+DPTR; // ADDR1 A


SinOne Chip SC91F7317.

UNITVDD/VSS -0.3 5.5 V

Voltage ON any Pin

/ -0.3 VDD+0.3 V

TA -40 85TSTG -55 125

UNITVDD 3.6 5.5 V TA -40 85

VDD = 3.6V ~ 5.5V, TA = +25 , )

Iop1 5 20 mA IRC=16MHz VDD=5V

Iop2 4 20 mA IRC=8MHz VDD=5V

IpdPower Down

- 0.1 1 uA IRC=16MHz VDD=5V

IO

Imax VSS GND 100 mA VDD=5V

IOVIH 0.7VDD - VDD+0.5 V VIL -0.5 - 0.35VDD V

VIH,RST , RST 2.0 VDD V VIL,RST , RST -0.2 1.5 V IOL1

P2/P3/P1.0/P1.1 20 mA VDD=5V

Vpin=0.8VIOL2

P1.2~P1.7/P4 35 mA VDD=5V

Vpin=0.8VIOL3

P2/P3/P1.0/P1.1 10 mA VDD=5V

Vpin=0.4VIOL4

P1.2~P1.7/P4 20 mA VDD=5V

Vpin=0.4VIOH1

P1/P2/P3/P450 uA VDD=5V

Vpin=4.7VIOH2

P1/P2/P3/P410 mA VDD=5V

Vpin=4.3VIOH3

P1/P2/P3/P45 mA VDD=5V

Vpin=4.7V2.4V

VDD24 2.4V 2.37 2.4 2.43 V TA=-40~85

VDD = 3.6V ~ 5.5V, TA = 25 , )


SinOne Chip SC91F73Tosc IRC 5 20 us IRC=16MHz

VDD=5V T32kosc 32K 0.8 2 s VDD=5V

Treset 64 us FIRC RC 15.70 16.00 16.30 MHZ VDD=5V

TA=-40~85

ADC TA = 25 , )

VAD 3.8 5.0 5.5V V NR 10 bit GND VAIN VREF

VAIN ADC GND VDD V RAIN ADC 5 M VIN=5V Rref Vref 13.5 KZAIN 10 KIADC ADC 1.0 mA ADC

VDD=5V DNL 1 1.5 LSB VDD=5V INL 3 5 LSB VDD=5V EAD 3 5 LSB VDD=5V TADC ADC 89 ADC CLKs VDD=5V

10bit

1 ADC 2.5V 1/2 Vref 0.4V-1~+5LSB

2 ADC ADC 2LSB 9

3 ADC


SinOne Chip SC91F73

0 100 200 300 400 500 600 700 800 900 10000

100

200

300

400

500

600

700

800

900

1000


SinOne Chip SC91F7318

SC91F73K/028KU SKDIP28 SC91F73M/028MU SOP28



SKDIP 28 300mil :E1

A

mm( )

A 3.00(BSC)

B 0.457(BSC)

B1 1.524(BSC)

D 35.256 35.306 35.356

E 7.574 7.874 8.174

E1 7.165 7.215 7.265

e1 2.54(BSC)

eA 9.130 9.430 9.460

3 - 12


SinOne Chip SC91F73SOP28L(300mil)

1

L

LE

14

See Detail F

Detail Fb

1528e1

e1

s

D

Seating Planey

e

mm( )

A 2.465 2.515 2.565

A1 0.100 0.150 0.200

A2 2.100 2.300 2.500

b 0.356 0.406- 0.456

C 0.254(BSC)

D 17.750 17.950 18.150

E 7.374 7.450 7.574

HE 10.100 10.300 10.500

e 1.270(BSC)

L 0.764 0.864 0.964

LE 1.303 1.403 1.503

0 - 10

S 0.745(BSC)



V1.3

SKDIP28 SOP28L 2012 6

V1.2 BUZZERSIF

8M Hz IAP16M Hz IAPIRC 2.4V

IAP

2012 3

V1.1 P1.2~P1.7 P4 LED32K

IAP

2011 10

V1.0 2011 5

Documents

SinOne Chip SC91F73 12 10 ADC 1T 8051 Flash MCUszcdxkmcu.com/PIC/PIC/SC91F73v1.3cn[1].pdf · Page 2 of 63 V 1.3 SinOne Chip SC91F73 9 INTERRUPT .....24