SET 1

16 BIT ADDITION

8100: LHLD 8200XCHGLHLD 8202 MVI C, 00DAD DJNC 810EINR CSHLD 8300MOV A, CSTA 8302HLT

MEMORY ADDRESSDATA 1 (WITHOUT CARRY)

DATA 2(WITH CARRY)

INPUT

8200H

8201H

8202H

8203H

45233412

FFFF0100

OUTPUT

8300H(SUM-lower)8301H(SUM-Higher)

8302H(CARRY)

793500

000001

INTEGRATOR

8100: LHLD 8200 : Get first 16-bit number in HLXCHG : Save first 16-bit number in DELHLD 8202 : Get second 16-bit number in HLMOV A, E : Get lower byte of the first numberADD L :add lower byte of the second numberMOV L, A : Store the result in L registerMOV A, D : Get higher byte of the first numberADC H : add higher byte of second number with borrowMOV H, A : Store l6-bit result in memory locations .SHLD 8300 : Store l6-bit result in memory locations 8300H and 8301H.MOV A, CSTA 8302 store the carry at 8302 memory location HLT : Terminate program execution.

MEMORY ADDRESSDATA 1 (WITHOUT CARRY)

DATA 2(WITH CARRY)

INPUT

8200H

8201H

8202H

8203H

45233412

FFFF0100

OUTPUT

8300H(SUM-lower)8301H(SUM-Higher)

8302H(CARRY)

793500

000001

BINARY TO GRAY CODE CONVERTER:

LOGIC DIAGRAM:

TRUTH TABLE:

DECIMALBINARY CODE GRAY CODE

D C B A G3 G2 G1 G00 0 0 0 0 0 0 0 01 0 0 0 1 0 0 0 12 0 0 1 0 0 0 1 13 0 0 1 1 0 0 1 04 0 1 0 0 0 1 1 05 0 1 0 1 0 1 1 16 0 1 1 0 0 1 0 17 0 1 1 1 0 1 0 08 1 0 0 0 1 1 0 09 1 0 0 1 1 1 0 1

10 1 0 1 0 1 1 1 111 1 0 1 1 1 1 1 012 1 1 0 0 1 0 1 013 1 1 0 1 1 0 1 114 1 1 1 0 1 0 0 115 1 1 1 1 1 0 0 0

MEMORY LABEL MNEMONICS

8500 START LDA 8200H

8503 MOV D,A8504 LDA 8201H

8507 MOV B,A8508 DCR D8509 MVI C,00850B L2 ADD B850C JNC 8510 (L1)850F INR C8510 L1 DCR D8511 JNZ 850B (L2)8514 STA 83008517 MOV A,C8518 STA 8301851B HLT

FULL SUBTRACTOR

TRUTH TABLE: FULL SUBTRACTOR

S.No INPUT OUTPUTA B C DIFF BORR

1. 0 0 0 0 02. 0 0 1 1 13. 0 1 0 1 14. 0 1 1 0 15. 1 0 0 1 06. 1 0 1 0 07. 1 1 0 0 08. 1 1 1 1 1

DIFF = A’B’C + A’BC’ + AB’C’ + ABC = A B CBORR = A’B + A’C + BC

MEMORY LABEL MNEMONICS8500 START LDA 82008503 MOV D,A8504 LDA 92018507 MVI C,008509 L1 SUB D850A INR C850B CMP D850C JNC 8509 (L1)850F STA 83008512 MOV A,C

8513 STA 93018516 HLT

ADC

Digital Output = Analog Input * 256 / Vref

ADDRESS LABEL MNEMONICS8000 LXI H,8100H

8003 MOV B,058005 DEC B8006 MOV A,M8007 LOOP1 INX H8008 CMP M8009 JC AHEAD(800D)800C MOV A,M800D AHEAD DCR B800E JNZ LOOP1(8007)

8011 STA 8200H

8014 STOP HLTDAC PROGRAM FOR 8085:

8500 MVI A, 80h ; CNTRL WORD 8502 OUT 23 ; CONTROL REG 8504 MVI A,00h ; DIGITAL INPUT DATA1 8506 OUT 20h 8508 MVI A, 80h ; DIGITAL INPUT DATA 2 850A OUT 21 850C MVI A, 00h ; DAC SELECTION DATA

(00 OR 01) 850E OUT 22 8510 RST 1

Analog Output = Digital Input * Vref / 256

ADDRESS LABEL MNEMONICS8000 LXI H,8100H

8003 MOV B,058005 DEC B8006 MOV A,M8007 LOOP1 INX H8008 CMP M8009 JNC AHEAD(800D)800C MOV A,M800D AHEAD DCR B800E JNZ LOOP1(8007)8011 STA 8200H

8014 STOP HLTFULL ADDER

SUM = A’B’C + A’BC’ + AB’C’ + ABC = A B CCARRY = AB + AC + BC

Program (addition):

ADDRESS LABEL MNEMONICS9100 START CLR C

MOV R0, #00MOV A,#05MOV B,#03ADD A,BMOV DPTR,#9200JNC AHEADINC R0

AHEAD MOV X @DPTR,AINC DPTRMOV A,R0MOV X @DPTR,A

HERE SJMP HEREPROGRAM (SUBTRACTION):

ADDRESS LABEL MNEMONICS9100 START CLR C

MOV R0, #00MOV A,#05MOV B,#03SUBB A,BMOV DPTR,#9200JNC AHEADINC R0

AHEAD MOV X @DPTR,AINC DPTRMOV A,R0MOV X @DPTR,A

HERE SJMP HERE

PROGRAM (MULTIPLICATION):

Address Label Mnemonics

9000 START MOV A,#05MOV F0,#03MUL ABMOV DPTR,#9200MOVX @ DPTR,AINC DPTRMOV A,F0MOVX @DPTR,A

HERE SJMP HEREPROGRAM (DIVISION):

Address Label Mnemonics9000 START MOV A,#05

MOV F0,#03DIV ABMOV DPTR,#9200MOVX @ DPTR,AINC DPTRMOV A,F0MOVX @DPTR,A

HERE SJMP HERE

MEMORY LABEL MNEMONICS

8500 START LDA 8200H

8503 MOV B,A

8504 LDA 8201H

8507 MVI C,00

8509 SUB B

850A JNC LOOP1

850D INR C

850E LOOP1 STA 8300H

8511 MOV A,C

8512 STA 8301H

8515 STOP HLT

STEPPER MOTOR

start: MOV DPTR,#4003H ;CONTROL PORT OF 8255 MOV A,#80H MOVX @DPTR,A ;ALL BITS OUTPUTS MOV DPTR,#4000H LOOP: MOV A,#0A0H ;0A6H ;FIRST STEP SEQUENCE MOVX @DPTR,A LCALL DELAY ;DELAY BEFORE ISSUING THE NEXT STEP COMMAND MOV A,#0E0H ;0E7H ;SECOND STEP SEQUENCE MOVX @DPTR,A LCALL DELAY ;DELAY MOV A,#0C0H ;0C5H ;THIRD STEP SEQUENCE MOVX @DPTR,A LCALL DELAY ;DELAY MOV A,#80H ;84H ;FOURTH SEQUENCE

MOVX @DPTR,A LCALL DELAY ;DELAY LJMP LOOP ;REPEAT

DELAY SUBROUTINE: MOV R1,#0AH LAB1: MOV A,#40H LAB2: NOP NOP NOP NOP DEC A JNZ LAB2 DJNZ R1, LAB1 RET

Memory address Mnemonics 8100 LXI H,8200

MOV A,MADD AMOV B,AADD AADD AADD BINX HADD MINX HMOV M,AHLT

KEYBOARD PROGRAME FOR 8085:9000 3E 12 MVI A, 129002 32 01 60 STA 60019005 3E 3E MVI A, 3E9007 32 01 60 STA 6001900A 3E A0 MVI A, A0

900C 32 01 61 STA 6001900F 06 08 MVI B, 089011 3E 00 loop: MVI A, 009013 32 00 60 STA 60009016 05 DCR B9017 C2 11 90 JNZ loop901A 3A 01 60 L1:LDA 6001901D E6 07 ANI 07901F CA 1A 90 JZ L19022 3A 00 60 LDA 60009025 E6 3F ANI 3F9027 CF RST 1

DISPLAY PROGRAME FOR 8085: 8500 3E 12 MVI A,12 ; control word to define 8279 ; In 8 bit 8 character display 8502 32 01 61 STA 6001 ; 8279 control port 8505 3E 3E MVI A,3E ; for frequency division into 8279 8507 32 01 60 STA 6001 ; into 8279 control reg. 850A 3E A0 MVI A,A0 ; display/write inhibit 850C 32 01 60 STA 6001 ; into 8279 850F 06 08 MVI B,08 8511 3E 00 MVI A,00 ;clear the display 8513 32 00 60 L1: STA 6000 8516 05 DCR B 8517 C2 13 85 JNZ L1 851A 0E 06 MVI C,06 851C 21 00 90 LXI H,9000 ;Input code starting address 851F 7E L2: MOV A,M 8520 32 00 60 STA 6000 8523 23 INX H 8524 0D DCR C 8525 C2 1F 85 JNZ L2 8523 CF RST 1

INPUT CODE ADDRESS:

1ST Digit 9000

2ND Digit 9001

3RD Digit 9002

4TH Digit 9003

5TH Digit 9004

6TH Digit 9005

565 PLL

SUM OF N NUMBERS

MOV 40H, #02H store 1st number in location 40HMOV 41H, #04H MOV 42H, #06H MOV 43H, #08H MOV 44H, #01H MOV R0, #40H store 1 st number address 40H in R0MOV R5, #05H store the count {N=05} in R5 MOV B,R5 store the count {N=05} in B CLR A Clear Acc

LOOP: ADD A,@R0INC R0DJNZ R5,LOOPMOV DPTR,#9200MOVX @ DPTR,A

HERE SJMP HERE

OUTPUT: 9200 - 15

Answer: 02+04+06+08+01 = 21(decimal) = 15 (Hexa)

The I/O address for 8085:Counter 0 - 4000

Counter 1 - 4001 Counter 2 - 4002 Control reg - 4003Steps:

Enter the program into the kit.Connect the PCLK and CLK2 through a wire connecter.Now execute the program.Now see the output waveform on the OUT2.

PROGRAM 1 :

9000: 3E 37 MVI A, 37 ; cntrl word for 8253.counter 0 is selected

9002: 32 03 40 STA 4003 ; cntrl reg

9005: 3E F7 MVI A, F7 ; LSB of the frequency divider

9007: 32 00 40 STA 4000 ; out it in counter 0

900A: 3E 00 MVI A, 00 ; MSB of the frequency divide

900C: 32 00 40 STA 4000 ; out it in counter 0

900F: CF RST 1 ; end

Note: A change in the value of MSB and LSB causes the change in frequency of Counter 0

4-bit Serial-in to Serial-out Shift Register

4-bit Parallel-in to Serial-out Shift Register

DESIGN OF 4-BIT SYNCHRONOUS UP COUNTER

2:4 DECODER:

INPUT OUTPUTX Y D1 D2 D3 D4

0 0 1 0 0 00 1 0 1 0 01 0 1 0 1 01 1 0 0 0 1

LOGIC DIAGRAM (2:4 Decoder)

PROGRAM (MULTIPLICATION):Product of 2 - 8bit numbersAddress Label Mnemonics

9000 START MOV A,#05MOV F0,#03MUL ABMOV DPTR,#9200MOVX @ DPTR,AINC DPTRMOV A,F0MOVX @DPTR,A

HERE SJMP HERE

FIND ODD or Even: {output=0 EVEN, output=1 ODD}MOV A,#08MOV B,#02DIV ABMOV DPTR,#9200MOV B,AMOVX @DPTR,A

DAC using 8051:

8255 control register address - 4003H 8255 Port A address - 4000H 8255 Port B address - 4001H 8255 Port C address - 4002H

PROGRAM:

8500 90 40 03 MOV DPTR,#4003 ; CONTROL REGISTER ADDRESS

8503 74 80 MOV A, #80 ; 8255 CNTRL WORD (ALL PORTS

ARE O/P)

8505 F0 MOVX @DPTR, A ; ALL PORTS AS O\P

8506 74 00 MOV A, #00 ; DIGITAL INPUT DATA1

8508 90 40 00 MOV DPTR, #4000

850B F0 MOVX @DPTR, A ; DIGITAL DATA TO PORT A

850C 74 80 MOV A, #80 ; DIGITAL INPUT DATA2

850E 90 40 01 MOV DPTR, #4001

8511 F0 MOVX @DPTR, A ; DIGITAL DATA TO PORT B

8512 90 40 02 MOV DPTR, #4002

8515 74 00 MOV A, #00 ; DAC SELECTION DATA

(00 OR 01)

8517 F0 MOVX @DPTR, A ; DIGITAL DATA TO PORT C

8518 12 00 BB LCALL 00BB